--y

RADC-I' I-77-321Final Tecnnical ReportOctobet 1977

0

THERMAL RESI,STANCE OF MICROELECTRONIC PACKAGES

General Electric Company

Approved for public release; di3tribution unlimited.

C) ROME AIR DEVELOPMENT CENTEIRAir Force Systems Command

LJ.J 0.4ffis. Air Force Base, New York 1,34A1

LA-I

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': i•'; :/.-. , ,- -._._%,;.A ,

Thia ispprt has been reviewed by the RADC Infor"Caluu Office (01) andis releasable to. the Naational Technical Information Service (NTIS). At.NTISItwill b~e releaeable to the general public:, in~cluding foreign nations.

This report has been reviewed and is approved for publication.

APPROED: IA0~,W %REGIS C. HLLOW,

e?roject. Englneer

APPROVED.

JOSEPH J *NARESKY

Chief, Reliability and Compatibility Division

FUR THiE '.voiUMýXANR: A('-'-

4'jOHN P. HUSSActing Chiuf, Pi~t,.; O~fi.-v

If your addres' s has c~hanged or it you wish to be removed from the RADC

mailing list, or if the addressee is no longer employed by your, organization,4

maint.Aining a current mailing list.

Do ntot retura this copy. Retain or dostrroy.

UNCLASSIFIED ___________

5;fCUKITXLASSIrICATION Or TH4IS IAOE (Wh~en Data Entered)

REPORT DOCUMENTATION PAGE BEFORE COPEIGFORM1. IIX~qC[NUftXK2. GOVT ACCESSIO N RECIPIENT'S CArALUU NUMBEIII

THERMAL REZSTISTAN .CE OFY,.ICROELECTRONIC PACKAGES, Ainal 3076c6iMay Wpt

James W.)Ansloý,

Gene K./Baxter lett F369'2-7ý6-C-)$228_1, wItevIroiail le DRS ot LMNTPOETGeneral Electric Company

I I. CONTROLLING OFFICC NAME AND ACOV413i. 11OI5r

14. Mo IT IM GN V N 10911i t d~iffereTimntfromChrtting office) It, 11CURITY CLA 1S (of this report)

IS&. DEC kaSI ICATION/ DOWNORASIN

0. 01111tiIUUTION 0TTM N . u Report)

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Wi SU7OPLKMKNTARY NOTKI

RADC Project Engineer: Regis C. Hilow (I&BUI)

IS, KEY 11O11112 (Coniinue on reveres side if n~oeseery end Identify~ by blockt riunP'e,.

Integrated Circuits, Junction Temperature, Chip-Carrier Temperature, ComputerSimulation, Experimental Testing, Thermal Resistance, Wire-Boniding, Junction,Size, Elevated Temperature, Infrared Temperature Measurement, Thermdl TimeConstant, Temperature Response, Thermal Models, Experimental Data, Micro-

electronic Packages ieineeerenidniiby6.kumr)20. AIRACT (Contiflue on toet'e sie I aosr n dniyb lc ubr

Computer simulation, IR and eieetcical tu 0i~r&rLure mneasurements were

h ~compared and evaluated for special thermal test packages. The Junction usie wasvaried and elevated chip-carrier temperatures ware studied to determine theireffects on the thermal characteristics. In addition a comparison of the film-Inagrnerl thep dntaesconnedthan t tchniuersal re irne-bningreacdhiniquicantlydecarreneral chip intershonnetiont echniqae versustac webnincrae techniqfescantladewit-h tle-vated temp eratures and with decreasing Junction usie. Thermal time

DD FJQN. 1413 KDITION OPP I NOV 69 14 085OLETE 1%rSK6LufiiývYCLASAI ICATION 0? THIS PAGE K (9n Date In'tered)

-7--

UNCLASSIFIED I..* ISECURITY CLASSIFICATION OF THIS PAOE(1"IW, bmat& EnteradJ ,

constants increased with elevated temperature and increasing junction size.Little difference was found between the film carrier and wire-bondinterconnection techniques when the chip is bonded to a chip-carrier, but thefilm carrier is significantly better if the chip is heat sunk only through its

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UNCLASSIFIEDO

SECURITY"CLASSIFICATION.O..T.I........ uM Data XFfored

ACKNOWLEDGEMENTS

byexrsg would like toacnowldg ther helay have received during this projectby xprssig ur-sinereUu~s to r. ayTriche and Mr. Alex Louie who

performed teexperimental tnstoM.Edwin Fung wohelpedwihteCmputer Simulations, and to Mr. Vladimir Popoff and his staff who prepared themanfusc ript.

We would also like to express our special thanks to Mr. Regis -C . Hilow,RADC Project Engineer, for his cooperation and interest through this pro4,ct.

This project was sponsored by the USAF/Rome Air Development Center(RERM), Griffiss AFB, Rome, N.Y., 13441 under Contract No, F30602 -76 -C -0228, Purchase Request No. N-6-5011 (GE/E lectronics Laboratory Project No.260-DZ -894400).

Its

KN E MI.

""ABLE OF CONTENTS

Section Title Page

1.0 INTRODUCTION .......... ...............

1.1 PREVIOUS STUDY ............. . . . . . . . . .1.2 SUMMARY OF 1976-77 PROJECT...... ........ ... 11.3 COMPUTER PROGRAM........... 41.4 MATHEMATICAT MODELS ................... 41.5 TECHNICAL APPROACH . . . . . . . . ..... . 6

2.0 JUNCTION TEMPERATURE CHARACTERISTICS .......... ..11

2.1 COMPUTER-AIDED SIMULATION AND ANALYSIS. . . .

2.1.1 General. .................. .. 112.1.2 Thermal Characteristics ............. . . ..2.1.3 Theoretical Conclusions . . . . . . . . . .. 27

2.2 EXPERIMENTAL MEASUREMENTS .............. . 31

2.2.1 Objectives .................... 312.2.2 Improved Coating Techniques . . . ...... 312.2.3 High Resolution Infrared Techniques .... .... 312.2.4 Transient Thermal Impedance Measurements 352.2.5 D.C. Pulsed Power Measurements ..... ..... 462.2.6 FIorced Air Cooling. .......... . . . 48

2.2.7 I"L Device Measurements. . . ........ 47

2.3 COMPARISON OF COMPUTER-AIDED SIMULATION ANDEXPERIMENTAL RESULTS ............. .48

2.3.1 Transient Temperature Decay ............. 482 .3.2 Variation of Thermal Resistance with Power , 48

2.4 RECOMMENDATIONS ....... ................. 52

3.0 HIGH TEMPERATURE THERMAL CHARACTERISTICS. . . . . . 53

3.1 COMPUTER-AIDED SIMULATION AND ANALYSIS .... 53

3.1.1 General ....................... .533,1.2 Thermal Characteristics .............. .. 533.1.3 Theoretical Conclusions. . . ........ 60

3.2 EXPERIMENTAL RESULTS .................... 60

3.2.1 General Remarks ...... .............. 603.2.2 High Temperature Measurements . . . . . . . 633.2.3 Effect of Power Level on 0 ....... 63

Sii

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TABLE OF CONTENTS (Continued)

Section Title Page

3.3 COMPARISON OF COMPUTER-AIDED SIMULATIONAND EXPERIMENTAL RESULTS . .. .. .. .. . . .

4.0 FILM CARRIER THERMAL CHARACTERISTICS .. .. .. ........ 67

.4.1 COMPUTER-'AIDED SIMULATION AND ANALYSIS -

4.1.1 General Remarks ...... ........... ... 674.1.2 Resudts ........... ................... 674.1.3 Theoretical Conclusions ..... ...... ...... 70

4.2 EXPERIMENTAL MEASUREMENTS ............. ... 74

4.2.1 General Remarks. .. .......... ............ 744.2.2 Film Cart~ier Devices .... .. ................ 74

REFERENCES .. .. ...... .................. .............. 77

j , APPENDIX A -- THERMAL RESISTANCE OF MICROELECTRONICPACKAGES ........... . ..... . A-1

APPENDIX B -- A NEW RECOMMENDED METHOD 1012(THERMAL CHARACTERISTICS) FORMIL-STD-883 .......... ................. ... B-i

APPENDIX C -- ANALYSIS OF INFRARED MEASUREMENT

TECHNIQUES ............ .................. C-i

APPENDIX D -- IMPROVED IR SURFACE TEMPERATUREMEASUREMENTS FOR INTEGRATED CIRCUITS. . . D-i

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LIST OF ILLUSTRATIONS

Page1.1 Thermal Test Chip .............. ............ 2

1.2 Basic lnfrared Microscope Test Set-Up . . . ............ 3

1.3 SCP-14 Chip Mathematical Model . . .............. 5 . .'

1.4 Physical Characteristics of the Junction Region of. Thermal Test Chip. 71 .5 SCP 14 Junction Region Mathematical Model ................... 8

1.6 Effect of Temperature on Thermal Conductivity of Silicon and Alumina 9

2.1 Nodal Pattern for Junction Region Model Showing Range of A. Used . 12

2.2 Comparison of Thermal Resistance Values as a Function of JunctionSize......... ...................... . 14

22.3 Isothermal Plot, Aj 10. 92 Mils . .. .. ............ 16 +•

2.4 Isothermal Plot,Aj = 6o 86 Mils . . . . . . .......... 172

2.5 Isothermal Plot, A= 4.05 Mils......... . . . . ..... . 18

2.6 Isothermal Plot, Aj= 1.12 Milse .......... .0....... ....... 19

22.8 Isothermal Plot, Aj = 0.30 MiS... ....... .... ....... ... 21

22.9 Isothermal Plot, A = 0.18 Mile . . .......... ... 22Jt

9. 10 Comparison of Average Surface Thermal Resistance as a Function ofSurface Area for A= 1. 12 Mil2 . . . . . .. . . . . . . . . . . 2 3

2.13 Comparison ot Average Surface Thermal Resistatnce as a Function ofSurface Area for Different Size Junction Areas ..... ...... .... 24

2.12 Comparison of the Thermal Resistance as a Function of Chip-CarrierTemperature for Various Junction Areas ....... ... ........ 25

2.13 Comparison of Thermal Resistance as a Function of Junction Area atVarious Chip Carrier Temperatures ......... ... ......... 26

2. 14 Comparison of Thermal Resistance as a Function of Input Power forVarious Junction Areas ....... ... ............... .... 28

2.15 Transient Temperature Response Relative to Junction RegionTemperature for Various Junction Areas ......... ... ....... 29

2.16 Comparison of Thermal Time Constant as a Function of Junction Size. . 30

2.17 Spinner used for Applying Coatings ................ . . .. 32

2.18 Device With Coating .............. ...................... 33

2.19 Device With Coating After Application of Alcohol ............... 332.20 High Resolution Test Set-Up ....... ............ . . . . . . . 34

2.21 Modification to Microscope for High Temperature and High ResolutionTests ......... ........................... 36

2.22 Modification of Scope ....... ........ .. ......

iv

4 ... ... ..... ..... .... .... ... ... . .. . . , . . . . , e , , . • , , . _ , j + •~

LIST OF ILLUSTRATIONS (cont.)

2.23 Heat: Sink Assembly. . . ....... ........... 38

2.24 Comparison of Thermal Temperature Rise as Function ofPower Input at T =600 C ........ .. ....... 39

2.25 ompaison f Tgperature Rise as a. Function of PowerInput at TS 100C .......... . . . ... 40

2.26 Comparison of Thermal Resistance (%SA.CC) as Function ofChip-Carrier Temperature . . . ............ 41

2.27 Transiert Temperature Block Diagram . . . . . . . . . .. 43

2.28 Transient Temperature Decay .... ....... 44

2.29 Transient Temperature Decay - Log-Log Plot ........... 45

2.30 Transient Temperature Decay of SCP 14 Test Chip . . . . . . 49

2.31 Chip With Solder Void ............. .............. 50

2.32 Comparison of Thermal Resistance With Power BetweenComputer Results and Experimental Results ........... ..51

[ 3.1 Comparison of Thermal Resistance Values as a Function ofChip-Carrier Temperature . . ............. 55

3.2 Isothermal Plot, TC = 70°C . . . . ......... 56

3.3 Isothermal Plot, q' =1560C. . . . . . . . . . . . . . .57

3.4 Isothermal Plot, Tcc = 206°C ...... ............... 583.5 Isothermal Plot, TC 257°C ..... ............... ..59

3.6 Transient Temperature Response Relative t~o Chip-CarrierTemperature for Various Values of Chip-CarrierTemperature ....... ................... . . . .61

3.7 Comparison of Predicted OSA-CC Reading as a Function ofChip-Carrier Temperature for IR Microscope Measurements . 62

3.8 Typical Data Plot ATSA.CC as a Function of Power Input , . . 64

3.9 Variation of Thermal Resistance with Temperature ..... 65

3.10 Comparison of Computer Results With Experimental Results. .66

4.1 Physical and Mathematical Models of Film CarrierConnection Region . . . . . . . .. . . . . . . . . . . . 68

4.2 Physical and Mathematical Models of Wire Bond ConnectionRegion n ............................ . . . 69

4.3 Isothermal Plot - Film Carrier Connection Model . . . ... 71

4.4 Isothermal Plot - Wire Bond Coinnection Model . . . . 72

4.5 MC 5404 Chip . . . .................. 75

4.6 MC 5404 in D-1 Package .... . . . . . . . . . . . . .76

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LIST OF TABLES

2.1 Comparison of the Thermal Resi3tmnce Values for Various SizedJunction Areas with Chip Carrier Temperature (Tcc) of 600 Cand Chip Power q4c) of 1.5 Watts. ................ 13

2.2 Thermal Resistance Measured at End of Off-Time for Various DutyCycles .. . . ............... . . . . . ... . . ........................ 46

2.3 Thermal Resistance Values for Increasing Temperature. With or

Without a Forced Air Ambient..... ................. . . 47

2.4 Thermal Resistance of I L Circuit in DI Dip.. ........... 47

3.1 Comparison of Thermal Characteristics for SCP 14 Thermal TestChip at Various Chip Carrier Temperatures .... .......... ... 54

4.1 Comparison of the Thermal Characteristics Between Film Carrierand Wire Bid Connections ...... .................. . . 73

4.2 Thermal Resistance of Film Carrier Ps'ckages ............ ... 74

vi.

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GOSSARY OF TERMS

A Area (inch2 )

D Diameter (Inch)

4 Power Input (watts)

T Temperature CDC)

e Thermal Resistance (°C/W)

T Thermal Time Constant (tisec and msec)

SUBSCIlIPTS

JA Junction Average

JR Junction Region

Jp Junction Peak

SA Surface Average

CC Chip Carrier

j Junction

C Chip

HS Heat Sink

M Model

e equivalent

L lead

CR Connection Region

X, Y Generic Location

SS steady State

S Surface

viiivi

t i........................... .

AtI EVALUATION

The objective of this effort was to determine the thermal characteristicsof special microelectronic devices, such as beam lead and film carrier typepackages and small geometry type transistors used in complex microcircuits.Alsoi the thermal characteristic of JAN type microcircuits were evaluated ataccelerated temperatures. This effort was a continuation of an initial studyaimed at refining the test procedures of Method 1012 of MIL-STD-883 formeasuring thermal iesistance and thermal time constants of microelectronicdevices.

The approach that was taken to satisfy the above objectives was, as inthe initial contract, to pursue a balanced program consisting of computer-aided simulation and experimental testing. Detail results of the three majortasks, small junction temperature characterizatioa, high temperature thermalcharacterization and film carrier thermal characterization are contained inthis report. Significant results are as follows:

a. Film carrier devices are thermally inferior to conventional devicesunless their die is attached to the substrate,

b. Present infrared measurement techniques are limited in measuring

small junction devices.

c. Thermal time constant varies with the junction area to the 0.45power.

d. Thermal resistance varies with high temperatures mainly due to thechange in the thermal conductivity of silicon. Temperature, not power,causes these variations.

e. Thermal models for film carrier and beam lead devices were develop'd.

This effort concludes the two-year evaluation of the thermal character-ist.cs of microelectronic packages and the state-of-the-art thermal measure-sent techniques. The results of this effort and the past effort will beused to revise Method 1012 of MIL-STD-BS3 and I- correct present values ofthermal resistance contained in M38510 detail specification.

REGIS C. HILOWProject Engineer

viii

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LO .NTRODUCTIOB

1.1 , REVIOUS STUDY

This report describes the result of a continuing study of thermalcharacteristics and measurememt techniques for microelectronic packages.[The previous study, "Thermal Resistance of Mi~roelectronic Packages,was performed in 1974-75 under the sponsorship of the USAF Systems

Command/Rome Air Development Center, Griffisa AFB, Rome, New York [That work was concerned, primarily, with an evaluation of the accuracy'oftherniml measurement techntqties And as a result of that study, new recommendedmethods. for mensuring the thermal characteristics of microelectronic packages

' were developed and a proposed revision of method 1012 (Thermal Characteristics)of MII-STD-883 (Test Methods and Procedures for Microelectronics) waswritten [ 2]. Summaries from these two references are included as AppendicesA and B.

1.2 SUMMARY OF 197(1- 17PI fJECT

The purpose of this project was to further define the thermal charac

teristice of microelectronics packages. It was divided into three tasks:

1. Junction Temperature Characterization

I, To assess and refine thermal measurement methods for theI determination of Junction Peak, Junction Average and Junctign Region

Temperature of small Junction transistors (area < 6.25 mill ) in state- of-the-art microcircuits.

2. High rimperature Thermal Characterization

To determine thermal characteristics of microelectrontc* packages operating at elevated Chip Carrier Temperature (1750C< TCC 2500C),

3. Film Carrier Interconnection Thermal Characterize'tion

To detemine the effects of Filnm Carrier Leads on the thermalcharacteristics of microelectronic chips and packages.

A balanced program, consisting of computer-aided simulation andexperimental testing, was used to achieve the above-listed objectives.

The basic test vehicle for both the simulations and experimentaltesting was a special thermal test chip, SCP 14, which has 32 independentlyaccessible transistor Junctions located in 16 pairs on the chip f 31. Figure

1. 1 is a photograph of this chip. For experimental use, the chip is over-glassed and eutectically bonded to a gold metailized alumina substrate. The

: •four center-most junctions are normally powered during testing. The basictest setup with Infrared Microscope is shown in Figure 1.2, A chip mountedin a 40 pin dual-in-line (DILI &erami.c package, is shown in the Figure, Thecomplete test setup for each task is described in the appropriate sections ofthis report.

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1.3 COMPUTER PROGRAM

The computer program for the thermal simulations is entitled THTD(Transient Heat Transfer - Version D). This program is a general purposeheat transfer program capable of handling a wide variety of complicatedproblems. The program was written initially in 1958 and since then has under-gone many improvements that have made it a reliable code. It is currentlyin use by numerous departments within the Gorral Electric Company.

There are many special features of THTD. It can handle, for example,transient and steady-state problemn involving complex three-dimensionalgeometry, multiple materials and boundary conditions, internal heatgeneration, surface flux, external and internal radiation, fluid flow, materialphase change, temperature-dependent material properties and time-dependentboundary conditions.

The THTD program uses finite difference techniques, in which thephysical configuration of a problem it first divided into many small geometricalvolumes called nodes. Each node has an associated thermal heat-balanceequation that relates the temperature, material properties and geometry of thenode to similar properties of the adjacent nodes or prescribed boundaryconditions. A set of N nodes yields a system of N simultaneous equations,which are solved using a numerical iterative technique based on the "Gauss-Seidel" algorithm. Special temperature and heat balance convergence criteriais monitored by the program to insure that a complete and accurate solutionhas been attained. Specific temperature data are, thus, obtained forspecially selected inputs. From these data the thermal characteriLtics of thedevice can be determined via engineering Judgment and interpretation. Theimportant thing is that the computed solution provides data that are consistentwith all prescribed boundary conditions, material properties, complexgeometries, etc. Experience with this method of simulation has consistentlyyielded results that are in good agreement when compared with reliableexperimental measurements,

1.4 MATHEMATICAL MODELS

In order to provide numerical input data for the computer program,mathematical models are first developed. An accurate modal of a complexphysical device, such as the integrated circuit, requires a great number ofnodal descriptions. To simplify the problem, superposition techniques aregenerally used. In this study two models were developed; one to simulate thejunction region in the chip, and a second to simuLate the chip and chip carrier(substrate) 'ronfiguration.

The chip model, shown in Figure 1.3 was developed to determine thegeneral chip and substrate, i.e. chip-carrier, thermal characteristics, Therepresentative thermal resistance values shown in Figure 1.3 are taken withrespect to a thermal probe, which is shown in contact with the bottom of thesubstrate. The thermal probe is used in experiments to determine the chipcarrier temperature. Since the probe is generally at a higher temperaturethan the outer portions of the substrato, this produces the negative resistance

l I i I I I4

CHIP JUNCTIONREIO 52.5 MILS -

i . 5 '1.7 6,7 5.5 5.4 *a .1 '35.1

8, 8.~7 6-M 6.7 5.3 5.1 b.1 Sd)

7.2 6.9 6,1 5.4 5.1 5 .0 50 5.0

S 6.5 6.5 5.9 5.51 5,1 5.0 '4. .

m5 58.4 5.3 5.0 4,9 4, 4. 6 4.8 4.5

- - - 52.1 M ILS-'6..0

0 4.9 . 4.?7 4.7 4.7 4.6 .

4.0 4.6 4.6 '4.7 4.1 4,7 4~' 4.7 4.,6

4 ,i 4.8 04.8 4.7 4.7' ~4.1 7 4.7 4.7

4.8 -1 48 4, 4.1 4 1 7ý ý.7 4

* SOLDER.54 LiVOID

I2MITHERALTETCNI 7 14.12 . 5.3

35 MIL ALUMINA ~. SUSTAT -* 7, -.815.7 4. -. (E

IOIL2PE 5.012MLTHERMAL PROBT THIP 75 .10. .1%AUACPOE

Fi.r 10. .3. C4.1 Chip Mat16a0cl Mde

35 MI ALUMNA SUSTRAT HEA

IN

values shown in the figure. For this study the thermal probe was not simulatedin the model. Instead, the thermal data will be shown with respect to the chipcarrier, defined here as that volume of the substrate located directly below thechip. The chip model consisted of 287 nodes and represents one quadrant ofthe chip and chip carrier. The silicon chip is 12 mils thick, has 40 aluminumwire leads attached, and has a half-mil AuSi eutectic bonded to a 35 mil thickalumina substrate. Puiwer dissipation for this model is simulated as a uniform

volumetric heat generation in the area designated its the chip Junction region.

A model of the Junction region was also developed to determine thespecific characteristics near each pE ir of junctions on the dhiip. The physicaldetails of this region are shown in rgure 1.4 and the mathematical model ofthe Junction region is shown in Figure 1.5, The uodel consists of 467 nodes,dt.vided into six layers, to simulate the geometry and characteristics of thealuminum metallization, the silicon dioxide glassivation and the bulk siliconof the chip near the .anction. Power disspation was simulated, in this model,by uniform volumetric heat generatiou in a finite volume of the emitter-basetransistor Junction as shown in Figures 1.4 and 1.5.

To study thermal effects in an electronic device, the computerprogram must be able to handle temperature -dependent material properties.In the simulations discussed here, specific heat and thermal conductivity,obtained from references [ 41 and 5], were input for the models. Thevariation of thermal conductivity for silicon and alumina, for example, isshown in Figure L.B. These curves show that there to a significant variationin thermal conductivity for both the substrate and the chip. That variation

depends on the absolute temperature of the material. Since the temperaturedistribution within the chip and chip carrier can vary considerably, thethermal conductivity can also vary considerably depending on location withinthe chip and the chip carrier. ¶

1.5 TECHNICAL APPROACH

The overall thermal characteristics of the chip and Junction have beendetermined by superimposing the thermal simulation data from the Junctionmodel onto that of the chip model. The superposition procedure is, thus,to first predict the rise in average Junction region temperature (TJR) relativeto that of the chip carrier temperature (Tcc), by using the chip model. Then

wthe Juctiun regLun mudel is used to predict the rise in Junction peak andaverage temperature (TTP and TJA, respectively) relative to that of the averageJunction region temperature. The chip carrier temperature is defined as theaverage temperature of that volume of the alumina substrate directly underthe chip. The Junctionl region is that volume represented by solid cross-hatching in Figure 1 ':. The single-node Junction region temperature obtainedfrom the chip model, is equal to the average temperature of all nodes in thewhole Junction region model. The boundary conditions of the Junction regionmodel are adjusted to ensure that this occurs. This matching of temperaturesis necessary to ensure that temperature-dependent material properties areautomatically included in the temperature response characteristics. Fromthis superposition then, an accurate value of the Junction peak temperature(Tjp) and the Junction average temperature (TjA) are found for any givenchip carrier temperature. The junction peak temperature is the highest

-

COLLECTOR REGION OUTLINE

HEATIGENERATION

- N

J P

SETIN+ A-

SCAL

A j p1. I

ii a

4 -�

C" ____ 1i111I - -4 "Ih

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I,___ *q54

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-- -- -*-¶ ____ o�r�

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.2

,00 0 100 200 300 400 500 600 700

OC

Figure 1.6 Effect of Tempsrature on Thermal Conductivity ofSilicon and Alumina

II 9

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temperature within the heat generation volume of the junction region model(see Figure 1. 5) and the junction average temperature is the average temper-

ature of that vulume. Having found these temperatures, the thermal resistance,

relative to some parameter, say, the chip carrier -- namely, 0JP-CC, 0JA-CCand 0JR -- can be determined from

ST TccSoxx-cc- ,c

where 4C is the power dissipation in the chip.

The values of the thermal time constants, T jp-C c, TJA-CCP and

TJR. C, are determined in a similar manner using superimposed transient

compq'er simulation. The th3rmnpl time constant is defined here as the time

kequired for the temperature rise, relative to the chip carrier temperature,

to reach 63.2% of its final steady state value after a step function in power

dissipation is applied.

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2.0 JUNCTION TEMPERATURE CHARACTERISTICS

2.1 COMPUTER-AIDED SIMULATION AND ANALYSIS

2.1.1 General Remarks

The purpose of the simulations in this portion of the study is to showthe effect of different-sized Junction areas on the thermal characteristics ofthe microcircuit.

To accomplish this the chip model (Figure 1,3) was used to predictthe Junction Region Temperature (Tj); then the Junction region model, (shownin Figure 1.5), was modified so thatlt could be used to simulate various-sizedJunction power dissipation areas (Aj). Theae areas ranged from 0.18 mils2

to 10.9 mIls 2 ; Figure 2.1 depicts the range of areas used and the silicon layerin which the power disesipation was simulated.

Simulations were then made to determine Junction Peak Temperature(Tjp), Junction Average Temperature (T,;A), and Surface Average Tempera-ture (TsA) for the range of Junction areas. For each Junction area, the thermaltime constants and thermal resistance values were computed. The variation ofthermal resistance with chip-carrier temperature (T 0 0 ) and power dissipationrate ( 4 C) were also computed for the selected Junction areas.

2.1.2 Thermal Characteristics

2.1.2.1 Thermal Resistoce VYlues of the Various-Silzed Junction Areas ,

The thermal resistance for the various-sized Junction areas are.summarized in Table 2. 1. These were calculated from the computersimulated temperatures for TjR, Tjp, AND TjA, with TCC = B0oC and

4C -1. 5 watts for each area, using the relationship OX , _ T.. Tyyqc

These thermal resistance values were then used to plot the data shown inFigure 2., 2 which shows that the values of Thermal Resistance, 0jp -c-and 0 jA-CC decrease exponentially as a function of increasing Junctionusie (Aj).

11 .:f+'¢

PHYSICAL, ALL DIMENSIONS IN MILS .ELEMENTS*• MATHEMATICAL"

""'"A*t MOE A8 10. 9 i1 ETO.94

. II A - 30 "

.30! 11-~ m l . - ,-- .. ..

SI _ _ _M . ..

1... . .15.DSUSN mIO MATERIAL PROPERTrIES'

i ~1,0 MILSCALE NODES USING COMBJINED SILICON=

CENTERLINE OF SYMMETRY ALUMINUM ANTD SILIC')N DIOXIDESFOR NODAL PATTERN PROPERTIE S

I I Figure 2 ,1 Nodal Pattern for Model of Thermal Chip Junction R~egionII (SCP-14 Chip) Showing R~ange of A3 Used. 20%

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TABLE 2.1

COMPARISON OF THERMAL RESISTANCE VALUES ( C/W ) FOR VARIOUSSIZED JUNCTION AREAS WITH CHIP CARRIER TEMPERASURE (T ) OF

60 0C AND CHIP POWER %q,) OF 1.5 WATTS

i ,

AREA (MvL 2) JP-J OJA-JR 0JR-CC 0jc 0PC JA-CC

.18 82.4 73.0 10.5 92.9 83.5

.30 68.3 62.1 '78.8 72.6

.84 39.4 34.1 49.9 44.6

1.12 33.1 28.2 43.6 38.7

4.05 15.8 13.0 26.3 23.5

6.86 11.6 9.2 22.1 19.7

10.92 8.0 6.1 10.5 18.5 16.6

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2. 1.2.2 Temperature Distribution and Surface Temperature

To obtain an idea of the temperature distribution within the junctionregion of a microelectronics package, isothermal plots of the junction model(Figure 1.5) were constructed depicting the surface temperature distributionand a typical croes-sectt onal area temperature distribution. These plotswere constructed for the various junction areas and are shown in Figures 2.3through 2.9 in aecreasing size )f powered junction area. The TCC and qcvalues were held at 600 C and 1.5 watts, respectively.

so order that the experimental results obtained with an IR micro-" scope could be compared with computed data, a plot of the surface thermalresistance (OsA-CC) as a fpnction of surface area was made for Aj= 1.12 nills 2

(Figure 2.10). (1.12 mils', was selected because it approximates the Aj of thethermal test chip.) The surface area, in this case, wasI -.-ated to a circulararea hy using an equivalent diameter defined from

De = 4As/1 1

This equivalernce was used because the IR microscope detects radiation from

a circular area which, is related to the so called "spot size" of the IR lense.Figure 2.10 shows the estimated range of readings for 15x, 36x, and 74xobjective lenses. This range concept derives from the fact that the objectivelense is above the surface to be measured and will receive IR radiation fromI ithe surface out to an estimated three diameters of the "spot size" of the lens;that Is, it receives energy from a surface that Is much larger than the"specified "spot size", or half-power receiving diameter of the lense.

To obtain a useful tool for predicting the IR measurements for ,nyjunction area, within the limits of the data given, this range concept can beapplied to Figure 2. 11, where the plots of the data, OSA -CC and De, for all

the various-sized junction areac have been superimposed.

2. 1.2.3 Increasing Temperature Effects'

In order E- see the effect on the thermal resistance values causedby raising the chip-carrier tempexature, the chip-carrier temperature wassimulated at 600C, 156 0C, and 2570 C in the chip model and the junction regiontemperature was determined. This value was then used in the junction regionmodel to determine the junction peak temperature. The various values ofthermal resistance for each junction area were calculated at each chip-carriertemperature using a power dissiptiton of 1.5 watts. The results of the simu-lation are plotted in Figure 2.12, showing the rising 'rend of the thermalresistance values as the chip- carrier temperature is increased; it also isI f clear that the smaller the area the larger this increase will be. The sameresults are plotted in Figure 2. 13 as a function of junction area, showing thedecreasing value of thermal resistance for increasing junction size at variouschip- carrler temperatures.

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TCC =60°C' qc = 1.5Watts, Contour h•tervaL = 5°C

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T cc 609C, qc 1..5 Watts, Contour Interval =5C

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Figure 2.6 Isothermal Plot, Aj 1.12 mils2

TC c 0ft, qC 1.5 Watts, Contour Interval =5C

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TCC 60 0 C, 4C = 1.5 Watts, ContouzrInterval 5 0°C

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21

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JUNCTION MODEL

140oC 1200C8000

CROSS SECTION

Figure 2.9 Isothermal Plot, A -- 0, 18 mils2

TCC 60°C0' C, = 1.5 Watts, Contour Interval = 100 C

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2. 1.2.4 Variation of Thermal Resistance Values with Power Dissipation Rate

In order to observe the effects of varying the power dissipation, thepower was input at 0.5, 1.5, and 2. 5 watts for selected junction area sizes.For these cases the chip carrier temperature was held at 60 0 C. Figure 2.14shows the results of this simulation, indicating a rising tread in thermalresistance values, and showing that the change increases with decreasing area.

2.1.2.5 Thermal Time Constants Relative to Junction Size

The transient temperature response of selected junction areas was

computed and is shown in Figure 2.15. From these curves the relativethermal time constants can be determined. The relative thermal time constantrjp j,-t is defined as the time required for the Junction peak temperaturerise, relative to the junction region temperature, to reach 63.2% of its finalsteady state value after a step function in power dissipation is applied. Thethermal time constants, determined from Figure 2. 15, are plotted in Figure2.16 against junction size to show the relative effect of junction size on thethermal time constant.

2.1.3 Theoretinal Conclusions

The thermal resistance values OJP-CC and OJA-CC decreaseexponentially as the junction size increases (Table 2. 1 and Figure 2.2).

The surface temperature variation and, thus, the possible range inthermal resistance values which could be measured with an MI microscoe,increases significantly as thu junction size decreases (Figures 2. 10 andl. 11).For example in Figure 2.11 for a powered Junction size of Aj - 0. 18 mila surface temperature measured with a 74x objective lens might yield a thermalresistance value from about 70oC/W from a 0.7 mil (half power spot sizesurface area) to 42oC/W from a 2. 1 mil diameter area (three times the half-power spot size). For the largest powered Junction area considered, Aj10.9 mils 2, the same 74x microscope would probably yield a nearly constantreading of 19OC/W since the surface temperature is fairly uniform for thislarge junction. These variations do not include other IR measurement effectscaused by surface preparation, emissivity etc. Appendix C contains excerptsfrom Reference(l) in which these possible errors are discussed.

The thermal resistance, junction peak-to-chip carrier, will varyapproximately with the inverse of the junction area to the 0.4 power ; i.e.Sr, 8jp.cc - 47Aj-0. 4, [ OC./WC ] for a chip carrier temperature of 600C.

As power Is increased PJ-CC increases; the smaller the junctionarea the greater the increase will be (M"gure 2.14). For example, with a 5/1increase in power input, ýJP-CC will increase about 4°C/W for Aj = 10.9 milsOwhile, for Aj -- 0.18 milsd, the increase in OJp,-CC is about 41nC/W,

The relative thermal time constant, Trp.a, will var6 aproximatelywith th, junction area to the 0,45 power,i.e, TP jR ft 3.44 Aj"*"0 •sec overthe range of junction areas used.

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Figure 2.16 Comparison of Thermal Time Constant (T as a Functionof Junction Size

qc =1. 5 Watts

30

2.2 EXPERIMENTAL MEASUREMENTS

2.2.1 Objectives

The objective of the experimental measurements was to determinemethods for improving the IR measurements of the surface temperatures ofmicrocircuits and to improve the method of making electrical measurementsof the junction temperature.

To accomplish this objective, tests were conducted with a high reso-lution objective lens on the IR microscope, a study for improving coating tech-niques was made, and a test fixture was built to improve electrical measure-ments of Junction temperature. In addition, thermal time constants, pulsedpower effects, and variations in peak temperature, with a still-air and forced-air ambient, were nz.de on representative devicesi, together with the thermalcharacteriation of IPL devices.

2.2.2 Improved Coating Techniques

A study of improved coating techniques for infrared measurementswas done in conjunction with work being per. --- e under a National ScienceFoundation Grant. A technique that led to coatings with emissivities as highas 98% was developed. These coatings, while not completely transparent,permit one to observe the metallization pattern underneath; this is Ui greataid in locating the hot spot (or spots) to be measured. Appendix D is a copyof the Final report on the work; it describes tho coatings in detail.

The optimum coating consists of fine glass particles suspended inSodium Silicate. When dry it is semi-opaque but wetting the coating with avolatile liquid renders it nearly completely transparent to visible light bysuppressing scattering and surface reflections. This coating was used in theinfrared measurements described herein.

Figure 2. 17 shows the spinner device used to apply the coatings.Figure 2. 18 shows the thermal test chip with a coating, and Figure 2.19shows the same chip after a drop of alcohol has been applied to the coating.

2.2.3 High Resolution Infrared Measurements

Tests were conducted with the SCP 14 test chips mounted In F-1packages, which had been used in the earlier program [ 1] . The test set-upis shown in Figure 2.20.

A 7?4x objective with half-power resolution of 0.4 mile, for theBarnes Infrared Radiometer was purchased from the vendor: The statedworking distance for this objective is 0.090"; however, on receipt, it wasfound that this distance refers to the flat portion of the main body of theobjective. A small raised portioni at the housing surrounding the antenna pupilprotrudes some 0.040", which, in effect, reduced the working distance to0.050" because the raised land was too large to permit observation of anydevice other than those mounted in F style packages. These experimentswere, therefore, confined to that type of package.

31

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Figure 2,18 Device with Coating

Figure 2.19 Device with Coating After Application of Alcohol

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In addition, It was necessary to mnodify the instrument by incorpor-ating a shutter Into the body to interrupt the radiation beam In order to calibratethe instrument or permit setting it to zero. Figures 2.21 and 2.22 show themodification made to the microscope.

In normal use, an external shutter is inserted outside the objective,the instrument is set to zero, and the deflection is recorded when the shutteris removed to allow the measured radiation to enter. With such a smallworking distance, this would be impractical with this objective.

The shutter is made of blackened copper and has a copper-constantanthermocouple attached to allow accurate measurement of the shutter temper-ature. This also allows compensation for differences in internal temperatureof the housing and external shutter. In practice, the emissivity of the coatingdid not require any correction.

The electrically powered heat sink (Figure 2.23) was used to makethese measurements, allowing reasonably quick changes in heat sink temper-ature. The test chip was powered by applying power to the four innermosttransistors. This power value was determined by measuring collector andbase voltages and currents. Oscillations were avoided by placing ferritebeads on each base lead and bypassing each collector.

Readings of surface average temperatures were obtained as thepower input was varied. The chip carrier temperature was measured. withthe thermocouple probe, which can be raised from beneath the heat sink'(see Figure 2.23). A typical data plot obtained in this manner is shown inFigure 2.24. The abscissa is applied power, the ordinate is surface averagetemperature above that of the thermal probe. It can be seen that the pointslie in a straight line, but do not pass through the origin. Linear regressionwas used to fit the best line to these points, and the slope is taken as thethermal resistance, which, in this figure, is 16.6 0 C/W. Time did not per-mit any detalled investigation into the zero offset. The offset indicates thatthe probe is actually lower in temperature than the chip carrier. One possibleexplanation is that heat transfer from the lower portions of the probe assemblymay have caused a temperature drop across this interface. However, datataken at higher heat sink temperatures did not show large offsets. Data on thesame chip at a heat sink temperature of 1000C are shown in Figure 2.25. Datawere also obtained at 150 0C. The actual surface average temperature atthese higher temperatures was quite high. Data for these three cases areshown in Figure 2.26. The ordinate is thermal resistance (surface average-to-chip carrier) and the abscissa is the maximum chip carrier temperature asmeasured by the thermal probe. The rising trend can be clearly seen.

2.2.4 Transient Thermal Impedance Measurements

At the beginning of this project, we built a fixture to measuretransient thermal Impedance in power transistors, using the technique originatedat the National Bureau of Standards. The fixture is arranged so that, at suit-able intervals, it can gate off the power flow to a transistor, while continuingto supply a small measurement current to the base-emitter junction.

36

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EXTERNALSHUTTER WORKING 12Gmm4 3,5x

DISTANCE 1 .Smm fb 74x

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Figure 2.21 Modification to Microscope for High Temperature andHigh Resolution Tests

36

Figure 2.22 Modification of Scope

33

35

SCP14 Thermral Test Chip i.n F1 r'ccg30 (14 Lead 1/411 x 1/4 Mp)

74 X IRObJective (0.4 1SotSie

25-

151C.) Fit

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slope eS0 C 1. 8 C~

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Figuxe 2.24 Comparison of Therinal Temperature Rilse ati R FunctionSIof Power input at 11 HS 00C

39

45

40 SCP14 Thermal Test Chip in FI Package"(14 Lead 1/4" x 1/4")74XIR Objective (0.4 Mil Spot Size)

35 THeat-Sink 1O0C

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20 _ _ _ ILinear Regression Fit

For ArSA CC ý T0 + 0SACIntercept: ATo0 5.95°C

Slope: 0SA.CC - 20.6 0 C/WC

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Figuro 2.25 Comparison of Temperature Hiso as a Function ofPower Input at 1000C

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21 - -

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80 100 120 140 160 180 200

MAXIM UM TCC (C)

Figure 2.26 Comparison of Thermal ]Resistance as a Function ofMaximum Chip Carrier Temperature

I' 41

&

A prectsitn sample-and-hold circuit samples the base-emittervoltage after a controllable delay. A second iden'ti cal sample-and-holdsamples the thermocouple probe voltage, which measures the chip carriertemperature. The measurement part of this fixture was used, in conjunctinwith the low-power fixture, to obtain the thermal cooling curve of an SCP 14

thermal test chip. A block diagram of the system is shown in Figure 2.27.The transistor under test has its emitter power current supplied through anisolating diode. A pulse generator (PG 1) applies negati'e pulses to the baseof aPNP gate tranistor, turning it on hard and diverting the emitter powercurrent to ground, while the measurement current continues to be supplied.PG 1 also triggers a second pulse generator, PG2, which, after a controllable,variable delay, supplies a one As pulse to the sample-and-hold circuits.This pulse is one Ms wide, so the sample uf voltage is an average over one

The interval between the loading edge of the gating pulse and thesampling pulse is measured by an oscillator counter with a resolution of 0. 1AMs and an accuracy of perhaps 0.3 g s. The gating pulse width and repetitionrate are variable; in this experiment the repetition rate was 0.2 Hz. -

The thermocouple probe output is amplified by a factor of .100by an operational amplifier, which is sampled simultaneously with the base-emitter forward drop. The samples are displayed on digital voltmeters.

To perform the measurement, the delay of PG 2 is varied and bothsamples are recorded for each delay. The junction voltage is used tocalculate the Junction average temperature and the thermocouple voltage isused to measure chip-carrier temperature. Thus 6 TjA.CC can be obtainedat various times after the cessation of power to plot a cooling curve.

In our originAl experiments we were unable to measure junctionaverage temperature aL short times due to junction clearing effects. An SCP 14thermal test chip was then calibrated for a measurement current of 200 AA toreduce the clearing time sufficiontly to permit measurements down to about2 ps. The data obtained are plotted in Figures 2.28 and 2.29 on linear andlI.g log scales, respectively. There is good reason 'to expect that, for bhorttimes after the interruption of power, the junction temperature will decreaselinearly with the square root of time [6] . 'Such plots for those data weremade but no linear region was found. This behavior is well verified in largerdiscrete devices such as power transistors. It arises from the step..functionresponse of a physical body in which heat flow is predominant in one dimension,which is nearly the case for a large discrete device. Apparently the spreading,in the case of this integrated circuit, occurs sufficiently rapidly that thisphenomenon does not occur. An inspection of the transient curve, for 0JA -CCreveals that mzjor transients are completed in the first 101.4s. Data wereobtained out to lOms where the thermal resistance had decayed to less than20% of its initial mea.sured ,alue. The effect of the multiple time constantbehavior is clearly evident, with the decay for times greater than about 50iisbeing much less rapid due to the longer time response of the substrate andpackage. Data for the shorter times were taken by interrupting the power foronly 200Ls at the repetition frequency of 0.2 Hz. Points from 55 gig out to

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10ms were also measured with an interruption time of 12.ms. Figure 2.29shows points at 1.5 jis and 2gis, demonstrating the continuity in the data.Caution must be observed in interpreting these points, however, since theysurely infringe on the time when the junction is not yet cleared of storedcharge, so that the temperature calibration cannot be relied upon. Observethat the point at l0ms falls one decade to the right of the margin of the graph.

2.2.5 DC - Pulsed Power Measurements

An experiment was performed to measure the effect of pulsed poweron the measured thermal resistance. This was done by using the gating fixturedescribed in section 2.2,4 on transient measurements. An BCP 14 test chip 4mounted in a DS package was used for this test. A gating ctreult was used toInterrupt de power to tho chip (all four transistors) for vatous times, at afixed frequency of 100 Hs. The interruption times were 1, 10, and 100 Ms, andl and 5 ms, corresponding to duty cycles of 99.99%, 99.9%, 99%, 90%, and 50%.The value of applied power was calculated by measuring the fixed collectorand base-emitter voltages during the power-on phase with an oscilloscope;currents were measured with a D'Arsonval meter whose response time was islow enough to measure average current. Since the current wave form wasessentially rectangular the product of voltage and current gave the averagepower in the four transistors. The results of this experiment are shown inTable 2.2.

TA.BLE 2.2 Thermal Resistance Measured at End of Off-TimeFor Various Duty Cycles

OFF-TIME DUTY CYCLE 0 JA-CC*_sEC % OC/WC

1 99.99 16.710 99.9 16.2

100 go 15.41000 90 14.45000 50 14.3

* Based on average power dissipation over complete cycle.

2.2.6 Forced-Air Cooling

An experiment of the effect of forced-air cooling on a device, asa function of heat-sink temperature, was performed using an SCP-14 chipmounted in a D-3 package, and the 15x objective. The device was mountedon the heat sink and the thermal. resistance was measured in still air andwith a stream of room-temperature air flowing at 1000ft/min. over the opensurface of the package. The results are summariz~d in Table 2.3.

46 ,

TABLE 2.3 Thermal Resistance Values for Increasing TemperatureWith or Without % Forced Air Ambient

HEAT SINK STILL 4MR AMPIENT FORCED AIR AMBIENTTemperature 6 0 C) 0JR.C(°C/VC) 0JR-CC (oc/WC

60 17.0 1980 13.0 12.7

100 14.3 15.8120 18.3 14.9

The anomalously high values, of thermal resistance at THS0 800 werediscovered to be due to a lack of proper contact of the probe at the time ofthe first trial. The difference in still air and forced air thermal resistancevalues at 80 0 C and 1000 C are within the limits of experimental error, Theeffect of forced air at THS = 120 0 C appears to reduce the junction region-to-chip carrier thermal resistance. This effect is contrary to previous meas-urements and analysis [ 1] . Therefore these tests are subject to too great anexperimental error to draw any valid conclusions.

2.2.7 1 2 L Device Measurements

Integrated Injection Logic semiconductor microcircuits were notcommercially available at the time this project was done. In order to makemeasurements on this type of device, 10 sampnles of a custom 12L circuit,fabricated for research purposes at the General Electric ElectronicsLaboratory, were obtained and used for measurement. The devices weremounted in D1 packages. Hot spots of nearly identlcal temperature werefound on the output transistors of these devices. The average of threemeasurements for each device is reported. The results for two devices arepresented in Table 2.4. Some of the other devices were found to be faulty,and some were damaged in the process of coating them. Measurementswere taken at a heat sink temperature of 600C and 100 0C with the 15x objective,with an applied power of about 0.4 watts.

TABLE 2.4 Thermal Resistance of I2 L Circuit in Dl DIP

SSERIAL NO TS =00 THS 100 0 HS

0 JR - cc 0c ,C 0J R-CC 0C/Wc

4B 29.9 29,54D 30.3 29.9

There is no significant variation; there is no physical reason whythese devices would be much different than more conventional devices In termsof thermal behavior, and it is seen that the measurements are quite comparableto those obtained on other devices.

47

2.3 COMPARISON OF COMPUTER SIMULATION AND EX RH1E TALR ULT

2.3.1 Transient Temperature Decay

A computer simulation of the transient temperature decay was doneand compared with the test measurements. The comparison is shown inFigure 2.30. An x-ray examination of the test package,shown in Figure 2.31,showed that solder voids in the chip bond could account for some differencesas the values approached steady state. Reference [ 1] points out that thethermal resistance value can increase 3-5oC/WC for a 55% solder void-aboutthe same void, extent as shown in Figure 2.31. The conclusion is that theresults are not In very good agreement except for steady state results, whichwhen corrected for the solder void effect, are in very good agreement.

For short time periods, t < 10 Asec or so, the electrical transientsin the chip measurement circuit are not settled out. Since the thermal timeconstant of the junction average temperature as predicted by the computersimulations, Is only seven l&sec, then it is apparent that the electricalswitching technique cannot be used to predict an accurate value of the junctionaverage temperature or of the thermal time constant,2.3.2 Variation of Thermal Resistance with Power nput

Figure 2.32 compares the experimental results measured with anIR microscope (with a 74x objective lens) with the computer-simulationresults. The experimental data have been reduced by using linear regressionto obtain thermal resistance values and thus a straight line function is obtained.The experimental values are much lower than that predicted by the computer.

A number of things may be causing this difference between the meas-ured and simulated result, but no definite cause can be suggested at this time.One possible explanation is that the "effective junction" area actually increasesas the power is increased. Reference (' 71 states that, as power is increasedin a semiconductor, there may be significant space charge that causefr thedistinction betwoen the depletion and neutral regions to be wiped out resultingin effect, In a larger heat dissipation area. Another possible explanation is

that the microscope actually integrates energy over a much larger area thanis now assumed (three "spot size" diameters). Note, the curve for anequivalent diameter of 3.7 mils in Figure 2. 32. This curve does have valuesthat are, at least, in the approximate range of values of the measured data.Another possibility is that the glass coating is not as effective as predictedand the lower temperature ambient IR radiation is being reflected from themetalttzation itot the objective lens, siniii'r Lu Unt effect suggested inreference [ 1] . Another possible cause for the difference might be inthe experimental techniques. For example, the thermal probe measure-ment for T0 was not as accurate as expected. Linear regression of theexperiment'ardata indicated, in general, that the thermal probe had a lowertemperature (about 5-6oC) than that of the chip carrier. This difference ismuch greater then that found by the same technique in the previous study 1 ]A possible explanation is that new probes were made up and different personsmade the measurements for this current study. Another possible explanationis that the computer simulations may not be as accurate as anticipated.However, the same models were used, with some minor changes, in thecurrent study as for the previous study. All of these explanations could

48

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account, in part, for the differenlces found.

2.4 Recommendations

The difference between -the computer simulated results and the-expertmontal results should be studied further to obtain a more accurate

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3.0 HIGH TEMPERATUjE ThERMAL CIARACTERIT

3.1 ,OMPUTEH-••DED SIMULATIONAMA

The purpose of this portion of the study was to predict junction peak,junction average, and Junction region thermal resistarces at elevated chipcarrier temperatures, This wa.s done by varying the chip carrier temperaturein the thermal chip and junction region models described in Section 1.3. in bothmodels, temperature-dependent material properties are taken into account asthe values of junction peak temperature, Junction average temperature andJunction region temperature are computed. Theo same models were Used topredict the thermal time constants (rX.Cr )for the various values of TCC'

3.1.2 Thermal Chgracteristics

The input parameters for the computer simulation included a powerdissipation in the chip of qic" 1.5 watts, distributed symmetrically to fourJunctions with 0.375 watts each, A heat sink temperature, simulated at 6601500, 2000 and 2500, resulted in chip carrier temperatures of TCC U 700o 1560,2060, and 2570 C, respectively. The results of the simulations are shown inTable 3.1, which lists the data obtained from the chip and junction region models,and shows the temperatures obtained by superimposing the data. It also liststhe thermal resistance values calculated from the relationship

T T

0XX -cc qc

These thermal resistance values were then used to plot the data shown in Figure3.1, which shows the variation of thermal resistance as a function of temper -

ature. To provide an insight into the way the temperature is distributed withinthe junction region and chip, isothermal plots were constructed for each chipcarrier temperature and are shown in Figures 3.2 through 3.5. It can be seenthat there is a three-dimensional heat flow and, thus, spreading resistance, fromthe junction to the chip carrier. This spreading resistance depends on thegeometry, power dissipation and, as shown in this report, the temperature andmaterial properties of the chip and chip carrier.

In addition to the steady-state simulations, transient response curves

were also simulated for TCF = 70, 156 and 257 0C. Figure 3.6 shows the resultsof the simulations and also"Fists the relative time constants obtained by readingthe time at which each curve reached 63.2%of its steady state value. In orderto compare this data with the IR experimental measurements, Figure 3.7 wasi

• I constructed. The figure compares OSA -cc with TCC for various surface areas.As in Section 2.1, the areas were normalized usilgthe relationship

and the ranges of measurements (see description of range concept in Section 2, 1)

are as shown,

j~. 53S... . ..JT -'-1 7 'i -J -- '- '-- -"r : -, .: -. . " "

TALB[ 3. 1, Comparison cf Thermal Characteriattos for ICP 14 ThermalTest Chip at, Various Chip Carrier Temperatures

THS Units

j3vodel Data 66 150 200 250 ___

T BeB8 233 288 C

S70 156 206 25"7 °C

JuMction ModelData'

AT R 52 73 87 97 C

ATJAJR 45 63 75 84 0C

Superimposed

TemperatureData _ _ __ _

136 251 320 385 °C

TjA 131 241 308o 312 0C

Effective 0Values Rel-

ative toChip

Carrier

JP -ccJA-CC 41 57 68 76 0C/WC .

11 15 18 20 °C/WC

Subscripts: J = Junction, C a Chip, P - Peak, A. Avar'tgw, R *Relu,

i HS - Heat Sink, CC = Chip Carrier

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3.1.3.1 ThermaI HesistancegVaiLue

The resuIts indi•vate that the thermal resistance junction peak-to-chip carrier (Ojp.cC), increases at the rate of about (AiO/AT)jp.CC = 0.2(°C/W)/°C over the temperature range of 700C < TCC : •t600c. This is theaverage slope of the curve for OJP-CC found in Figure 3.1. Thus, a 1000Crise in TOC will cause an Increase in Ojp-CC of about 20°C/WC. For example,from Figure 3.1, 9*p.CC 530C/W :t T 1000 and at TCC 20000,

jp-CC as 750C/W, which gives a A0 of 22 /WC.

Correspondingly, the thermal resistance, junction average-to-chipcarrier, and junctioa region-to-chip carrier, increases at an average rate of(Ae/AT)jA.CC - 0.2 (OC/W)/OC, and (A,/AT)jjR-CC = 0,1 (C/W)/VC respec-tivoly, over the same temperature range.

3.1.3.2 Thermal Time Constant

The thermal time constants Increase with temperature. For example,P Figure 3.6 shows that the transient response of the junction peak temp8 rature,

relative to thaN of the chip carrier, is Tjp.CC = 15 lsec at TCC = 70 C whileat TCC - 257 C the thne constant is Tjp.CC = 26 psec, an increase of about70%. Similarly the thermaL Lime cuuntiants for thu junuixun avenrae 41ud juiet ionregion temperatures, relative to that of the chip carrier, have values ofo'rJA.CC = 20 lisec and TjR-CC = 1.8 msec, respectively, at TCC = 70 C andthey both increase by about 60% at TCC = 257 C. An approximatl0o of therelativ$ thermal time constants at other temperatures, between 70 C < TCC< 260 C, can be obtained by interpolating between the tabulated data or thefliermal response curves given in Figure 3.6. For example, to approximatethe relative ti!be constant 7 JR-CC at TCC = 200 , froip Figure 3.6 Tjp._Cg19 Asec at 156 C and Tjp..CC = 26 lisec at TCC = 257vC; therefore at 200 C,by Interpolation, Tjp.CC = 22 .sec.

3.3.3 Infrared Measurements

It can be shown that an IR microscope will not necessarily read peaktemperature values; in fact, for different objective lenses there may be asignificant range in values (Figure 3.7). For example at =W160 C thereading tor a 15X lens could range from a peak of about 53'CAV to a low ofabout 25 C/W - quite a variation I

3.2 EXPERIMENTAL RESULTS

S3.2.1 General Remarks

The purpose of these tests was to determine thermal characteristicsof representative devices at elevated chip-carrier temperatures. This wasdone by elevating the heat sink temperatureand then taking IR microscopereadings.

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3.2.2 High Temperature Measurements .

A series of measurements were made at elevated temperatures using

the 15X objective on the IR radiometer. This lower-power objective was usedbecause the short working distance of the higher-power objectives cause exces-sive heating of the housing, with possible danger of damage to the objective.Tests were made at heat-sink temperatures of 1200 to 2000C. The highestjunction temperature recorded was 290oC, A typical set of data is plotted inFigure 3.8 for a heat sink temperature of 160 0 C and various power dissipationrates. The results of several trials are plotted in Figure 3.9, with thermalresistance as ordinate and chip-carrier temperature as abscissa. These meas-urements are somewhat difficult and a smooth progression was not obtained.During the course of another trial at the highest temperature, the device failed,and the thermal resistance appeared to decrease, but the measurements werenot repeatable. An examination of the transistor characteristics with a curvetracer showed that the transistor had become very leaky. The power appliedwas apparently being dissipated over a larger area due to junction breakdownand degradation, so that heat was no longer Localized as before. Microscopicexamination showed that the coating was severely cracked, and one lead waspulled away. The tests were discontinued at this temperature.

3.2.3 Effect of Power Level on 8SA-CC

The data of Figures 2.24 and 2 .2b mhow that the puwer level has anegligible effect on the 15X IR measurement of 0SA.CC, provided only that theapplied power level is sufficiently high to yield temperature rises large enoughto be accurately measured, and that the level Is not high enough to exhibit pro-

I'; nounced effects due to changes in thermal conductivity.

This implies that the temperature, which is controlled by heat-sinking and ambient temperature, is the variable that causes 0SA.CC to vary.This is exemplified by the data presented in Figure 3,8 where each point wasobtained by measuring 0SA-CC for a range of applied power from about 300 mWto 1.5 W, with essentially constant OSA -CC over this power level group.

3.3 COMPARISON OF COMPUTER SIMULATION AND EXPERIMENTALAESULTS

Figure 3.10 compares the computer-predicted thermal resistancevalues with the measured values obtained with the IR microscope using 74Xand 15X lenses. The experimental results show a rising trend as TCC increases,but the values are generally much lower than that predicted by the computersimulations. The reasons for the wide differences are not well understood andthe possible explanations described in Section 2.3.k also apply here. Note tlatthe estimated curve for 0 A rCC for Ao = 10.9 mils (De = 3.7 mils) and thecurve for 0JR.CC fall wthinihe experimental data, which correlates with.r.vn nV the tn , nil.ttong found ini SRetion 2.3.2. that dealt with the increasein junction size with power input, IR integration over a larger area, an thleeffectiveness of the glass coating but these curves still do not pinpoint theactual source of the differences.That will require further study.

63

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6 -- THS 01600 C

OSA.-CC =. 9.9 0C/W

0 0

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0 5 I 1.5.

Figure 3. 8 Typical DaLa Plut ATSA CC s a Function of Power Input

64

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SCP-14 Thermal Test Chipin Fl Package

5. (14 Lead 1/4" x 1/4")15X I Objective

( 1,4 MWll Spot Size)0 I I I ,150 170 100 210 230 250 270

Figure 3. 9 Variation of Thermal Resistance with Temperature

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4.0 FILM CARRIER THERMAL CHARACTERISTICS

4.1 COMPUTER-AIDED SIMULATION AND ANALYSIS

4.1.1 Generxl Remarks

The purpose of this poAvtion of the study was to compare the thermalcharacteristics of the film c2rrier interconnection technique with that of wire-bonding. Toward this end two connection region models were developed, asshown in Figures 4. 1 and 4.2. Geometry and materials for the Film Carriermodel are based on data contained in References [ 8] through [ 11(; for thewire bond model the geometry and materials are based on data developed forthe previous study, Reference [ 11 .

These models were used to determine the converging thermal resist-ance for heat flow from the chip through the connection lead, which was assumedto be 0.1" long. The SCP-14 Chip Model, described in Figure 1.4 was thenmodified by simulating this value of converging thermal resistance between thechip pads and the heat sink of those leads. As a basis for comparison the modi-fied chip model was also run with no heat transfer through the leads (the con-verling thermal resistance value was set at Infinity).

Two cases were run with the chip model for each interconnectiontechnique; one case Involved heat sinking through an alumina substrate; theother had heat sinking only through the leads. A comparison of these resultsis presented.

4.1.2 Results

4.1.2.1 Converging Thermal Resistance Through Leads (0CR CC)

This resistance value was calculated using the relationship,

T IT.CR -Cc0CR-CC ' '

where TCR is the average temperature of the silicon Connection Region ofthe model,

Tcc is the assumed chip-carrier tiiimperature, ad qiL s the heat flowthrough the lead.

87

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250A EVAPORATEDSILICON COPRLAYER OF GOLDDIOXIDE"

1 0 A

SILICON BUM P

I EVAPORATED LAYER OF CHROMIUM

PHYSICAL MODEL

CONTACT COEFFICIENTVON,$ FOR AI-Cu-C r -Au

MATHEMATICAL MODE~L

Figure 4. 1 Physical and Mathematical Model of Film CarrierConnection Region

PHYSICAL MODEL

MATHEMATCAL0MODE

Fiur .2Ph~ca adMaiin.alclMoelo W.eBndCon4t4

.09

For the film carrier connection region model, shown in F ure 4. 1,with TCC = 60'C and = .005 watts, it was found that TCR 72.6 C whichyields OCy..CC = 2626 C/WL,

For the wire-bond connection region model, shown in Figure 4.2,with TCC : 60 C amo .002 watts It was found that TCR 93.4JC whichyields eCR.CC = 16678 C/WL,

4.1.2.2 Thermal Resistance of Lead Per Unit Length, 6 L

Since OCR-CC was determined using a fixed 0. 1" length of lead, theOCR-CC value was actually broken down into two series resiataices, OL, theresistance of about 0.093" length of lead, and OCH-L, the resistance throughthe connection region, which also includes a small length of the lead itself.For the film carrier lead, the resistance was calculated to be 24.2(°C/WL)/MILand for the wire bond lead It was calculated to be 166.7( 0 C/Wj)/MIL. Thenthe resistance for the film carrier connection region was determined to beOCR-L - 267.2 0 C/WL, and the resistance for the wire bond connection regionwas determined to be 0CR-L - 1136. 80C/WL.

4.1.2.3 Temperature Distribution Through Connection Region Model

The relative temperature distribution within each of the models canbe seen in the isothermal plots of Figure 4.3, for the film carrier intercon-nection, and Figure 4.4 for the wire bond Interconnection lead.

4.1,2.4 Thermal Characteristics of the SCP14 Chip Model with*Added from C onnect-d-ijFon ModelS"0C-s

The results obtained by the addition of th6 connection region modelthermal resistances are summarized in Table 4.1, These results were obtainedby adding a node to represent the connection region thermal resistance at eachconnection point (10 per model, 40 .ur chip) on the SCP14 Chip Molel.

4.1.3 Theoretical ConclusionsIt was found that the Film Carrier connection can dissipate about

7 times as much heat as a wire bund connection load for a given allowable

temperature rise. But, the film carrier still has a much higher thermalresistance than tat through the chip to suostrate bond. Therefore, a chipbonded to a substrate will have it much higher power dissipation acapability by

a factor of about 5:2, than one supportud only by the lip,ds. The addition offilm carrier leads to a substrate mounted chip will produce about 1% decreasein the thermal resistance obbtined without the leads (Table 4,1),

The thermal resistance of a chip without a substrate but with film.r.rripr i,.eroo•rp'1inni will hP. relatively hiWh, but might be tolerable for low-power operation. Some improvement can be made in the film carrier values;

* however, the wire-bond values are pretty well fixed. For example, by doublingthe thickness of the film carrier, the resistance, OT -CC, can be reduced

previous Caculations it can be shown that 0JR.CC can be reduced from 74 C/WCto about 46 C/WC for a chip mounted with filh carr',or leads only.

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It can also be seen that the film carrier has a fairly uniform tern-perature gradient and will therefore produce lower thermal stresses than thewire bond (see Figures 4.3 and 4,4). The thermal stresses will be especiallyhigh in the wire bond at the point where the bond transitions into wire in Figure

4.4.

4.2 EXPERIMENTAL MEASUREMENTS

4.2.1 General Remarks i

The purpose of this portion of the study was to thermally characterizefilm carrier devices furnished by RADC. This was done uaing the IR micro-scope and the set-up described in Section 1.

4.2.2 Film Carrier Devices

Five devices packaged with the film carrier technique were suppliedby the Rome Air Development Center. These devices were MC 5405 BCB HEXInverters manufactured by Motorola and packaged in D-1 ceramic packages.with fritted-on lids. The chip and an opened package are shown in Figures 4, 5and 4.6. Three of the devices were damaged when opening packages or on

coating. Measurements were obtained on the same outpub transistors of eachof the remaining devices at a heat sink temperature of 60 C with the 15x objectivelens. The results are shown In Table 4.2.

TABLE 4.2. THERMAL RESISTANCE OF FILM CARRIER PACKAGES

DEVICE 0 JR-CC (°/wc) WITh 'JEAN•TRANSISTOR ON PIN (CiWC)

1 2 ___4__ 11 33.2 28.0 35.5 35.0 - 32.9

2 35.5 28 32.5 33.2 j 31.5 32.1

On both devices, the transistor labelled "-2" seems to run somewhatcooler. There is no large spread, and the two samples yield, esaentially,similar results. It should be noted that these packages were fabricated usinga film carrier technique for the chip - but, the lead frame was wire-bonded tothe chip pad. Only the chip was bonded to the film carrier lead frame. There-

I fore an experimental evaluation could not be obtained for the heat sinking effectof the leads.

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Figure 4.5 MC5404 Chip With Mlass Cxdi'igI

75r

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Figure 4.6. MC 5404 in Dl-1 Package.

'76

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REFERENCES

(1] G.K. Baxter and J .W. Brotillette, "Thermal Resistance of Micro-electronic Packages", General Electric Company, Technical Infor-mation Series R75ELS027, May 1975.

[12 G.K. Baxter, "A New Recommended Method 1012 (Thermal Charac-teristics) for MIL-STD-883", General Electric Company, TechnicalInformation Series, R75ELS026, May 1975.

[3) M.H. McLaughlin and N.D. Fitzroy, "Thermal Chip Evaluation ofIC Packaging",IEEE Transactions on Parts, Hybrids, and Packaging,Volume PHP-8, No. 3, September 1972.

[4" Y.S. Touloukian, etal., Thermophysical Properties of Materials,Thermophysical Properties Research Center, Purdue University,Data Series: Plenum Publishing Corporation, 1970.

[51 J.E, Comeforo, "Properties of Ceramics for Electronic Applications",

The Electronic Engineer, April 1967.

[61 M. Jakob, Heat Transfer, Vol. 1, Wiley and Sons, New York, 1950.

1[7) A.S. Grove, Physics and Technology of Semiconductor Devices,Wiley and Sons, New York 1967.

[B) B.G. Oswald, etal, "Application of Tape Chip Carrier Technologyto Hybrid Microcircuits", Proceedings of the Hybrid MicrocircuitSymposium, June 8-9, 1976, U.S. Army Electronics Command,Ft. Monmouth, N.J.

[91 T. Angelucci, " Gang Lead Bonding Integrated Circuits", Solid StateTechnology, July 1976.

1101 J. Lyman, "Special Report: Film CarrierM Star in High-Volume ICProduction, Electronics, Dec. 25, 1975.

11l G. DeHaine, etal, "Tape Automated Bonding Moving into Production",Solid State Technology, Oct. 1975.

77

APPENDIX A

AUTHO iJUJICT

3W BroulletteHeat Transfer D

TITLE G CLASSTHERMAL RESISTANCE OF (V LS

MICROELECTRONIC PACKAGES CLS______none

NE1PROOUC)ILE COPY FILEO ULECTRONICII LAMONATONY IWO OF PAGESAT 79CHNICAL INFORMATION KP 18 GYSACUSIN. N.Y -3

SUMMARY

Methods for measurement ol thermal resistance and tem-perature response curves, including MIL-STD-883 Method 1012,were evalu~tod to determine an optimum method to measureMIL-M-38510 packages.

Computer simulations, infrared measurements and elec-trical temperature sensitive parameter meamiurements of specialthermal test packages were evaluated arnd compared. A ratio ofabout 5:1 was shown to exist for temperature rise values of thejunction peak temperature, junction average temperature andthe junction region temperature. Measurements can be verymisleading unless precautions are takeni to interpret reaultsI prope rly .

The optimum method, IE. measurement of a coated chip,can only measure the temperat~ure of thie junction region.

KEY ORDoSintegrated Cirrouita, Junctio lenprte, ComputerSimulation, E~xperimental Tesiting, Teiit Methods, ThermalResist~unve hura red Temperatkire Measurement, T~emperatureSensitive~ Eivectrical Param eters Thernial Time ConstantTomperaturo Responsie, Therrniai Models, Expe rimental Bata,MIL-M-38510 Packages, Microelectroni ka~a s

IMrAIDWAIAvM, 00rPAP~n AR U SAF/Ronie Air Dev-ýIopnxent Center (RUiM), Griffiss AFT3,*IS,~~ame ri9*f y .,-

WORK CONDUCTED 8~~~ .

~~ APPROVED K5 mo SCTMD

-. . ----.-... A -1

APPENDIX B

AUTHOR SUBJECT NA S2G.K. 11axter Test Methods and Procedures ~'

IMAY 1975TITLE A NEW RECOMMENDED METHOD 1012 GE1 CLASS1

(THERMAL CHARACTERISTICS) CLASSFOR MIL -STD-883 gone

RKPNODUCIULE COPYV FILED EETOIOLAOAOV90O AEAT TECHNICAL INFORMATION IPI13 I&VINACU11E,1N.Y.___

SUMMARY.1 This new method specifies test procedures, measurement

? locations and descriptive notations for measuring and specifyingjunction peak temperature, junction average temperature andjunction region temperature, chip carrier temperature, relativethermal timo constants and relative thermal resistance valuesfor microelectronic packages.

These methods will enable it user to make direct compari-sons between thermal data provided by different vendors; and

4. moreover, the data provide a meaningful Interface to., Inte-grating vendor's data Into the thermal design of the user'selectronic system.

It is anticipated that a new industrial standard will evolvefrom the techniques and notations recommnended during thisstudy.

KEY WORDS Integrated Circuits, Junction Ternperature Experi-mental Te~itin, Trest Methods, Thermal Resistance, VifraredTemperature Measurement, Teprur Sensitive ElectricalParameters, Thermal Time ConsI t, emporature Response,Microelectronic Packages, Translstors, Diodes

USAF/lione Air D~evelopment Center (KRBM), Griffiss AFB3,-F~r0%MAA~lf%& nOrOAPVM rfp Rome, NY 13441 AF Contract No. F3U6024.4-C -015U,__

loll JUI.... wfli.

WORK~ CONDicrn BY._A_ýq (Pro~jectNo U -1A13 2O6-DZ-Onf420U)-

APPROVED ....... -

59 malt SECT MOR

IB-

APPENDIX C

ANALYSIB OF INFRARED MEASUREMENT TECHNIQUES

There are several possible problems associated with IR measurements "'on a semiconductor chip that are discussed below, This information came upduring the process of evaluating the IR measurement technique and is thought'to be of sufficient value to be included in this final report, The actual testsperformed in determination of the optimum KR measurement technique aredesoribed in more detail in Appendtues A and B. If we start at the surface ofa typical chip and survey the protlems we can encounter we will find ccnitribu-tions from the following effects.

OVERGLASSING

First, the overglassing, since it is the first layer of material on the shipand its IR transmission properties can be related to other facets of IR meas-urement similar to these described. An overglassing material, such as siliconoxide or silicon nitride is generally deposited to a thickness of about 0.5 I•mon the chip surface to act as a protective layer. Silicon oxide, for example, isdeposited in an oxygen lean atmosphere which results In a material somewherebetween 8iO and SiC2; in some applications a little phosphorous may be added.The problem this overglassing material may present depends on its thicknessand its IR transmittance across the wavelength range of interest, I.e. thatrange for which the IR detector is uensitive. For example the transmittanceof a 1mm thick silica glass falls from about 90% to about 10% across the band2-5 Am. t Presumably, the transmittance of SiOx is similar to that of thesilica glass, 8102. Consequently, it in possible that the detected longer wave-length radiation may originate at the surface of a piece of glass while theshorter wavelength radiation may originate below the glass. This effect maybecomo important for some overglasuing materials and also in the case wherea glass slide or other material is used to cover the cavity over an exposedsemiconductor chip during IR measurements of microelectronic packages.

• Conversations with Dr. David D. Meyer, General Electric Company, Solid

State ApplicatiokIS Operation, Intugrated Circult Center Devicos and Processes,Syracuse. New York.

Re~ference 121 , Section 11, p. 16.

c-I [

, . i l i l I I I I I II

In tests during this proje-t we were interested in the IR range of 1.8-5.51im but the thinness of the silicon oxide overglassing on the thermal testchip negated any problem. The transmittance is equal to exp(ast) where tis thickness and aX is a wavelength dependent absorption coefficient per unitof thickness. For our 0.51im thickness it is estimated that more than 99%of the energy is transmitted through the overglassing even at the longer wave-length., -

METALLIZATION

Now to the second layer of material. If the second layer of materialhappens to be metallization then we encounter a real problem for infraredmeasurements. Most metallization films, such as the aluminum metalliza-tion of interest here, has an extremely high reflectance of nearly 100% inthe IR range of interest. Since emissivity is equal to 100% less the reilec-tance, then the emissivity is obviously very low. For example a freshlyevaporated film of aluminum has a reflectance of about 95% between 2-5 m,hence the emissivity is only about 5%.* Consequently, radiation from themetallization is very low and therefore hard to detect and provide accuratemeasurement and conversion to equivalent temperature. An infrared micro-scope detects energy from an area centered at the crosshair location. If themetailizatirm happens to fall within that area the metallized surface may notcontribute a significant amount of energy to the total radiance measured bythe detector; hence, the Indicated temperature measurement may be very low.

SILICON CHIP

The second layer material that will generally be encountered, next tothe metallization, is most probably the silicon chip itself, which has its ownunique infrared transmission characteristics. Silicon is fairly transparentto infrared energy in the 2-5 /n wavelength range. A thickness of 2.54 mmhas a transmission of about 55% in this range. * For a thickness of about3001m (12 mils), similar to that for a typical nemiconductor chip, the trans-mission increases to about 93%. Thus, energy radiating from a chip comespartially from the silicon material itself but primarily from the materiallayers below the chip. That material will usually consist of either the chipto substrate bonding material or the chip carrier (or substrate metallization)depending on the package construction and voids etc. in the chip bond.

Here again, we most probably will meet the low emissivity problemassociated with metallization; consequently, it can be presumed that of theenergy ra.diated from the chip, the largest portion may actually be reflectedenergy from the chip bond interface and the rest emanates from within thebulk material of the chip. A visual analogy to this might be that of lookingfrom an airplane into the fairly clear water of a quiet shallow bay whereinthe bottom of the bay has an almos, mirror -like finish, What we attempt tosee or detect in the bay is the surifce condition of the water. That is verydifficult. So it Is with an infrared microscope, it is focused on and attempts

* Reference [21, Section 11, page 242, 243.

I

to detect or see the surface radiation from the chip. In reality it is detectingenergy emanating from within the chip and reflected from the metallizationorradiated from the substrate, below the chip.

CHIP COATING

The best way to eliminate the chip translucence problem is to provide acoating an the surface of the chip. This in itself presents other problemshowever because a temperature gradient will occur in any coating. Thatmeans a lower surface temperature will be read because the surface is fartheraway from the junction and, in addition, the coating may alter the heat flowpaths from the junction, resulting in an actual decrease of the junction tern-perature. Ideally then, the coating should be as thin as possible yet opaquein the IR wavelength range of the detector and should have a very high thermalresistance to lateral heat flow.

During experimentation with various inks, lacquers and enamels using

different colors and solvents and methods of application such as spraying,Sjdaubing and spinning it became apparent that the best immediate coating solu-

tion would use some kind of a pigmented lacquer with very fine pigment parti-cles. The size of these particles is very important because a uniform emis-

'sivity is desired over the whole detection area regardless of how small thei area In practice. The emissivity of a pigmented lacquer increases withthickness and a minimum practical thickness turns out to be about 25 lim(I rail). At this thickness the emissivity in the infrared and visible regionsis about 00% and 20%, respectively, for white pigmented lacquer on aluminumfoil and about 95% and 95%, respectively, for black pigmented lacquer onaluminum foil.* Since the uniformity of the coating must be detected visually,it becomes important that the emiasivity, or in reality -- the reflectivity, inthe visual range, 0.4-0.7 pzn, give suffficient contrast between the coating andthe chip surface to detect nonuniform coatings. Consistent IR measurementscan only be obtained with this relative thin coating if it is uniform in thickness.As It turns out, black pigmented lacquer gives much better visual contrastthan does the white pigniunted lacquer and is therefore recommended for thecoating material.

:- IREFERENCES

1 2] J.A. Mauro, _OEtca_ EngineerinB..Hindbook, 1966, GeneralElectric Company, Flectronics Laboratory, Syracuse, New York.

* 4

C -3

__ __ __ __ __ __ __-*- -.,. *,--.- - l* l*.~-. l l~-~~~-.

APPENDIX D

AUTHOR SUBJECTIaR.McCarthy 020 Reliability

J.W. Brouil~lettf 040 Measurements "AAug. 1976TITLE improved IR Surface Temperature Measure- GE CLASjS

nients for Integrated CircuitsGVCLS

RIPROOUCISLE COPY FILED ELECLTRONICS LABOPIATORV INO. OF PAGESATTECHNICAL INFORMATION EP *VSRACU89. N.V. 12I SUMMARY

Reliability predictions for Integrated circuits would be im-roved if accurate MA surface temperature measurements werevrsilable. There are two methods presently in use, neither ofwhich is satisfactory. The first method uses no surface coating,

in which case the temperature measurements are Inaccurate dueto the changing emissivity %cross the surftce. The siecond meth

¶ uses a coating to produce a constant einissivity across the surfacebut, since, the coating Is opaque to visible light, it Is difficult tolocate the measurement sites. Consequently, a search was per -formed to find a coating thatt is both highly absorbent in the LB(to produce a constant IR emissivity across the surface), andransparent in the visible spectrum (allowirng the locattion ofmeasurement sites). Two potential candidate coatings were found.

KEY WORDSIntegrated Circuits, coatings, IR measuremnents

emissivity, reliability

INFORMATION PREPARED FOR-...

WORK CONDUCTED B uhr ___

APPROVED 1 ?'K cSS MOR SECT MOR

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TABLE OF CONTENTS

, ee Section Title ae

I STATEMENT OF THE PROBLEM. .. .............. I

11 SPECIFICATIONS ...... .................. ....

II APPROACH ..... ................... .. .. 2

A. Specification rests ... ........... ..... . 2B. Materials ...... ...................... 3

IV RESULTS ...... ... ............ ... 4

A. Instrumentation. ,. .... *.. 4B. Materials Testing ......................

V CONCLUSIONS......... . .. .. .. .. .. .. .. ......

uReferences ....... ... ..... ..... ... ..... ..... 12

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I. STATEMENT OF THE PROBLEM

To determine the performance and useful life of an Integrated circuit inhigh reliability applications, accurate Junction temperature measurements areneeded. The devices within the integrated circuit exhibit wide variations Ininfrared transmissivity and emissivity, making it difficult to obtain accuratetemperature measurements. Therefore the integrated circuit must be coatedwith a material that produces a constant high IM emissivity and, at the sametime, Is transparent enough in the visible spectrum so that the smallest sur-face detail of the integrated circuit can be accurately located. The coating mustalso be thin enough to produce negligible thermal distortions.

The purpose of this study was to find a suitable coating material.

n1. SPECIFICATIONS

The following materials guidelines were followed:

1. Absorption

The coating should be absorbing in the infrared, especially withinthe spectral range of the detector from 1.8 to 5.5 microns.

2. Emissivity

The emissivity should be constant and high across the surface of thecoated integrated circuit; reference 1, page 14 states E > 0.8. Inreading with the Infrared microscope this means that a coating overlight areas should read the same as a coating over dark areas so thatthe reading, as a coAted circuit is scanned, remains the same. Thisratio must not change as a function of temperature as stated inreference 1, pag 14.

3. Thickness

As per reference 1, page 14, the thickness should be between 25-50microns.

4. Aplied Area

2As per reference 2, page 2, the circular area should be 1.0 mm

5. Proportionality to Standard Blackbody, Curve

The TB microscope readings should be as high, or almost as high, as fora blackbody as a function of temperature. Ideallt, a plot of the IRmicroscope (mV) response versus temperature ( C) should displaythe same curvature as the blackbody or be strictly proportionalto the blackbody curve.

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6. Applicabilit-

The material should be easy to apply to the surface of the Integrated

circuit.

7. Corrosiveness

The material should be classified as non-corrosive.

8. Toxicity

The material should be classified as non-toxic.

9. Availabilit

The material should be readily available.

10. Temperature

The material should be stable from 60°C to 200°C to cover the entirerange of operationpl IC param 5terM. Preferably the inatorlal shouldhave a melting point above 200 C.

S11. Preparation

The material should be easy to prepare and apply.

12. Thermal Conductivit'

The thermal conductivity of the material should be low as specifiedin reference 1, page 14.

M, APPROACH

A. Specification Tests

The purpose of the specification tests is to verify conformance withspecifications 1, 2 and 5, listed above. There are two tests, as follows:

Test I. This test yields the difference In reading betweenScoaEd light and dark areas. A white substrate was placed ona heated thermocouple -monitored copper plate. A black dotof India ink was painted on the substrate and a coating wasspun over the dot and white substrate, A heat sink compoundwas placed between the white substrate and the copper plate.(See Figure 1.)

India Ink Thermocouple-i'.'i ~~Black Dot Cotn ".

-;,: 1 | - J .... ,• /White Substrate

'.Copper Plate7 7 7 7 7- 7 7/t 7 7 A. Hot Plate Heater

Figure 1. Emissivity Test.

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The copper plate was heated to a specific operating temperatureand the voltage output from the Barnes Infrared Microscope wasrecorded for the black dot and the white area, For a high emis-sivity controlled surface there should be little difference inreadings.

The thickness of the layer was measurad with a microscope.

The emissivity can be calculated as the ratio of the white to blackarea readings. Therefore, for high emissivities, E -4 1, thedetector response reading between the white and dark areas wouldbe approximately the same.

Test I1. This test measured the voltage output of th8 IR micro-scope as a function of temperature, from 60"C to 200 C, forpa ticularly promising coatings (from Test 1). A plot of voltageversus temperature was obtained and compared with the samecurve for the blackbody source.

Mlcroscopc

[ = *Objective

i . ,' .- " •coating

White Substrate Thermocouple

Copper Plate

77 7/i / 771 7/ / 77 7 7 7 7 17 7 7 7/7 7Hot PlateFigure 2. Temperature Response Test

A thin coating was spun onto a white substrate. The thicknessof the coating was measured with a microscope. Then the sub-strate was placed on the copper plate and the temperature wasvaried from e0oC to 200 0C. The output of the infrared microscopewas recorded (see Figure 2).

B, Materials

The following materials were tested:

1. Versamids #900, #930, #940, #950

2. LacquersBlack Krylon, Clear, Matt Finish

'3. Wratten Filters'#52, #64, #48, #93, #102

4. Carbon Evaporation ,:

6. Glycerin

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6. Sodium Silicate

'7. Versamid Mixtureswith Versamids, with glass.

8. Glycerin MixturesGlycerin and glass

9. Sodium Silicate MixturesSodium Silicate and glass --

Each of the materials tested had absorption regions in the IR asmeasured by the IR Spectrum Analyzer (see Figure 3). Emis-sivity and absorption data for these materials are presented inTable I.

IV. RESULTS

A. Instrumentation

The spectral response of the Barnes IR microscope is shown inFigure 4. The Microscope was evaluated as follows:

1. Operator Instrument Variance

After repeated testing, and neglecting the constant instrumentvariance in the microvolt range, there is an operator instrument"variance of 0.6 mV average, which renders the last three digitsof each reading highly inaccurate. For example, a reading of0.023456 appears as

0 . 0 2 34 ~

Operator/Inst. Vartanca Random Changes,

which means that the reading is 23 mV k .6.

2. Mechanical Variance

As the mý ,roscope is orerated In and out of focus with the highpower objective, it does not always return to the original targetarea. This may be one of the reasons for the Instrument/Opera-+or Variance noted above.

3. Temperature Response

There is a difference in readings when incroasing or decreasingtemperature, which averages out to approximately 1 mV.Readings should always be taken as the temperature is increasingsince the deviation is rather large compared to other variances.

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TABLE 1. SMISSIVITY AND ABSORPTION DATA

Absorption Compared

White Ar@ 4Reading to Blackbody at 70 0 CEminivlty -BIkAr• Reading Blackbody wks

75.00 mV

EvaporatedThin Coat-Carbon 0.46

Ver. 900.(200microns) 0.58 40.82

Clear Lacquer 0.67 33.90

Ver. 950 0.59 50.60

Mix 50:50Ver. 930+940 0.74 11.92

Mix 50:50Ver. 940+950 0.55 69.00

Mix 50:50Ver. 90+05•0 0,83 48.66

Mix 50:50Ver. 900+930 0.75 55.09

Mix 50:50Ver. 900+940 0.77 73.00

Mix 50:50Ver. 900+950 0.86 62.50

Mix 75:25Ver. 950,920 0.75 55,23

Mix .33, .33, .33Ver. 900,940,950 0.66 65.52

Ver, 900 +Crystal0Glass 0.91 73•.40

Glycerin 0.71 no data taken

Glycerin + Glass 0.99 (see chartO

Sodium Silicate 0.795 no data taken

Sod. Sil. + Glass 0.99 (see chart)

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i ~ M* ~ fwkM aU~~U ks s &ba u .•

/ '. . .._____--

100 - - -

90 - •,._.• • __,_

,/1

z 7 - - -- - ~ ~

5040//-/

20/10 -

0-2 3 4 5 8 7

WAVE LENGTH (MICRONS)--- Most absorbing Versamid Mix - Ver. 900 + 940 (40 microns)--- Sodium Silicate or Glycerin (40 microns).U.' Sodium Si1. or Gly + Glass (40 microns)

Figure 3. IR Spectrum Analysis Curves.

100

90 -80 -

•70 -

50 -

40 -

10 -

WAVELENGTH (MICRONS)

Figure 4. Spectral Response of Barnes IRDetector.

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4. Temperature Differentials

It was noted that when the objective ware placed near the specimenthe temperature recorded by the thermocouple decreased. Ales,when blocking off the objective the detector monitor no longerrecorded near zero, but now indicated a reading of approximaesly0.00500 or 5 mV. This reading, probably due to the heated o•b-jective, stayed fairly constant, even when the temperatur, ot' •i"hot plate was increased. Because of the discrepancy in r ' - Ingto the same spot, due to mechanical tolerance, it was dcc.i.%. te.leave the muicroscope In place, increase the temperature, andtake detector output readings without recalibrating after eachtemperature reading.

5. Optical Constraints

Using the high power objective it was impossible to focus on thesurfaces of the IC with the package used in the tests; thereforethe low-power objective was used. In order to get near enoughto the IC to focus the high-power ohiective, it must be redesigned,or a slightly larger focal length must be used.

6. Blackbody Calibration

The blackbody calibration used as the standard for all teots tsshown In Figure 5, Curve A.

B. Materials Testing

1. Veruamids and Versrmid Mixes

Thick layers of versamids were very absorbing in the IR regionbut, after spinning and obtaining a thin layer, most of theirabsorbance was lost. On heating, the layer became increasinglyopaque with increasing temperiture. This occuri ed in versamidmixes as well.

2. Wratten Filters

Wratten filters of gelatin were found to be unstable r'bove 500 Cand glass filters were too thick for this application.

3. Lacquers

On all lacquers tested, which were transparent in the visible,emissivity was not constant across the specimen and the UR ab-sorption was not high,

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4. Carbon

In initial tests using an actual IC a thin layer of carbon wasevaporated onto the IC. The emissivity was almost constant butthe resolution was poor, especially in light of the tact that weused a relatively simple IC package with few components. Thisprocess would be suitable for this type of package but, for LSIor MSI applications, the resolution would be a problem.

5. Glycerin and Glycerin Mixes

A glycerin coating produced a large deviation when measuredacross the sample, especially for a thin layer. When fine parti-cles of glass were added to the glycerin there was no differencewhen scanning across the sample. The best thickness of glassparticles was abotit 60 microns, with particles ranging from 2to 30 microns. Milling the glass to smaller sizes - (all below20 microns) a thin layer of 20 microns was obtained. A plot ofdetector voltage vs. temperature for this layer is shown inFPiqre 5, Curge B, Complete evaporation took place between140 C and 150 C. It should be noted that the readings decreasedafter complete evaporation. Different concentrations of glasshad little effect on the results either in evaporation or in emissi-vity.

6. Sodium Silicate and Sodium Silicate Mixes

Sodium silicate coatings did not yield high emissivities, but a50-50 mixture of silicate and glass did absorb highly in the IRrange and exhibited a high emissivity. Also, the sodium silicatedid not evaporate. The detector voltage versus temperaturecurve is shown in Figure 5, Curve C, The sodium silicate/glassmixture is a good coating material, provided it is not requiredthat the coating be removed. It is extremely0 difficult to removethis coating once it has been heated above 70 C. Ultrasoniccleaning can be used to remove this coating but it =ay damagethe IC, especially the fine wires attached to the circuit.

V CONCLUSIONS

Black Krylon paint absorbs heat. The IR microscope focused on heatedblack Krylon paint shows a relatively high reading because Lhe black paint ab-sorbs and gives off IR energy in relatively large amounts. Glass also absorbsin the IR but, unlike the black paint, is transparent in the visible IR spectrum.

Even thin coats of glass will absorb and radiate almost as much I1I as theblack Krylon paint, Therefore the problem was to find a way to put a thin layerof glass on the integrated circuit so that t.he coating is as absorbing as the blackpaint.

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It was found that when glass particles of about 10-15 microns are sus-pended in a homogeneous medium some of the specular radiation scatters andbecomes diffuse, heating the coating to the approximate temperature of a black-body. As long as the homogeneous medium is transparent the coating will betransparent, even though it appears that it absorbs in the IR as the black paint.

Sodium silicate is not a highly absorbing coating in the spectral rangeof the detector. Glass, however, is highly absorbing in this region while trans-parent in the visible. It was thought that, by using particles of glass suspendedin a medium, the resulting coating would have a high absorption in the IR andthe spectral range of the detector and, as long as the glass remained suspendedin the medium, the IC component would be visible through the coating.

Any medium could probably be used, providing it was transparent inthe visible, sligittly absorbing in the spectral range of the detector, and wouldnot evaporate at 2000 C - the maximum operating temperature of the IC's to btetested. If the medium evaporates then the glass crystallizes on the surface ofthe IC and becomes opaque in the visible due to a change in the index of refrac-tion. Its IR absorption also becomes somewhat less. This was the case withglycerin and glass above 140 0 C. Cooling the IC and adding more glycerinreturns the coating to the original transparency that it exhibited in the visible.Sodium silicate does not completely evaporate until it reaches 10880 C and,therefore, a coating of glass and sodium silicate remains transparent in thevit;ible throughout the temperature profile of the IC. it may flow somewhat orcrack, but it does not allow the glass to fall on the surface. The index of re-fraction does not change with temperature. Also its proportional variance withthe blackbody stays constant throughout the temperature profile, so that a cor-rection can be applied to thu reading when applying temperature calculatirns.Its form would be X + AX where A - 0.10 and X would be the voltmeter readingfor the coated IC at each temperature point.

The emissivity is constant across the IC throughout the temperatureprofile. Howevur it may be desirable to use the fine-glass coating provided bythe boll-off of glycerin and glass on the IC. Normally, the coating would beopaque, but when a drop of water or glycerin is placed on the coating, the indexof refraction changes and it becomes transparent ;dluwing one to locate com-ponents. The material selected (water or glycerin), depends on the operatingtemperature; that is, the materials rate of evaporation at the operating tem-perature. The material must evaporate at a rate slow enough for the operatorto find the part of the circuit he wishes to test becau.,e, when total evaporationtakes place, the circuit is no longer visible.

The method of preparation for glycerin and glass is the same assodium silicate and glass (see section B below). This type of layer is mucheasier to remove from the IC than sodium silicate and glasf., which may be animportant feature for some applications.

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Both of these coatings could be useful, and can be used to controlsurface emissivity. The choice depends on the application, parameters of thetest, and operator preference. For higher temperatures, above 1400 C, sodiumsilicate and glass are still more appropriate.

Testing the coating Is prepared as follows:

1. Mount the IC to be coated on a spinner

2. Place a drop of sodium silicate (or glycerin) on a cleanmicroscope slide

3. Stir into the sodium silicate (or glycerin) drop an equalt amount of microscope slide glasf•, which has been pre-

viously crushed and milled to 20 1; or less,

S4. Mix the sodium silicate (or glycerin) and glass thoroughly

S5. Place the mixture quickly on the IC to be coated using aSsmall wooden stick (the wooden part of a Q-Tip siervesSwell). Gather the mixture on the end of the stick andlightly touch tb,, IC with the uoating on the end of thestick. Some (if the mixturo' will adhere to the IC formingS~a drop on it.

6. Spin immediately tit 280U RPM (high 75 mark on dial) forS3 minutes.

S7. Turn ef the spinner and examine the IC to determine iflayer is uniform. If not, immediately apply drops of boilingwater to the IC to melt the coating away. The coating willrun off the sides and it can then be spin-dried. Now, the IC isready for another coating. Once the coating is uniformthere will be, approximately, a 2011 coating on the IC andthe IC is ready for testing.

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ReferencesI 1. Baxter, G.K., A New Recommended Method 1012 (Thermal Charac-terstis) orMJL-STD-883, General Electric, Technical information

I Series, R75ELSO26, May 1975.

I ~Improved Infrared Surface Toniperature Measurements on Micro-electronic Integrated Circuits, May 1976.

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