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1 CHAPTER 1 INTRODUCTION CALL centres originated as a cost-cutting measure by US companies several decades ago but they only really started to take off in the UK in the 1970s. The initial centres were in house operations in larger organizations and they tended to share and be formed by the same basic assumptions and drivers. The idea was that if you could cluster the majority of telephone based contacts with the customer in a single department you could have people focused just on call-related services. Several advantages would follow first as a coherent department focused on telephone services, such a centre could be managed more coherently. A second motive was that through careful management of the centre we would inevitably get the benefit of having more calls handled by fewer people. Steve Morrell, Managing Director at ContactBabel an organization that specializes in analyzing the call centre market, points out that this early focus on efficiency and cost cutting in a sense got the call centre industry started off on the wrong foot at least in relation to current best practice. It meant that the whole industry focused on measuring things such as call lengths or time to resolution. The faster the operator could complete a call, the more efficient and effective the contact with the customer was deemed to be," he explains. Divide the number of calls by the number of operators, and you

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CHAPTER 1

INTRODUCTION

CALL centres originated as a cost-cutting measure by US companies several decades ago but

they only really started to take off in the UK in the 1970s. The initial centres were in house

operations in larger organizations and they tended to share and be formed by the same basic

assumptions and drivers. The idea was that if you could cluster the majority of telephone

based contacts with the customer in a single department you could have people focused just

on call-related services. Several advantages would follow first as a coherent department

focused on telephone services, such a centre could be managed more coherently. A second

motive was that through careful management of the centre we would inevitably get the benefit

of having more calls handled by fewer people. Steve Morrell, Managing Director at

ContactBabel an organization that specializes in analyzing the call centre market, points out

that this early focus on efficiency and cost cutting in a sense got the call centre industry

started off on the wrong foot at least in relation to current best practice. It meant that the

whole industry focused on measuring things such as call lengths or time to resolution. The

faster the operator could complete a call, the more efficient and effective the contact with the

customer was deemed to be," he explains. Divide the number of calls by the number of

operators, and you could see at a glance how efficiently your centre was operating .The bigger

the number the better the shorter the call duration and the shorter the time to resolution, the

better.

1.1Aim and Objectives

The main aim and objective of this report is to know the students attendance, marks quickly

through the telephone without the intention of the college authority. By dialing the desired

number one can dig up the information of student. One of the main advantages is the time

spending for college officials in attempting phone calls from outsider will be reduced.

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1.2 Literature Review

What can be done using an Inter voice System?

When connecting an Inter-voice system into telephone lines (either analog lines or digital

T1/E1 trunks), the applications can handle either incoming or outgoing calls and then perform

the following voice processing features:

• DTMF or pulse tone input

• Provides unlimited pre- recorded voice messages

• Live recording of customer messages

• Accesses or stores information to and from the back-end host, database or the

Internet

• Uses leading speech recognition technology to process either spoken words or full

sentence.

1.2.1 What are interactive voice response (IVR) systems?

Interactive Voice Response (IVR) systems allow callers to interact with the communications

system over the telephone. IVR is used to enable the caller to retrieve information from a

database, enter information into a database, or both. IVR systems allow the user to efficiently

exchange information. An IVR system talks to callers following a recorded script. It prompts

a response to the caller and asks him to respond either verbally or by pressing a touchtone

key, and supplies the caller with information based on responses made using clerical

processing.

A computer needs special hardware called a telephony board or telephony card to understand

the DTMF signals produced by a phone. A simple IVR system only requires a computer

hooked up to a phone line through a telephony board and some inexpensive IVR software.

The IVR software allows you to pre-record greetings and menu options that a caller can select

using his telephone keypad. More advanced IVR systems include speech recognition software

that allows a caller to communicate with a computer using simple voice commands. Speech

recognition software has become sophisticated enough to understand names and long strings

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of numbers perhaps a credit card or flight number. On the other end of the phone call, an

organization can employ text-to-speech (TTS) software to fully automate its outgoing

messages. Instead of recording all of the possible responses to a customer query, the computer

can generate customized text-like account balances or flight times and read it back to the

customer using an automated voice. Many of today's most advanced IVR systems are based

on a special programming language called voice extensible markup language (vxml).

1.2.2 VXML Based IVRS System

Here are the basic components of a VXML-based IVR system:

Telephone network -- Incoming and outgoing phone calls are routed through the

regular Public Switched Telephone Network (PSTN) or over a VoIP network.

TCP/IP network -- A standard Internet network, like the ones that provide Internet

and intranet connectivity in an office.

VXML telephony server -- This special server sits between the phone network and

the Internet network. It serves as an interpreter, or gateway, so that callers can

interface with the IVR software and access information on databases. The server also

contains the software that controls functions like text-to-speech, voice recognition and

DTMF recognition.

Web/application server -- This is where the IVR software applications live. There

might be several different applications on the same server: one for customer service,

one for outgoing sales calls, one for voice-to-text transcription. All of these

applications are written in VXML. The Web/application server is connected to the

VXML telephony server over the TCP/IP network.

Databases -- Databases contain real-time information that can be accessed by the IVR

applications. If you call your credit card company and want to know your current

balance, the IVR application retrieves the current balance total from a database.

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1.2.3 Technologies Used

DTMF signals (entered from the telephone keypad) and natural language speech recognition

interpret the caller's response to voice prompts. Other technologies include the ability to speak

complex and dynamic information such as an e-mail, news report or weather information

using Text-To-Speech (TTS). TTS is computer generated synthesized speech that is no longer

the robotic voice generally associated with computers. Real voices create the speech in tiny

fragments that are spliced together (concatenated) before being played to the caller.

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1.2.4 Application of IVRS System

1. Equipment installed on the customer premise

2. Equipment installed in the PSTN (Public Switched Telephone Network)

3. Application service provider (ASP).

4. Virtual Hosted IVR

Many business applications employ this technology including telephone banking, order

placement, caller identification and routing, balance inquiry, and airline ticket booking. A

simple Voicemail system is different from an IVR in that it is person to person whereas an

IVR is person to computer. IVR Voice forms can be used to provide a more complex

voicemail experience to the caller. For example, the IVR could ask if the caller wishes to hear,

edit, forward or remove a message that was just recorded. An Automatic Call Distributor

(ACD) is often the first point of contact when calling many larger businesses. An ACD uses

digital storage devices to play greetings or announcements, but typically routes a caller

without prompting for input. An IVR can play announcements and request an input from the

caller. This information can be used to route the call to a particular skill set. (A skill set is a

function applied to a group of call centre agents with a particular skill) Interactive voice

response can be used to front-end a call centre operation by identifying the needs of the caller.

Information can be obtained from the caller such as account numbers. Answers to simple

questions such as account balances or pre-recorded information can be provided without

operator intervention. Account numbers from the IVR are often compared to caller ID data for

security reasons and additional IVR responses are required if the caller ID data does not

match the account record. IVR call flows are created in a variety of ways. A traditional IVR

depended upon proprietary programming or scripting languages, whereas modern IVR

applications are structured similar to WWW pages, using VoiceXML, SALT or T-XML

languages. The ability to use XML developed applications allows a Web server to act as an

application server, freeing the developer to focus on the call flow. It was widely believed that

developers would no longer require specialized programming skills, however this has been

proven to be misguided as IVR applications need to understand the human reaction to the

application dialogue. This is the difference between a good user experience and IVR hell.

Higher level IVR development tools are available in recent years to further simplify the

application development process. A call flow diagram can be drawn with a GUI tool and the

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application code (VoiceXML or SALT) can be automatically generated. In addition, these

tools normally provide extension mechanisms for software integration, such as HTTP

interface to web site and Java interface for connecting to a database. In telecommunications,

an audio response unit (ARU) is a device that provides synthesized voice responses to touch-

tone key presses (DTMF) by processing calls based on (a) the call-originator input, (b)

information received from a database, and (c) information in the incoming call, such as the

time of day. ARUs increase the number of information calls handled and to provide consistent

quality in information retrieval.

1.2.5 Recent Trends and Development in the Field

It has become more common in industries that have recently entered the telecom industry to

refer to an Automated Attendant as an IVR. This means that when discussing an IVR

application, it is important to ensure that the person you are talking to understand the term to

mean the same thing as you do. Generally-speaking, those with a traditional telecom

background are more likely to refer to an Automated Attendant and IVR as separate things,

whereas those from an Emerging Telephony or VoIP background are more likely to use the

term IVR to define any kind of telephony menu, even the most basic Automated Attendant.

First IVR System / 1991

ITD successfully implemented the first interactive voice response systems in

Turkey at Pamukbank*, Yapý Kredi Bank and Akbank.

First Digital IVR / 1992

ITD made the implementation of the first biggest digital IVR system in Turkey.

First National Switch Center (BKM) / 1993

ITD has important contributions at the formation of the first and only transaction switching

system project of Turkey. The system is implemented jointly by BKM, Deluxe Data

International and ITD. This EFT (Electronic Funds Transfer) switch provides ATM & POS

sharing capabilities among member banks and serves as a critical link between.

First Introduction of CTI Concept / 1994

ITD introduced the first Computer Telephony Integration at Biliþim '94.

ITD became the distributor of Genesys's Computer

First Speaker Independent Voice Recognition / 1995

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ITD realized the first speaker independent

First Internet Integrated Call Center / 1998

ITD began to work on the first internet integrated call center project at Garanti

Bank and successfully made the implementation in February '99.

First Speech Recognition System / 2000

ITD launched Turkey’s First Speech-Enabled Call Automation System in July 2001 with

Global Menkul Deðerler. Callers dial the main number, respond to various voice prompts

using the Turkish language, and tell the system the company name.

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CHAPTER 2

DETAILS OF TOPIC AND ANALYSIS

2.1 PRINCIPLE OF IVRS

Interactive voice response refers to technology supporting the interaction of customer with the

service provider generally over the telephone lines. When a person wants to access any of the

services of the Interactive Voice Response System, he presses a number through his telephone

keypad. The pressed number appears across the line and the ring detector circuit senses this

ring. After a specified number of rings the relay is activated through the microcontroller,

which in turn connects the line to DTMF decoder. The activation of relay causes the number

pressed to appear across the DTMF decoder. The decoder decodes the number pressed and

then the decoder output is passed through the microcontroller to the computer. Now, when the

caller presses a number, the number pressed is decoded by the DTMF decoder and passed to

the computer through the microcontroller using MAX232. The computer recognizes the

number and accesses the particular file from the database to output the voice message. The

output voice is passed through the voice card where the digitized serial data is converted into

analog voice form and passed to the line. The caller gets the information through the line.

2.2 SEQUENCE FOLLOWED IN THE IVRS SERVICE

• Caller dials the IVRS service number.

• The computer waits for a specified number of ringing tones at the end of which,

the connection is established.

• The connection is established by lifting the handset of telephone base from ONHOOK

condition.

• Now, a pre-recorded voice greets the caller conforming that the number dialed

corresponding to the particular service.

• Next, the menu is presented to the caller again in the voice form, giving him the

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various options to choose from.

• If the information to be relayed back is confidential, then the system may even

ask the dialer, to feed in a password number.

• The database is accordingly referenced and the necessary information is obtained.

• Next, the same information is put across to the user in voice.

• The caller generally given the option to :

a. Repeat whatever information was voiced to him.

b. Repeat the choices.

c. Break the call by restarting ON-HOOK condition

2.3 GENERAL DESCRIPTION ABOUT TELEPHONY

Any telephone set will always be in any of the conditions mentioned below:

2.3.1 ON-HOOK

It is the state whenever telephone handset is placed on the cradle. During this state, the

telephone line is open circuit with the exchange and the voltage of –48 V is available on each

telephone line from the exchange.

2.3.2 OFF-HOOK

This is the state whenever telephone handset is displaced from the cradle. During this State

the voltage level is between ± 5V to ± 12 V. The telephone OFF – HOOK resistance is

typically 600 Ω.

2.3.3 SIGNALING TONES

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• Dial tone:

This tone indicates that the exchange is ready to accept dialed digits from the subscriber. The

subscriber should start dialing only after hearing the dial tone. Otherwise, initial dialed pulse

may be missed by the exchange that may result in the call landing on the wrong number. The

dialed tone is 33 Hz or 50 Hz or 400 Hz continuous tones.

• Ring tone:

When the called party is obtained, the exchange sense out the ringing current to the telephone

set of the called party. This ringing current has the familiar double ring pattern.

Simultaneously, the exchange sends out the ringing tone to the calling subscriber, which has

the pattern similar to that of ringing current, the two rings in the double ring pattern are

separated by a time gap of 0.2s and two double rings patterns by a time gap of 2s.The burst

has duration of 0.4s. The frequency of the ringing tone is 133 Hz or 400 Hz.

• Busy tone:

Busy tone is bursty 400 Hz signal with silence period in between. The burst and silence

duration has the same value of 0.75s. A busy tone is sent out to the calling subscriber

whenever the switching equipment or junction line is not available to put through the call or

called subscriber line is engaged.

• Number unobtainable tone:

The number unobtainable tone is a continuous 400 Hz signal. This tone may be sent to the

calling subscriber due to a variety of reasons. In some exchanges this tone is 400 Hz

intermittent with 2.5s ON period and 0.5s OFF period.

• Routing tone:

The routing tone or call – in – progress tone is 400 Hz or 800 Hz intermittent patterns. In an

electromechanical system it is usually 800Hz with 50% duty ratio and 0.5s ON-OFF period.

In analog electronic exchange it is 400 Hz pattern with 0.5s ON period and 0.5s OFF period.

In digital exchange it has 0.1s ON-OFF period at 400 Hz

• TOUCH –TONE KEY PAD

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Touching a button generates a ‘ tone’, which is a combination of two frequencies, one from

lower band and other from upper band. For e.g. pressing push button ‘7’ transmits 852 and

1209 Hz. 1209Hz 1336Hz 1477Hz.

In the keypad ten keys of decimal digits are used to call required number. The touch-tone

telephone produces decade or DTMF signals for DTMF type. The keypad produces two tone

sinusoidal outputs. Rows and columns determine the frequency. This keypad is working with

different frequencies but only two frequencies are transmitted at a time. So the signal coming

from this type of telephone is called Dual Tone Multi Frequency (DTMF).

2.4 TELEPHONE INTERFACE SECTION

It consists of following subsections:

2.4.1 Ring Detector Section

Ring detector circuit does the function of detecting the ring activating signals and then counts

the number of rings.

2.4.2 Ring activating signals

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This is send by telephone exchange to the subscriber. This signal causes an audio tone in the

subscriber’s telephone set. This ring tone is an alarming signal, which diverts the attention of

the subscriber towards the instrument. The ring signal produced at the central office is

composed of a 10v ac, 400Hz signal that is always present on the telephone line with the

handset in ON-HOOK position. The ring-activating signal is |ON for 0.2 sec and the

subscriber can hear the sound of ring in that duration of time. For next 0.4 sec the ring-

activating signal goes OFF. Now the subscriber can’t hear the sound. Again this repeats for

six times with the pause of 2 sec.

2.5 DESIGN FLOW OF HARDWARE AND SOFTWARE

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CHAPTER 3

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BLOCK DIAGRAM OF IVRS SYSTEM

3.1 BLOCK DIAGRAM EXPLANATION

The main blocks of my system are as follows:

• Ring Decoder

• DTMF Decoder

• Microcontroller

• MAX 232

3.1.1 Ring Decoder

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Ring decoder consists of:

• Bridge Rectifier

• Capacitor Filter

• Opto Isolator

3.1.2 DTMF Decoder

In DTMF signaling, two frequencies are allocated to each digit in the push button keypad. The

main function of the DTMF decoder is to detect the two frequencies and until and unless these

two frequencies allocated for a particular digit are obtained, that particular digit will not be

recognized by the DTMF decoder. The decoder uses digital counting technique to detect and

decode all 16 DTMF tone pairs into 4 bit code.

Its features are:-

• Complete DTMF Receiver

• Low power consumption

• Internal gain setting amplifier

• Adjustable guard time

• Central office quality

• Power-down mode

3.1.3 Microcontroller

• It is the central controller of the whole project.

• It scans all channels continuously.

• It transfers the logical values serially to the PC.

• Various tasks are assigned to peripherals.

3.1.4 MAX 232

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• Operate from Single +5V Power Supply

• (+5V and +12V—MAX231/MAX239)

• Low-Power Receive Mode in Shutdown

• (MAX223/MAX242)

• Meet All EIA/TIA-232E and V.28 Specifications

• Multiple Drivers and Receivers

• 3-State Driver and Receiver Outputs

• Open-Line Detection (MAX243)

CHAPTER 4

SYSTEM DESIGN

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4.1 DTMF DECODER(IC 8870)

This is the most important task for my project. As the number pressed by the caller is needed

to be decoded before sending it to the microcontroller, a DTMF decoder is needed.

For our project, we have used DTMF decoder IC8870.Its features are :-

• Complete DTMF Receiver

• Low power consumption

• Internal gain setting amplifier

• Adjustable guard time

• Central office quality

4.1.1 Applications

• Telephone switch equipment

• Remote data entry

• Paging systems

• Personal computers

• Credit card systems

4.1.2 Pin Configuration

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4.2 MICROCONTROLLER (IC 89C2051)

4.2.1 Features:

High-performance, Low-power AVR® 8-bit Microcontroller

Advanced RISC Architecture

• 131 Powerful Instructions – Most Single-clock Cycle Execution

• 32 × 8 General Purpose Working Registers

• Fully Static Operation

• Up to 16 MIPS Throughput at 16 MHz

• On-chip 2-cycle Multiplier

High Endurance Non-volatile Memory segments

• 32 Kbytes of In-System Self-programmable Flash program memory

• 1024 Bytes EEPROM

• 2 Kbytes Internal SRAM

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• Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

• Data retention: 20 years at 85°C/100 years at 25°C

• Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

• Programming Lock for Software Security

JTAG (IEEE std. 1149.1 Compliant) Interface

• Boundary-scan Capabilities According to the JTAG Standard

• Extensive On-chip Debug Support

• Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG

Interface

Peripheral Features

• Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes

• One 16-bit Timer/Counter with Separate Prescaler , Compare Mode, and

Capture

Mode

Real Time Counter with Separate Oscillator

• Four PWM Channels

• 8-channel, 10-bit ADC

• Single-ended Channels

7 Differential Channels in TQFP Package Only

Differential Channels with Programmable Gain at 1x, 10x, or 200x

• Byte-oriented Two-wire Serial Interface

• Programmable Serial USART

• Master/Slave SPI Serial Interface

• Programmable Watchdog Timer with Separate On-chip Oscillator

• On-chip Analog Comparator

Special Microcontroller Features

• Power-on Reset and Programmable Brown-out Detection

• Internal Calibrated RC Oscillator

• External and Internal Interrupt Sources

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4.2.2 Block diagram:

4.2.3 Architectural Overview:

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In order to maximize performance and parallelism, the AVR uses a Harvard architecture –

with separate memories and buses for program and data. Instructions in the program memory

are executed with a single level pipelining. While one instruction is being executed, the next

instruction is pre-fetched from the program memory. This concept enables instructions to be

executed in every clock cycle. The program memory is In- System Reprogrammable Flash

memory.

The fast-access Register file contains 32 x 8-bit general purpose working registers with a

single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)

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operation. In a typical ALU operation, two operands are output from the Register file, the

operation is executed, and the result is stored back in the Register file – in one clock cycle.

Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data

Space addressing – enabling efficient address calculations. One of the these address pointers

can also be used as an address pointer for look up tables in Flash Program memory. These

added function registers are the 16-bit X-, Y-, and Z-register, described later in this section.

The ALU supports arithmetic and logic operations between registers or between a constant

and a register. Single register operations can also be executed in the ALU. After an arithmetic

operation, the Status Register is updated to reflect information about the result of the

operation.

Program flow is provided by conditional and unconditional jump and call instructions, able to

directly address the whole address space. Most AVR instructions have a single 16-bit word

format. Every program memory address contains a 16- or 32-bit instruction.

Program Flash memory space is divided in two sections, the Boot program section and the

Application Program section. Both sections have dedicated Lock bits for write and read/write

protection. The SPM instruction that writes into the Application Flash memory section must

reside in the Boot Program section.

During interrupts and subroutine calls, the return address program counter (PC) is stored on

the Stack. The Stack is effectively allocated in the general data SRAM, and consequently the

stack size is only limited by the total SRAM size and the usage of the SRAM. All user

programs must initialize the SP in the reset routine (before subroutines or interrupts are

executed). The Stack Pointer SP is read/write accessible in the I/O space. The data SRAM can

easily be accessed through the five different addressing modes supported in the AVR

architecture. The memory spaces in the AVR architecture are all linear and regular memory

maps.

A flexible interrupt module has its control registers in the I/O space with an additional global

interrupt enable bit in the Status Register. All interrupts have a separate interrupt vector in the

interrupt vector table. The interrupts have priority in accordance with their interrupt vector

position. The lower the interrupt vector address, the higher the priority.

The I/O memory space contains 64 addresses for CPU peripheral functions as Control

Registers, SPI, and other I/O functions. The I/O Memory can be accessed directly, or as the

Data Space locations following those of the Register file, $20 - $5F.

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The Atmel AVR core combines a rich instruction set with 32 general purpose working

registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),

allowing two independent registers to be accessed in one single instruction executed in one

clock cycle. The resulting architecture is more code efficient while achieving throughputs up

to ten times faster than conventional CISC microcontrollers.

The ATmega32 provides the following features: 32Kbytes of In-System Programmable Flash

Program memory with Read-While-Write capabilities, 1024bytes EEPROM, 2Kbyte SRAM,

32 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for

Boundary scan, On-chip Debugging support and programming, three flexible Timer/Counters

with compare modes, Internal and External Interrupts, a serial programmable USART, a byte

oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input

stage with programmable gain (TQFP package only), a programmable Watchdog Timer with

Internal Oscillator, an SPI serial port, and six software selectable power saving modes. The

Idle mode stops the CPU while allowing the USART, Two-wire interface, A/D Converter,

SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-

down mode saves the register contents but freezes the Oscillator, disabling all other chip

functions until the next External Interrupt or Hardware Reset. In Power-save mode, the

Asynchronous Timer continues to run, allowing the user to maintain a timer base while the

rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O

modules except Asynchronous Timer and ADC, to minimize switching noise during ADC

conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the

device is sleeping. This allows very fast start-up combined with low-power consumption. In

Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to

run.

The device is manufactured using Atmels high density nonvolatile memory technology. The

On chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI

serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot

program running on the AVR core. The boot program can use any interface to download the

application program in the Application Flash memory. Software in the Boot Flash section will

continue to run while the Application Flash section is updated, providing true Read-While-

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Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash

on a monolithic chip, the Atmel is a powerful microcontroller that provides a highly-flexible

and cost-effective solution to many embedded control applications.

The Atmel AVR is supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators,

and evaluation kits.

4.3 MAX 232 CPP:

The MAX220–MAX249 family of line drivers/receivers is intended for all EIA/TIA-232E

and V.28/V.24 communications interfaces, particularly applications where ±12V is not

available. These parts are especially useful in battery-powered systems, since their low-power

shutdown mode reduces power dissipation to less than 5μW. The MAX225, MAX233,

MAX235, and MAX245/MAX246/MAX247 use no external components and are

recommended for applications where printed circuit board space is critical.

4.3.1 Features:

Operate from Single +5V Power Supply

(+5V and +12V—MAX231/MAX239)

Low-Power Receive Mode in Shutdown

(MAX223/MAX242)

Meet All EIA/TIA-232E and V.28 Specifications

Multiple Drivers and Receivers

3-State Driver and Receiver Outputs

Open-Line Detection (MAX243)

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4.3.2 Applications:

Portable Computers

Low-Power Modems

Interface Translation

Battery-Powered RS-232 Systems

Multi-Drop RS-232 Networks

4.3.3 Sections of MAX 233:

The MAX220–MAX249 contain four sections: dual charge-pump DC-DC voltage converters,

RS-232 drivers, RS-232 receivers, and receiver and transmitter enable control inputs.

4.3.3.1 Dual Charge-Pump Voltage Converter

The MAX220–MAX249 have two internal charge-pumps that convert +5V to ±10V

(unloaded) for RS-232 driver operation. The first converter uses capacitor C1 to double the

+5V input to +10V on C3 at the V+ output. The second converter uses capacitor C2 to invert

+10V to -10V on C4 at the V- output.

A small amount of power may be drawn from the +10V (V+) and -10V (V-) outputs to power

external circuitry, except on the MAX225 and MAX245–MAX247, where these pins are not

available. V+ and V- are not regulated, so the output voltage drops with increasing load

current. Do not load V+ and V- to a point that violates the minimum ±5V EIA/TIA-232E

driver output voltage when sourcing current from V+ and V- to external circuitry.

When using the shutdown feature in the MAX222, MAX225, MAX230, MAX235, MAX236,

MAX240, MAX241, and MAX245–MAX249, avoid using V+ and V- to power external

circuitry. When these parts are shut down, V- falls to 0V, and V+ falls to +5V. For

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applications where a +10V external supply is applied to the V+ pin (instead of using the

internal charge pump to generate +10V), the C1 capacitor must not be installed and the SHDN

pin must be tied to VCC. This is because V+ is internally connected to VCC in shutdown

mode.

4.3.3.2 RS-232 Drivers

The typical driver output voltage swing is ±8V when loaded with a nominal 5k½ RS-232

receiver and VCC = +5V. Output swing is guaranteed to meet the EIA/TIA- 232E and V.28

specification, which calls for ±5V minimum driver output levels under worst-case conditions.

These include a minimum 3k½ load, VCC = +4.5V, and maximum operating temperature.

Unloaded driver output voltage ranges from (V+ -1.3V) to (V- +0.5V).

Input thresholds are both TTL and CMOS compatible. The inputs of unused drivers can be

left unconnected since 400k½ input pull-up resistors to VCC are built in (except for the

MAX220). The pull-up resistors force the outputs of unused drivers low because all drivers

invert. The internal input pull-up resistors typically source 12μA, except in shutdown mode

where the pull-ups are disabled. Driver outputs turn off and enter a high-impedance state—

where leakage current is typically microamperes (maximum 25μA)—when in shutdown

mode, in three-state mode, or when device power is removed. Outputs can be driven to ±15V.

The power supply current typically drops to 8μA in shutdown mode. The MAX220 does not

have pull-up resistors to force the ouputs of the unused drivers low. Connect unused inputs to

GND or VCC.

The MAX239 has a receiver three-state control line, and the MAX223, MAX225, MAX235,

MAX236, MAX240, and MAX241 have both a receiver three-state control line and a low-

power shutdown control.

The receiver TTL/CMOS outputs are in a high-impedance, three-state mode whenever the

three-state enable line is high (for the MAX225/MAX235/MAX236/MAX239–MAX241),

and are also high-impedance whenever the shutdown control line is high. When in low-power

shutdown mode, the driver outputs are turned off and their leakage current is less than 1μA

with the driver output pulled to ground. The driver output leakage remains less than 1μA,

even if the transmitter output is backdriven between 0V and (VCC + 6V). Below -0.5V, the

transmitter is diode clamped to ground with 1k½ series impedance. The transmitter is also

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zener clamped to approximately VCC + 6V, with a series impedance of 1k½. The driver

output slew rate is limited to less than 30V/μs as required by the EIA/TIA-232E and V.28

specifications. Typical slew rates are 24V/μs unloaded and 10V/μs loaded with 3½ and

2500pF.

4.3.3.3 RS-232 Receivers

EIA/TIA-232E and V.28 specifications define a voltage level greater than 3V as a logic 0, so

all receivers invert. Input thresholds are set at 0.8V and 2.4V, so receivers respond to TTL

level inputs as well as EIA/TIA-232E and V.28 levels. The receiver inputs withstand an input

over voltage up to ±25V and provide input terminating resistors with nominal 5k½ values.

The receivers implement Type 1 interpretation of the fault conditions of V.28 and EIA/TIA-

232E.

The receiver input hysteresis is typically 0.5V with a guaranteed minimum of 0.2V. This

produces clear output transitions with slow-moving input signals, even with moderate

amounts of noise and ringing. The receiver propagation delay is typically 600ns and is

independent of input swing direction.

4.3.3.4 Receiver and Transmitter Enable Control Inputs

The MAX225 and MAX245–MAX249 feature transmitter and receiver enable controls.

The receivers have three modes of operation: full-speed receive (normal active) ‚ three-state

(disabled) ‚ and low power receive (enabled receivers continue to function at lower data

rates). The receiver enable inputs control the full-speed receive and three-state modes. The

transmitters have two modes of operation: full-speed transmit (normal active) and three-state

(disabled). The transmitter enable inputs also control the shutdown mode. The device enters

shutdown mode when all transmitters are disabled. Enabled receivers function in the low-

power receive mode when in shutdown.

The MAX246 has ten receivers and eight drivers with two control pins, each controlling one

side of the device. A logic high at the A-side control input (ENA) causes the four A-side

receivers and drivers to go into a three-state mode. Similarly, the B-side control input (ENB)

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causes the four B-side drivers and receivers to go into a three-state mode. As in the MAX245,

one A-side and one B-side receiver (RA5 and RB5) remain active at all times. The entire

device is put into shutdown

mode when both the A and B sides are disabled (ENA = ENB = +5V).

The MAX247 provides nine receivers and eight drivers with four control pins. The ENRA

and ENRB receiver enable inputs each control four receiver outputs. The ENTA and ENTB

transmitter enable inputs each control four drivers. The ninth receiver (RB5) is always active.

The device enters shutdown mode with a logic high on both ENTA and ENTB.

The MAX248 provides eight receivers and eight drivers with four control pins. The ENRA

and ENRB receiver enable inputs each control four receiver outputs. The ENTA and ENTB

transmitter enable inputs control four drivers each. This part does not have an always-active

receiver. The device enters shutdown mode and transmitters go into a three-state mode with a

logic high on both ENTA and ENTB.

The MAX249 provides ten receivers and six drivers with four control pins. The ENRA and

ENRB receiver enable inputs each control five receiver outputs. The ENTA and ENTB

transmitter enable inputs control three drivers each. There is no always-active receiver. The

device enters shutdown mode and transmitters go into a three-state mode with a logic high on

both ENTA and ENTB. In shutdown mode, active receivers operate in a low-power receive

mode at data rates up to 20kbits/sec.2

4.4 RS-232:

In telecommunications, RS-232 (Recommended Standard 232) is the traditional name for a

series of standards for serial binary single-ended data and control signals connecting between

a DTE (Data Terminal Equipment) and a DCE (Data Circuit-terminating Equipment). It is

commonly used in computer serial ports. The standard defines the electrical characteristics

and timing of signals, the meaning of signals, and the physical size and pinout of connectors.

The current version of the standard is TIA-232-F Interface Between Data Terminal Equipment

and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange, issued

in 1997.

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4.4.1 Role In Modern Personal Computor

In the book PC 97 Hardware Design Guide, Microsoft deprecated support for the RS-232

compatible serial port of the original IBM PC design. Today, RS-232 has mostly been

replaced in personal computers by USB for local communications. Compared with RS-232,

USB is faster, uses lower voltages, and has connectors that are simpler to connect and use.

Both standards have software support in popular operating systems. USB is designed to make

it easy for device drivers to communicate with hardware. However, there is no direct analog

to the terminal programs used to let users communicate directly with serial ports. USB is

more complex than the RS-232 standard because it includes a protocol for transferring data to

devices. This requires more software to support the protocol used. RS-232 only standardizes

the voltage of signals and the functions of the physical interface pins. Serial ports of personal

computers are also sometimes used to directly control various hardware devices, such

as relays or lamps, since the control lines of the interface can be easily manipulated by

software. This isn't feasible with USB, which requires some form of receiver to decode the

serial data.

As an alternative, USB docking ports are available which can provide connectors for a

keyboard, mouse, one or more serial ports, and one or more parallel ports. Corresponding

device drivers are required for each USB-connected device to allow programs to access these

USB-connected devices as if they were the original directly-connected peripherals. Devices

that convert USB to RS-232 may not work with all software on all personal computers and

may cause a reduction in bandwidth along with higher latency.

Personal computers may use a serial port to interface to devices such as uninterruptible power

supplies. In some cases, serial data is not exchanged, but the control lines are used to signal

conditions such as loss of power or low battery alarms.

Many fields (for example, laboratory automation, surveying) provide a continued demand for

RS-232 I/O due to sustained use of very expensive but aging equipment. It is often far cheaper

to continue to use RS-232 than it is to replace the equipment. Additionally, modern industrial

automation equipment, such as PLCs, VFDs, servo drives, and CNC equipment are

programmable via RS-232. Some manufacturers have responded to this demand: Toshiba re-

introduced the DE-9M connector on the Tecra laptop.

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4.4.2 Standard Details

In RS-232, user data is sent as a time-series of bits. Both synchronous and asynchronous

transmissions are supported by the standard. In addition to the data circuits, the standard

defines a number of control circuits used to manage the connection between the DTE and

DCE. Each data or control circuit only operates in one direction, that is, signaling from a DTE

to the attached DCE or the reverse. Since transmit data and receive data are separate circuits,

the interface can operate in a full duplex manner, supporting concurrent data flow in both

directions. The standard does not define character framing within the data stream, or character

encoding.

4.4.3 Voltage Level

The RS-232 standard defines the voltage levels that correspond to logical one and logical zero

levels for the data transmission and the control signal lines. Valid signals are plus or minus 3

to 15 volts; the ±3 V range near zero volts is not a valid RS-232 level. The standard specifies

a maximum open-circuit voltage of 25 volts: signal levels of ±5 V, ±10 V, ±12 V, and ±15 V

are all commonly seen depending on the power supplies available within a device. RS-232

drivers and receivers must be able to withstand indefinite short circuit to ground or to any

voltage level up to ±25 volts. The slew rate, or how fast the signal changes between levels, is

also controlled.

For data transmission lines (TxD, RxD and their secondary channel equivalents) logic one is

defined as a negative voltage, the signal condition is called marking, and has the functional

significance. Logic zero is positive and the signal condition is termed spacing. Control signals

are logically inverted with respect to what one sees on the data transmission lines. When one

of these signals is active, the voltage on the line will be between +3 to +15 volts. The inactive

state for these signals is the opposite voltage condition, between −3 and −15 volts. Examples

of control lines include request to send (RTS), clear to send (CTS), data terminal

ready (DTR), and data set ready (DSR).

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Because the voltage levels are higher than logic levels typically used by integrated circuits,

special intervening driver circuits are required to translate logic levels. These also protect the

device's internal circuitry from short circuits or transients that may appear on the RS-232

interface, and provide sufficient current to comply with the slew rate requirements for data

transmission.

Because both ends of the RS-232 circuit depend on the ground pin being zero volts, problems

will occur when connecting machinery and computers where the voltage between the ground

pin on one end, and the ground pin on the other is not zero. This may also cause a

hazardous ground loop. Use of a common ground limits RS-232 to applications with

relatively short cables. If the two devices are far enough apart or on separate power systems,

the local ground connections at either end of the cable will have differing voltages; this

difference will reduce the noise margin of the signals. Balanced, differential, serial

connections such as USB, RS-422 and RS-485 can tolerate larger ground voltage differences

because of the differential signaling.

Unused interface signals terminated to ground will have an undefined logic state. Where it is

necessary to permanently set a control signal to a defined state, it must be connected to a

voltage source that asserts the logic 1 or logic 0 level. Some devices provide test voltages on

their interface connectors for this purpose.

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4.4.4 Connectors:

RS-232 devices may be classified as Data Terminal Equipment (DTE) or Data

Communication Equipment (DCE); this defines at each device which wires will be sending

and receiving each signal. The standard recommended but did not make mandatory the D-

subminiature 25 pin connector. In general and according to the standard, terminals and

computers have male connectors with DTE pin functions, and modems have female

connectors with DCE pin functions. Other devices may have any combination of connector

gender and pin definitions. Many terminals were manufactured with female terminals but

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were sold with a cable with male connectors at each end; the terminal with its cable satisfied

the recommendations in the standard.

Presence of a 25 pin D-sub connector does not necessarily indicate an RS-232-C compliant

interface. For example, on the original IBM PC, a male D-sub was an RS-232-C DTE port

(with a non-standard current loop interface on reserved pins), but the female D-sub connector

was used for a parallel Centronics printer port. Some personal computers put non-standard

voltages or signals on some pins of their serial ports.

The standard specifies 20 different signal connections. Since most devices use only a few

signals, smaller connectors can often be used.

4.5 NE555 TIMER IC

4.5.1 Features

• High Current Drive Capability (200mA)

• Adjustable Duty Cycle

• Temperature Stability of 0.005%/°C

• Timing From μSec to Hours

• Turn off Time Less Than 2μSec

4.5.2 Description

The LM555/NE555/SA555 is a highly stable controller capable of producing accurate timing

pulses. With monostable operation, the time delay is controlled by one external resistor and

one capacitor. With astable operation, the frequency and duty cycle are accurately controlled

with two external resistors and one capacitor.

4.5.3 Operating Modes of IC 555

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The 555 has three operating modes:

Monostable mode- In this mode, the 555 functions as a "one-shot" pulse generator.

Applications include timers, missing pulse detection, bounce free switches, touch

switches, frequency divider, capacitance measurement, pulse-width modulation

(PWM) and so on.

Astable - free running mode: the 555 can operate as an oscillator. Uses include LED

and lamp flashers, pulse generation, logic clocks, tone generation, security alarms,

pulse position modulation and so on.

Bistable mode or Schmitt trigger: the 555 can operate as a flip-flop, if the DIS pin is

not connected and no capacitor is used. Uses include bounce free latched switches.

4.5.3.1 Monostable Mode

In the monostable mode, the 555 timer acts as a “one-shot” pulse generator. The pulse begins

when the 555 timer receives a signal at the trigger input that falls below a third of the voltage

supply. The width of the output pulse is determined by the time constant of an RC network,

which consists of a capacitor (C) and a resistor (R). The output pulse ends when the charge on

the C equals 2/3 of the supply voltage. The output pulse width can be lengthened or shortened

to the need of the specific application by adjusting the values of R and C

The output pulse width of time t, which is the time it takes to charge C to 2/3 of the supply

voltage, is given by

where ‘t’ is in seconds, R is in ohms and C is in farads. See RC circuit for an explanation of this effect.

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4.5.3.2 Bistable Mode

In bistable mode, the 555 timer acts as a basic flip-flop. The trigger and reset inputs (pins 2

and 4 respectively on a 555) are held high via Pull-up resistors while the threshold input (pin

6) is simply grounded. Thus configured, pulling the trigger momentarily to ground acts as a

'set' and transitions the output pin (pin 3) to Vcc (high state). Pulling the reset input to ground

acts as a 'reset' and transitions the output pin to ground (low state). No capacitors are required

in a bistable configuration. Pins 5 and 7 (control and discharge) are left floating.

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4.5.3.3 Astable Mode

In astable mode, the 555 timer puts out a continuous stream of rectangular pulses having a

specified frequency. Resistor R1 is connected between VCC and the discharge pin (pin 7) and

another resistor (R2) is connected between the discharge pin (pin 7), and the trigger (pin 2)

and threshold (pin 6) pins that share a common node. Hence the capacitor is charged through

R1 and R2, and discharged only through R2, since pin 7 has low impedance to ground during

output low intervals of the cycle, therefore discharging the capacitor.

In the astable mode, the frequency of the pulse stream depends on the values of R1, R2 and C:

The high time from each pulse is given by

and the low time from each pulse is given by

where R1 and R2 are the values of the resistors in ohms and C is the value of the capacitor in

farads.

note: power of R1 must be greater than

To achieve a duty cycle of less than 50% a diode can be added in parallel with R2 towards the

capacitor. This bypasses R2 during the high part of the cycle so that the high interval depends

only on R1 and C.

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CHAPTER 5 WORKING OF THE PROJECT

• When the telephone is in the idle condition, the voltage will be -48V.

• When the ringing occurs, it will be 125V peak to peak AC signal superimposed on - 48V.

• The opto isolator is used to isolate the microcontroller from high voltage AC signals and it

consists of GaAs infrared emitting diode optically coupled to a monolithic silicon

phototransistor.

• The microcontroller will detect the ring through the port 1.5 and it will count the number of

rings.

• After a fixed number of rings, the microcontroller will send a signal to the relay and then the

automatic off-hooking of the telephone takes place.At the same time, microcontroller will

transmit ‘#’ to the computer which is an indication to play the ‘Welcome’ message.

• The relay used is DPDT type and after automatic off-hooking takes place, the relay connects

the telephone lines to the decoder IC 8870 and isolation transformer.

• The transformer used is a line transformer used to isolate voice card from high voltages.

• As the telephone lines are connected to the voice card, the caller gets to hear the stored

messages and asks the caller to enter the roll number of the student whose result is to be

known. After the caller dials the roll number from the touch tone keypad of his telephone, that

number will be decoded by the decoder IC 8870 and the decoded information will be sent to

the computer via the microcontroller.

• Computer on receiving the decoded information will check the database to access the result

of the student whose roll number is entered.

• Then the computer will send the desired information to the voice card and the caller will get

to hear the result of the student on his telephone through the voice card.

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CHAPTER 6

APPLICATIONS

6.1 BANKING & FINANCE

Technological innovations have brought about not just new types of electronic money,but also

new bank-customer relationships. These relationships are fuelling the demand for more and

more innovative banking services such as:

• Call Center with Customer Relationship Management Software

• Credit Card Activation System

• Credit Card Authorization

• Forex Enquiry by Speech Recognition

• Stock Quote By Speech Recognition

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• Telephone Banking System

• Telephone Loan Approval

• Trade & Account Inquiry Service

• Voice Recording System

6.2 EDUCATION

Apart from providing an environment for learning, educational establishments are now

improving their quality of service, offering a better level of support to both students and to the

public through:

• Enquiry Hotline

• Library Book Renewal

• Student Registration System

• Student Result Declaration System

6.3 GOVERNMENT

In order to improve the efficiency of information accessibility, many government departments

such as the Labour Department, the Education Department, the Immigration Department, the

Inland Revenue and the Department of Health, have already implemented IVRS systems to

provide hotline services.

6.4 TELECOMMUNICATIONS

In this highly competitive industry, we can help telecom service providers (wire line or

wireless) to develop infrastructure and add value to their services through:

• Prepaid Roaming

• Postpaid Calling Card, Prepaid Calling Card, and Wireless Prepaid (or Mobile

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Prepaid)

• Mobile Number Portability

• Number Change Announcement

• Fax Stored-And-Forward Service

• Signaling Protocol Converters

• Telecom Call Center

CHAPTER 7

CONCLUSION

The system designed will be intelligent for interaction and will suitably provide a good

response to the caller who will access it. It will be truly a responsible system for human

mankind. We will make it better than the present scenario system. It will be digitally accessed

and will have a strong data base and can be operated easily and of low cost. And the future

will show that every organization will be using our system.

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APPENDIX A

  PIN CONFIGURATIONS

[1] IC 89C2051

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[1.1] Pin Description:

VCC: Digital supply voltage.

GND: Ground.

Port A (PA7…PA0): Port A serves as the analog inputs to the A/D Converter. Port A also

serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can

provide internal pull-up resistors (selected for each bit). The Port A output buffers have

symmetrical drive characteristics with both high sink and source capability. When pins PA0

to PA7 are used as inputs and are externally pulled low, they will source current if the internal

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pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes

active, even if the clock is not running.

Port B (PB7…PB0): Port B is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port B output buffers have symmetrical drive characteristics with

both high sink and source capability. As inputs, Port B pins that are externally pulled low will

source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset

condition becomes active, even if the clock is not running. Port B also serves the functions of

various special features of the ATmega32.

Port C (PC7…PC0): Port C is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port C output buffers have symmetrical drive characteristics with

both high sink and source capability. As inputs, Port C pins that are externally pulled low will

source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset

condition becomes active, even if the clock is not running. If the JTAG interface is enabled,

the pull-up resistors on pins PC5(TDI), PC3(TMS) and PC2(TCK) will be activated even if a

reset occurs. The TD0 pin is tri-stated unless TAP states that shift out data are entered. Port C

also serves the functions of the JTAG interface and other special features of the

Port D (PD7…PD0): Port D is an 8-bit bi-directional I/O port with internal pull-up resistors

(selected for each bit). The Port D output buffers have symmetrical drive characteristics with

both high sink and source capability. As inputs, Port D pins that are externally pulled low will

source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset

condition becomes active, even if the clock is not running. Port D also serves the functions of

various special features of the ATmega32.

RESET: Reset Input. A low level on this pin for longer than the minimum pulse length will

generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate

a reset.

XTAL1: Input to the inverting Oscillator amplifier and input to the internal clock operating

circuit.

XTAL2: Output from the inverting Oscillator amplifier.

AVCC: AVCC is the supply voltage pin for Port A and the A/D Converter. It should be

externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be

connected to VCC through a low-pass filter.

AREF: AREF is the analog reference pin for the A/D Converter.

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[2] MAX – 233 CPP

[2.1] Maximum Ratings

Supply Voltage (VCC) ......................................................................-0.3V to +6V

Input Voltages

TIN.........................................................................................-0.3V to (VCC -

0.3V)

RIN (Except MAX220) ........................................................±30V

RIN (MAX220).....................................................................±25V

TOUT (Except MAX220) (Note 1) ......................................±15V

TOUT (MAX220)..................................................................±13.2V

Output Voltages

TOUT.....................................................................................±15V

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ROUT.....................................................................................-0.3V to (VCC+

0.3V)

Driver/Receiver Output Short Circuited to GND.............................Continuous

Continuous Power Dissipation (TA = +70°C)

16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)........842mW

18-Pin Plastic DIP (derate 11.11mW/°C above +70°C)........889mW

20-Pin Plastic DIP (derate 8.00mW/°C above +70°C) …….440mW

16-Pin Narrow SO (derate 8.70mW/°C above +70°C) .........696mW

16-Pin Wide SO (derate 9.52mW/°C above +70°C)..............762mW

18-Pin Wide SO (derate 9.52mW/°C above +70°C)..............762mW

20-Pin Wide SO (derate 10.00mW/°C above +70°C)............800mW

20-Pin SSOP (derate 8.00mW/°C above +70°C) ..................640mW

16-Pin CERDIP (derate 10.00mW/°C above +70°C)............800mW

18-Pin CERDIP (derate 10.53mW/°C above +70°C)............842mW

Operating Temperature Ranges

MAX2_ _AC_ _, MAX2_ _C_ _...........................................0°C to +70°C

MAX2_ _AE_ _, MAX2_ _E_ _ .........................................-40°C to +85°C

MAX2_ _AM_ _, MAX2_ _M_ _........................................-55°C to +125°C

Storage Temperature Range ............................................................-65°C to +160°C

Lead Temperature (soldering, 10sec) ..............................................+300°C

[3] DB 9 Connector

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REFERENCES

Page 49: Web viewWhat are interactive voice response (IVR) systems? Interactive Voice Response (IVR) systems allow callers to interact with the communications system over the telephone. ...

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[1] Thiagarajan Vishwanathan. Telecommunication Switching System and Networks

India PRI Pvt. Ltd.

[2] Kenneth J. Ayla. The 8051 Microcontroller Architecture, Programming and Apllication

India PRI Pvt. Ltd Second edition.

[3] Douglas V.Hall. Microcontroller and Interfacing New York TMH Pvt. Ltd.

[4] http://en.wikipedia.org/wiki/Interactive_voice_response.

[5] http://web.cmc.net.in/products/ivrs/ivrs.asp.

[6] http://www.blissit.org/ivrs.htm.

[7] http://www.kleward.com/ivr_solutions.htm.

[8] http://en.wikipedia.org/wiki/Special:Search?search=information+on+IVR+system.