WLAN Microstrip Patch Array Design[1]
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Transcript of WLAN Microstrip Patch Array Design[1]
![Page 1: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/1.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Microstrip Patch Array Design
Workflow Using CST MICROWAVE STUDIO®
![Page 2: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/2.jpg)
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Introduction
Single element Array factor
design
optimization full model
feeding network
Antenna array
TBP optimization
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
1. Design a single patch element
Resonant frequency, (gain)
2. Postprocessing optimization of feeding
coefficients and spacing (Array Factor)
Gain, sidelobe level
3. Design and optimize a feeding network
S11, bandwidth, gain, sidelobe level
Design Procedure
![Page 4: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/4.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
1. Design a Single Patch Element
ABS Cover
RO4350
Aluminium
Stackup
Reference
plane
pW
pW
msW
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Microstrip Width
msW
![Page 6: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/6.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Create the Waveguide Port
Macros -> Solver -> Port ->
Calculate port extension coefficient
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Symmetry Settings
Magnetic symmetry
in YZ plane
Open (add space)
boundaries are used
to estimate backlobes
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Mesh Settings (1/2)
At least 2 - 4 cells per strip width
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Mesh Settings (2/2)
2 cells per substrate height
At least 2 cells per air gap
ABS Cover
RO4350
Aluminium
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Patch Width for Resonance at 5.5GHz
pW=19.5mm
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Electric Field at 5.5GHz
Radiation
Travelling wave
Standing wave
ABS Radome
(not shown)
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Single Patch Farfield Pattern
Discrete face port
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
1. Design a single patch element
Resonant frequency, (gain)
2. Postprocessing optimization of feeding
coefficients and spacing (Array Factor)
• Gain, sidelobe level
3. Design and optimize a feeding network
S11, bandwidth, gain, sidelobe level
Design Procedure
![Page 14: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/14.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Array Factor
),(),(),( AFFF elementarray Array Pattern Multiplication
(for 5 patch antennas)
Assumptions: identical elements with no coupling.
= x
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Farfield Pattern for Uniform Array
phi=90
phi=0
phi=45
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Magnitudes for Optimal Array
mag1 mag2
mag1
mag2
mag2
mag2
mag3
mag3
Magnitudes will be optimized in order to minimize sidelobe level
Online demonstration
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Optimize Feeding Coefficients (Optimal Array)
phi=90
phi=0
phi=45
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Optimizer Settings (Optimal Array)
Not necessary to optimize mag3 (mag1, mag2 are relative)
The spacing parameter
was optimized for uniform array
Only TBP results
are evaluated
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Template Based Postproc. Settings
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Arbitrary Array Distribution
No ENTER there
File could contain variables
from CST MWS Parameter List
One TAB there
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Array Factor Approach Validation (Optimal Array)
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Array Wizard Macro
Construct finite array
Update Simultaneous
Excitation
Setup array factor
Combine results
(no Sim.Ex.)
Online demonstration
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Array Construction with Array Wizard
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
1. Design a single patch element
Resonant frequency, (gain)
2. Postprocessing optimization of feeding
coefficients and spacing (Array Factor)
Gain, sidelobe level
3. Design and optimize a feeding network
S11, bandwidth, gain, sidelobe level
Design Procedure
![Page 25: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/25.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Farfield – Effects of Housing
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Include ABS Cover
![Page 27: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/27.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Effect of Housing on Farfield Pattern
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Effect of Housing on Farfield Pattern
The actual housing effects
mainly the back radiation
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Feeding Network Design
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CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Compute 16-port S-parameters
Discrete Face port
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S-Parameter Symmetry Settings
16-port excitation reduced to 4-port
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Design the Feeding Network Using Ideal
Transmission Lines
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Optimize the Feeding Network in DS (Optimal Array)
16 parameters
to be optimized
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Farfield + Feeding Network
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Feeding Network (3D Model)
Curves Trace from Curve… This half is
mirrored
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Symmetry Settings (1/2)
Magnetic
symmetry (YZ plane)
Open (add Space)
![Page 37: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/37.jpg)
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Symmetry Settings (2/2)
Is it possible to use
a symmetry in ZX plane ?
No symmetry in ZX plane:
The microstrip requires magnetic symmetry
however the patches require electric symmetry.
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Mesh Settings (1/2) 2 cells per strip width
![Page 39: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/39.jpg)
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Mesh Settings (2/2)
Influences simulation speed
2 cells per substrate height
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Initial Feeding Network Results
3D optimization is necessary to include couplings
between the feed network and radiating elements.
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Electric Field
Coupling between the line and the patch
Phase delay due
to couplings.
Full wave
3D optimization
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Optimizer Settings (Uniform Array)
13 parameters
to be optimized
Very
effective
for 3D
optimization
![Page 43: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/43.jpg)
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Optimized S-Parameters (Uniform array)
![Page 44: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/44.jpg)
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Optimized Farfield Pattern (Uniform array)
![Page 45: WLAN Microstrip Patch Array Design[1]](https://reader031.fdocuments.net/reader031/viewer/2022013112/55cf9c9f550346d033aa770d/html5/thumbnails/45.jpg)
CST – COMPUTER SIMULATION TECHNOLOGY | www.cst.com
Start with simple models and add complexity
Post processing optimization of farfield pattern
Array wizard macro for array construction or array
factor settings
3D EM/ Circuit co-simulation (feeding network)
Trust Region Framework optimizer for 3D optimization
GPU acceleration
Key Features for Antenna Array Design
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Divide complex task into smaller ones.
Use best approach at each stage.
Optimize your device.
Shorten your development cycle.
Conclusion
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Thank you!
Any questions?