Wireless ECG Monitoring System Using PIC 16F877A and NRF905

download Wireless ECG Monitoring System Using PIC 16F877A and NRF905

of 161

description

Wireless-ECG-Monitoring-System

Transcript of Wireless ECG Monitoring System Using PIC 16F877A and NRF905

  • The University of Victoria Faculty of Engineering

    CENG499A

    Final Project Report

    Wireless ECG/EKG Monitoring System

    By Matthew Green

    Dennis Leote Kevin Harmon

    Submitted to Dr. Pan Agathoklis

    July 28, 2006

  • Table of Contents

    Abstract ------------------------------------------------------------------------------ Page 1 Objective ----------------------------------------------------------------------------- Page 2 Project Design ----------------------------------------------------------------------- Page 3 Hardware ---------------------------------------------------------------------------- Page 3 The Power Supply --------------------------------------------------------- Page 4 Instrumentation Amplifier ----------------------------------------------- Page 5 Operational Amplifiers --------------------------------------------------- Page 5 Filters ------------------------------------------------------------------------ Page 6 Microcontroller ------------------------------------------------------------ Page 8 Transceivers ---------------------------------------------------------------- Page 8 MAX232 -------------------------------------------------------------------- Page 9 Software ------------------------------------------------------------------------------ Page 10 Transmitter Module ------------------------------------------------------- Page 10 Programming the PIC16F877A --------------------------------- Page 10 Analog to Digital Conversion (ADC) ---------------- Page 10 Sampling Rate -------------------------------------------- Page 11 Formatting ------------------------------------------------ Page 11 SPI --------------------------------------------------------- Page 11 RF Transmitter ---------------------------------------------------- Page 12 Receiver Module ---------------------------------------------------------- Page 12 RF Receiver ------------------------------------------------------- Page 12 PC Display ------------------------------------------------------------------ Page 13

    i

  • Receiving the Data ------------------------------------------------ Page 14 X Plot --------------------------------------------------------------- Page 14 Y Plot --------------------------------------------------------------- Page 15 Reliability Considerations ------------------------------------------------ Page 15 Discussion and Recommendations ----------------------------------------------- Page 15 References ----------------------------------------------------------------------------Page 17

    ii

  • List of Tables and Figures Figure 1 ECG/EKG Lead Placement ------------------------------------------- Page 1 Figure 2 Ideal I-Waveform ------------------------------------------------------ Page 1 Figure 3 Present Day ECG -------------------------------------------------------Page 2 Figure 4 Excessive Amount of Wires in the Operating Room -------------- Page 2 Figure 5 Block Diagram of Transmitter and Receiver ----------------------- Page 3 Figure 6 Power Supply Circuit ------------------------------------------------- Page 4 Figure 7 An Instrumentation Amplifier ---------------------------------------- Page 5 Figure 8 The AD620 ------------------------------------------------------------- Page 5 Figure 9 ECG Waveform with 60 Hz not removed -------------------------- Page 6 Figure 10 High Pass RC Filter -------------------------------------------------- Page 6 Figure 11 Low Pass RC Filter --------------------------------------------------- Page 6 Figure 12 2nd Order Active Butterworth Filter -------------------------------- Page 7 Figure 13 RS232 voltages --------------------------------------------------------Page 9 Figure 14 Transmitter Module Block Diagram ------------------------------- Page 10 Figure 15 Activity Diagram for Transmitter Module ------------------------ Page 12 Figure 16 Receiver Module Block Diagram ---------------------------------- Page 12 Figure 17 Single Lead Display (Lead I) --------------------------------------- Page 13 Figure 18 Multiple Lead Display -----------------------------------------------Page 14 Table 1 Voltage Requirements ------------------------------------------------- Page 4 Table 2 Filter Values ------------------------------------------------------------- Page 7 Table 3 Data Format -------------------------------------------------------------- Page 11

    iii

  • iv

  • Abstract In the human body, the heart is responsible for pumping oxygen carrying blood to the entire body. To do this, it emits a small electrical charge that will cause the muscles around the heart to contract in a sequential way such that the blood is pumped through arteries to the intended tissues. If there are deficiencies or abnormalities, the individual may be susceptible to serious health issues including cardiac arrest. Care givers in hospitals world wide must be able to monitor these electrical charges and, in doing so, be able to predict complications before they cause serious harm. To do this, a device called an electrocardiogram (ECG/EKG) is used. An ECG involves placing small pads in a triangular fashion on the patients chest, with the perimeter of the triangle completely encompassing the heart (Figure 1). The lead placements are labelled according to their location on the human body; Left Arm (LA), Right Arm (RA) and Left Leg (LL). The corresponding waveforms are numbered using Roman numerals. These pads are actually small leads connected back to a monitoring system that will measure the potential voltage differences around the heart. Figure 2 depicts an ideal I-Waveform taken from a healthy human body. When these results are displayed, the doctors and nurses will be able to verify proper operation or predict possible complications.

    Figure 1 ECG/EKG Lead Placement Figure 2 Ideal I-Waveform

    1

  • Objective As mentioned above, currently the ECG/EKG machines consist of a minimum of 3 pads being placed on the body. These pads are wired back to a monitoring station where all of the required data manipulation is performed before displaying the results on a monitor. The main problem with the current method of monitoring a patients heart is very awkward and restricting. The leads are constantly being dislodged from the patient by the nurses, doctors, and even the patient themselves. This causes complications because it appears to the monitoring station that the patient is going into cardiac arrest. (Figures 3 & 4 show a typical operating room with an excess of wires)

    Figure 3 Present Day ECG

    Figure 4 Excessive Amount of Wires in the Operating Room

    Another problem with the current system is that the mobility of the care givers is limited due to the number of wires connecting the patient to various monitoring equipment. It is not possible for a nurse or doctor to completely walk around the patient without having to navigate the wires. A solution to this would be to make the hospital utilize wireless data transmission as much as possible to eliminate the need for wires. This process is currently being experimented with. Currently there are various wireless applications in use in the hospital industry. The most common are wireless pulse oxymetry, a method for

    2

  • measuring the oxygen content in the blood. Another example is wireless temperature sensors in which the patient swallows a small transponder that will constantly transmit the bodys core temperature. The objective of this project is to design a Wireless ECG Monitoring System. This product will reliably measure the electrical activity around the heart and transmit this data to a receiver connected to a PC. The data will then be displayed on the PC in the same manner that the current method already does. Project Design This project was split into two main tasks, hardware and software. It is the responsibility of the hardware to collect and compare the data, filter out the harmful 60 Hz signals and transmit the data. It is the softwares responsibilities to digitize the signal, package the data and synchronize the receiver and the transmitter. Hardware As mentioned above, the hardware is responsible for capturing and isolating the signal. The hardware was divided up into stages; the power supply, instrumentation amplifiers, operational amplifiers, filters, analog to digital converters, microcontroller, transceivers and a MAX232. Figure 5 shows a block diagram of how the transmitter and receiver are configured. The schematics and PCB layout are attached in Appendix A.

    Figure 5 Block Diagram of Transmitter and Receiver

    3

  • The Power Supply To supply power to the wireless transmitter of this project, a 12 Volt battery was chosen. Table 1 shows a list of all various components and their minimum input voltages.

    Device VminInstrumentation Amplifiers 2.3 -18 Volts Operational Amplifiers 18 Volts Microcontroller 2.0 5.5 Volts MAX232 0.3 6 Volts Transceiver 3 Volts

    Table 1 Voltage Requirements

    To guarantee the microcontroller received the required 5 volts, a voltage regulator was used, which required a minimum of 7 volts. Another issue that needed to be resolved was the DC offset. Since the typical ECG wave will contain both positive and negative values, it was important to bias the signal such that the ADC (analog to digital converter) would only see a level between zero and five volts. To accomplish this, a small power supply was designed (Figure 6) using zener diodes.

    Point A is regulated by the 5.1V Zener Diode. This level would be used as a virtual ground reference for the instrumentation and operational amplifier stages. The benefit of this is that the amplifier stage would have supply voltage of +6.9V and -5.1V. This allowed the signal to be shifted slightly closer to ground. Point B, which is regulated to 3.3V, supplies the ground reference for the microcontroller stage. This leaves 8.7V for the voltage regulator. It had to be slightly below the reference voltage for the amplifiers to compensate for the signal when it dips below zero volts. The signal from the amplifiers can now be tuned to range from 0 to 5 volts at the ADC.

    Figure 6 Power Supply Circuit

    4

  • Instrumentation Amplifier To measure the difference in voltage between any two points on the human body, we used an instrumentation amplifier made by Analog Devices, called an AD620 (Data Sheets Attached in Appendix B). An instrumentation amplifier is a special type of differential amplifier that will amplify the difference between its two inputs (Figure 7). The gain can be set by adjusting only one resistor, Rgain. The resulting output will be:

    )1)(( 12gain

    out RRVVV +=

    Figure 7 An Instrumentation Amplifier

    The AD620 is an instrumentation amplifier that has been combined in an integrated circuit. The benefit of this is that internal resistor values (R) are all perfectly matched. The gain can still be set by adjusting the one resistor between pins 1 and 8.

    Figure 8 The AD620 Operational Amplifiers The signal that is being analyzed on the individuals chest has a typical maximum value of 1mV. To make this useful, the signal would need to be amplified to approximately 5Vpp, which equates to a gain of roughly 5000. The AD620 does offer a certain amount of gain; however it was observed that it functioned best when the gain was kept quite low. We therefore divided up the amplification into 2 stages. The first was done using the AD620 and the second done using a non-inverting op-amp. We chose the gain to be 5 for the first stage and 1000 2000 for the next. We included a potentiometer in the feedback loop of the op-amp to allow for some adjustment to the gain as necessary.

    5

  • Filters The line interference (the 60Hz signal from the power lines) is abundant in the ECG signal. The human body acts like a giant antenna to this frequency, and the amplitude of the noise is roughly the same size of the ECG signal. It is therefore very difficult to monitor the ECG wave through the noise. Figure 9 shows a typical display of an ECG signal if the 60 Hz noise has not been removed.

    Figure 9 ECG Waveform with 60 Hz not removed The actual signal that is measured on the human body is in the range of 1-2 mV. The useful information is in the frequency range of 1-250 Hz, although the most important data is below 40Hz. It is therefore desirable to filter out all of unwanted signals. To do this some 4 stages of filtering was used. The intended result was to produce a Band Pass Filter with the pass frequency between 1 - 40Hz. The first stage of filtering was done prior to any amplification. It was a simple high pass filter (HPF) that was designed using a simple RC circuit (Figure 10). This pre-filter was designed to eliminate all of the low frequency noise. It was designed with a cut-off frequency of 0.5 Hz.

    RC

    fcutoff 21=

    Figure 11 Low Pass RC Filter Figure 10 High Pass RC Filter To eliminate the 60 Hz signal, a 4th order low pass filter (LPF) was used. This was designed by using a 1st order RC filter in series with a 2nd order Butterworth Filter and finally another the 1st order RC circuit. The RC circuit (Figure 11) is very similar to the HPF defined above. In fact the cut-off frequency is calculated the same way. These were designed to eliminate signals above 40Hz.

    6

  • The Butterworth Filter (Figure 12) is an active filter that uses an op-amp to help get rid of the noise. All filters will attenuate frequencies above and below the desired cut-off frequency. The goal is to pick a filter that will be the least damaging to the desired signal while offering maximum filtering to the unwanted signal. The benefit of the Butterworth is that it will have a much more accurate cut-off frequency. It will therefore allow for more of the desired signal to get through unscathed.

    212121

    CCRRfcutoff =

    Figure 12 2nd Order Active Butterworth Filter The filter values were chosen according to the above formulas. In practice, however, these values were only helpful in getting us close to the desired signal. The actual values used were found by using a trial and error method. Various values were tested until the best signal resulted. The final values of our filters were: Filter # Filter Type Filter Order Cut-off Frequency

    1 Passive RC 1 20 Hz 2 Active Butterworth 2 61.4 Hz 3 Passive RC 1 35 Hz

    Table 2 Filter Values

    7

  • Microcontroller The microcontroller performed all of the decision making processes. It was responsible for the analog to digital conversion (ADC), data packaging and transceiver synchronization. Refer to the following section on software for more information about this. The microcontroller used was a PIC16F877. The main reason this microcontroller was used was because we were most familiar with it. The main features that it has that made it quite useful are:

    Synchronous Serial Port with SPI In circuit programming via RS232 10 bit ADC Universal Synchronous Asynchronous Receiver Transmitter (USART) Low operating current < 0.6 mA 3 timers Simple (35 single word instructions to learn)

    Transceivers To transmit and receive all of the data, a single chip transceiver was chosen. The nRF24L01 by Nordic Semiconductor was used. This was chosen because of its wide range of features:

    Operates in the free to air ISM frequency band at 2.45 GHz Built in power amplifier Fully integrated frequency synthesizer Receiver chain with demodulator Crystal oscillator and modulator ShockBurstTM for low power operation Automatic CRC and preamble generation Automatic retransmission of data packet SPI interface Low current consumption Carrier detect for listen before transmit protocol Adjustable transmit power

    8

  • MAX232 The final piece of hardware that was involved in the design of the wireless ECG machine was the MAX232. This IC is used to convert TTL to RS232 and vice versa. RS232 data will range from -5V to -15V for a logical high and +5V to +15V for a logical low (Figure 13). The microcontroller will output data in the range of 0-5V (TTL). The data must therefore be buffered before the two devices will be able to communicate with one another.

    Figure 13 RS232 voltages

    The MAX232 buffers the signal in both directions allowing the microcontroller to communicate with the PC. The data can now be passed to the PC and displayed on the graphic user interface (GUI)

    9

  • Software Once the electrical potential difference between leads has been acquired, the signal must then be converted to the digital domain and communicated to the monitor display. The software component of the ECG monitor includes processing the signal with the PIC 16f877A microprocessor, transmitting the signal to the display using the Nordic nRF24L01 transceiver modules and displaying the information on a PC oscilloscope application. The software was written in C for the microprocessor and in Basic to write the display application. The C compiler used was Hi-Tech C Trial version from Hi-Tech Software. The display application was designed using Visual Basic 6.0 by Microsoft. Transmitter Module The transmitter module is responsible for obtaining and converting the analog ECG signal into an 8-bit digital representation. It is also responsible for formatting and transmitting the data. The transmitter module is within the immediate proximity of the patient being monitored. As the system diagram presented in figure 1 shows, there are four main steps required to transmit the ECG signal.

    Analog DAQ

    ADC SPI timing &

    Form-atting

    nRF24L01

    TX

    PIC 16f877A

    Figure 14 Transmitter Module Block Diagram Programming the PIC 16f877A Analog to Digital Conversion (ADC) The amplified ECG signal is fed into the on-board ADC of the PIC. The PIC is capable of 10-bit resolution but an 8-bit digital representation provides enough accuracy and reduces the bit-rate by half. The three analog leads each have their own ADC channel and are sampled sequentially.

    10

  • Sampling Rate The sampling rate was determined by observing the highest frequency component of the ECG signal, the QRS complex as depicted in figure 2, and using the Nyquist criteria. The QRS complex has a possible range of frequencies between 12 Hz and 28 Hz. The Nyquist frequency is thus taken to be 28 Hz and a sampling rate of 2 * Nyquist frequency = 56 Hz must be observed. A sampling rate of 2 KHz was used for increased accuracy. The timing was accomplished manually using delay routines that wait 500us between sampling. Formatting The data obtained from the ADC is bundled into an array of 30 bytes. This is done to conform to the Enhanced ShockburstTM protocol employed by the nRF24L01 transceiver module. Enhanced ShockburstTM allows for packets containing up to 30 bytes of data. To maximize the ratio of data bits to total bits in a packet and thus increase efficiency, the full 30 bytes allowed was utilized. The format of used in constructing the 30-byte array is shown in Table 3 below.

    A/D Chan1

    Sample 1

    A/D Chan2

    Sample 1

    A/D Chan2

    Sample 1... A/D Chan1

    Sample 30

    A/D Chan2

    Sample 30

    A/D Chan2

    Sample 30

    Table 3 Data Format SPI To communicate with the nRF24L01 transceiver module, the Serial Port Interface (SPI) module on the PIC was used. The SPI mode allows 8 bits of data to be synchronously transmitted and received simultaneously. The SPI was configured with the following parameters:

    Master Mode PIC is master with Clock as output Clock Polarity Idle state for clock is a low level Clock rate 1.25 MHz (fosc / 16). Data Sampling Input data sampled at middle of data output time

    The activity diagram shown in figure depicts the general process followed by the PIC microprocessor.

    11

  • A/D Conver

    Wait 500 us

    Transmit

    Store Data

    [array not full]

    [array full]

    Three channel conversion complete

    Figure 15 Activity Diagram for Transmitter Module RF Transmitter The nRF24L01 transceivers are configured to transmit 2Mbps at a frequency of 2.45GHz, within the ISM band. The data is encoded using Enhanced ShockburstTM (refer to nRF24L01 datasheet for detailed description). Receiver Module The process of receiving the digital data from the patient is the responsibility of the receiver module. The receiver is connected to a PC for display. As the system diagram presented in figure 16 shows, there are four main components required to receive before the data can be sent to the PC.

    Nf24L01

    Rx

    PC Display

    SPI Parsing

    U A R T

    PIC 16f877A

    Figure 16 Receiver Module Block Diagram

    RF Receiver The nRF24L01 transceiver configured to perform as a receiver is much the same as the transmitter with the same parameters. Only one data pipe is used to transfer the data. This is in contrast to using a separate data pipe for each lead of the ECG. The reasoning behind this is that there is less overhead involved by eliminating the need to continuously change between data pipes.

    12

  • The data is transferred from the transceiver to the PIC via an SPI interface. The data is received in the format described in figure 16 and the 30 bytes of data is traversed beginning with byte 0. As each byte is received, the data is sent to the PC through the PICs on-board USART module at a baud rate of 115.2 kbps. The data is transmitted at regular intervals of 500 us which corresponds to the sampling rate. PC display The ECG signal is displayed on a PC through a basic oscilloscope application. The application was written in Visual Basic is included on the project CD as ECGMonitor.exe. The application includes one control bar for rescaling the time interval displayed.

    Figure 17 Single Lead Display (Lead I)

    13

  • Figure 18 Multiple Lead Display Receiving the Data The data is received through the serial port using COMM 2 at a baud rate of 115.2 kbps in 500us intervals. The application receives the data for the three leads of the ECG signal continuously in the following order: LeadI data byte, LeadII data byte, LeadIII, data byte. As the data is received, the appropriate display area is updated. X Plot The display is meant to behave as an oscilloscope although limited in functionality. To observe the ECG signal moving in time from the left to right, the x-coordinate is incremented with each new data value received. A scale factor controls the rate that the screen is refreshed. Horizontal scaling provides a means of controlling the number of pulses displayed. The person observing the signal has limited control over how long it takes the ECG signal to pan the width of the display through a scroll bar located directly beneath the display. The horizontal range was chosen to be able to display 2 beats. Heart rates can vary between 40 and 240 beats per minute or 1.5 and 0.25 seconds per beat respectively so the refresh rate was chosen to vary between 0.125 sec and 3 sec. To achieve refresh rates

    14

  • wihthin0.125 sec and 3 sec, the display width was set to be between 500 and 6000 pixels. The scroll bar controls this scale factor Y Plot The y-coordinate is obtained directly from the incoming data. Since the incoming data is within the range of 0 to 255, the vertical scaling for each lead translates to the same range. Reliability Considerations The ECG monitor needs to be very reliable considering its application in the medical field. The transmission frequency of 2.45 GHz is within the ISM band which is the band reserved for non-commercial use of RF electromagnetic fields for industrial, scientific and medical purposes. To avoid interference and loss of data, the nRF24L01 transceiver modules are capable of addressing up to six data pipes per module. In addition, reliability is ensured in the form of error detection and correction. Each data packet includes one byte for a cyclic redundancy check (CRC) to detect the presence of errors. Upon detection of any errors, a retransmission is requested to recover the data that may have been lost. Up to 15 retransmissions will be requested before finally discarding the data packet and carry on. The system can handle up to four packet losses and still maintain the integrity of the displayed signal. Testing was performed to determine the range with which the transceivers could reliable operate within, i.e. 0 packet loss. The methodology used was to observe the number lost packets in software at various distances. A radius of up to 5m found to be reliable. This was the target radius since this is roughly the upper limit on the distance between transmitter and receiver in an operating room. Discussions & Recommendations The Wireless ECG/EKG Monitoring System was designed and built, and was very successful. A few modifications would be implemented if time permitted. The first and most obvious change involves the circuit board. It was very big and awkward. It served its purpose as a prototype board. However, if this product were to got to production, the board would need to be re-designed into a smaller package using surface mount components. Next time, the filtering would be done digitally using a DSP chip. This would allow for much more accurate filtering using an FIR or Wavelets. The final change that would be considered would be to allow for some sort of automatic adjustments of the gain. Every individual has a unique heartbeat. The amplitudes will vary from person to person. The current configuration allows the gain to be adjusted

    15

  • manually, but this is a slow and tedious task. Next time the gain would be adjusted in firmware. This would be much faster and more accurate. The overall performance of this project was excellent. There was positive feedback from the judges, and we were awarded 3rd prize for our efforts. Below are a series of photos from the demonstration.

    16

  • References Robert M. Berne and Matthew N. Levy, Cardiovascular Physiology 2nd Edition The C.V. Mosby Company, St. Louis 1972 National Semiconductor - LM741 Operational Amplifier Datasheet Analog Devices AD620 Instrumentation Amplifier Datasheet Nordic Semiconductor Single chip 433/868/915 MHz Transceiver nRF905 Dallas Semiconductor - +5V-Powered, Multichannel RS-232 Drivers/Receivers datasheet Microchip - PIC16F87X 28/40-Pin 8-Bit CMOS FLASH Microcontrollers Datasheet

    17

  • Appendix A

    PCB Files

  • 11

    2

    2

    3

    3

    4

    4

    5

    5

    6

    6

    7

    7

    8

    8

    D D

    C C

    B B

    A A

    Title

    Number RevisionSize

    A2

    Date: 30/07/2006 Sheet of File: C:\Documents and Settings\..\ecg.SCHDOCDrawn By:

    1

    2

    3

    4

    5

    6

    7

    8

    AD620AN

    U1

    1

    2

    3

    4

    5

    6

    7

    8

    AD620AN

    U2

    1

    2

    3

    4

    5

    6

    7

    8

    AD620AN

    U3

    5.1V ZenerD1

    3.3 V ZenerD2

    1KR1

    1KR2

    123456

    Header 6H

    JP1

    1KR3

    1KR4

    1KR5

    8

    53

    26

    7

    4

    1LM741

    U7

    8

    53

    26

    7

    4

    1LM741

    U9

    8

    53

    26

    7

    4

    1LM741

    U4

    8

    53

    26

    7

    4

    1LM741

    U5

    8

    53

    26

    7

    4

    1LM741

    U6

    Cap Pol3100uF

    C1

    Cap Pol3100uF

    C2

    Cap Pol3100uF

    C3

    2.2KR6

    2.2KR7

    2.2KR8

    1KR9

    1KR10

    1KR11

    1KR12

    1KR13

    1KR14

    10KR17

    200KR18

    200KR20

    3.9KR21

    3.9KR23

    1uF

    C4

    1uF

    C5

    1uF

    C6

    1uF

    C7

    1uF

    C8

    1uF

    C9

    +6V

    -6V -6V

    Vref (micro)

    +6V

    -6VLLLARA

    +6V

    -6V

    +6V

    +6V

    -6V

    -6V

    LA

    LA

    LL

    LL

    RA

    RA

    82KR24

    82KR25

    82KR26

    82KR27

    82KR28

    82KR29

    10nFC10

    10nFC11

    10nFC12

    100nF

    C13

    100nF

    C14

    100nF

    C15

    -6V

    -6V

    -6V

    +6V

    +6V

    +6V

    45KR30

    45KR31

    45KR32

    100nFC16

    100nFC17

    100nFC18

    Lead I

    Lead II

    Lead III

    RA02

    RA13

    RA24

    RA35

    RA4/T0CKI6

    RA5/SS7

    RB0/INT33

    RB134

    RB235

    RB336

    RB437

    RB538

    RB639

    RB740

    RC0/T1OSI/T1CKI 15

    RC1/T1OSO/CCP2 16

    RC2/CCP1 17

    RC3/SCK/SCL 18

    RC4/SDI/SDA 23

    RC5/SDO 24

    RC6/TX/CK 25

    RC7/RX/DT 26

    RD0/PSP0 19

    RD1/PSP1 20

    RD2/PSP2 21

    RD3/PSP3 22

    RD4/PSP4 27

    RD5/PSP5 28

    RD6/PSP6 29

    RD7/PSP7 30

    RE0/RD 8

    RE1/WR 9

    RE2/CS 10VSS12

    VSS31

    MCLR/VPP1OSC1/CLKI13

    OSC2/CLKO 14

    VDD 11

    VDD 32

    PIC16C65-20I/P

    U10

    4.7KR33

    22pFC20

    22pFC19

    1 2

    XTAL1

    VDD

    Vref (micro)Vref (micro)

    OSC1

    OSC2

    SW-PBSW1

    4.7KR34

    D3

    VDD

    MCLR!

    Vin VoutGND

    5 Volt RegVR1

    D6

    22uFC21 0.1uF

    C22470R35

    1 2

    D4

    +6V

    Vref (micro)

    Vref (micro)

    Vref (micro) Vref (micro)

    VDD

    12345678

    Header 8

    JP2Vref (micro)IRQMISOMOSISCKCSNCEVCC

    47

    R36

    3.3 V ZenerD5

    VDD

    VCC

    Vref (micro)

    MCLR!

    Lead ILead II

    Lead III

    VDD

    Vref (micro)

    OSC1

    OSC2

    CSNCESCKMISOMOSI

    Vref (micro)

    VDD

    IRQ

    8

    53

    26

    7

    4

    1LM741

    U8

    -6V

    +6V

    +6V

    +6V

    -6V

    -6V

    10KR16

    3.9KR22

    1K200KR19

    Res110K

    R15

    13

    10

    11

    8

    12

    9

    14

    7

    C1+1

    C2+4

    GND15

    C1-3VCC 16

    C2-5

    V- 6

    V+ 2

    MAX232

    U11

    0.1uFC23

    0.1uF

    C24

    Cap0.1uF

    C25

    12345 6789

    1

    1

    1

    0

    D Connector 9J3

    VDD

    0.1uF

    C26

    VDD

    Vref (micro) Vref (micro)

    Vref (micro)

    RX

    RX

    TX

    TX

    0.1uFC27

    Vref (micro) Vref (micro)

  • Designator Description Footprint CommentC1 100u RAD-0.1 Cap Pol3C2 100u RAD-0.1 Cap Pol3C3 100u RAD-0.1 Cap Pol3C4 1u RAD-0.1 Cap Pol3C5 1u RAD-0.1 Cap Pol3C6 1u RAD-0.1 Cap Pol3C7 1u RAD-0.1 Cap Pol3C8 1u RAD-0.1 Cap Pol3C9 1u RAD-0.1 Cap Pol3C10 10n RAD-0.1 CapC11 10n RAD-0.1 CapC12 10n RAD-0.1 CapC13 100n RAD-0.1 CapC14 100n RAD-0.1 CapC15 100n RAD-0.1 CapC16 100n RAD-0.1 CapC17 100n RAD-0.1 CapC18 100n RAD-0.1 CapC19 22p RAD-0.1 CapC20 22p RAD-0.1 CapC21 0.1u RAD-0.1 Cap Pol1C22 22u RAD-0.1 CapC23 0.1u RAD-0.1 CapC24 0.1u RAD-0.1 CapC25 0.1u RAD-0.1 CapC26 0.1u RAD-0.1 CapC27 0.1u RAD-0.1 CapD1 5.1V Zener AXIAL-0.3 5.1V ZenerD2 3.3 V Zener AXIAL-0.3 3.3 V ZenerD3 D Zener AXIAL-0.3 D ZenerD4 LED1 AXIAL-0.3 LED1D5 3.3 V Zener AXIAL-0.3 3.3 V ZenerD6 Diode AXIAL-0.3 DiodeJ3 D Connector 9 DSUB1.385-2H9 D Connector 9JP1 Header 6H HDR1X6 Header 6HJP2 Header 8 HDR1X8 Header 8R1 1K AXIAL-0.3 Res1R2 1K AXIAL-0.3 Res1R3 1K AXIAL-0.3 Res1R4 1K AXIAL-0.3 Res1R5 1K AXIAL-0.3 Res1R6 2K2 AXIAL-0.3 Res1R7 2K2 AXIAL-0.3 Res1R8 2K2 AXIAL-0.3 Res1R9 1K VR4 RPot1R10 1K VR4 RPot1R11 1K VR4 RPot1R12 1K AXIAL-0.3 Res1R13 1K AXIAL-0.3 Res1R14 1K AXIAL-0.3 Res1

  • R15 10K AXIAL-0.3 Res1R16 10K AXIAL-0.3 Res1R17 10K AXIAL-0.3 Res1R18 200K VR4 RPot1R19 200K VR4 RPot1R20 200K VR4 RPot1R21 3K9 AXIAL-0.3 Res1R22 3K9 AXIAL-0.3 Res1R23 3K9 AXIAL-0.3 Res1R24 82K AXIAL-0.3 Res1R25 82K AXIAL-0.3 Res1R26 82K AXIAL-0.3 Res1R27 82K AXIAL-0.3 Res1R28 82K AXIAL-0.3 Res1R29 82K AXIAL-0.3 Res1R30 45K AXIAL-0.3 Res1R31 45K AXIAL-0.3 Res1R32 45K AXIAL-0.3 Res1R33 4K7 AXIAL-0.3 Res1R34 4K7 AXIAL-0.3 Res1R35 470R AXIAL-0.3 Res1R36 47R AXIAL-0.3 Res1SW1 Push Button Switch SPST-2 SW-PBU1 AD620AN DIP-8 AD620ANU2 AD620AN DIP-8 AD620ANU3 AD620AN DIP-8 AD620ANU4 LM741 DIP-8 LM741U5 LM741 DIP-8 LM741U6 LM741 DIP-8 LM741U7 LM741 DIP-8 LM741U8 LM741 DIP-8 LM741U9 LM741 DIP-8 LM741U10 PIC16C65-20I/P DIP-P40/X.85 PIC16C65-20I/PU11 MAX232 DIP-16/X1.5 MAX232VR1 5 Volt Reg SPDT-3 5 Volt RegXTAL1 XTAL RAD-0.1 XTAL

  • Appendix B

    Datasheets

  • CONNECTION DIAGRAM

    8-Lead Plastic Mini-DIP (N), Cerdip (Q)and SOIC (R) Packages

    IN

    RG

    VS

    +IN

    RG

    +VS

    OUTPUT

    REF

    1

    2

    3

    4

    8

    7

    6

    5AD620

    TOP VIEW

    REV. E

    Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Devices.

    a Low Cost, Low PowerInstrumentation AmplifierAD620

    FEATURESEASY TO USEGain Set with One External Resistor

    (Gain Range 1 to 1000)Wide Power Supply Range (62.3 V to 618 V)Higher Performance than Three Op Amp IA DesignsAvailable in 8-Lead DIP and SOIC PackagingLow Power, 1.3 mA max Supply Current

    EXCELLENT DC PERFORMANCE (B GRADE)50 mV max, Input Offset Voltage0.6 mV/8C max, Input Offset Drift1.0 nA max, Input Bias Current100 dB min Common-Mode Rejection Ratio (G = 10)

    LOW NOISE9 nV/Hz, @ 1 kHz, Input Voltage Noise0.28 mV p-p Noise (0.1 Hz to 10 Hz)

    EXCELLENT AC SPECIFICATIONS120 kHz Bandwidth (G = 100)15 ms Settling Time to 0.01%

    APPLICATIONSWeigh ScalesECG and Medical InstrumentationTransducer InterfaceData Acquisition SystemsIndustrial Process ControlsBattery Powered and Portable Equipment

    One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700 World Wide Web Site: http://www.analog.comFax: 781/326-8703 Analog Devices, Inc., 1999

    PRODUCT DESCRIPTIONThe AD620 is a low cost, high accuracy instrumentation ampli-fier that requires only one external resistor to set gains of 1 to

    0 5 10 15 20

    30,000

    5,000

    10,000

    15,000

    20,000

    25,000

    0

    TOTA

    L ER

    ROR,

    PPM

    OF

    FULL

    SCA

    LE

    SUPPLY CURRENT mA

    AD620A

    RG

    3 OP-AMP IN-AMP(3 OP-07s)

    Figure 1. Three Op Amp IA Designs vs. AD620

    SOURCE RESISTANCE V100M10k1k 10M1M100k

    10,000

    0.1

    100

    1,000

    10

    1

    RTI

    VO

    LTAG

    E NO

    ISE

    (0.1

    10Hz

    ) m

    V p-

    p

    TYPICAL STANDARDBIPOLAR INPUTIN-AMP

    AD620 SUPERbETABIPOLAR INPUTIN-AMP

    G = 100

    Figure 2. Total Voltage Noise vs. Source Resistance

    1000. Furthermore, the AD620 features 8-lead SOIC and DIPpackaging that is smaller than discrete designs, and offers lowerpower (only 1.3 mA max supply current), making it a good fitfor battery powered, portable (or remote) applications.

    The AD620, with its high accuracy of 40 ppm maximumnonlinearity, low offset voltage of 50 V max and offset drift of0.6 V/C max, is ideal for use in precision data acquisitionsystems, such as weigh scales and transducer interfaces. Fur-thermore, the low noise, low input bias current, and low powerof the AD620 make it well suited for medical applications suchas ECG and noninvasive blood pressure monitors.

    The low input bias current of 1.0 nA max is made possible withthe use of Superbeta processing in the input stage. The AD620works well as a preamplifier due to its low input voltage noise of9 nV/Hz at 1 kHz, 0.28 V p-p in the 0.1 Hz to 10 Hz band,0.1 pA/Hz input current noise. Also, the AD620 is well suitedfor multiplexed applications with its settling time of 15 s to0.01% and its cost is low enough to enable designs with one in-amp per channel.

  • AD620SPECIFICATIONS (Typical @ +258C, VS = 615 V, and RL = 2 kV, unless otherwise noted) AD620A AD620B AD620S1

    Model Conditions Min Typ Max Min Typ Max Min Typ Max Units

    GAIN G = 1 + (49.4 k/RG)Gain Range 1 10,000 1 10,000 1 10,000Gain Error2 VOUT = 10 V

    G = 1 0.03 0.10 0.01 0.02 0.03 0.10 %G = 10 0.15 0.30 0.10 0.15 0.15 0.30 %G = 100 0.15 0.30 0.10 0.15 0.15 0.30 %G = 1000 0.40 0.70 0.35 0.50 0.40 0.70 %

    Nonlinearity, VOUT = 10 V to +10 V,G = 11000 RL = 10 k 10 40 10 40 10 40 ppmG = 1100 RL = 2 k 10 95 10 95 10 95 ppm

    Gain vs. TemperatureG =1 10 10 10 ppm/CGain >12 50 50 50 ppm/C

    VOLTAGE OFFSET (Total RTI Error = VOSI + VOSO/G)Input Offset, VOSI VS = 5 V to 15 V 30 125 15 50 30 125 V

    Over Temperature VS = 5 V to 15 V 185 85 225 VAverage TC VS = 5 V to 15 V 0.3 1.0 0.1 0.6 0.3 1.0 V/C

    Output Offset, VOSO VS = 15 V 400 1000 200 500 400 1000 VVS = 5 V 1500 750 1500 V

    Over Temperature VS = 5 V to 15 V 2000 1000 2000 VAverage TC VS = 5 V to 15 V 5.0 15 2.5 7.0 5.0 15 V/C

    Offset Referred to theInput vs.Supply (PSR) VS = 2.3 V to 18 V

    G = 1 80 100 80 100 80 100 dBG = 10 95 120 100 120 95 120 dBG = 100 110 140 120 140 110 140 dBG = 1000 110 140 120 140 110 140 dB

    INPUT CURRENTInput Bias Current 0.5 2.0 0.5 1.0 0.5 2 nA

    Over Temperature 2.5 1.5 4 nAAverage TC 3.0 3.0 8.0 pA/C

    Input Offset Current 0.3 1.0 0.3 0.5 0.3 1.0 nAOver Temperature 1.5 0.75 2.0 nAAverage TC 1.5 1.5 8.0 pA/C

    INPUTInput Impedance

    Differential 10i2 10i2 10i2 GipFCommon-Mode 10i2 10i2 10i2 GipF

    Input Voltage Range3 VS = 2.3 V to 5 V VS + 1.9 +VS 1.2 VS + 1.9 +VS 1.2 VS + 1.9 +VS 1.2 VOver Temperature VS + 2.1 +VS 1.3 VS + 2.1 +VS 1.3 VS + 2.1 +VS 1.3 V

    VS = 5 V to 18 V VS + 1.9 +VS 1.4 VS + 1.9 +VS 1.4 VS + 1.9 +VS 1.4 VOver Temperature VS + 2.1 +VS 1.4 VS + 2.1 +VS 1.4 VS + 2.3 +VS 1.4 V

    Common-Mode RejectionRatio DC to 60 Hz withI k Source Imbalance VCM = 0 V to 10 V

    G = 1 73 90 80 90 73 90 dBG = 10 93 110 100 110 93 110 dBG = 100 110 130 120 130 110 130 dBG = 1000 110 130 120 130 110 130 dB

    OUTPUTOutput Swing RL = 10 k,

    VS = 2.3 V to 5 V VS + 1.1 +VS 1.2 VS + 1.1 +VS 1.2 VS + 1.1 +VS 1.2 VOver Temperature VS + 1.4 +VS 1.3 VS + 1.4 +VS 1.3 VS + 1.6 +VS 1.3 V

    VS = 5 V to 18 V VS + 1.2 +VS 1.4 VS + 1.2 +VS 1.4 VS + 1.2 +VS 1.4 VOver Temperature VS + 1.6 +VS 1.5 VS + 1.6 +VS 1.5 VS + 2.3 +VS 1.5 V

    Short Current Circuit 18 18 18 mA

    REV. E2

  • AD620AD620A AD620B AD620S1

    Model Conditions Min Typ Max Min Typ Max Min Typ Max Units

    DYNAMIC RESPONSESmall Signal 3 dB Bandwidth

    G = 1 1000 1000 1000 kHzG = 10 800 800 800 kHzG = 100 120 120 120 kHzG = 1000 12 12 12 kHz

    Slew Rate 0.75 1.2 0.75 1.2 0.75 1.2 V/sSettling Time to 0.01% 10 V Step

    G = 1100 15 15 15 sG = 1000 150 150 150 s

    NOISE

    Voltage Noise, 1 kHz Total RTI Noise = (e

    2ni )+(eno /G)

    2

    Input, Voltage Noise, eni 9 13 9 13 9 13 nV/HzOutput, Voltage Noise, eno 72 100 72 100 72 100 nV/Hz

    RTI, 0.1 Hz to 10 HzG = 1 3.0 3.0 6.0 3.0 6.0 V p-pG = 10 0.55 0.55 0.8 0.55 0.8 V p-pG = 1001000 0.28 0.28 0.4 0.28 0.4 V p-p

    Current Noise f = 1 kHz 100 100 100 fA/Hz0.1 Hz to 10 Hz 10 10 10 pA p-p

    REFERENCE INPUTRIN 20 20 20 kIIN VIN+, VREF = 0 +50 +60 +50 +60 +50 +60 AVoltage Range VS + 1.6 +VS 1.6 VS + 1.6 +VS 1.6 VS + 1.6 +VS 1.6 VGain to Output 1 0.0001 1 0.0001 1 0.0001

    POWER SUPPLYOperating Range4 2.3 18 2.3 18 2.3 18 VQuiescent Current VS = 2.3 V to 18 V 0.9 1.3 0.9 1.3 0.9 1.3 mA

    Over Temperature 1.1 1.6 1.1 1.6 1.1 1.6 mA

    TEMPERATURE RANGEFor Specified Performance 40 to +85 40 to +85 55 to +125 C

    NOTES1See Analog Devices military data sheet for 883B tested specifications.2Does not include effects of external resistor RG.3One input grounded. G = 1.4This is defined as the same supply range which is used to specify PSR.

    Specifications subject to change without notice.

    REV. E 3

  • AD620

    REV. E4

    NOTES1Stresses above those listed under Absolute Maximum Ratings may cause perma-

    nent damage to the device. This is a stress rating only; functional operation of thedevice at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum ratingconditions for extended periods may affect device reliability.

    2Specification is for device in free air:8-Lead Plastic Package: qJA = 95C/W8-Lead Cerdip Package: qJA = 110C/W8-Lead SOIC Package: qJA = 155C/W

    ABSOLUTE MAXIMUM RATINGS1

    Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 VInternal Power Dissipation2 . . . . . . . . . . . . . . . . . . . . . 650 mWInput Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VSDifferential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .25 VOutput Short Circuit Duration . . . . . . . . . . . . . . . . . IndefiniteStorage Temperature Range (Q) . . . . . . . . . . 65C to +150CStorage Temperature Range (N, R) . . . . . . . . 65C to +125COperating Temperature Range

    AD620 (A, B) . . . . . . . . . . . . . . . . . . . . . . 40C to +85CAD620 (S) . . . . . . . . . . . . . . . . . . . . . . . . 55C to +125C

    Lead Temperature Range(Soldering 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . +300C

    ORDERING GUIDE

    Model Temperature Ranges Package Options*

    AD620AN 40C to +85C N-8AD620BN 40C to +85C N-8AD620AR 40C to +85C SO-8AD620AR-REEL 40C to +85C 13" REELAD620AR-REEL7 40C to +85C 7" REELAD620BR 40C to +85C SO-8AD620BR-REEL 40C to +85C 13" REELAD620BR-REEL7 40C to +85C 7" REELAD620ACHIPS 40C to +85C Die FormAD620SQ/883B 55C to +125C Q-8

    *N = Plastic DIP; Q = Cerdip; SO = Small Outline.

    METALIZATION PHOTOGRAPHDimensions shown in inches and (mm).Contact factory for latest dimensions.

    +VS OUTPUT

    REFERENCE

    +INVS

    IN*FOR CHIP APPLICATIONS: THE PADS 1RG AND 8RG MUST BE CONNECTED IN PARALLEL TO THE EXTERNAL GAIN REGISTER RG. DO NOT CONNECT THEM IN SERIES TO RG. FOR UNITY GAIN APPLICATIONS WHERE RG IS NOT REQUIRED, THE PADS 1RG MAY SIMPLY BE BONDED TOGETHER, AS WELL AS THE PADS 8RG.

    4

    5

    678

    8

    RG*

    1

    1 2 3

    RG*0.125

    (3.180)

    0.0708(1.799)

    CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readilyaccumulate on the human body and test equipment and can discharge without detection.Although the AD620 features proprietary ESD protection circuitry, permanent damage mayoccur on devices subjected to high energy electrostatic discharges. Therefore, proper ESDprecautions are recommended to avoid performance degradation or loss of functionality.

    WARNING!

    ESD SENSITIVE DEVICE

  • AD620

    REV. E 5

    Typical Characteristics (@ +258C, VS = 615 V, RL = 2 kV, unless otherwise noted)

    INPUT OFFSET VOLTAGE mV

    20

    30

    40

    50

    40 0 +40 +80

    PER

    CENT

    AGE

    OF

    UNIT

    S

    80

    SAMPLE SIZE = 360

    10

    0

    Figure 3. Typical Distribution of Input Offset Voltage

    INPUT BIAS CURRENT pA

    0

    10

    20

    30

    40

    50

    600 0 +600

    PER

    CENT

    AGE

    OF

    UNIT

    S

    1200 +1200

    SAMPLE SIZE = 850

    Figure 4. Typical Distribution of Input Bias Current

    10

    20

    30

    40

    50

    200 0 +200 +400INPUT OFFSET CURRENT pA

    PER

    CENT

    AGE

    OF

    UNIT

    S

    4000

    SAMPLE SIZE = 850

    Figure 5. Typical Distribution of Input Offset Current

    TEMPERATURE 8C

    INPU

    T BI

    AS C

    URRE

    NT

    nA

    +IBIB

    2.0

    2.0175

    1.0

    1.5

    75

    0.5

    0

    0.5

    1.0

    1.5

    125752525

    Figure 6. Input Bias Current vs. Temperature

    CHAN

    GE

    IN O

    FFSE

    T VO

    LTAG

    E

    mV

    1.5

    0.5

    WARM-UP TIME Minutes

    2

    00 51

    1

    432

    Figure 7. Change in Input Offset Voltage vs.Warm-Up Time

    FREQUENCY Hz

    1000

    11 100k

    100

    10

    10k1k100

    VOLT

    AGE

    NOIS

    E

    nV/!H

    z

    GAIN = 1

    GAIN = 10

    10

    GAIN = 100, 1,000GAIN = 1000BW LIMIT

    Figure 8. Voltage Noise Spectral Density vs. Frequency,(G = 11000)

  • AD620Typical Characteristics

    FREQUENCY Hz

    1000

    100

    101 10 1000100

    CURR

    ENT

    NOIS

    E

    fA/!H

    z

    Figure 9. Current Noise Spectral Density vs. Frequency

    RTI

    NO

    ISE

    2.

    0 m

    V/DI

    V

    TIME 1 SEC/DIV

    Figure 10a. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1)

    RTI

    NO

    ISE

    0.

    1mV/

    DIV

    TIME 1 SEC/DIV

    Figure 10b. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1000)

    Figure 11. 0.1 Hz to 10 Hz Current Noise, 5 pA/Div

    100

    1000

    AD620A

    FET INPUTIN-AMP

    SOURCE RESISTANCE V

    TOTA

    L DR

    IFT

    FRO

    M 2

    58C

    TO 8

    58C,

    RTI

    m

    V

    100,000

    101k 10M

    10,000

    10k 1M100k

    Figure 12. Total Drift vs. Source Resistance

    FREQUENCY Hz

    CMR

    dB

    +160

    01M

    +80

    +40

    1

    +60

    0.1

    +140

    +100

    +120

    100k10k1k10010

    G = 1000

    G = 100

    G = 10

    G = 1

    +20

    Figure 13. CMR vs. Frequency, RTI, Zero to 1 k SourceImbalance

    REV. E6

  • AD620

    REV. E 7

    FREQUENCY Hz

    PSR

    dB

    160

    1M

    80

    40

    1

    60

    0.1

    140

    100

    120

    100k10k1k1001020

    G = 1000

    G = 100

    G = 10

    G = 1

    180

    Figure 14. Positive PSR vs. Frequency, RTI (G = 11000)

    FREQUENCY Hz

    PSR

    dB

    160

    1M

    80

    40

    1

    60

    0.1

    140

    100

    120

    100k10k1k1001020

    180

    G = 10

    G = 100

    G = 1

    G = 1000

    Figure 15. Negative PSR vs. Frequency, RTI (G = 11000)

    1000

    100 10M

    100

    1

    1k

    10

    100k 1M10k FREQUENCY Hz

    GAI

    N

    V/V

    0.1

    Figure 16. Gain vs. Frequency

    OUT

    PUT

    VOLT

    AGE

    Vo

    lts p

    -p

    FREQUENCY Hz

    35

    01M

    15

    5

    10k

    10

    1k

    30

    20

    25

    100k

    G = 10, 100, 1000

    G = 1

    G = 1000 G = 100

    BW

    LIM

    IT

    Figure 17. Large Signal Frequency Response

    INPU

    T VO

    LTAG

    E LI

    MIT

    V

    olts

    (REF

    ERRE

    D TO

    SUP

    PLY

    VOLT

    AGES

    )

    20

    +1.0

    +0.5

    50

    +1.5

    1.5

    1.0

    0.5

    1510SUPPLY VOLTAGE 6 Volts

    +VS 0.0

    VS +0.0

    Figure 18. Input Voltage Range vs. Supply Voltage, G = 1

    20

    +1.0

    +0.5

    50

    +1.5

    1.5

    1.0

    0.5

    1510SUPPLY VOLTAGE 6 Volts

    RL = 10kV

    RL = 2kV

    RL = 10kV

    OUT

    PUT

    VOLT

    AGE

    SWIN

    G

    Vol

    ts(R

    EFER

    RED

    TO S

    UPPL

    Y VO

    LTAG

    ES)

    RL = 2kV

    +VS 0.0

    VS +0.0

    Figure 19. Output Voltage Swing vs. Supply Voltage,G = 10

  • AD620

    REV. E8

    OUT

    PUT

    VOLT

    AGE

    SWIN

    G

    Vol

    ts p

    -p

    LOAD RESISTANCE V

    30

    00 10k

    20

    10

    100 1k

    VS = 615VG = 10

    Figure 20. Output Voltage Swing vs. Load Resistance

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 21. Large Signal Pulse Response and Settling TimeG = 1 (0.5 mV = 0.01%)

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 22. Small Signal Response, G = 1, RL = 2 k,CL = 100 pF

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 23. Large Signal Response and Settling Time,G = 10 (0.5 mV = 001%)

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 24. Small Signal Response, G = 10, RL = 2 k,CL = 100 pF

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 25. Large Signal Response and Settling Time,G = 100 (0.5 mV = 0.01%)

  • AD620

    REV. E 9

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 26. Small Signal Pulse Response, G = 100,RL = 2 k, CL = 100 pF

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 27. Large Signal Response and Settling Time,G = 1000 (0.5 mV = 0.01%)

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 28. Small Signal Pulse Response, G = 1000,RL = 2 k, CL = 100 pF

    OUTPUT STEP SIZE Volts

    SETT

    LING

    TIM

    E

    ms TO 0.01%

    TO 0.1%

    20

    00 20

    15

    5

    5

    10

    10 15

    Figure 29. Settling Time vs. Step Size (G = 1)

    GAIN

    SETT

    LING

    TIM

    E

    ms

    1000

    11 1000

    100

    10

    10 100

    Figure 30. Settling Time to 0.01% vs. Gain, for a 10 V Step

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 31a. Gain Nonlinearity, G = 1, RL = 10 k(10 V = 1 ppm)

  • AD620

    REV. E10

    VB

    VS

    A1 A2

    A3

    C2

    RG

    R1 R2

    GAINSENSE

    GAINSENSE

    R3400V

    10kV

    10kV

    I2I1

    10kVREF

    10kV

    +IN IN

    20mA 20mA

    R4400V

    OUTPUT

    C1

    Q2Q1

    Figure 33. Simplified Schematic of AD620

    THEORY OF OPERATIONThe AD620 is a monolithic instrumentation amplifier based ona modification of the classic three op amp approach. Absolutevalue trimming allows the user to program gain accurately (to0.15% at G = 100) with only one resistor. Monolithic construc-tion and laser wafer trimming allow the tight matching andtracking of circuit components, thus ensuring the high level ofperformance inherent in this circuit.

    The input transistors Q1 and Q2 provide a single differential-pair bipolar input for high precision (Figure 33), yet offer 10lower Input Bias Current thanks to Superbeta processing. Feed-back through the Q1-A1-R1 loop and the Q2-A2-R2 loop main-tains constant collector current of the input devices Q1, Q2thereby impressing the input voltage across the external gainsetting resistor RG. This creates a differential gain from theinputs to the A1/A2 outputs given by G = (R1 + R2)/RG + 1.The unity-gain subtracter A3 removes any common-mode sig-nal, yielding a single-ended output referred to the REF pinpotential.

    The value of RG also determines the transconductance of thepreamp stage. As RG is reduced for larger gains, the transcon-ductance increases asymptotically to that of the input transistors.This has three important advantages: (a) Open-loop gain isboosted for increasing programmed gain, thus reducing gain-related errors. (b) The gain-bandwidth product (determined byC1, C2 and the preamp transconductance) increases with pro-grammed gain, thus optimizing frequency response. (c) Theinput voltage noise is reduced to a value of 9 nV/Hz, deter-mined mainly by the collector current and base resistance of theinput devices.

    The internal gain resistors, R1 and R2, are trimmed to an abso-lute value of 24.7 k, allowing the gain to be programmedaccurately with a single external resistor.

    The gain equation is then

    G =

    49.4 kRG

    + 1

    so that

    RG =

    49.4 kG 1

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 31b. Gain Nonlinearity, G = 100, RL = 10 k(100 V = 10 ppm)

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

    Figure 31c. Gain Nonlinearity, G = 1000, RL = 10 k(1 mV = 100 ppm)

    AD620

    VOUT

    G=1G=1000

    49.9V

    10kV*1kV10T 10kV

    499V

    G=10G=1005.49kV

    +VS11kV 1kV 100V

    100kVINPUT

    10V p-p

    VS*ALL RESISTORS 1% TOLERANCE

    71

    2

    3

    8

    6

    4

    5

    Figure 32. Settling Time Test Circuit

  • AD620

    REV. E 11

    Make vs. Buy: A Typical Bridge Application Error BudgetThe AD620 offers improved performance over homebrewthree op amp IA designs, along with smaller size, fewer compo-nents and 10 lower supply current. In the typical application,shown in Figure 34, a gain of 100 is required to amplify a bridgeoutput of 20 mV full scale over the industrial temperature rangeof 40C to +85C. The error budget table below shows how tocalculate the effect various error sources have on circuit accuracy.

    Regardless of the system in which it is being used, the AD620provides greater accuracy, and at low power and price. In simple

    R = 350V

    +10V

    PRECISION BRIDGE TRANSDUCER AD620A MONOLITHICINSTRUMENTATIONAMPLIFIER, G = 100

    HOMEBREW IN-AMP, G = 100 *0.02% RESISTOR MATCH, 3PPM/8C TRACKING**DISCRETE 1% RESISTOR, 100PPM/8C TRACKING SUPPLY CURRENT = 15mA MAX

    100V**

    10kV*

    10kV**

    10kV*

    10kV*

    10kV**

    10kV*

    SUPPLY CURRENT = 1.3mA MAX

    OP07D

    OP07D

    OP07DAD620ARG

    499V

    REFERENCE

    R = 350V R = 350V

    R = 350V

    Figure 34. Make vs. Buy

    Table I. Make vs. Buy Error Budget

    AD620 Circuit Homebrew Circuit Error, ppm of Full ScaleError Source Calculation Calculation AD620 Homebrew

    ABSOLUTE ACCURACY at TA = +25CInput Offset Voltage, V 125 V/20 mV (150 V 2)/20 mV 16,250 10,607Output Offset Voltage, V 1000 V/100/20 mV ((150 V 2)/100)/20 mV 14,500 10,150Input Offset Current, nA 2 nA 350 /20 mV (6 nA 350 )/20 mV 14,118 14,153CMR, dB 110 dBfi3.16 ppm, 5 V/20 mV (0.02% Match 5 V)/20 mV/100 14,791 10,500

    Total Absolute Error 17,558 11,310DRIFT TO +85C

    Gain Drift, ppm/C (50 ppm + 10 ppm) 60C 100 ppm/C Track 60C 13,600 16,000Input Offset Voltage Drift, V/C 1 V/C 60C/20 mV (2.5 V/C 2 60C)/20 mV 13,000 10,607Output Offset Voltage Drift, V/C 15 V/C 60C/100/20 mV (2.5 V/C 2 60C)/100/20 mV 14,450 10,150

    Total Drift Error 17,050 16,757RESOLUTION

    Gain Nonlinearity, ppm of Full Scale 40 ppm 40 ppm 14,140 10,140Typ 0.1 Hz10 Hz Voltage Noise, V p-p 0.28 V p-p/20 mV (0.38 V p-p 2)/20 mV 141,14 13,127

    Total Resolution Error 14,154 101,67

    Grand Total Error 14,662 28,134

    G = 100, VS = 15 V.

    (All errors are min/max and referred to input.)

    systems, absolute accuracy and drift errors are by far the mostsignificant contributors to error. In more complex systems withan intelligent processor, an autogain/autozero cycle will remove allabsolute accuracy and drift errors leaving only the resolutionerrors of gain nonlinearity and noise, thus allowing full 14-bitaccuracy.

    Note that for the homebrew circuit, the OP07 specifications forinput voltage offset and noise have been multiplied by 2. Thisis because a three op amp type in-amp has two op amps at itsinputs, both contributing to the overall input error.

  • AD620

    REV. E12

    3kV

    +5V

    DIGITALDATAOUTPUT

    ADC

    REF

    IN

    AGND

    20kV

    10kV

    20kV

    AD620BG=100

    1.7mA 0.10mA 0.6mAMAX

    499V

    3kV

    3kV3kV

    21

    83 7

    65

    4

    1.3mAMAX

    AD705

    Figure 35. A Pressure Monitor Circuit which Operates on a +5 V Single Supply

    Pressure MeasurementAlthough useful in many bridge applications such as weighscales, the AD620 is especially suitable for higher resistancepressure sensors powered at lower voltages where small size andlow power become more significant.

    Figure 35 shows a 3 k pressure transducer bridge poweredfrom +5 V. In such a circuit, the bridge consumes only 1.7 mA.Adding the AD620 and a buffered voltage divider allows thesignal to be conditioned for only 3.8 mA of total supply current.

    Small size and low cost make the AD620 especially attractive forvoltage output pressure transducers. Since it delivers low noiseand drift, it will also serve applications such as diagnostic non-invasive blood pressure measurement.

    Medical ECGThe low current noise of the AD620 allows its use in ECGmonitors (Figure 36) where high source resistances of 1 M orhigher are not uncommon. The AD620s low power, low supplyvoltage requirements, and space-saving 8-lead mini-DIP andSOIC package offerings make it an excellent choice for batterypowered data recorders.

    Furthermore, the low bias currents and low current noisecoupled with the low voltage noise of the AD620 improve thedynamic range for better performance.

    The value of capacitor C1 is chosen to maintain stability of theright leg drive loop. Proper safeguards, such as isolation, mustbe added to this circuit to protect the patient from possibleharm.

    G = 7AD620A

    0.03HzHIGHPASS

    FILTER

    OUTPUT1V/mV

    +3V

    3V

    RG8.25kV

    24.9kV

    24.9kV

    AD705J

    G = 143C1

    1MVR4

    10kVR1 R3

    R2

    OUTPUTAMPLIFIER

    PATIENT/CIRCUITPROTECTION/ISOLATION

    Figure 36. A Medical ECG Monitor Circuit

  • AD620

    REV. E 13

    Precision V-I ConverterThe AD620, along with another op amp and two resistors, makesa precision current source (Figure 37). The op amp buffers thereference terminal to maintain good CMR. The output voltageVX of the AD620 appears across R1, which converts it to acurrent. This current less only, the input bias current of the opamp, then flows out to the load.

    AD620RG

    VS

    VIN+

    VIN

    LOAD

    R1

    IL

    VxI =L R1=

    IN+[(V ) (V )] GINR1

    6

    5

    + V X

    42

    1

    8

    3 7

    +VS

    AD705

    Figure 37. Precision Voltage-to-Current Converter(Operates on 1.8 mA, 3 V)

    GAIN SELECTIONThe AD620s gain is resistor programmed by RG, or more pre-cisely, by whatever impedance appears between Pins 1 and 8.The AD620 is designed to offer accurate gains using 0.1%1%resistors. Table II shows required values of RG for various gains.Note that for G = 1, the RG pins are unconnected (RG = ). Forany arbitrary gain RG can be calculated by using the formula:

    RG =

    49.4 kG 1

    To minimize gain error, avoid high parasitic resistance in serieswith RG; to minimize gain drift, RG should have a low TClessthan 10 ppm/Cfor the best performance.

    Table II. Required Values of Gain Resistors

    1% Std Table Calculated 0.1% Std Table CalculatedValue of RG, V Gain Value of RG, V Gain

    49.9 k 1.990 49.3 k 2.00212.4 k 4.984 12.4 k 4.9845.49 k 9.998 5.49 k 9.998

    2.61 k 19.93 2.61 k 19.931.00 k 50.40 1.01 k 49.91499 100.0 499 100.0

    249 199.4 249 199.4100 495.0 98.8 501.049.9 991.0 49.3 1,003

    INPUT AND OUTPUT OFFSET VOLTAGEThe low errors of the AD620 are attributed to two sources,input and output errors. The output error is divided by G whenreferred to the input. In practice, the input errors dominate athigh gains and the output errors dominate at low gains. Thetotal VOS for a given gain is calculated as:

    Total Error RTI = input error + (output error/G)

    Total Error RTO = (input error G) + output error

    REFERENCE TERMINALThe reference terminal potential defines the zero output voltage,and is especially useful when the load does not share a preciseground with the rest of the system. It provides a direct means ofinjecting a precise offset to the output, with an allowable rangeof 2 V within the supply voltages. Parasitic resistance should bekept to a minimum for optimum CMR.

    INPUT PROTECTIONThe AD620 features 400 of series thin film resistance at itsinputs, and will safely withstand input overloads of up to 15 Vor 60 mA for several hours. This is true for all gains, and poweron and off, which is particularly important since the signalsource and amplifier may be powered separately. For longertime periods, the current should not exceed 6 mA (IIN VIN/400 ). For input overloads beyond the supplies, clampingthe inputs to the supplies (using a low leakage diode such as anFD333) will reduce the required resistance, yielding lowernoise.

    RF INTERFERENCEAll instrumentation amplifiers can rectify out of band signals,and when amplifying small signals, these rectified voltages act assmall dc offset errors. The AD620 allows direct access to theinput transistor bases and emitters enabling the user to applysome first order filtering to unwanted RF signals (Figure 38),where RC < 1/(2 pif) and where f the bandwidth of theAD620; C 150 pF. Matching the extraneous capacitance atPins 1 and 8 and Pins 2 and 3 helps to maintain high CMR.

    IN

    1

    2

    3

    4 5

    6

    7

    8

    R

    R+IN

    C

    C

    RG

    Figure 38. Circuit to Attenuate RF Interference

  • AD620

    REV. E14

    COMMON-MODE REJECTIONInstrumentation amplifiers like the AD620 offer high CMR,which is a measure of the change in output voltage when bothinputs are changed by equal amounts. These specifications areusually given for a full-range input voltage change and a speci-fied source imbalance.

    For optimal CMR the reference terminal should be tied to a lowimpedance point, and differences in capacitance and resistanceshould be kept to a minimum between the two inputs. In manyapplications shielded cables are used to minimize noise, and forbest CMR over frequency the shield should be properly driven.Figures 39 and 40 show active data guards that are configuredto improve ac common-mode rejections by bootstrapping thecapacitances of input cable shields, thus minimizing the capaci-tance mismatch between the inputs.

    REFERENCE

    VOUTAD620

    100V

    100V

    INPUT

    + INPUT

    AD648

    RG

    VS

    +VS

    VS

    Figure 39. Differential Shield Driver

    100V

    INPUT

    + INPUTREFERENCE

    VOUTAD620

    VS

    +VS

    2RG

    2RGAD548

    Figure 40. Common-Mode Shield Driver

    GROUNDINGSince the AD620 output voltage is developed with respect to thepotential on the reference terminal, it can solve many groundingproblems by simply tying the REF pin to the appropriate localground.

    In order to isolate low level analog signals from a noisy digitalenvironment, many data-acquisition components have separateanalog and digital ground pins (Figure 41). It would be conve-nient to use a single ground line; however, current throughground wires and PC runs of the circuit card can cause hun-dreds of millivolts of error. Therefore, separate ground returnsshould be provided to minimize the current flow from the sensi-tive points to the system ground. These ground returns must betied together at some point, usually best at the ADC package asshown.

    DIGITAL P.S.+5VC

    ANALOG P.S.+15V C 15V

    AD574A DIGITALDATAOUTPUT

    +

    1mF

    AD620

    0.1mF

    AD585S/H ADC

    0.1mF1mF 1mF

    Figure 41. Basic Grounding Practice

  • AD620

    REV. E 15

    GROUND RETURNS FOR INPUT BIAS CURRENTSInput bias currents are those currents necessary to bias the inputtransistors of an amplifier. There must be a direct return pathfor these currents; therefore, when amplifying floating input

    VOUTAD620

    INPUT

    RG

    TO POWERSUPPLY

    GROUND

    REFERENCE+ INPUT

    +VS

    VS

    LOAD

    Figure 42a. Ground Returns for Bias Currents withTransformer Coupled Inputs

    sources such as transformers, or ac-coupled sources, there mustbe a dc path from each input to ground as shown in Figure 42.Refer to the Instrumentation Amplifier Application Guide (freefrom Analog Devices) for more information regarding in ampapplications.

    VOUT

    INPUT

    + INPUT

    RG

    LOAD

    TO POWERSUPPLY

    GROUND

    REFERENCE

    +VS

    VS

    AD620

    Figure 42b. Ground Returns for Bias Currents withThermocouple Inputs

    100kV

    VOUTAD620

    INPUT

    + INPUT

    RG

    LOAD

    TO POWERSUPPLY

    GROUND

    REFERENCE

    100kV VS

    +VS

    Figure 42c. Ground Returns for Bias Currents with AC Coupled Inputs

  • AD620

    REV. E16

    OUTLINE DIMENSIONSDimensions shown in inches and (mm).

    Plastic DIP (N-8) Package

    8

    1 4

    5

    0.430 (10.92)0.348 (8.84)

    0.280 (7.11)0.240 (6.10)

    PIN 1

    SEATINGPLANE0.022 (0.558)

    0.014 (0.356)

    0.060 (1.52)0.015 (0.38)0.210 (5.33)

    MAX 0.130(3.30)MIN

    0.070 (1.77)0.045 (1.15)

    0.100(2.54)BSC

    0.160 (4.06)0.115 (2.93)

    0.325 (8.25)0.300 (7.62)

    0.015 (0.381)0.008 (0.204)

    0.195 (4.95)0.115 (2.93)

    Cerdip (Q-8) Package

    8

    1 4

    5

    0.310 (7.87)0.220 (5.59)

    PIN 1

    0.005 (0.13)MIN

    0.055 (1.4)MAX

    SEATINGPLANE0.023 (0.58)

    0.014 (0.36)

    0.200 (5.08)MAX 0.150

    (3.81)MIN

    0.070 (1.78)0.030 (0.76)

    0.200 (5.08)0.125 (3.18)

    0.100(2.54)BSC

    0.060 (1.52)0.015 (0.38)

    0.405 (10.29) MAX

    150

    0.320 (8.13)0.290 (7.37)

    0.015 (0.38)0.008 (0.20)

    SOIC (SO-8) Package

    0.1968 (5.00)0.1890 (4.80)

    8 5

    410.2440 (6.20)0.2284 (5.80)

    PIN 1

    0.1574 (4.00)0.1497 (3.80)

    0.0688 (1.75)0.0532 (1.35)

    SEATINGPLANE

    0.0098 (0.25)0.0040 (0.10)

    0.0192 (0.49)0.0138 (0.35)

    0.0500(1.27)BSC

    0.0098 (0.25)0.0075 (0.19)

    0.0500 (1.27)0.0160 (0.41)

    80

    0.0196 (0.50)0.0099 (0.25)x 45

    C15

    99c

    07/

    99P

    RIN

    TE

    D IN

    U.S

    .A.

  • LM741Operational AmplifierGeneral DescriptionThe LM741 series are general purpose operational amplifi-ers which feature improved performance over industry stan-dards like the LM709. They are direct, plug-in replacementsfor the 709C, LM201, MC1439 and 748 in most applications.The amplifiers offer many features which make their appli-cation nearly foolproof: overload protection on the input and

    output, no latch-up when the common mode range is ex-ceeded, as well as freedom from oscillations.The LM741C is identical to the LM741/LM741A except thatthe LM741C has their performance guaranteed over a 0C to+70C temperature range, instead of 55C to +125C.

    Features

    Connection DiagramsMetal Can Package Dual-In-Line or S.O. Package

    00934102Note 1: LM741H is available per JM38510/10101

    Order Number LM741H, LM741H/883 (Note 1),LM741AH/883 or LM741CH

    See NS Package Number H08C

    00934103

    Order Number LM741J, LM741J/883, LM741CNSee NS Package Number J08A, M08A or N08E

    Ceramic Flatpak

    00934106

    Order Number LM741W/883See NS Package Number W10A

    Typical ApplicationOffset Nulling Circuit

    00934107

    August 2000LM

    741OperationalAm

    plifier

    2004 National Semiconductor Corporation DS009341 www.national.com

  • Absolute Maximum Ratings (Note 2)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.(Note 7)

    LM741A LM741 LM741CSupply Voltage 22V 22V 18VPower Dissipation (Note 3) 500 mW 500 mW 500 mWDifferential Input Voltage 30V 30V 30VInput Voltage (Note 4) 15V 15V 15VOutput Short Circuit Duration Continuous Continuous ContinuousOperating Temperature Range 55C to +125C 55C to +125C 0C to +70CStorage Temperature Range 65C to +150C 65C to +150C 65C to +150CJunction Temperature 150C 150C 100CSoldering Information

    N-Package (10 seconds) 260C 260C 260CJ- or H-Package (10 seconds) 300C 300C 300CM-Package

    Vapor Phase (60 seconds) 215C 215C 215CInfrared (15 seconds) 215C 215C 215C

    See AN-450 Surface Mounting Methods and Their Effect on Product Reliability for other methods ofsolderingsurface mount devices.ESD Tolerance (Note 8) 400V 400V 400V

    Electrical Characteristics (Note 5)Parameter Conditions LM741A LM741 LM741C Units

    Min Typ Max Min Typ Max Min Typ MaxInput Offset Voltage TA = 25C

    RS 10 k 1.0 5.0 2.0 6.0 mVRS 50 0.8 3.0 mVTAMIN TA TAMAXRS 50 4.0 mVRS 10 k 6.0 7.5 mV

    Average Input Offset 15 V/CVoltage DriftInput Offset Voltage TA = 25C, VS = 20V 10 15 15 mVAdjustment RangeInput Offset Current TA = 25C 3.0 30 20 200 20 200 nA

    TAMIN TA TAMAX 70 85 500 300 nAAverage Input Offset 0.5 nA/CCurrent DriftInput Bias Current TA = 25C 30 80 80 500 80 500 nA

    TAMIN TA TAMAX 0.210 1.5 0.8 AInput Resistance TA = 25C, VS = 20V 1.0 6.0 0.3 2.0 0.3 2.0 M

    TAMIN TA TAMAX, 0.5 MVS = 20V

    Input Voltage Range TA = 25C 12 13 VTAMIN TA TAMAX 12 13 V

    LM74

    1

    www.national.com 2

  • Electrical Characteristics (Note 5) (Continued)Parameter Conditions LM741A LM741 LM741C Units

    Min Typ Max Min Typ Max Min Typ MaxLarge Signal Voltage Gain TA = 25C, RL 2 k

    VS = 20V, VO = 15V 50 V/mVVS = 15V, VO = 10V 50 200 20 200 V/mVTAMIN TA TAMAX,RL 2 k,VS = 20V, VO = 15V 32 V/mVVS = 15V, VO = 10V 25 15 V/mVVS = 5V, VO = 2V 10 V/mV

    Output Voltage Swing VS = 20VRL 10 k 16 VRL 2 k 15 VVS = 15VRL 10 k 12 14 12 14 VRL 2 k 10 13 10 13 V

    Output Short Circuit TA = 25C 10 25 35 25 25 mACurrent TAMIN TA TAMAX 10 40 mACommon-Mode TAMIN TA TAMAXRejection Ratio RS 10 k, VCM = 12V 70 90 70 90 dB

    RS 50, VCM = 12V 80 95 dBSupply Voltage Rejection TAMIN TA TAMAX,Ratio VS = 20V to VS = 5V

    RS 50 86 96 dBRS 10 k 77 96 77 96 dB

    Transient Response TA = 25C, Unity GainRise Time 0.25 0.8 0.3 0.3 sOvershoot 6.0 20 5 5 %

    Bandwidth (Note 6) TA = 25C 0.437 1.5 MHzSlew Rate TA = 25C, Unity Gain 0.3 0.7 0.5 0.5 V/sSupply Current TA = 25C 1.7 2.8 1.7 2.8 mAPower Consumption TA = 25C

    VS = 20V 80 150 mWVS = 15V 50 85 50 85 mW

    LM741A VS = 20VTA = TAMIN 165 mWTA = TAMAX 135 mW

    LM741 VS = 15VTA = TAMIN 60 100 mWTA = TAMAX 45 75 mW

    Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device isfunctional, but do not guarantee specific performance limits.

    LM741

    www.national.com3

  • Electrical Characteristics (Note 5) (Continued)Note 3: For operation at elevated temperatures, these devices must be derated based on thermal resistance, and Tj max. (listed under Absolute MaximumRatings). Tj = TA + (jA PD).

    Thermal Resistance Cerdip (J) DIP (N) HO8 (H) SO-8 (M)jA (Junction to Ambient) 100C/W 100C/W 170C/W 195C/WjC (Junction to Case) N/A N/A 25C/W N/A

    Note 4: For supply voltages less than 15V, the absolute maximum input voltage is equal to the supply voltage.Note 5: Unless otherwise specified, these specifications apply for VS = 15V, 55C TA +125C (LM741/LM741A). For the LM741C/LM741E, thesespecifications are limited to 0C TA +70C.Note 6: Calculated value from: BW (MHz) = 0.35/Rise Time(s).Note 7: For military specifications see RETS741X for LM741 and RETS741AX for LM741A.Note 8: Human body model, 1.5 k in series with 100 pF.

    Schematic Diagram

    00934101

    LM74

    1

    www.national.com 4

  • Physical Dimensions inches (millimeters)unless otherwise noted

    Metal Can Package (H)Order Number LM741H, LM741H/883, LM741AH/883, LM741AH-MIL or LM741CH

    NS Package Number H08C

    LM741

    www.national.com5

  • Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

    Ceramic Dual-In-Line Package (J)Order Number LM741J/883NS Package Number J08A

    Dual-In-Line Package (N)Order Number LM741CN

    NS Package Number N08E

    LM74

    1

    www.national.com 6

  • Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

    10-Lead Ceramic Flatpak (W)Order Number LM741W/883, LM741WG-MPR or LM741WG/883

    NS Package Number W10A

    National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reservesthe right at any time without notice to change said circuitry and specifications.For the most current product information visit us at www.national.com.

    LIFE SUPPORT POLICYNATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMSWITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTORCORPORATION. As used herein:1. Life support devices or systems are devices or systems

    which, (a) are intended for surgical implant into the body, or(b) support or sustain life, and whose failure to perform whenproperly used in accordance with instructions for useprovided in the labeling, can be reasonably expected to resultin a significant injury to the user.

    2. A critical component is any component of a life supportdevice or system whose failure to perform can be reasonablyexpected to cause the failure of the life support device orsystem, or to affect its safety or effectiveness.

    BANNED SUBSTANCE COMPLIANCENational Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products StewardshipSpecification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no BannedSubstances as defined in CSP-9-111S2.

    National SemiconductorAmericas CustomerSupport CenterEmail: [email protected]: 1-800-272-9959

    National SemiconductorEurope Customer Support Center

    Fax: +49 (0) 180-530 85 86Email: [email protected]

    Deutsch Tel: +49 (0) 69 9508 6208English Tel: +44 (0) 870 24 0 2171Franais Tel: +33 (0) 1 41 91 8790

    National SemiconductorAsia Pacific CustomerSupport CenterEmail: [email protected]

    National SemiconductorJapan Customer Support CenterFax: 81-3-5639-7507Email: [email protected]: 81-3-5639-7560

    www.national.com

    LM741

    OperationalAmplifier

  • General DescriptionThe MAX220MAX249 family of line drivers/receivers isintended for all EIA/TIA-232E and V.28/V.24 communica-tions interfaces, particularly applications where 12V isnot available. These parts are especially useful in battery-powered sys-tems, since their low-power shutdown mode reducespower dissipation to less than 5W. The MAX225,MAX233, MAX235, and MAX245/MAX246/MAX247 useno external components and are recommended for appli-cations where printed circuit board space is critical.

    ________________________ApplicationsPortable Computers

    Low-Power Modems

    Interface Translation

    Battery-Powered RS-232 Systems

    Multidrop RS-232 Networks

    Next-Generation Device Features

    For Low-Voltage, Integrated ESD ApplicationsMAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E: +3.0V to +5.5V, Low-Power, Up to1Mbps, True RS-232 Transceivers Using Four0.1F External Capacitors (MAX3246E Availablein a UCSP Package)

    For Low-Cost Applications MAX221E: 15kV ESD-Protected, +5V, 1A,Single RS-232 Transceiver with AutoShutdown

    MA

    X2

    20

    MA

    X2

    49

    +5V-Powered, Multichannel RS-232Drivers/Receivers

    ________________________________________________________________ Maxim Integrated Products 1

    Selection Table

    19-4323; Rev 15; 1/06

    PARTMAX220CPEMAX220CSEMAX220CWE 0C to +70C

    0C to +70C0C to +70C

    TEMP RANGE PIN-PACKAGE16 Plastic DIP16 Narrow SO16 Wide SO

    MAX220C/D 0C to +70C Dice*MAX220EPEMAX220ESEMAX220EWE -40C to +85C

    -40C to +85C-40C to +85C 16 Plastic DIP

    16 Narrow SO16 Wide SO

    MAX220EJE -40C to +85C 16 CERDIPMAX220MJE -55C to +125C 16 CERDIP

    Power No. of Nominal SHDN RxPart Supply RS-232 No. of Cap. Value & Three- Active in Data RateNumber (V) Drivers/Rx Ext. Caps (F) State SHDN (kbps) FeaturesMAX220 +5 2/2 4 0.047/0.33 No 120 Ultra-low-power, industry-standard pinoutMAX222 +5 2/2 4 0.1 Yes 200 Low-power shutdownMAX223 (MAX213) +5 4/5 4 1.0 (0.1) Yes 120 MAX241 and receivers active in shutdownMAX225 +5 5/5 0 Yes 120 Available in SOMAX230 (MAX200) +5 5/0 4 1.0 (0.1) Yes 120 5 drivers with shutdownMAX231 (MAX201) +5 and 2/2 2 1.0 (0.1) No 120 Standard +5/+12V or battery supplies;

    +7.5 to +13.2 same functions as MAX232MAX232 (MAX202) +5 2/2 4 1.0 (0.1) No 120 (64) Industry standardMAX232A +5 2/2 4 0.1 No 200 Higher slew rate, small capsMAX233 (MAX203) +5 2/2 0 No 120 No external capsMAX233A +5 2/2 0 No 200 No external caps, high slew rateMAX234 (MAX204) +5 4/0 4 1.0 (0.1) No 120 Replaces 1488MAX235 (MAX205) +5 5/5 0 Yes 120 No external capsMAX236 (MAX206) +5 4/3 4 1.0 (0.1) Yes 120 Shutdown, three stateMAX237 (MAX207) +5 5/3 4 1.0 (0.1) No 120 Complements IBM PC serial portMAX238 (MAX208) +5 4/4 4 1.0 (0.1) No 120 Replaces 1488 and 1489MAX239 (MAX209) +5 and 3/5 2 1.0 (0.1) No 120 Standard +5/+12V or battery supplies;

    +7.5 to +13.2 single-package solution for IBM PC serial portMAX240 +5 5/5 4 1.0 Yes 120 DIP or flatpack packageMAX241 (MAX211) +5 4/5 4 1.0 (0.1) Yes 120 Complete IBM PC serial portMAX242 +5 2/2 4 0.1 Yes 200 Separate shutdown and enableMAX243 +5 2/2 4 0.1 No 200 Open-line detection simplifies cablingMAX244 +5 8/10 4 1.0 No 120 High slew rateMAX245 +5 8/10 0 Yes 120 High slew rate, int. caps, two shutdown modesMAX246 +5 8/10 0 Yes 120 High slew rate, int. caps, three shutdown modesMAX247 +5 8/9 0 Yes 120 High slew rate, int. caps, nine operating modesMAX248 +5 8/8 4 1.0 Yes 120 High slew rate, selective half-chip enablesMAX249 +5 6/10 4 1.0 Yes 120 Available in quad flatpack package

    For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.

    Ordering Information

    Ordering Information continued at end of data sheet.*Contact factory for dice specifications.

    AutoShutdown and UCSP are trademarks of Maxim IntegratedProducts, Inc.

  • MA

    X2

    20

    MA

    X2

    49

    +5V-Powered, Multichannel RS-232Drivers/Receivers

    2 _______________________________________________________________________________________

    ABSOLUTE MAXIMUM RATINGSMAX220/222/232A/233A/242/243

    ELECTRICAL CHARACTERISTICSMAX220/222/232A/233A/242/243(VCC = +5V 10%, C1C4 = 0.1F MAX220, C1 = 0.047F, C2C4 = 0.33F, TA = TMIN to TMAX unless otherwise noted.)

    Note 1: For the MAX220, V+ and V- can have a maximum magnitude of 7V, but their absolute difference cannot exceed 13V.Note 2: Input voltage measured with TOUT in high-impedance state, SHDN or VCC = 0V.Note 3: Maximum reflow temperature for the MAX223A is +225C.Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

    Supply Voltage (VCC) ...............................................-0.3V to +6VV+ (Note 1) ..................................................(VCC - 0.3V) to +14VV- (Note 1) .............................................................+0.3V to +14VInput VoltagesTIN..............................................................-0.3V to (VCC - 0.3V)RIN (Except MAX220) ........................................................30VRIN (MAX220).....................................................................25VTOUT (Except MAX220) (Note 2) .......................................15VTOUT (MAX220)...............................................................13.2V

    Output VoltagesTOUT...................................................................................15VROUT.........................................................-0.3V to (VCC + 0.3V)

    Driver/Receiver Output Short Circuited to GND.........ContinuousContinuous Power Dissipation (TA = +70C)

    16-Pin Plastic DIP (derate 10.53mW/C above +70C)..842mW

    18-Pin Plastic DIP (derate 11.11mW/C above +70C)..889mW20-Pin Plastic DIP (derate 8.00mW/C above +70C) ..440mW16-Pin Narrow SO (derate 8.70mW/C above +70C) ...696mW16-Pin Wide SO (derate 9.52mW/C above +70C)......762mW18-Pin Wide SO (derate 9.52mW/C above +70C)......762mW20-Pin Wide SO (derate 10.00mW/C above +70C)....800mW20-Pin SSOP (derate 8.00mW/C above +70C) ..........640mW16-Pin CERDIP (derate 10.00mW/C above +70C).....800mW18-Pin CERDIP (derate 10.53mW/C above +70C).....842mW

    Operating Temperature RangesMAX2_ _AC_ _, MAX2_ _C_ _.............................0C to +70CMAX2_ _AE_ _, MAX2_ _E_ _ ..........................-40C to +85CMAX2_ _AM_ _, MAX2_ _M_ _.......................-55C to +125C

    Storage Temperature Range .............................-65C to +160CLead Temperature (soldering, 10s) (Note 3) ...................+300C

    PARAMETER CONDITIONS MIN TYP MAX UNITSRS-232 TRANSMITTERSOutput Voltage Swing All transmitter outputs loaded with 3k to GND 5 8 VInput Logic Threshold Low 1.4 0.8 V

    All devices except MAX220 2 1.4Input Logic Threshold High

    MAX220: VCC = 5.0V 2.4V

    All except MAX220, normal operation 5 40

    Logic Pullup/lnput Current SHDN = 0V, MAX222/MAX242, shutdown,MAX220

    0.01 1A

    VCC = 5.5V, SHDN = 0V, VOUT = 15V,MAX222/MAX242

    0.01 10

    VOUT = 15V 0.01 10Output Leakage Current

    VCC = SHDN = 0VMAX220, VOUT = 12V 25

    A

    Data Rate 200 116 kbps

    Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = 2V 300 10M VOUT = 0V 7 22

    Output Short-Circuit Current VOUT = 0VMAX220 60

    mA

    RS-232 RECEIVERS30

    RS-232 Input Voltage Operating RangeMAX220 25

    V

    All except MAX243 R2IN 0.8 1.3RS-232 Input Threshold Low VCC = 5V

    MAX243 R2 IN (Note 4) -3V

    All except MAX243 R2IN 1.8 2.4RS-232 Input Threshold High VCC = 5V

    MAX243 R2 IN (Note 4) -0.5 -0.1V

  • MA

    X2

    20

    MA

    X2

    49

    +5V-Powered, Multichannel RS-232Drivers/Receivers

    _______________________________________________________________________________________ 3Note 4: MAX243 R2OUT is guaranteed to be low when R2IN is 0V or is floating.

    ELECTRICAL CHARACTERISTICSMAX220/222/232A/233A/242/243 (continued)(VCC = +5V 10%, C1C4 = 0.1F MAX220, C1 = 0.047F, C2C4 = 0.33F, TA = TMIN to TMAX unless otherwise noted.)

    PARAMETER CONDITIONS MIN TYP MAX UNITSAll except MAX220/MAX243, VCC = 5V, nohysteresis in SHDN

    0.2 0.5 1.0

    MAX220 0.3RS-232 Input Hysteresis

    MAX243 1

    V

    3 5 7RS-232 Input Resistance TA = +25C (MAX220)

    3 5 7K

    IOUT = 3.2mA 0.2 0.4TTL/CMOS Output Voltage Low

    IOUT = 1.6mA (MAX220) 0.4V

    TTL/CMOS Output Voltage High IOUT = -1.0mA 3.5 VCC - 0.2 V

    Sourcing VOUT = GND -2 -10TTL/CMOS Output Short-Circuit Current

    Shrinking VOUT = VCC 10 30mA

    TTL/CMOS Output Leakage CurrentSHDN = VCC or EN = VCC (SHDN = 0V forMAX222), 0V VOUT VCC

    0.05 10 A

    EN Input Threshold Low MAX242 1.4 0.8 V

    EN Input Threshold High MAX242 2.0 1.4 V

    Operating Supply Voltage 4.5 5.5 V

    MAX220 0.5 2

    No load MAX222/MAX232A/MAX233A/MAX242/MAX243

    4 10

    MAX220 12VCC Supply Current (SHDN = VCC),figures 5, 6, 11, 19

    3k load bothinputs MAX222/MAX232A/MAX233A/

    MAX242/MAX24315

    A

    TA = +25C 0.1 10

    TA = 0C to +70C 2 50

    TA = -40C to +85C 2 50Shutdown Supply Current

    MAX222/MAX242

    TA = -55C to +125C 35 100

    A

    SHDN Input Leakage Current MAX222/MAX242 1 A

    SHDN Threshold Low MAX222/MAX242 1.4 0.8 V

    SHDN Threshold High MAX222/MAX242 2.0 1.4 V

    MAX222/MAX232A/MAX233/MAX242/MAX243

    6 12 30

    Transition Slew Rate

    CL = 50pF to2500pF, RL = 3kto 7k, VCC = 5V,TA = +25C,measured from+3V to -3V or -3V

    MAX220 1.5 3 30.0

    V/s

    MAX222/MAX232A/MAX233/MAX242/MAX243

    1.3 3.5tPHLT

    MAX220 4 10

    MAX222/MAX232A/MAX233/MAX242/MAX243

    1.5 3.5

    Transmitter Propagation Delay TLL toRS-232 (Normal Operation), Figure 1

    tPLHTMAX220 5 10

    s

  • MA

    X2

    20

    MA

    X2

    49

    +5V-Powered, Multichannel RS-232Drivers/Receivers

    4 _______________________________________________________________________________________

    __________________________________________Typical Operating Characteristics

    MAX220/MAX222/MAX232A/MAX233A/MAX242/MAX243

    10

    8

    -100 5 15 25

    OUTPUT VOLTAGE vs. LOAD CURRENT

    -4

    -6

    -8

    -2

    6

    4

    2

    MAX

    220-

    01

    LOAD CURRENT (mA)

    OUTP

    UT V

    OLTA

    GE (V

    )

    10

    0

    20

    0.1FEITHER V+ OR V- LOADED

    VCC = 5VNO LOAD ONTRANSMITTER OUTPUTS(EXCEPT MAX220, MAX233A)

    V- LOADED, NO LOAD ON V+

    V+ LOADED, NO LOAD ON V-

    1F

    1F0.1F

    11

    10

    40 10 40 60

    AVAILABLE OUTPUT CURRENTvs. DATA RATE

    6

    5

    7

    9

    8

    MAX

    220-

    02

    DATA RATE (kbits/sec)

    OUTP

    UT C

    URRE

    NT (m

    A)

    20 30 50

    OUTPUT LOAD CURRENTFLOWS FROM V+ TO V-

    VCC = +5.25V

    ALL CAPS1F

    ALL CAPS0.1F

    VCC = +4.75V

    +10V

    -10V

    MAX222/MAX242ON-TIME EXITING SHUTDOWN

    +5V+5V

    0V

    0V

    MAX

    220-

    03

    500s/div

    V+, V

    - VOL

    TAGE

    (V)

    1F CAPSV+

    V+

    V-V-

    SHDN

    0.1F CAPS

    1F CAPS

    0.1F CAPS

    ELECTRICAL CHARACTERISTICSMAX220/222/232A/233A/242/243 (continued)(VCC = +5V 10%, C1C4 = 0.1F MAX220, C1 = 0.047F, C2C4 = 0.33F, TA = TMIN to TMAX unless otherwise noted.)

    PARAMETER CONDITIONS MIN TYP MAX UNITSMAX222/MAX232A/MAX233/MAX242/MAX243

    0.5 1tPHLR

    MAX220 0.6 3

    MAX222/MAX232A/MAX233/MAX242/MAX243

    0.6 1

    Receiver Propagation Delay RS-232 toTLL (Normal Operation), Figure 2

    tPLHRMAX220 0.8 3

    s

    tPHLS MAX242 0.5 10Receiver Propagation Delay RS-232 toTLL (Shutdown), Figure 2

    tPHLS MAX242 2.5 10

    s

    Receiver-Output Enable Time, Figure 3 tER MAX242 125 500 ns

    Receiver-Output Disable Time, Figure 3 tDR MAX242 160 500 ns

    Transmitter-Output Enable Time (SHDNGoes High), Figure 4

    tETMAX222/MAX242, 0.1Fcaps (includes charge-pumpstart-up)

    250 s

    Transmitter-Output Disable Time (SHDNGoes Low), Figure 4

    tDTMAX222/MAX242,0.1F caps

    600 ns

    MAX222/MAX232A/MAX233/MAX242/MAX243

    300Transmitter + to - Propagation DelayDifference (Normal Operation)

    tPHLT - tPLHTMAX220 2000

    ns

    MAX222/MAX232A/MAX233/MAX242/MAX243

    100Receiver + to - Propagation DelayDifference (Normal Operation)

    tPHLR - tPLHRMAX220 225

    ns

  • MA

    X2

    20

    MA

    X2

    49

    +5V-Powered, Multichannel RS