What Makes a Better I/O Driver Model? Vadim Heyfitch Cadence Design Systems, Inc. (978) 446-6455...

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What Makes a Better I/O Driver Model? Vadim Heyfitch Cadence Design Systems, Inc. (978) 446-6455 [email protected]

Transcript of What Makes a Better I/O Driver Model? Vadim Heyfitch Cadence Design Systems, Inc. (978) 446-6455...

What Makes a Better I/O Driver Model?

Vadim HeyfitchCadence Design Systems, Inc.

(978) [email protected]

Content: What are we going to discuss?

• Personal Introduction

• What is the intended audience? Who should care?

• What is an IBIS Driver model?

• Why verify?

• Model Integrity (MI) - Cadence Tool for verification, editing– What can it do?

• What to watch out for: typical problems? – Qualitative criteria of IBIS model “goodness”

What is an IBIS Driver model?

IBIS

Pull-Down

I-V

Pull-Up

I-V

PWR_Clamp

I-V

GND_Clamp

I-V

Pkg

C_comp

V-T

Why verify?

• IBIS speed ~>25x of SPICE lends it for solution space exploration (aka pre-layout analysis)

• Time spent upfront pays off

• Lots of bad IBIS models out there– Only 42% passed IBISchk3 without errors or warning

Model Integrity (MI) Module - a graphical look at IBIS

models

‘Like reading ASCII files?

Model Integrity (MI) Module – What Can It Do?

• Ibischk3 Golden Parser: GUI to navigate errors and warnings.• Visual representation and navigation of (multiple) .ibs file

structure• Editing, Sorting, …• Translation to:

– IBIS to DML

– QUAD to DML

– Espice to Spice

• Viewing curves– V-I for Pullup and Pulldown, GND_Clamp, PWR_Clamp

– V-T

Look and Feel (Physical View)

Error(s)

Warnings(s)

Look and Feel (Object View)

Navigating Errors and Warning

Click on warning message

Viewing Curves

Viewing Curves (cont’d)

What should we do to insure quality of the next IBIS model

we use in simulation?

• Check original data:1. all I-V curves (i.e., static behavior):

V-Range of I-V data: - Vcc <> + 2Vcc Pulldown I-V WITHOUT GND_clamp Pullup I-V WITHOUT PWR_clamp GND_clamp PWR_clamp

2. V-T (i.e., dynamic behavior): How many V-T curves? None, 2, 4? V-T does not contradict I-V ? dV/dT_r/f (even if V-T available)

Pullup and PWR_clamp – translating the raw data

Vcc 2Vcc-Vcc

I

Vcc 2Vcc-Vcc

IV table = Vcc – V raw

V raw

V table

PU

PC

Qualitatively Correct I-V Picture

Vcc 2Vcc-Vcc

I

V

PU

PD

PWR

GND

Error: Clamp Diode Current – not subtracted

What’s wrong with this picture?

Clamp Diode Current – properly subtracted

PVT variation

Vcc 2Vcc-Vcc

I

V

Slow

Typical

Fast

All I-V info at once- textbook example

Suspiciously Looking Model

+ Vcc

V-T: dynamic behavior

[Ramp]| variable typ min maxdV/dt_r 1.518V/360.974ps 1.260V/534.096ps 1.731V/327.019psdV/dt_f 1.759V/167.287ps 1.579V/534.096ps 1.928V/155.338psR_load = 50.0000

Required:

80%

20%

V-T

DC levels must correlate to I-V curves

Optional:

Driving in to Configurable Load

What do simulators do with an IBIS model?

• Simulator specific

• If 4 V-T available (Rising and Falling w/f into pull-up and pull-down R_fixture) – it’s the best! Can extrapolate between I-V curves.

• Read the last two papers listed in references.

Sources of useful info

• Papers to read:– “Assessing and Improving the Quality of IBIS models”,

SiSoft, Inc.– “IBIS Behavioral Models”, Micron’s Technical Note TN-00-07.– “Correlating IBIS and Hspice Buffer Models”, Todd Westerhoff,

CISCO Systems.– “A Critique of IBIS Models Available For Download on the Web:

Part 1”, SiQual Inc., Jan. 22, 2002.– “Introduction to IBIS Modeling of Fiber Optic Transceivers”, Mark

Chang, Agilent Technologies.– “Extraction of Transient Behavioral Model of Digital I/O Buffers from

IBIS”, P.F.Tehrani, Y.Chen, J.Fang, 1996.– “The Development of Analog SPICE Behavioral Model Based on IBIS

Model”, Y.Wang, H.N.Tan, 1999.

What have we talked about today?

• What is an IBIS Driver model?• Why verify? • Model Integrity (MI) - Cadence Tool for verification,

editing– What can it do?

• What to watch out for: typical problems? – Qualitative criteria of IBIS model “goodness”

• Pointed to sources for further reading