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Transcript of ugecodd.files.wordpress.com · Web viewMr. Sanjay Chauhan for providing us the full laboratory...
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A minor project report
on
College Bell
Submitted in partial fulfillment of the requirements
for the degree of
BACHELOR OF ENGINEERING
IN
ELECTRONICS AND COMMUNICATION ENGINEERING
By
XYADDSH
DBSKJFHSJK
Guided by
Dharmendra Patel
Associate professor, EC department
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CERTIFICATE
This is to certify that the B.E. Minor Project Report entitled “Seven Segment Display”
submitted by ASAKDJKHDSK and DSFHSJDCHJSDH towards the partial fulfillment of the
requirements for the Sem. 5th of Bachelor of Engineering ( Electronics & Communication ) of
Hasmukh Goswami college of engineering, Gujarat technological University, Vahelal , is the record
of the work carried under our supervision and guidance. The work submitted has in our opinion
reached a level required for being accepted for examination. The result embodied in this dissertation-
project work to the best of our knowledge has not been submitted to any other University or Institute
for the award of any degree or diploma.
Date:
Place:
Project Guide:
Mr. Dharmendra Patel
Associate professor
Electronics & Communication Engineering,
Hasmukh Goswami college of engineering
Head of Department:
Mr. Ketan Patel
Head of Department
Electronics & Communication Engineering,
Hasmukh Goswami college of engineering
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ACKNOWLEDGEMENT
We express our gratitude and appreciation for all those with whom we worked and
interacted at Hasmukh Goswami College of Engineering, Vahelal, and thank all of them for their
help and co-operation.
First and foremost we would like to express our heartily gratitude to Mr. Dharmendra Patel,
associate professor of EC department, Hasmukh Goswami College of Engineering, for giving us the
permission and providing the facilities for completing this project.
We are also thankful to Mr. Anand Patel and Miss. Bhumika Leuva and Mr. Ketan Patel
for providing us the guidance to carry out the project work. We also gratefully acknowledge Mr.
Harsh Patel and Mr. Sanjay Chauhan for providing us the full laboratory support at Lab.
Finally, we would like to thank entire staff of EC Department, Hasmukh Goswami College of
engineering, Ahmedabad.
JKDHSKJHDJAS
FDBKJHSKJH
B.E., EC department
Hasmukh goswami college of engineering, Ahmedabad
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ABSTRACT
This Project takes over the task of Ringing of the Bell in Colleges. It replaces the Manual Switching
of the Bell in the College. It has an Inbuilt Real Time Clock which track over the Real Time. When
this time equals to the Bell Ringing time, then the Relay for the Bell is switched On. The Bell
Ringing time can be Edited at any Time, so that it can be used at Normal Class Timings as well as
Exam Times. The Real Time Clock is displayed on four 7-segment display. The Microcontroller is
used to control all the Functions, it get the time through the keypad and store it in its Memory. And
when the Real time and Bell time get equal then the Bell is switched on for a predetermined time.
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Table of ContentsList of figure
List of table
Chapter 1. INTRODUCTION ABOUT SEVEN SEGMENT DISPLAY
Chapter 2. INTRODUCTION ABOUT MICROCONTROLLER (8051)
Chapter 3. INTRODUCTION ABOUT REAL TIME CLOCK (RTC) (DS12887)
Chapter 4. INTRODUCTION ABOUT BCD TO SEVEN SEGMENT DRIVER (HCT4511)
Chapter 5. DESIGN DETAILS OF COLLEGE BELL
Chapter 6. PROGRAM OF THE COLLEGE BELL
Chapter 7. CONCLUSION
Chapter 8. REFRENCES
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List of figures
1.1 Common Anode connection.
1.2 Common cathode connection.
1.3 Pin diagram of seven segment display.
1.4 3D view of seven segment display.
2.1 pin diagram of microcontroller (8051).
3.1 Pin diagram of RTC (DS12887).
4.1 Pin diagram of BCD to seven segment driver (HCT4511).
5.1 Circuitry of the college bell.
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List of Tables
Table 2.1 Pin functions of port 3
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CHAPTER 1
INTRODUCTION OF SEVEN SEGMENT DISPLAY In segmental display it is usual to employ a single LED for each segment. For a
conventional seven segment LED displays the wiring pattern is simplified by making one terminal
common to all the LEDs and other terminal corresponding to the different segments. The terminal
can be either of the common anode (CA) form or common cathode (CC) form shown in the figure
1.1 and figure 1.2. Same type of seven segment display we can make it in multi digit. Multi-digit
display system may be static or dynamic.
Common anode type displays require an active low or current sinking configuration for
code converter circuitry. Whereas an active high or current sourcing output circuit is necessary for
common cathode LED type display. Both multi-digit and segmental displays require a code
convertor; one code convertor per character for static display systems and single code convertor for
time shared and multiplexed dynamic display systems, which are illuminated one at a time. For
single digit display (which we are going to construct) there is no need to connect the code convertor.
Fig-1.1 Common anode connection Fig-1.2 Common cathode connection
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Fig-1.3 Pin diagram of Seven Segment Display
Fig-1.4 3D view of Seven Segment Display
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CHAPTER 2
INRODUCTION ABOUT MICROCONTROLLER (8051) The 8051 microcontroller is very efficient device and generally it is used to make the control of I/O requiring minimum nuber of components. It is one type of computer which contains everything in it. Microcontroller based system requires less hardware. The features of mocrocontroller is given below
Features of 8051:
1. 8 bit CPU optimized for control application.
2. 4KB of on chip program memory.
3. 128 byte of on chip data memory.
4. 64KB program external ROM and 64KB external RAM addressability.
5. 32 bidirectional and individually addressable I/O line arranged as four 8 bit ports P0-P3.
6. Two 16 bit timers/counters.
7. Full duplex serial data transmitter/receiver.
8. Four register banks.
9. 8 bit program status word and stack pointer.
10. Interrupt structure with two priority levels.
11. On chip oscillator and clock circuits. Fig 2.1 pindiagram of microcontroller (8051)
12. Direct bit and bte addressability.
13. Binary or decimal arithmatic.
14. Signed-overflow detection and parity computation.
15. Integrated boolean processor for control applications.
16. Full depth stack for subroutine return linkage and data storage.
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Pin Functions of 8051:
Vcc: Supply voltage.
GND: ground.
Port 0:
It is an 8 bit open drain bidirectional I/O port.
As an output port each pin can sink TTL inputs.
When 1s are written to port0 pins, the pins can be used as the high impedence inputs.
Port0 may also be configured to be the multiplexed low order address?data bus during accesses to external program and data memory.
Pory0 also receives the code bytes during Flash Programming and outputs the code bytes during program verification.
Port 1:
It is an 8 bit bidirectional I/O port with internal puu ups.
The port 1 output buffers can sink/sources four TTL inputs.
When 1s are written to port 1 pins are pulled high by the internal puu-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will sources current because of the internal pull ups.
Port 2:
It is an 8 bit bidirectional I/O port with internal puu ups.
The port 2 output buffers can sink/sources four TTL inputs.
When 1s are written to port 2 pins are pulled high by the internal puu-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will sources current due to internal pull ups.
Port 3:
It is an 8 bit bidirectional I/O port with internal puu ups.
The port 3 output buffers can sink/sources four TTL inputs.
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When 1s are written to port 3 pins are pulled high by the internal puu-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will sources current due to internal pull ups.
Port 3 also serves various other functions as listed below.
P3.0 RXD (serial input port)
P3.1 TXD (serial output port)
P3.2 INT0 (external interrupt)
P3.3 INT1 (external interrupt)
P3.4 T0 (Timer/Counter 0 external input)
P3.5 T1 (Timer / Counter 1 external input)
P3.6 WR (External data memory write strobe)
P3.7 RD (External data memory read strobe)
Table 2.1 Pin functions of port 3
RST:
A high on this input pin for two machine cycle, while the oscillator is running resets the device.
ALE/PROG(1/0):
Address latch enable output pulse for latching the low byte of address during the access to external memory.
This pin is also program pulse input(PROG) during Flash programming. When 8051 is switched ON, it checks this pin . If this pin is given to logic ‘0’ externally, it enters into flash programming mode, else it enters into normal execution mode.
In normal opration ALE is emitted at constant rate of1/6 of the oscillator frequency, and may be external clocking or timing purpose.
If desired ALE operation can be disabled by setting bit 0 of SFR location 8EH. When the bit set, ALE is activate only during some instructions like MOVX and MOVC.
PSEN (logic 0):
Program strobe enable is the read strobe to external program memory.
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When 8051 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.
EA/VPP (0/1):
External access enable. EA must be strapped to ground in order to enable the device to fetch cod from external program memory locations starting from 0000H to 0FFFH.
EA should be strapped to VCC for fetching from internal program memory.
This pin also receives 12V, programming enable voltage (VPP), during flash programming.
XTAL 1:
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL 2:
Output from the inverting oscillator amplifier. A erystal may be connected between XTAL1 and XTAL2 pins.
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CHAPTER-3
INTRODUCTION ABOUT REAL TIME CLOCK (RTC) (DS12887)
The DS12887 Real Time Clock plus RAM is designed to be a direct replacement for theDS1287.The
DS12887 is identical in form, fit, and function to the DS1287, and has an additional 64 bytes of
general purpose RAM. Access to this additional RAM space is determined by the logic level
presented on AD6 during the address portion of an access cycle. A lithium energy source, quartz
crystal, and write protection circuitry are contained within a 24–pin dual in-line package. As such,
the DS12887 is a complete subsystem replacing 16 components in a typical application. The
functions include a nonvolatile time–of–day clock, an alarm, a one-hundred–year calendar,
programmable interrupt, square wave generator, and 114 bytes of nonvolatile static RAM. The real
time clock is distinctive in that time–of–day and memory are maintained
even in the absence of power.
Pin functions of DS12887:
MOT (Mode Select) – The MOT pin offers the flexibility to choose
between two bus types. When
connected to VCC, Motorola bus timing is selected. When connected to
GND or left disconnected, Intel bus timing is selected. The pin has an fig 3.1 pin diagram of RTC
internal pulldown resistance of approximately 20 k.
SQW (Square Wave Output) – The SQW pin can output a signal from one of 13 taps provided by
the15 internal divider stages of the Real Time Clock. The frequency of the SQW pin can be changed
byprogramming Register A as shown in Table 1. The SQW signal can be turned on and off using the
SQWE bit in Register B. The SQW signal is not available when VCC is less than 4.25 volts, typically.
AD0–AD7 (Multiplexed Bidirectional Address/Data Bus) – Multiplexed buses save pins because
address information and data information time-share the same signal paths. The addresses are
presentduring the first portion of the bus cycle and the same pins and signal paths are used for data
in the second portion of the cycle. Address/data multiplexing does not slow the access time of the
DS12887 since the bus change from address to data occurs during the internal RAM access time.
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Addresses must be valid prior to the falling edge of AS/ ALE, at which time the DS12887 latches the
address from AD0 to AD6. Valid write data must be present and held stable during the latter portion
of the DS or WR pulses. In a read cycle the DS12887 outputs 8 bits of data during the latter portion
of the DS or RD pulses. The read cycle is terminated and the bus returns to a high impedance state as
DS transitions low in the case of Motorola timing or as RD transitions high in the case of Intel
timing.
AS (Address Strobe Input) – A positive-going address strobe pulse serves to demultiplex the
bus.The falling edge of AS/ALE causes the address to be latched within the DS12887. The next
rising edge that occurs on the AS bus will clear the address regardless of whether CS is asserted.
Access commands should be sent in pairs.
DS (Data Strobe or Read Input) – The DS/RD pin has two modes of operation depending on the
level of the MOT pin. When the MOT pin is connected to VCC, Motorola bus timing is selected. In
this mode DS is a positive pulse during the latter portion of the bus cycle and is called Data Strobe.
During read cycles,DS signifies the time that the DS12887 is to drive the bidirectional bus. In write
cycles the trailing edge of DS causes the DS12887 to latch the written data. When the MOT pin is
connected to GND, Intel bus timing is selected. In this mode the DS pin is called Read (RD ).RD
identifies the time period when the DS12887 drives the bus with read data. The RD signal is the same
definition as the Output Enable (OE ) signal on a typical memory.
R/W (Read/Write Input) – The R/ W pin also has two modes of operation. When the MOT pin is
Connected to VCC for Motorola timing, R/ W is at a level which indicates whether the current cycle is
a read or write. A read cycle is indicated with a high level on R/ W while DS is high. A write cycle is
Indicated when R/ W is low during DS. When the MOT pin is connected to GND for Intel timing, the
R/ W signal is an active low signal called WR. In this mode the R/W pin has the same meaning as the
Write Enable signal (WE) on generic RAMs.
CS (Chip Select Input) – The Chip Select signal must be asserted low for a bus cycle in the
DS12887 to be accessed. CS must be kept in the active state during DS and AS for Motorola timing
and during RD and WR for Intel timing. Bus cycles which take place without asserting CS will latch
addresses but no access will occur. When VCC is below 4.25 volts, the DS12887 internally inhibits
access cycles by internally disabling the CS input. This action protects both the real time clock data
and RAM data during power outages.
IRQ (Interrupt Request Output) – The IRQ pin is an active low output of the DS12887 that can be
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used as an interrupt input to a processor. The IRQ output remains low as long as the status bit
causing the interrupt is present and the corresponding interrupt–enable bit is set. To clear the IRQ
pin the processor program normally reads the C register. The RESET pin also clears pending
interrupts.When no interrupt conditions are present, the IRQ level is in the high impedance state.
Multipleinterrupting devices can be connected to an IRQ bus. The IRQ bus is an open drain output
and requires an external pullup resistor.
RESET (Reset Input) – The RESET pin has no effect on the clock, calendar, or RAM. On power–
up the RESET pin can be held low for a time in order to allow the power supply to stabilize. The
amount of time that RESET is held low is dependent on the application. However, if RESET is used
on power–up, the time RESET is low should exceed 200 ms to make sure that the internal timer that
controls the DS12887 on power-up has timed out
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CHAPTER 4INTRODUCTION TO BCD TO SEVEN SEGMENT DRIVER
Here the seven segment driver IC is used for the driver of seven segment display and du to this drive
IC we should not use the transistors and resistors for the
protection of the seven segment display’s LED. We can
also use it as the BCE to seven segment diaplay converter
because the input to this IC is the decimal and we got the
segmented output.Here in the fig4.1 the pin diagram of
the IC HCT4511 is shown. And the feature of this IC and
the pin description is given below.
FEATURES:
Latch storage of BCD inputs
Blanking input
Lamp test input
Driving common cathode LED displays fig 4.1- pin diagram of HCT4511
Guaranteed 10 mA drive capability per output
Output capability: non-standard
ICC category: MSI
High Speed Operation: tpd (A, B, C, D to a – g) = 31 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)
PIN DISCRIPTION:
D1, D2, D3, D4: These are the BCD input pins where we give the input (0 to 9) from any sysem or
manually.
Qa, Qb, Qc, Qd, Qe, Qf, Qg: these are the segmented output of the seven segment driver.From here we
can get the output of seven segment adn we can connect the seven segment display.By giving BCD
input we can get the segmented output.
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Vcc: Here we have to give the positive supply voltage for the working of the internal circuitary.
Genarally we are giving the +5V supply voltage at this pin.
GND: Here we are connecting this pin to the ground level.
CHAPTER 5DESIGN DETAIL OF COLLEGE BELL
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Here we will see the circuitry of the college bell and the function of this circuit. The circuit of the
college bell is shown in fig 5.1 using the microcontroller (8051), RTC (DS12887), BCD to seven
segment driver (HCT 4511) and common cathode seven segment display.
Here in this circuit the RTC’s address and data lines are connected to port 0 of microcontroller.
Interrupt request pin is connected to external interrupt request pin of the microcontroller. The Data
Strobe of the RTC is connected to the read (P3.7) pin of microcontroller. And the address strobe pin
of RTC is connected to ALE/PROG pin of the microcontroller. Chip select pin is connected to
ground to select the chip always.MOT pin is also connected to ground to select the Intel bus timing.
Here we have connected the four switches S1, S2, S3, S4 on pins of port 2 in the sequence of P2.0,
P2.1, P2.2, and P2.3. and one switch is also connected for the exit of the first initialization of the
time whenever you will press this switch you will exit from the initialization and the auto update of
the clock will start.
Now on the pins of port P1 we have connected the HCT4511’s D1, D2, D3, D4 pins on the port pins
P1.0, P1.1, P1.2, and P1.3. And the pins Qa, Qb, Qc, Qd, Qe, Qf, Qg are connected to common cathode
seven segment display accordingly. And there is four number of seven segment displays are
multiplexed. And their common terminal cathode is connected to P3.0, P3.1, P3.3 and P3.4.
In the microcontroller the RESET circuitry, ground terminal, crystal oscillator and +VCC are
connected as shown in figure5.1.
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CHAPTER 6
PROGRAM OF THE COLLEGE BELLProgram:
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CHAPTER 7
CONCLUSIONFrom this project we knew that how RTC and BCD to seven segment driver (IC) works. We have
concluded that this application is very useful to us where we want to get the warning bell after the
fix time. It has an Inbuilt Real Time Clock which track over the Real Time. When this time Equals
to the Bell Ringing time, then the Relay for the Bell is switched On.
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CHAPTER 8
REFERENCES1) Microcontroller and interfacing, By U.S.Shah and H.G.Narula. Techmax Publication
2) The 8051 microcontroller and embedded systems, By Muhammad Ali Mazidi. Pearson
publication.
3) The 8051 microcontroller, by Kenneth.J.ayala, West Publishing Company.
4) www.alldatasheet.com
5) www.8052.com
6) www.8051projects.com
7) www.electronicprojects.com