8/9/2019 Waterloo Research Statment

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I still remember the childlike elation I felt upon successfully developing the Cat and Mouse

game on LED Matrix for my course project in Digital Logic Circuits. dmittedly! it "as not the

finest piece of digital logic hard"are that I "ould build but it "as a starting point for my

academic aspirations to"ards Embedded #ystems. I have been actively engaged in research

"ork! and only recently I submitted a paper on $ %rame"ork for Code&Level 'o"er estimation

of Embedded 'rocessors( at reno"ned journal! )IE* Computers and Digital *echni+ues,.

My first! hands on experience in microcontroller programming! "as in my sophomore year

course on )Microcontrollers and Interfacing, for "hich I built a ma-e solving robot on a 'IC

platform. n opportunity to further nurture my aptitude for embedded systems came in the form

of my course project for )EE /01 Digital #ystem Design, "hile "orking "ith field

programmable gate arrays 2%'34. I implemented a digital signal synthesi-er 2D##4 "hich

generated variable magnitude and fre+uency output signals of various "aveforms. I found this

project fascinating as I learnt ho" any analog "aveform could potentially be generated using

samples. I also opted for a graduate level course )EE 5//1 Embedded #ystems,! "hich gave me

an insight in the "orkings of real time operating system 26*7#4 and its role in mission&critical

embedded applications.

*o understand the rigors of research and to enhance my theoretical skills in the field of

embedded systems! I have been "orking as 6esearch ssociate "ith Dr. deel 'asha for the past

six months. My "ork is based on Code&level 'o"er estimation of Embedded #oft&core

Microprocessors. In this research! I developed a tool to calculate the average po"er consumed by

an assembly code for a specific target machine. *he tool comprises of a high&level po"er

estimation module that uses a custom made assembly code parser. It takes assembly code

description of an algorithm to be run on the target processor as input and returns the estimated

cumulative computation po"er for the MI'# 6/888! LE79:! and openM#':8 soft&core

processors. *he second part of our tool consists of an instruction&level po"er estimation modulethat creates databases of average po"er consumptions of different instructions from the MI'#!

LE79: and openM#':8 Instruction #et rchitectures 2I#s4 "hich can be easily extended to

other soft&core processor I#s making our frame"ork scalable. *he advantage of our proposed

tool is that it gives the estimated po"er "ithout lo"&level calculations for each instruction

execution! rendering a faster and more programmer&friendly solution "hen compared to the

actual po"er estimation at hard"are level. I have gained considerable insight on the architecture

and po"er optimi-ations of soft core processors on %'3. *his has led me to develop a po"er

a"are compiler for MI'# "hich is under"ay.

I feel that the M#c program in Electrical and Computer Engineering at ;aterloo