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ECE 2222- Digital Design LabCourse Instructor: Ms. Saba Zia

Week 8: Control and Datapath Design

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Binary Information Binary information stored in a digital system can be categorized as

Data

Control

Data information is manipulated by performing data-processing operationslike arithmetic, logic, shift etc.

These operations are usually implemented using adders, decoders,

multiplexers, counters, shift registers etc.

Control Information provide command signals that coordinate and execute

the various operations

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Control & DATAPATH Logic Design of a digital circuit can be divided into two distinct parts

One part that is concerned with the design of digital circuits that perform the data

processing operations

The other part is concerned with the design of control circuits that determine thesequence in which various operations are performed

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Design Units

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Control Control logic that generates signals for sequencing of operations in the

datapath unit is an Algorithmic State Machine (ASM)

In a given state the outputs of Control are inputs to the Datapath

Depending on the status of Datapath and external inputs, Control decides to

go into next state or initiate another operation

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Binary Multiplication

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23 10111

19 10011

10111

10111

00000

00000

10111

437 110110101

multiplicand

multiplier

Product

Partial Products

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Algorithm (Dry Run)

Multiplier in Q

Q[0] = 1; add B

First Partial Product

Shift Right CAQ

Q[0] = 1; add B Second Partial Product

Shift Right CAQ

Q[0] = 0; shift right CAQ

Q[0] = 0; shift right CAQ

Q[0] = 1; add B

Fifth Partial Product

Shift Right CAQ

Final Product in AQ

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Multiplicand B = 10111 C A Q P

0 00000 10011 101

10111

0 10111 100

0 01011 11001

101111 00010 011

0 10001 01100

0 01000 10110 010

0 00100 01011 001

10111

0 11011 000

0 01101 10101

01101 10101

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ASM Chart

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S_idle

S_add

Decr_P

S_shift

Shift_regs

start

Q[0]

Zero

Add_regs

1

1

1

A

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Datapath of Multiplier

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Block Diagram of Multiplier

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Controller Datapath

Load_regs

Shift_regs

Dec_P

Start

Multiplicand Multiplier

Product

Zero (P == 0)

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Verilog Coding

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Verilog Coding

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Simulation

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