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DIGITAL LOGIC DESIGN LABORATORY MANUAL

Lab Instructor:

Engr. Umber Shafiq

COMSATS Institute of Information TechnologyAttock Campus

Digital Logic DesignEE-000

Lab Manual

Name: _________________________________________

Reg. No:___________ Section: _________ Group: ______

COMSATS Institute of Information Technology Attock Campus

Prepared by: Engr. Umber ShafiqChecked by:Date:

Safety Measures

PREVENT ACCIDENTS: FOLLOW THIS ADVICE

1. Never hurry. Work deliberately and carefully.2. Connect to the power source LAST.3. If you are working with a lab kit that has internal power supplies, turn the main power

switch OFF before you begin work on the circuits. Wait a few seconds for power supply capacitors to discharge. These steps will also help prevent damage to circuits.

4. If you are working with a circuit that will be connected to an external power supply, turn the power switch of the external supply OFF before you begin work on the circuit.

5. Check circuit power supply voltages for proper value and for type (DC, AC, frequency) before energizing the circuit.

6. Do not run wires over moving or rotating equipment, or on the floor, or string them across walkways from bench-to-bench.

7. When using large electrolytic capacitors be sure to wait long enough (approximately five time constants) for the capacitors to discharge before working on the circuit.

8. All conducting surfaces intended to be at ground potential should be connected together.

BASIC ELECTRICAL SAFETY PRACTICES

The Institute requires everyone who uses electrical equipment to understand these safety precautions.

A. Safe Work Practices

1. Don’t remove the protective cover of an equipment to replace a part, adjust or troubleshoot. Ask a qualified person to do the work

2. Don't use an electrical outlet or switch if the protective cover is ajar, cracked or missing. 3. Only use DRY hands and tools and stand on a DRY surface when using electrical

equipment, plugging in an electric cord, etc.4. Never put conductive metal objects into energized equipment.5. Always pick up and carry portable equipment by the handle and/or base. Carrying

equipment by the cord damages the cord's insulation.6. Unplug cords from electrical outlets by pulling on the plug instead of pulling on the cord.7. Use extension cords temporarily. The cord should be appropriately rated for the job.8. Use extension cords with 3 prong plugs to ensure that equipment is grounded.

9. Never remove the grounding post from a 3 prong plug so you can plug it into a 2 prong, wall outlet or extension cord.

10. Re-route electrical cords or extension cords so they aren't run across the floor, under rugs or through doorways, etc. Stepping on, pinching or rolling over a cord will break down the insulation and will create shock and fire hazards.

11. Don't overload extension cords, multi-outlet strips and wall outlets.12. Heed the warning signs, barricades and/or guards that are posted when equipment or

wiring is being repaired or installed or if electrical components are exposed.

B. Check for Unsafe Conditions (either before or while you're using equipment)

1. Is the cord's insulation frayed, cracked or damaged, exposing the internal wiring?2. Are the plug's prongs bent, broken or missing, especially the third prong?3. Is the plug or outlet blackened by arcing?4. Was liquid spilled on or around the equipment?5. Are any protective parts (or covers) broken, cracked or missing?6. Do you feel a slight shock when you use the equipment?7. Does the equipment or the cord overheat when it is running?8. Does the equipment spark when it is plugged in or when switches or controls are used?

C. If you observe any of these unsafe conditions:

1. Don't use (or stop using) the equipment.2. Immediately report the problem to the Lab Instructor or person In-charge of the lab.

I have read and understood the safety practices. I will observe and follow the safety practices and perform lab experiments without compromising my or others safety.

Name: __________________________________________

Signature: __________________ Date: ______________

Table of Contents

Lab No.

Lab Title Page

Lab # 1 Introduction to ePAL trainer and basic ICs. 01-08

Lab # 2

Lab # 3

Verify basic gate truth tables- To check the operation of OR gate according to the OR truth table, using

the IC 74LS32.- To check the operation of NOT gate according to the NOT truth table,

using the IC 74LS04.- To check the operation of AND gate according to the AND truth table,

using the IC 74LS08.- To check the operation of NAND gate according to the NAND truth table,

using the IC 74LS00.- To check the operation of NOR gate according to the NOR truth table,

using the IC 74LS02.- To check the operation of XOR gate according to the XOR truth table

using the IC 74LS86. Combinational Logic circuit

- Usage of NAND as universal gate and Boolean function implementation- To check the operation of XOR gate, using NAND gate IC- To check the operation of OR gate, using NAND gate IC- To check the operation of NOT gate, using NAND gate IC

09-16

17-24

Lab # 4 Introduction to Lab View and Comparison of two Boolean numbers using IC 74LS85

25-28

Lab # 5 Half Adder and Full Adder operations 29-32

Lab # 6 Half-subtractor and full-subtractor operations 33-36

Lab # 7 BCD-to-Seven Segment Display decoder circuit 37-41

Lab # 8

Lab # 9

The operation of decoder by using IC 74LS08 and IC74LS04The operation of priority encoder using IC 74LS148 and through K-maps and Boolean Logic.

42-43

44-48

Lab # 10 Verifying the operation of multiplexer by using IC 74LS04, IC 74LS08 and IC74LS32

49-50

Lab # 11 Verifying the operation of Demultiplexer by using IC 74LS138 51-54

Lab # 12 To check the operation of basic RS- flip flop using IC 74LS00 55-56

Lab # 13 To check the operation of clocked RS-flip flop using IC 74LS00 57-58

Lab # 14 To check the operation of J – K flip-flop using IC 74LS00 and 74LS10 59-60

Lab # 15 Two stage binary ripple up counter. 60-61

Lab # 16 Project Discussion and Help

INTRODUCTION

Binary logic consists of binary variables and logical operations. The variables are designated by letters of the alphabet such as A, B, C, x, y, z, etc., with each variable having two and only two distinct possible values: 1 and 0. There are three basic logical operations: AND, OR, and NOT.

1. AND: This operation is represented by a dot or by the absence of an operator. For example, x.y= z or xy = z is read "x AND y is equal to z." The logical operation AND is interpreted to, mean that z = 1 if and only if x = 1 and y = 1; otherwise z = 0. (Remember that x, y, and z are binary variables and can be equal either to 1 or 0, and nothing else.)

2. OR: This operation is represented by a plus sign. For example, x + y = z is read "x OR y” is equal to z," meaning that z = 1 if x = 1 or if y = 1 or if both x = 1 and y = 1. If both x and y = 0, then z = 0.

3. NOT: This operation is represented by a prime (sometimes by a bar). For example, x' = z meaning that z is what x is not. In other words, if x = 1, then z = 0; but if x = 0, then z = 1. Similarly x’ = 1(is read "not x is equal to 1") implies that x=0.

Binary logic resembles binary arithmetic, and the operations AND and OR have some similarities to multiplication and addition, respectively. In fact, the symbols used for AND and OR are the same as those used for multiplication and addition. However, binary logic should not be confused with binary arithmetic. One should realize that an arithmetic variable designates a number that may consist of many digits. A logic variable is always either a 1 or a 0. For example, in binary arithmetic, we have 1 + 1 = 10 (read: "one plus one is equal to 2"), whereas in binary logic, we have 1 + 1= 1 (read: “one OR one is equal to one”).

For each combination of the values of x and y, there a value of z specified by the definition of the logical operation. This definition may be listed in a compact form using truth tables. A truth table is a table of all possible combinations of the variables showing relation between the values that the variables may take and the result of the operation.

Laboratory Hand Book

LAB # 1Introduction to ePAL trainer and basic ICs

Objective:

To become familiar with the components of the trainer board used in the digital experiments

To become familiar with the different types of Integrated Circuits (ICs), their use and pin number reading.

Equipment Required:

74LS00 (Quad 2-input NAND gate IC) 74LS04 (Hex Inverter IC) Tools: 1. EPAL 27 2. Cutter 3. Single Core Wire 4. Pair of Strippers

Introduction to EPAL:

Safety and Handling IssuesIt is utmost recommended that you must clean and dry up your hands before you start working on ePAL. This can avoid depositing, hand carrier materials between contacts and therefore avoid short circuiting. Although ePAL has been fused properly for all power supply levels and easily replaceable but you must avoid falling naked patching wires or conducting materials on ePAL.

Before you power up the ePALAll the slide switches on ePAL are in OFF state when they are pushed down and ON otherwise. Turn the power supply slide switches to OFF position and insert the external power supply male jack in the female power jack on ePAL. Then turns the power supply switches in ON state.

Key Functional Blocks of EPAL

Power SupplyThe power supply specifications are

- PIN3 +5V ---- 5A- PIN5 +15V ---- 2A- PIN4 -15V ---- 0.8A

Digital Logic Design 1


- PIN1, 2 COMMON GNDThe power supply voltages are available on the left half of ePAL on headers as shown in figure 8 from where it can be extended through jumper wire to any desired circuit. We will be using +5V in most of our experiments. ePAL is provided with a variable power supply ranging from 0 to ±15V. The output for the variable power supply is provided both on interface header and Molex connector.Figure 11 shows the location of variable supply knobs and interface headers.

FusesePAL is protected with fuses for +15V, -15V and +5V which are easily replaceable. None of the fuses allow passing more than 250mA of current.

Function GeneratorThe function generator consists of a function generator IC (XR2206CP), slide switches, knobs and RVs. All the knobs on the function generator panel increments the value in clock wise direction and the slide switches activate when they are pushed up.The fine frequency tuning is the only knob in the function generator which increments in anti clockwise direction and vice versa.

Sinusoidal, square and triangular waveforms within variable frequency range of 0.1 Hz to 300 kHz variable.

Seven Segment Display:

Two 7-segment displays with BCD input sockets are provided on the trainer board. When binary inputs are provided at the input sockets below each display, the decimal equivalent of the BCD input is displayed.

Logic Probe: Logic probe, with two LEDs, has been made available to monitor logic levels in any circuit. The probe can be connected to any point on the circuit under test and either one of the two LEDs will glow to indicate the status. If Red LED glow, the point under test is at high logic and if Green LED glows, the point is at low logic.

Breadboard: Breadboard for patching digital circuits is provided on the trainer board. As each circuit has to be implemented on the breadboard, so a detail description of the breadboard structure is given below.



Key Functional Blocks of EPAL

The functional blocks on ePAL directly or indirectly support experiments related to analog anddigital electronics



BreadboardIn general the breadboard consists of two terminal strips and two bus strips (often broken in the centre). Each bus strip has two rows of contacts. Each of the two rows of contacts is a node. That is, each contact along a row on a bus strip is connected together (inside the breadboard). Bus strips are used primarily for power supply connections, but are also used for any node requiring a large number of connections. Each terminal strip has 60 rows and 5 columns of contacts on each side of the centre gap. Each row of 5 contacts is a node. You will build your circuits on the terminal strips by inserting the leads of circuit components into the contact receptacles and making connections with wire. It is a good practice to wire +5V and 0V power supply connections to separate bus strips.

Figure 1-2 Breadboards

Figure: The shaded lines indicate connected holes.

Integrated CircuitAn integrated circuit (IC) is a group of components which may include resistors, low value capacitors and transistors printed on a silicon chip. The individual components of the I.C make up a commonly used circuit. The circuits can range from simple voltage regulators to audio chips for a head unit to a microprocessor for a computer. The chip is packaged in a plastic holder with pins spaced on a 0.1" (2.54mm) grid which will fit the holes on breadboards. Very fine wires inside the package link the chip to the pins.


http://www.bcae1.com/diodes.htm

http://www.bcae1.com/capacitr.htm

http://www.bcae1.com/resistrs.htm


61e5d045Pin NumbersThe pins are numbered anti-clockwise around the IC (chip) starting near the notch or dot. The diagram shows the numbering for 14-pin ICs, but the principle is the same for all sizes. Sometimes the chip manufacturer may denote the first pin by a small indented circle above the first pin of the chip. Remember that you must connect power to the chips to get them to work.

Figure 1-3 74LS04 Inverter

DatasheetsDatasheets are available for most ICs giving detailed information about their ratings and functions. In some cases example circuits are shown.

Logic ICs (Chips)Logic chips process digital signals and there are many devices, including logic gates, flipflops, shift registers, counters and display drivers. They can be split into two groups according to their pin arrangements: the 4000 series and the 74 series which consists of various families such as the 74HC, 74HCT and 74LS.



The table below summarizes the important properties of the most popular logic families:Table 1-1

Property 4000 Series 74 Series74HC

74 Series74HCT

74 Series74LS

Technology CMOS High-speed CMOSHigh-speed CMOSTTL compatible

TTL Low-power Schottky

Power Supply 3 to 15V 2 to 6V 5V ±0.5V 5V ±0.25V

Inputs

Very high impedance. Unused inputs must be connected to +Vs or 0V. Inputs cannot be reliably driven by 74LS outputs unless a 'pull-up' resistor is used (see below).

Very high impedance. Unused inputs must be connected to +Vs or 0V. Compatible with 74LS (TTL) outputs.

'Float' high to logic 1 if unconnected. 1mA must be drawn out to hold them at logic 0.

Outputs

Can give about 5mA (10mA with 9V supply), enough to light an LED. To switch larger currents use a transistor.

Can give about 20mA, enough to light an LED. To switch larger currents use a transistor.

Can give about 20mA, enough to light an LED. To switch larger currents use a transistor.

Can give up to 16mA (enough to light an LED), but source only about 2mA. To switch larger currents use a transistor.

Fan-out

One output can drive up to 50 CMOS, 74HC or 74HCT inputs, but only one 74LS input.

One output can drive up to 50 CMOS, 74HC or 74HCT inputs, but only 10 74LS inputs.

One output can drive up to 10 74LS inputs or 50 74HCT inputs.

Maximum Frequency about 1MHz about 25MHz about 25MHz about 35MHz

Power consumptionof the chip itself

A few µW. A few µW. A few µW. A few mW

Removing a chip from its holder



If you need to remove a chip it can be gently ejected out of the holder with a small flat-blade screwdriver. Now carefully lever up each end by inserting the screwdriver blade, between the chip and its holder, and gently twisting the screwdriver. Take care to start lifting at both ends before you attempt to remove the chip, otherwise you will bend and possibly break the pins.

Building the CircuitThroughout these experiments we will use TTL chips to build circuits. The steps for wiring a circuit should be completed in the order described below:

1. Turn the power off before you build anything!2. Connect the +5V and ground (GND) leads of the power supply to the power and ground

bus strips on your breadboard respectively. 3. Plug the chips you will be using into the breadboard. Point all the chips in the same

direction with pin 1 at the left corner. (Pin 1 is often identified by a dot or a notch next to it on the chip package).

4. Connect +5V and GND pins of each chip to the power and ground bus strips on the breadboard.

5. Select a connection on your schematic and place a piece of hook-up wire between corresponding pins of the chips on your breadboard. It is better to make the short connections before the longer ones. Mark each connection on your schematic as you go, so as not to try to make the same connection again at a later stage.

6. Get one of your group members to check the connections, before you turn the power on. 7. If an error is made and is not spotted before you turn the power on. Turn the power off

immediately before you begin to rewire the circuit.8. At the end of the laboratory session, collect hook-up wires, chips and all equipment and

return them. 9. Tidy the area that you were working in and leave it in the same condition as it was before

you started.

Example Implementation of a Logic Circuit

Build a circuit to implement the Boolean funct. F = A.B

Quad 2 Input 74LS00 Hex 74LS04 Inverter



The designed and connected circuit

Figure 1-4: IC’s Mounted on Bread Board

Common Causes of Problems1. Not connecting the ground and/or power pins for all chips.2. Not turning on the power supply before checking the operation of the circuit.3. Leaving out wires.4. Plugging wires into the wrong holes.5. Driving a single gate input with the outputs of two or more gates6. Modifying the circuit with the power on. 7.

NOTE: In all experiments, you will be expected to obtain all instruments, leads, components at the start of the experiment and return them to their proper place after you have finished the experiment. Please inform the instructor if you locate.

Lab performed on (date): ___________ Signature: _____________

Checked by: ________________________ Date: ______________

Marks Awarded: ___________



LAB # 2Verify basic gate truth tables

Objectives:

To become familiar with the operation of Basic Gates (AND, OR, NOT, NAND, NOR, XOR, XNOR) using ICs.

To become familiar with how to determine the truth tables for logic gates.

Background TheoryLogic deals with only two normal conditions: logic TURE or logic FALSE. In Boolean logic, TRUE is often represented by the term HIGH or the number 1 and FALSE is represented by the term LOW or the number 0. HIGH and LOW (1 or 0) are logic terms; they do not indicate whether the voltage is higher or lower. In positive logic the more positive voltage is TRUE and the less positive voltage is FALSE i.e +2.5V = HIGH and +0.5V = LOW. With the negative logic this definition is reversed.

The basic logic gates and their symbols are summarized in the following pages. The truth table with all possible input combination is given and the output is left empty to you as an exercise. All possible combination of inputs involve counting in binary from 0 to 2n – 1 where n is the number of inputs.

In this experiment you will look at the truth tables for several arrangements of simple gates.

Equipment Required:

1. EPAL 272. Cutter3. Single Core Wire4. Pair of Strippers



1. To check the operation of OR gate according to the OR’s truth table, using the IC 74LS32

Theory:The electronic symbol for a two- input OR gate is shown in fig.1. The two inputs have been marked as A and B and the output as C. The OR gate has an output of 1 when either A or B or both are 1.In other words, it is any or all gate because an output occurs when any or all the inputs are present. Obviously, the output would be 0 if and only if both its inputs are 0. The OR gate represents the Boolean equation

A+B=CThe above logic operation of the OR gate can be summarized with the help of the truth table.A truth table may be defined as a table which gives the output state for all possible input combinations.

Equipment Required:1. 74LS32

Symbolic diagram:

Truth Table:Input Output

A B C

Pin Configuration:



2. To check the operation of AND gate according to the AND’s truth table, using the IC 74LS08

Theory:A Logic AND Gate is a type of digital logic gate that has an output which is normally at logic level "0" and only goes "HIGH" to a logic level "1" when ALL of its inputs are at logic level "1". The output of a Logic AND Gate only returns "LOW" again when ANY of its inputs are at a logic level "0". The logic or Boolean expression given for a logic AND gate is that for Logical Multiplication which is denoted by a single dot or full stop symbol, (.) giving us the Boolean expression of:

A.B = Q.


Symbolic diagram:

Truth Table:

Input OutputA B Q

Pin Configuration:



3. To check the operation of NOT gate according to the NOT’s truth table, using the IC 74LS04

Theory:It is so called because its output is NOT same as its inputs. It is also called an inverter because it inverts the input signal. It has one input and one output. All it does to invert (or complement) the inputs.


Symbolic diagram:

Truth Table:Input Output

A Y

Pin Configuration:



4. To check the operation of NOR gate according to the NOR’s truth table, using the IC 74LS02

Theory:It is a NOT-OR gate. It can be obtained by connecting a NOT gate in the output of an OR gate as shown in fig. Its output is given by the Boolean equation.

C’ = (A+B)’It gives an output when it’s both inputs are 0.


Symbolic diagram:

Truth Table:

Input OutputA B C`

Pin Configuration:



5. To check the operation of NAND gate according to the NAND’s truth table, using the IC 74LS00

Theory:It is in fact a NOT-AND gate .It can be obtained by connecting a NOT gate in the output of anAND gate as shown in fig. Its output is given by the Boolean equation.

Q’= (A.B)’This gate gives an output high if either A or B or both are 0.


Symbolic diagram:

Truth Table:

Input OutputA B Q`

Pin Configuration:



6. To check the operation of XOR gate according to the XOR’s truth table, using the IC 74LS86

Theory:It is the gate which gives an output 1when its inputs are not same (or exclusive) and an output 0 when its inputs are same. Its symbol is shown in fig. Equipment Required:

5. 74LS86

Symbolic diagram:

Truth Table:

Input OutputA B X

Pin Configuration:



Procedure1. Connect the trainer board with the power supply2. Mount the corresponding 74LSXX IC on the board. 3. Connect pin 14 to +5 V and pin 7 to GND. 4. Wire the circuit according to the diagram by consulting the corresponding gate ICs data

sheet. 5. Apply all the combinations of inputs and observe the output on the LED to verify the

truth tables of the gates.

Lab performed on (date): ___________ Signature: ______________

Checked by: ________________________ Date: ______________

Marks Awarded: ____________

Comments:



Combinational Logic circuits:

Logic circuits for digital systems may be combinational or sequential. A combinational circuit consists of logic gates whose outputs at a time are determined directly from there the present combination of inputs Without regard to previous Inputs. A combinational circuit performs a specific information-processing operation fully specified logically by a set of Boolean functions.

Sequential circuits employ memory elements (binary cells) in addition to logic gates. Their outputs are a function of the Inputs and the state of the memory elements. The state of memory elements, in turn, is a function of previous inputs. As a consequence, the outputs of a sequential circuit depend not only on present inputs, but also on past inputs, and circuit behavior must be specified by a time sequence of inputs and internal state.

A combinational circuit consists of input variables, logic gates and output variables. The logic gates accept signals from the inputs and generate signals to the outputs. This process transforms binary information from the given input data to the required output data.

Obviously, both input and output data are represented by binary signals, i.e., they exist in two possible values, one representing logic-1 and the other logic-0.

In the proceeding experiments we will deal with both combinational and sequential circuits.



LAB # 3

Usage of NAND as universal gate and Boolean function implementation

Objectives:To become familiar that the universal gate (NAND) can be used to design any other gate and in fact any combinational circuit

Theory:MULTILEVEL NAND CIRCUITS:

Combinational circuits are more frequently constructed with NAND or NOR gates rather than AND and OR gates. NAND and NOR gates are more common from the hardware point of view because they are readily available in integrated-circuit form. The NAND gate is said to be a universal gate because any digital system can be implement with it. Combinational circuits and sequential circuits as well can be constructed with this gate because the flip-flop circuit (the memory element most frequently used in sequential circuits) can be constructed from two NAND gates.

BOOLEAN FUNCTION:When a Boolean expression is implemented with logic gates, each term requires a gate, and each variable within the term designates an input to the gate. We define a literal as a single variable within the term that may or may not be complemented.

By reducing the number of terms, the number of literals, or both in a Boolean expression, it is often possible to obtain a simpler circuit. Boolean algebra or K-map is applied to reduce an expression for the purpose of obtaining a simpler circuit.

There are a few ways of writing Boolean expressions algebraically that are considered to be standard forms. The standard forms of contain product terms and sum terms. An example of a product term is XYZ. This is a logical product consisting of an AND operation among three literals. An example of a sum term is X+Y+Z. This is a logical sum consisting of OR operation among the literals.

In the sum of minterms canonical form, every product term includes a literal of every variable of the function. Product terms of the SOP form which do not include a literal of a variable, say variable B, should be augmented by,

- AND-ing the product term which misses a literal of B with (B+B̄ ),- Subsequently applying the distributive property to eliminate the parenthesis.

In the product of maxterms canonical form, every sum term includes a literal of every variable of the function. Sum terms of the POS form which do not include a literal of a variable, say variable B, ought to be augmented by



- OR-ing the sum term with B·B̄ ,

- Subsequently applying postulate a+b·c = (a+b) · (a+c) to distribute the product B· B̄ .


Tools:1. EPAL 272. Cutter3. Single Core Wire4. Pair of Strippers

Truth Table:A truth table of NAND gate is give below for reference.

Input OutputA B Q`0 0 10 1 11 0 11 1 0

1. To check the operation of XOR gate, using NAND gate IC

With the help of 4 NAND gate we can construct XOR gate.

Truth table Truth table of XOR gate is given bellow

Input OutputA B AB0 0 00 1 11 0 11 1 0

K-MapDraw the K-Map for the above truth table here



Boolean Expression F =

Circuit Diagram

Procedure Write the truth table for the function given above. Fill the k-map cells from the truth table. Simplify and minimize the function with k-map. Write the simplified function from k-map. Draw the circuit diagram and construct the circuit on the Trainer Boar



2. To check the operation of OR gate, using NAND gate IC

The OR operation is achieved through NAND gate with additional inverters in each input.With the help of 3 NAND gates we can construct OR gate.

Truth table Truth table of OR gate is given bellow

Input OutputA B A+B0 0 00 1 11 0 11 1 1



Circuit Diagram



Procedure Write the truth table for the function given above. Fill the k-map cells from the truth table. Simplify and minimize the function with k-map. Write the simplified function from k-map. Draw the circuit diagram and construct the circuit on the Trainer Board.

3. To check the operation of AND gate, using NAND gate IC

The AND operation requires two NAND gates. The first produces the inverted AND and the second acts as an inverter to produce the normal output.


Input OutputA B A&B0 0 00 1 01 0 01 1 1





Circuit Diagram

.4. To check the operation of NOT gate, using NAND gate IC

The NOT operation is obtained from a one-input NAND gate, actually another symbol or an inverter circuit. A single NAND also works as a NOT gate.


Input OutputA A`0 11 0





Circuit Diagram



Checked by: ________________________ Date: ______________




LAB # 4Introduction to Lab View and Comparison of two Boolean

numbers using IC 74LS85

Objectives:

To become familiar with the basic functions and coding technique in Lab view. To become familiar with the operation of Magnitude Comparator.

Equipment Required:74LS85 (4 Bit Magnitude Comparator)Tools:1. EPAL 272. Computer System3. Cutter4. Single Core Wire5. Pair of Strippers

Background Theory The comparison of two numbers is an operation that determines if one number is greater than, equal to or less than the other number. A magnitude comparator is a combinational circuit that compares two numbers A and B, and determines their relative magnitudes. The outcome of the comparison is specified by three binary variables that indicate whether A>B, A=B, or A<B.

Pin Configuration of Magnitude comparator 74LS85

Pin 2, 3, 4 of IC 74LS85 are to used to cascade two ICs to make 8-bit magnitude comparator



Procedure1. Mount the 4-bit magnitude comparator IC 74LS85 on the trainer board.2. Connect pin 16 to +5 V (Power Supply) and pin 8 to GND (Ground).3. Connect B0, B1, B2, B3 to pin 9, 11, 14, 1 and A0, A1, A2, A3 to 10, 12, 13, and 15

respectively.4. Take the output on pin 5, 6, 7 for A>B, A=B, A<B respectively to the status LEDs on the

Trainer board.5. Apply 4-bit wide input A, B and see the corresponding result on pin 5, 6, 7.

b. Introduction to Lab VIEWDigital electronics is one of the fundamental courses found in all electrical engineering and most science programs. The great variety of LabVIEW Boolean and numeric controls/indicators, together with the wealth of programming structures and functions, make LabVIEW an excellent tool to visualize and demonstrate many of the fundamental concepts of digital electronics.

Gates implementation in Lab VIEW:

In LabVIEW, you can specify a digital logic input by toggling a Boolean switch; a Boolean LED indicator can indicate an output. Because the AND gate is provided as a basic built-in LabVIEW function, you can easily wire two switches to the gate inputs and an indicator LED to the output to produce a simple VI that demonstrates the AND gate.

LabVIEW AND Function Wired to I/O Terminal Boxes

Run AND gate.vi from the Chap 1.llb VI library. Push the two input buttons and note how the output indicator changes.



Comparator Implementation in Lab VIEW

Truth table

Draw truth table of 2-bit number comparator below

Input OutputA B A=B A<B A>B00 0000 0100 1000 11


Boolean Expression(A=B) =

(A<B) =

(A>B) =

Circuit DiagramDigital Logic Design 27


Procedure Write the truth table for the function given above. Fill the k-map cells from the truth table. Simplify and minimize the function with k-map. Write the simplified function from k-map. Draw the circuit Diagram through Lab VIEW and check the outputs.


Checked by: ________________________ Date: ______________


LAB # 5



Half Adder and Full Adder operations Theory:ADDERS

Digital computers perform a variety of information-processing tasks. Among the basic functions encountered are the various arithmetic operations. The most basic arithmetic operation, no doubt, is the addition of two binary digits. This simple addition consists of four possible elementary operations, namely, 0 + 0 = 0, 0 + 1 = 1, 1 + 0 = 1, and 1 + 1 = 10. The first three operations produce a .sum whose length is one digit, I b but when both augends and addend bits are equal to 1, the binary sum consists of two digits. The higher significant bit of this result is called a carry. When the augends and addend numbers contain more significant digits, the carry obtained for the addition of two bits is added to the-next higher order pair of significant bit.

HALF ADDER

A combinational circuit that performs the addition of two bits is called a half-adder. From the verbal explanation of a half-adder, we find that this circuit needs two binary inputs and two binary outputs. The input variables designate the augends and addend bits; the output variables produce the sum and carry. It is necessary to specify two output variables because the result may consist of two binary digits. We arbitrarily assign symbols x and y to the two inputs and S (for sum) and C (for carry) to the outputs.

Equipment Required:1.74LS08 2.74LS86


Truth table In the light of the specifications of Half-adder give above, fill in a truth table containing all the possible combinations of two 1-bit inputs and the resultant values of sum and carry.

Inputs OutputsA B Sum Carry0 00 11 01 1



K-MapsDraw the K-Map for the above truth table here

Boolean Expression Sum =

Carry =

Circuit Diagram

.



FULL ADDER:

A full-adder is a combinational circuit that forms the arithmetic sum of three input bits. It consists of three inputs and two outputs. Two of the input variables, denoted by x and y, represent the two significant bits to be added. The third input, z, represents the carry from the previous lower significant position. Two outputs are necessary because the arithmetic sum of three binary digits ranges in value from 0 to 3, and binary 2 or 3 needs two digits. The two outputs are designated by the symbols S for sum and C for carry. The binary variable S gives the value of the least significant bit of the sum.

Equipment Required:

1. 74LS08 2. 74LS86 3. 74LS32

Truth table In the light of the specifications of Full-adder give above, fill in a truth table containing all the possible combinations of two 1-bit inputs, a carry in (or a third input) and the resultant values of sum and carry.

Inputs OutputsA B C Sum Carry0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1




Boolean Expression Sum =

Carry =

Circuit Diagram

.


Checked by: ________________________ Date: ______________




LAB # 6Half-subtractor and full-subtractor operations

Theory:SUBTRACTORS:

The subtraction of two binary numbers may be accomplished by taking the complement of the subtrahend adding. By this method, the subtraction operation becomes an addition operation requiring full-adders for its machine implementation. It is possible to implement subtraction with logic circuits in a direct manner. By this method, each subtrahend bit number is subtracted from its corresponding significant minuend bit to form a difference bit. If the minuend-bit is smaller than the subtrahend bit, a 1 is borrowed from the next significant position. The fact that a 1 has been borrowed must be conveyed to the next higher pair of bits by means of a binary signal coming out (output) of a given stage and going into (input) the next higher stage. Just as there are - half- and full-adders, there are half- and full subtractions.

1. HALF SUBTRACTOR:

A half sub tractor is a combinational circuit that subtracts two bits and produces their difference. It also has an output to specify if a 1 has been borrowed. Designate the minuend bit by x and the subtrahend bit by y. To perform x - y, we have to check the relative magnitudes of x and y. If x ~ y, we have three possibilities: 0 - 0 = 0, 1 - 0 = 1, and 1 - 1 = O.

The result is called the difference bit. If x < y, we have 0 - 1, and 'it is necessary to borrow a 1 from the next higher stage. The 1 borrowed from the next higher stage adds 2 to the minuend bit, just as in the decimal system a borrow adds, 10 to a minuend digit. With the minuend equal to 2, the difference becomes 2 - 1 = 1. The half-sub tractor needs two outputs. One output generates the difference and will be designated by the symbol D. The second output, designated B for borrow, generates the binary signal that informs the next stage that a 1 has been borrowed.

Equipment Required:

1.74LS08 2.74LS863.74LS04




Truth table

A truth table containing all the possible combinations of two 1-bit inputs and the resultant values of borrow and difference is given bellow.

Inputs OutputsA B D B0 0 0 00 1 1 11 0 0 01 1 0 0


Boolean Expression Difference =

Borrow =

Circuit Diagram



2. FULL SUBTRACTOR

A full-sub tractor is a combinational circuit that performs a subtraction between two bits, taking into account that a 1 may have been borrowed by a lower significant stage. The circuit has three inputs and two outputs. The three inputs, x, y, and z, denote the minuend, subtrahend, and previous borrow, respectively. The two outputs, D and B, represent the difference and output borrows respectively.Equipment Required:

1. 74LS86 x 12. 74LS08 x 13. 74LS04 x 14. 74LS32 x 1

Truth table In the light of the specifications of Full-subtractor give above a truth table containing all the possible combinations of two 1-bit inputs A and B, a borrow in and the resultant values of Difference and borrow out are given.

Inputs OutputsA B Bin D Bout

0 0 0 0 00 0 1 1 10 1 0 1 10 1 1 0 11 0 0 1 01 0 1 0 01 1 0 0 01 1 1 1 1




Boolean Expression Difference =

Borrow out =

Circuit Diagram

.

Procedure:

1. Connect the trainer with the power supply2. Install the ICs on the trainer board.3. Wire according to the diagram.4. Use the logic switches for input and connect output of Half Adder (Sum and Carry) and

Full Subtractor (Difference and B_out) to the LEDs of trainer board.5. Supply the VCC and GND to the pin 14 and 7 respectively6. Test all the possible combination of inputs and fill out the table.


Checked by: ________________________ Date: ______________


LAB # 7Digital Logic Design 36


Design the BCD-to-seven-segment decoder circuit.

REQUIRED EQUIPMENT:• EPAL 27• Connecting wires• 14 pin ICs• Seven‐Segment Display• IC7448• Power supply

THEORY:

For this laboratory, the combinational logic circuit is used to convert a four-bit binary coded decimal (BCD) value to the signals required for a seven-segment display. BCD-to-seven- segment decoder is a combinational circuit that accepts a decimal digit in BCD (binary-coded decimal) and generates the appropriate output for selection of segments in a display indicator used for displaying the digit. The seven outputs of the decoder (a, b, c, d, e, f, g, h) select the corresponding segment in the display as shown in figure:

a

f b

g

e d c

Figure 7.1: Seven – Segment display

You are likely familiar with the idea of a seven‐segment indicator for representing decimal numbers. Each segment of a seven‐segment display is a small light‐emitting diode (LED) or liquid‐crystal display (LCD), and a decimal number is indicated by lighting a particular combination of the LED's or LCD's elements is shown below:



a a a a a

f b f g

b f b f g g

b f b g g

e d c ed c e d c e d c e d c

a a a a a

f b f g

b f b f g g

b f b g g

e d c e

d c ed c e

d c e d c

Figure 7.2: Indication of decimal number on Seven – Segment display

Bindary‐coded‐decimal (BCD) is a common way of encoding decimal numbers with 4 binary bits as shown below:

BCD Code Decimal Digit0000 00001 10010 20011 30100 40101 50110 60111 71000 81001 9

Table 7.1: BCD encoding



CALCULATIONS:

Fill in the truth table for seven segment device whose display elements are active low. That is, each element will be active when its corresponding input is '0'.

TRUTH TABLE:

Inputs OutputsA B C D a B c d e f g h0 0 0 00 0 0 10 0 1 00 0 1 10 1 0 00 1 0 10 1 1 00 1 1 11 0 0 01 0 0 1

Table 7.2: Truth table for seven segment‐ display

Rest of bit combinations are used with don’t care condition.

Write down the simplified Boolean function for each decoder output:

a = ----------------------------------

b = ----------------------------------

c = ----------------------------------

d = ----------------------------------

e = ----------------------------------

f = ----------------------------------

g = ----------------------------------

h = ----------------------------------

Draw the logic diagram for the above outputs.


Laboratory Hand BookPROCEDUREGet the required ICs and other apparatus from the lab attendant. Install the seven‐segment display, ICs and resistors on the breadboard of the Logic Trainer. Connect 5Vdc power supply and ground on pins 14 and 7 respectively. For other pin configurations consult the data sheet (we have already used these gates in the first lab so it should not be a problem). The display has 7 inputs each connected to an LED segment. All the anodes of LEDS are tied together and joined to 5V. (This type is called common Anode type). A limiting resistance (1 k ohm) network must be used at the inputs to protect the 7‐segment unit from overloading. Wire your circuit according to the logic diagram you have drawn. Connect each output of your circuit to appropriate input of 7 segment display unit. Once you have wired the circuit, check it with your instructor and, if approved, power up your circuit. The outputs should be connected to the LEDs on the Logic Trainer for monitoring purpose. By applying BCD codes verify the displayed decimal digits.

CONCLUSIONThe experiment is performed according to given task i.e. using minimum number of gates.Now use IC 7448 to display digits on the 7 segment display

PIN CONFIGURATION:

The pin connections of the 7448 are (pins 1-16): bcd2, bcd3, free, free, free, bcd4, bcd1, ground, e, d, c, b, a, g, f, +5v; where bcd4 is the slowest line of the binary counter to change and bcd1 is the fastest. Pins are numbered counter-clockwise from top left of the 16 pin chip.

Figure 8-2: Pin Configuration (7448)


Laboratory Hand BookProcedure1. Connect the trainer with the power supply2. Mount the BCD to 7-segment driver IC 74LS48 on the trainer board3. Connect pins of the IC according to the diagram 4. Connect pin 16 to +5 V (Power Supply) and pin 8 to GND (Ground).5. Apply all the combination of inputs and see the corresponding decimal digit on the 7-

segment LED display.


Checked by: ________________________ Date: ______________



Laboratory Hand BookLAB # 8

The operation of decoder by using IC 74LS08 and IC74LS04

Objectives: Gaining a close insight into the functioning and properties of decoder circuits Developing skills in the design and testing of combinational logic circuits.

Equipment Required:1. 74LS04 2. 74LS08


Theory:A decoder is a combinational circuit that converts binary information from n inputs to 2n

outputs. Decoder is a multiple input, multiple output logic circuit that converts coded input into coded output, where the input and output codes are different. The input code generally has fewer bits than the output code, and there is one-to-one mapping, each input code word produces a different output code word. The most commonly used input code is an n-bit binary code, where an n-bit word represents one of 2n different coded values, i.e. n-to-2n

decoder or binary decoder.

The outputs of a decoder gives one 1 at only one time while they give zero 0 for rest. In the truth table, the 1’s of outputs are present in diagonal position.

Symbolic Diagram:



Truth table:

Fill in the table according to the symbolic diagram of the Decoder given above

Inputs OutputsA1 A0 D0 D1 D2 D3

0 00 11 01 1

Procedure:

1. Connect the trainer with the power supply2. Install the ICs on the trainer board.3. Wire according to the diagram.4. Use the logic switches for input and connect output of encoder to the LEDs of trainer

board.5. Supply the VCC and GND to the pins 14 and 7 respectively.


Checked by: ________________________ Date: ______________




LAB # 9

The operation of priority encoder using IC 74LS148 and through K-maps and Boolean Logic

Objectives: Gaining a close insight into the functioning and properties of decoder circuits Developing skills in the design and testing of combinational logic circuits.

Equipment Required:1.74LS148 (8-bit Priority Binary Encoder)2. 74LS08 x 13. 74LS04 x 14. 74LS32 x 1


Background TheoryEncoder is a logic circuit that has fewer output bits than the input code. The encoder takes 2n

inputs bits and generates n-bit output. Only one of the inputs can be 1, and the corresponding binary will display on the output bits. But when more than one input bits become 1 at the same time then what should be the output then? So we give priority to inputs and the input with high priority will freeze the output with its binary value. Such an encoder is called priority encoder.



Truth Table

Inputs OutputsD3 D2 D1 D0 x y V0 0 0 0 X X 0

0 0 0 1 0 0 1

0 0 1 X 0 1 1

0 1 X X 1 0 1

1 X X X 1 1 1

K-Maps

Boolean equations

x =y =V=



Circuit Diagram



Checked by: ________________________ Date: ______________




b. Implementation of 8-3 bit Priority Encoder using IC 74LS148

74LS148 (8-to-3 Priority Encoder)


74LS148

Laboratory Hand BookEI=0 will drive the priority encoder, if EI=1 the output will all be 1’s as outputs are active low.

TRUTH TABLE

INPUTS OUTPUTS

EI I0 I1 I2 I3 I4 I5 I6 I7 GS A2 A1 A0 EO

1 X X X X X X X X

0 1 1 1 1 1 1 1 1

0 X X X X X X X 0

0 X X X X X X 0 1

0 X X X X X 0 1 1

0 X X X X 0 1 1 1

0 X X X 0 1 1 1 1

0 X X 0 1 1 1 1 1

0 X 0 1 1 1 1 1 1

0 0 1 1 1 1 1 1 1

Procedure1. Connect the trainer with the power supply2. Install the IC 74LS148 on the trainer board3. IC 74148 is 8 to 3 priority encoder. Wire according to the diagram.4. Use the logic switches for input (I0, I1…I7) and connect output (A2, A1, A0)

to the LEDs.5. Supply the VCC and GND to the pin 16 and 8 respectively6. Test all the possible combination of input and fill out the table


Checked by: ________________________ Date: ______________




LAB # 10

Verifying the operation of multiplexer by using IC 74LS04, IC 74LS08 and IC 74LS32.

Equipment Required:1. 74LS08 2. 74LS04 3. 74LS32


Theory:

Multiplexing means transmitting a large number of information units over a smaller number of channels or lines. A digital multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line, there are 2n inputs lines and n selections lines whose bit combinations determine which input is selected.A4-to –1line multiplexer is shown in the following fig. There are two selection lines and four input lines selection lines selects particular line.

Truth Table:

Sw1 Sw2 A B C D L10 0 0 0 0 0 00 0 1 0 0 0 10 1 0 0 0 0 00 1 0 1 0 0 11 0 0 0 0 0 01 0 0 0 1 0 11 1 0 0 0 0 01 1 0 0 0 1 1

K-Maps:Draw the appropriate K Maps here



Boolean function:

Symbolic Diagram:

Procedure:

Write the truth table for the function given above. Fill the k-map cells from the truth table. Simplify and minimize the function with k-map. Write the simplified function from k-map. Draw the circuit diagram and construct the circuit on the Trainer Board.



LAB # 11Verifying the operation of De -multiplexer by using

IC74LS138

Equipment Required:

1. 74LS08 2. 74LS04 3. 74LS32 4. 74LS138 (1-to-8 Demultiplexer)


Theory:

A demultiplexer is doing the opposite function of multiplexer. It takes input on a single input line and the select lines determines one of the 2n output lines and the input contents is visible on that particular output.

Truth Table:

Inputs Outputs

E1 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7

1 X X X

X X X X

X X X X

0 0 0 0

0 1 0 0

0 0 1 0

0 1 1 0

0 0 0 1

0 1 0 1

0 0 1 1

0 1 1 1



Pin Configuration of 74LS138 (8-to-1)

Figure 9-3:Pin Configuration of 74LS138

The three enable pins (E1, E2, E3) are for building a bigger demux. Here any two of these should be hard wired i.e E2=0 and E3 =1., so the third enable pin (E1) will act as input A2, A1, A0 are acting as select lines of demux.

K-Maps:Draw the appropriate K Maps here


74LS138


Boolean functions:

Symbolic Diagram:



Procedure: Write the truth table for the function given above. Fill the k-map cells from the truth table. Simplify and minimize the function with k-map. Write the simplified function from k-map. Draw the circuit diagram and construct the circuit on the Trainer Board.


Checked by: ________________________ Date: ______________


LAB # 12Digital Logic Design 54


To check the operation of basic RS- flip flop using IC74LS00

Equipment Required:

1. 74LS00 2. ePAL Trainer.3. Cutter.4. Tweezers5. Single Core Wires.

Theory:

The basic latch or flip flop is called basic RS flip-flop.

1. A flip-flop is a logic circuit that consists of two invertors. Output of one-inverter acts as an input of the other.2. They can store 1 bit input of information.3. FFs have two outputs, which are complement of each other.

Symbolic Diagram:

NormalOutput

ComplementedOutput

Truth Table:

S′ R′ Q+1 Qt+1′

0 1 0 10 0 0 11 0 1 00 0 1 01 1 1 0




Checked by: ________________________ Date: ______________




To check the operation of clocked RS flip- flop using IC 74LS00

Equipment Required:

1. 74LS00

Tool:2. ePAL Trainer.3. Cutter.4. Tweezers5. Single Core Wires.

Theory

The operation of basic flip-flop can be modified by providing an additional control input that determines when the state of the circuit is to be changed .An RS-flip flop with a clock pulse input is shown. It consists of basic flip-flop circuit and two additional gates.

Symbolic Diagram:

Truth Table:

S R Qt+1 Qt+1′0 1 0 10 0 0 11 0 1 00 0 1 01 1 1 1




Checked by: ________________________ Date: ______________




LAB # 14

To check the operation of J – K flip-flop using IC74LS00 and IC74LS10

Equipment Required:

1. 74LS00

2. 74LS10

Tools:2. ePAL Trainer.3. Cutter.4. Tweezers5. Single Core Wires.

Theory:A J – K flip-flop is a refinement of the RS flip-flop. The indeterminate state of RS flip-flop is defined in J – K flip-flop. The working of J – K flip-flop is identical to that of the RS flip-flop except for one major difference. I.e., J = K = 1 condition does not result in output state, so the flip-flop is not valid. In case of J = K = 1, the J – K flip-flop always goes to its opposite state upon to positive clock transition. This is called “TOGGLE” mode of operation. In this case J and K are both kept high i.e., J = 1 and K = 1 the flip-flop will change states (toggle) for each clock pulse.

Symbolic Diagram:

Truth Table:

C.P J K Q t+1 Q t+1 ′1 0 1 0 11 0 0 0 11 1 0 1 0


Laboratory Hand Book1 0 0 1 01 1 1 TOGGLE

IC PIN Configuration:


Checked by: ________________________ Date: ______________




To check the operation of two stage binary ripple up counter

Equipment Required:

1. 74LS76

Tools:2. ePAL Trainer.3. Cutter.4. Tweezers5. Single Core Wires.

Theory:A sequential circuit that goes through a prescribed sequence of states upon the application of input pulses is called a ‘Counter’. A counter that follows the binary sequence is called a ‘binary ripple counter’. In two stages binary ripple up counter two J K flip-flops are used. First of all convert JK-ff to T-ff ,that is J=1,K=1.The symbolic diagram is shown below.

Symbolic Diagram:

QB QAQ J Q JJA= 1

C.P

QB Q K QA Q KKA=



Truth Table:

QB QA No. ofCounts

0 0 00 1 11 0 21 1 30 0 4


Checked by: ________________________ Date: ______________



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