Verification of Linear Real-Time Logic Specifications
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Transcript of Verification of Linear Real-Time Logic Specifications
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Verification of Linear Real-Time Logic Specifications
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Introduction
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Verifying timing properties
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Real-Time Logic (RTL)
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Real-Time Logic (cont)
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Decidable Fragments of RTL
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The previous classes
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Examples
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Limitations
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The specification of a phased array radar system with four antennas
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Translation to RTL
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Our larger class - LRTL
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Linear inequalities – an open problem
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Can we still re-use the constraint graph?
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LRTL
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The LRTL normal form
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The first 3 steps to prove SP SA
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Example
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Step 4: Positive propositional clauses
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Step 5: Obtaining the negative propositional clauses
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Definition: Negative linear dependencies
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Theorem: Negative Linear Dependency
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Correctness Theorem
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Example
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Negative propositional clauses
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Step 6: The final step of our method
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Complexity considerations
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Comparison with similar works
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Differences between the three tools
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Differences between the three tools
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Experimental Results – Table 1
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Related and future work 1
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Related and future work 2
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Related and future work 3
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Future work 4
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S. Andrei and A. M. K. Cheng, “Verifying Linear Real-Time Logic Specifications,” IEEE-CS Real-Time Systems Symposium, Tucson, Arizona,
December 2007.
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Thank you for your attention!
Questions?