VAMSI kumar SRAMfinal

8/8/2019 VAMSI kumar SRAMfinal

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GATE WAY TO SRAMGATE WAY TO SRAM(STATIC RANDOM ACCESS MEMORY)(STATIC RANDOM ACCESS MEMORY)

BY,P. VAMSIKUMAR,REGD NO:122120130

MTECH(VLSI)


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CONTENTSCONTENTS

Classification of Memory arraysClassification of Memory arrays

RamRam

IntroductionIntroduction

Operation of SRAM CELLOperation of SRAM CELLDifferent states of SRAMDifferent states of SRAM

Advantages and disadvantages of SRAMAdvantages and disadvantages of SRAM

ApplicationsApplications

Top spice implementation and O/P waveformsTop spice implementation and O/P waveformsConclusionConclusion

ReferencesReferences


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RAM

Robert Dennard was the inventor of RAM:Random Access Memory, the device waspatented in 1968 by Dennard.which functions as the computer's primaryworkspace. The "random" in RAM means thatthe contents of each byte can be directlyaccessed without regard to the bytes before orafter it.

This is also true of other Volatile RAM chipsrequire power to maintain their data, which iswhy you must save your data onto disk beforeyou turn the computer off.


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CLASSIFICATION OFCLASSIFICATION OF

MEMORY ARRAYSMEMORY ARRAYS


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Memory is a collection of storage cells with associated input

and output circuitry

Possible to read and write cells

Random access memory (RAM) contains words of

information.

Data can be accessed using a sequence of signals.Leads to timing waveforms.

Decoders are an important part of memories

Selects specific data in the RAM


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INTRODUCTIONINTRODUCTIONStatic random access memory(SRAM)

Operates like a collection of latches.

Once value is written, it is guaranteed toremain in the memory as long as power isapplied.

Used inside the processors (like thePentium).

The size of an SRAM with m address linesand n data lines is 2m words, or 2m nbits.


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A SIX TRANSISTORA SIX TRANSISTOR

SRAM CELLSRAM CELL


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OPERATION OF SRAMOPERATION OF SRAM

CELLCELLEach bit in an SRAM is stored on fourtransistors that form two cross-coupledinverters.

This storage cell has two stable states whichare used to denote 0 and 1.

Two additional access transistors serve to

control the access to a storage cell duringread and write operations. It thus typicallytakes six MOSFETs to store one memory bit.


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Contd..Contd..

These bit lines are used to transfer data forboth read and write operations.

Access to the cell is enabled by the word line(WL in figure) which controls the two accesstransistors M5 and M6 which, in turn, controlwhether the cell should be connected to the bitlines: BL and BL

It's not strictly necessary to have two bit lines,both the signal and its inverse are typicallyprovided since it improves noise margins.


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DIFFERENT STATESDIFFERENT STATES

OF SRAMOF SRAMAn SRAM CELL has three differentAn SRAM CELL has three different

states:states:STANDBY where the circuit is idle.STANDBY where the circuit is idle.

READING when the data has beenREADING when the data has been

requestedrequestedWRITING when updating theWRITING when updating thecontents.contents.


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STANDBYSTANDBYIf the word line is not asserted, theIf the word line is not asserted, the accessaccesstransistors M5 and M6 disconnect the celltransistors M5 and M6 disconnect the cellfrom the bit lines. The two cross coupledfrom the bit lines. The two cross coupledinverters formed by M1inverters formed by M1 M4 will continueM4 will continueto strengthen each other as long as theyto strengthen each other as long as theyare connected to the supply.are connected to the supply.


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SRAMSRAM--READREAD

OPERATIONOPERATIONAssume a 1 is stored at Q.Assume a 1 is stored at Q.Pre charge both bit lines to high.Pre charge both bit lines to high.

The read cycle is started by asserting theThe read cycle is started by asserting theword line.word line.

During the read operation the valuesDuring the read operation the valuesstored in Q and Qbar are transferred tostored in Q and Qbar are transferred to

the bit lines.the bit lines.So BL remains at its preSo BL remains at its pre--charged valuecharged valueand BLand BL--bar discharges through M1bar discharges through M1--M5.M5.


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Kn,M5 ( ( VDDKn,M5 ( ( VDD--VV-- VTn ) VDSATnVTn ) VDSATn--( VDSATn/2 )( VDSATn/2 )

=Kn,M1(( VDD=Kn,M1(( VDD--VTn )VTn )VV--((V/2) )V/2) )V=VDSATn+CR(VDDV=VDSATn+CR(VDD--VTn VDSATnVTn VDSATn

(1+CR)+CR (VDD(1+CR)+CR (VDD--VTn) )VTn) )

Where CRWhere CR Cell ratio 1.2Cell ratio 1.2


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SRAMSRAM--WRITEWRITE

OPERATIONOPERATIONThe start of a write cycle begins byapplying the value to be written to the bit

lines. If we wish to write a 0, we wouldapply a 0 to the bit lines, i.e. setting BL-bar to 1 and BL to 0.

This is similar to applying a reset pulse to

a SR-latch, which causes the flip flop tochange state (A 1 is written by invertingthe values of the bit lines)

WL is then asserted and the value that is

to be stored is latched in.


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Kn,M6 ( ( VDDKn,M6 ( ( VDD-- VTn ) VQVTn ) VQ --(VQ/2 )(VQ/2 )

=Kp,M4( ( VDD=Kp,M4( ( VDD--|VTp| )VDSATp|VTp| )VDSATp--( VDSATp/2) )( VDSATp/2) )

Solving,we getSolving,we get

VQ=VDDVQ=VDD--VTnVTn--( (VDD( (VDD--VTn) VTn) --2(up/un)PR( ( VDD2(up/un)PR( ( VDD-- |VTp| ) VDSATp|VTp| ) VDSATp--

(VDSATp / 2) ) )(VDSATp / 2) ) )

where PRwhere PR Pull up Ratio =(W4/L4)/(W6/L6)Pull up Ratio =(W4/L4)/(W6/L6)& PR 1.8& PR 1.8


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ADVANTAGES &ADVANTAGES &DISADVANTAGES OFDISADVANTAGES OF

SS--RAMRAMAdvantages:Advantages:

Simplicity: SRAMs don't require external refreshSimplicity: SRAMs don't require external refreshcircuitry or other work in order for them to keepcircuitry or other work in order for them to keep

their data intact.their data intact.

Speed:.Speed:. The primary advantage of an SRAMThe primary advantage of an SRAMover a DRAM is its speed.over a DRAM is its speed.

Disadvantages:Disadvantages:

Cost: SRAM is, byte for byte, several times moreCost: SRAM is, byte for byte, several times moreexpensive than DRAM.expensive than DRAM.

Size: SRAMs take up much more space thanSize: SRAMs take up much more space than

DRAMs ( SinceDRAMs ( Since 32 MB of SRAM would be prohibitively32 MB of SRAM would be prohibitivelylarge and costly, DRAM is used for system memory )large and costly, DRAM is used for system memory )


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APPLICATIONSAPPLICATIONSIt is used in the circuitry where either speed or low power, or

both are of prime interest.

SRAM is used as main memory in personal computers &also usedin workstations, routers and peripheral equipment.

Used in moderately clocked microprocessors, and have a nearly

negligible power consumption( in the region of a fewmicrowatts.)

LCD screens and printers also normally employ SRAM to hold theimage displayed (or to be printed).

Small SRAM buffers are also found in CDROM and CDRW drivesusually 256 KB or more are used to buffer track data, which istransferred in blocks instead of as single values.

The so called "CMOS RAM" on PC motherboards was originally abattery-powered SRAM chip, but is today more oftenimplemented using EEPROM or Flash.


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READ


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SPICE NET LISTSPICE NET LIST


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WRITE OPERATION:WRITE OPERATION:


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CONCLUSIONCONCLUSION

Amplification is achieved here only by a singleAmplification is achieved here only by a singlestage.stage.

Static power in the amplifier can be reduced byStatic power in the amplifier can be reduced by

pulsing the SE control signal for short periods.pulsing the SE control signal for short periods.

An SRAM chip is comprised of thousands or millionsAn SRAM chip is comprised of thousands or millionsof identical cells, it is much easier to make than aof identical cells, it is much easier to make than aCPU, which is a large die with a nonCPU, which is a large die with a non--repetitiverepetitive

structure. This is one reason why RAM chips coststructure. This is one reason why RAM chips costmuch less than processors domuch less than processors do..


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REFERENCESREFERENCES1.1. INTRODUCTION TO CMOS VLSIINTRODUCTION TO CMOS VLSI

DESIGN BY DAVID HARRIS.DESIGN BY DAVID HARRIS.

2. VLSICIRCUITS EE 4321 BY PROF.AZEEZ BHAVNAGARWALA.

3. DIGITAL INTEGRATED CIRCUITS BYJAN RABAEY.


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THANK YOUTHANK YOU

VAMSI kumar SRAMfinal

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