Understanding Intersil Hot Plug Devices

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1 ® TB457.0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Understanding Intersil Hot Plug Devices Overview Hot Plug controllers have two primary responsibilities, control inrush currents during turn-on and control load currents to a safe pre-determined level in the event of a high current fault/short during static operation. Devices Under Observation ISL6116 (+5V) ISL6116 (-12V) ISL6116 (-48V) ISL6115 (+12V) HIP1012A (+5V and +3.3V) ISL6173 (+3.3V and +2.5V) ISL6111(+12V, -12V, +3.3V, +5V) ISL6118 (+5V x2) Setting the Overcurrent Trip Point C TIM DISCHARGED I S V SENSE > V SET ? C TIM CHARGED HAS TIMEOUT OCCURRED?** R ISET IS USED TO SET THE DEVICE’S OVERCURRENT THRESHOLD POINT* CURRENT THROUGH R ISENSE GENERATES A VOLTAGE TO BE COMPARED TO THRESHOLD POINT DEFINED BY R ISET FAULT CONDITION NO YES NO *See respective controller datasheet for equations to select R ISET **Timeout is proportional to CTIM and varies by controller (see datasheets) OVERCURRENT TRIP POINT OPERATION YES Technical Brief Authors: Eric Josefson and Sean Barr April 18, 2006

Transcript of Understanding Intersil Hot Plug Devices

Page 1: Understanding Intersil Hot Plug Devices

1

®

Understanding Intersil Hot Plug Devices

TB457.0Technical BriefAuthors: Eric Josefson and Sean Barr

April 18, 2006

OverviewHot Plug controllers have two primary responsibilities, control inrush currents during turn-on and control load currents to a safe pre-determined level in the event of a high current fault/short during static operation.

Devices Under Observation• ISL6116 (+5V)

• ISL6116 (-12V)

• ISL6116 (-48V)

• ISL6115 (+12V)

• HIP1012A (+5V and +3.3V)

• ISL6173 (+3.3V and +2.5V)

• ISL6111(+12V, -12V, +3.3V, +5V)

• ISL6118 (+5V x2)

• Setting the Overcurrent Trip Point

CTIM DISCHARGED

IS VSENSE > VSET?

CTIM CHARGED

HAS TIMEOUT OCCURRED?**

RISET IS USED TO SET THE DEVICE’S OVERCURRENTTHRESHOLD POINT*

CURRENT THROUGH RISENSE GENERATES A VOLTAGE TO BE COMPARED TO THRESHOLD POINT DEFINED BY RISET

FAULT CONDITION

NO

YES

NO

*See respective controller datasheet for equations to select RISET**Timeout is proportional to CTIM and varies by controller

(see datasheets)

OVERCURRENT TRIP POINT OPERATION

YES

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

Copyright Intersil Americas Inc. 2006. All Rights ReservedAll other trademarks mentioned are the property of their respective owners.

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Technical Brief 457

ISL6116 (+5V)Figures 1 and 2 show the ISL6116 in an ISL6115 high side switch application eval board. Jumper JP1 is removed from the original configuration so a +5V Power Source can be applied to B2. +12V is needed to bias the IC and is applied at B1. The overcurrent set point is 1.5A.

In Figure 3, notice the soft-start ramp up of GATE after PWRON is initiated, thus allowing the gradual ramp up of ILOAD. In Figure 4, starting up into a short is shown. Upon PWRON being asserted, CTIM is immediately begins

charging. The nominal time-out period is CTIM x 93kΩ . An overcurrent (OC) event occurs when the current through the sense resistor exceeds the user programmed OC threshold (see data sheet). The controller enters current regulation (CR) and capacitor CTIM begins charging. The nominal time-out period is CTIM x 93kΩ. (see Figure 5A). A transient event from 500mA to 1A occurs. PGOOD is pulled low due to a temporary undervoltage condition occurring on +5VOUT, but CTIM stays low as a true OC event never occurs (See Figure 5B).

ISL6116 (+5V) Figures

FIGURE 1. EVAL BOARD SCHEMATIC FIGURE 2. EVAL BOARD PICTURE

FIGURE 3. TURN ON VIA PWRON INTO NOMINAL LOAD FIGURE 4. TURN ON VIA PWRON INTO SHORT

5

6

8

7

4

3

2

1

ISL6116

Q1

R2

R3

C1

C2

R4

D1

R5

D2

JP1VBIASV+ B2

DD1

+12V

C3

R1

LOAD -+

PWRON

3.3V

B1

B5

B3 B4

U1

+5V

+5V

PGOOD

Ch3 PGOOD

Ch2 PWRON

Ch1 GATE

Ch4 ILOAD

ICR = 1.5ACh2 CTIM

Ch1 GATE

Ch4 ILOAD

Ch3 PGOOD

ICR = 1.5A

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Technical Brief 457

ISL6116 (-12V)Figures 6 and 7 show the ISL6116 reconfigured for -12V low side switch application. The following components were removed: RG1, R6 & R11. C2 was added (0.047µf 0805 size). In Figure 8, notice that GATE is 0V to fully enhance the FET because of -12V operation. Also note that PGOOD is disabled due to low side configuration. Upon power up, current regulation mode is entered and CTIM is immediately

begins charging. The nominal time-out period is CTIM x 93kΩ, and again PGOOD is disabled (see Figure 9). An OC event occurs when the current through the sense resistor exceeds the user programmed OC threshold (see data sheet). The controller enters CR mode and capacitor CTIM begins charging. The nominal time-out period is CTIM x 93kΩ (see Figure 10).

FIGURE 5A. RESPONSE TO OC DURING OPERATION FIGURE 5B. RESPONSE TO FALSE FAULT EVENT

FIGURE 5.

ISL6116 (+5V) Figures (Continued)

Ch4 IOUT

Ch3PGOOD

Ch1 GATE

Ch2CTIM

Ch3 PGOOD

Ch1 +5VOUT

Ch4 ILOAD

Ch2 CTIM

ICR = 1.5A

ISL6116 (-12V) Figures

FIGURE 6. ISL6116EVAL1 NEGATIVE VOLTAGE LOW SIDE CONTROLLER

FIGURE 7. ISL6116 EVAL BOARD PICTURE

5 6 87

4 3 2 1

ISL6116

Q2

R2R7

C1

R5

D2

C3

R1LOAD

DD13.3V

+VBUS

-VBUS

OT1

R9

R8

HI J2 J3 LO

R10

ON

OFF0-5V

U1

J1

J4

LOGINTP9

-12V APPL.

-12V*REMOVE: RG1, R6, R11ADD C2

GND

C2

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Technical Brief 457

FIGURE 8. TURN ON INTO NOMINAL LOAD FIGURE 9. TURN ON INTO OVERCURRENT

FIGURE 10. RESPONSE TO OC DURING OPERATION

ISL6116 (-12V) Figures (Continued)

Ch2 CTIM/Ch3 PGOOD

Ch1 GATE

Ch4 ILOAD

ICR = 2.4A

Ch3 PGOOD

Ch1 GATE

Ch4 ILOAD

Ch2 CTIM

ICR = 2.4A

Ch1 GATE

Ch4 ILOAD

Ch2 CTIM

ICR = 2.4A

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Technical Brief 457

ISL6116 (-48V)Figure 11 and 12 show the ISL6116 in -48V Low Side Switch Application. The eval board uses a HIP5600 to bias the ISL6116 12V higher than the -48V. Note C2 was intentionally left empty. Tests were done at -36V to keep the power dissipated to the load low. Results would be essentially the same at -48V.

In Figure 13, notice soft-start ramp up of GATE upon LOGIN is being driven low. Keep in mind that PGOOD is disabled in

low side applications. Upon an OC at turn on, GATE begins to soft-start, then attempts to regulate, then is shut down (see Figure 14). Note CTIM’s behavior due to the eval board setup (C2 DNP).

In Figure 15, the load is switched from an open to 2Ω. The controller immediately pulls GATE down, CTIM up, and the load is isolated. When LOGIN is forced high, the controller shuts down (see Figure 16).

ISL6116 (-48V) Figures

FIGURE 11. ISL6116 EVAL BOARD SCHEMATIC FIGURE 12. ISL6116 EVAL BOARD PICTURE

FIGURE 13. TURN ON VIA LOGIN FIGURE 14. TURN ON INTO OC

5 6 87

4 3 2 1

ISL6116

Q2

R2R7

C1

R5

D2

C3

R1LOAD

DD13.3V

+VBUS

-VBUS

OT1

R9

R8

HI J2 J3 LO

R6

R11

R10

ON

OFF0-5V

U1

J1

J4

LOGINTP9

RG1

GND

-48V

C2 = EMPTY

C2

Ch2 GATE

Ch4 ILOAD

Ch3 CTIM

ICR = 2.4A

Ch1 LOGIN

Ch2 GATE

Ch4 ILOAD

Ch3 CTIM

ICR = 2.4A

Ch1 LOGIN

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ISL6115 (+12V)Figures 17 and 18 show the ISL6115 in a +12V high side switch application.

Refer to Figures 19 and 20. After PWRON is asserted, notice the soft-start ramp of GATE to assure inrush current is limited. Observe the PGOOD delay as well.

Both Figures 21 and 22 show an OC event; Figure 21 shows turning on into a short, and Figure 22 shows a short occurring during normal operation. An OC event occurs when the current through the sense resistor exceeds the user programmed OC threshold (see data sheet). The controller enters CR mode and capacitor CTIM begins charging. The nominal time-out period is CTIM x 93kΩ.

FIGURE 15. RESPONSE TO OC DURING OPERATION FIGURE 16. TURN OFF VIA LOGIN

ISL6116 (-48V) Figures (Continued)

Ch2 GATE

Ch4 ILOAD

Ch3 CTIM

ICR = 2.4A

Ch2 GATE

Ch4 ILOAD

Ch3 CTIM

ICR = 2.4A

Ch1 LOGIN

ISL6115 (+12V) Figures

FIGURE 17. ISL6115 EVAL BOARD SCHEMATIC FIGURE 18. ISL6115 EVAL BOARD PICTURE

5

6

8

7

4

3

2

1

ISL6115

Q1

R2

R3

C1

C2

R4

D1

R5

D2

JP1VBIASV+ B2

DD1

+12V

C3

R1

LOAD -+

PWRON

3.3V

B1

B5

B3 B4

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FIGURE 19. TURN ON VIA PWRON INTO NOMINAL LOAD FIGURE 20. TURN OFF VIA PWRON

FIGURE 21. TURN ON INTO OC FIGURE 22. RESPONSE TO OC DURING OPERATION

ISL6115 (+12V) Figures (Continued)

Ch3 PGOOD

Ch1 GATE

Ch4 ILOAD

Ch2 PWRON

ICR = 1.5A ICR = 1.5A

Ch3 PGOODCh1 GATE

Ch4 ILOAD

Ch2 CTIMICR = 1.5A

Ch3 PGOOD

Ch1 GATE

Ch4 ILOAD

Ch2 CTIM

ICR = 1.5A

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Technical Brief 457

HIP1012A (+5V and +3.3V)Figures 23 and 24 show the HIP1012A dual Hot Swap controller. To configure for +3.3V and +5V, remove JP1, and apply a function generator at pin2 of JP1 for (PWRON2)’.

Figures 25 and 26 show the HIP1012A dual Hot Swap controller load card.

Both Figures 27 and 28 show the same event. Figure 27 shows 5VG and Figure 28 shows I3.3V. After PWRON2 is asserted (forced low), notice the soft-start ramp of 3/12VG to assure inrush current is limited. Observe the PGOOD delay as well.

Figures 29 and 30 both show the same event. Figure 29 shows 5VG and Figure 30 shows I3.3V. Controller is shutdown by forcing PWRON2 high.

Figures 31 and 32 show turning on into an OC condition. Figure 31 shows 3/12VG and PWRON2, while Figure 32 shows I5V and PGOOD. An OC event occurs when the current through the sense resistor exceeds the user programmed OC threshold (see data sheet). The controller enters CR mode and capacitor CTIM begins charging. The nominal time-out period is CTIM x 200kΩ.

Both Figures 33 and 34 show an OC event. Figure 33 shows a 700mA to 1.2A load step into OC range during normal operation, while Figure 34 shows a short occurring during normal operation. Notice that in the “short condition”, Figure 34, 5VG is pulled instantly to GND, then slowly ramped up.

An OC event occurs on the 5V line. Notice that the 3.3V line continues operating normally until CTIM times out and the device latches off (see Figure 35).

TABLE 1. HOT SWAP CONTROLLER LOAD CARD

3.3V LOAD 5V LOAD

00 = Off 00 = Off

01 = 1.0Ω (3.3A) 01 = 10.1Ω (0.5A)

10 = 1.8Ω (1.8A) 10 = 7.0Ω (0.7A)

11 = 0.7Ω (4.7A) 11 = 4.2Ω (1.2A)

HIP1012A (+5V and +3.3V) Figures

FIGURE 23. HIP1012A EVAL BOARD SCHEMATIC

3/12VS1

3/12VG2

VDD3

MODE/4

PWRON25

5VG6

5VS7

3/12ISEN14

RILIM13

GND12

CPUMP11

CTIM10

5VISEN8

PGOOD9

U1

HIP

1012

A

PWRON1

C3

R1

C2

R5

3 /12VIN

GND

GND

5VIN

VDD

3 / 12VOUT

GND

GND

5VOUTJP1

JP2

R2

R4

C1

C4

Q1

Q2

1

R3

CEC1 CEC2

JP3

JP4

LED1

R101

C5

100mΩ

20mΩ

20Ω

10kΩ

20Ω

0.1µF

0.047µF

0.01µF

0.01µF

0.1µF

Note: Test point number equals HIP1012A pin number.

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Technical Brief 457

FIGURE 24. HIP1012A EVAL BOARD PICTURE

FIGURE 25. LOAD CIRCUIT SCHEMATIC FIGURE 26. LOAD CIRCUIT EVAL BOARD PICTURE

FIGURE 27. TURN ON SHOWING BOTH CHANNELS FIGURE 28. TURN ON SHOWING +3.3V DETAILS

HIP1012A (+5V and +3.3V) Figures (Continued)

RL1

RL2

RL3

RL4

SW13

SW14

SW11

SW12

R102

CEF

CEF 9,11,

CEF 1,2,3

CEF 4,5,6,7,8,10

R103

LED3

LED2

0.8Ω

1.6Ω

10Ω

12

Ch4 PGOOD

Ch1 3/12VG

Ch2 5VG

Ch3 (PWRON2)’

5VICR = 1A3.3VICR = 5A

Ch2 I3.3V

Ch4 PGOOD

Ch2 5VG

Ch3 (PWRON2)’

5VICR = 1A3.3VICR = 5A

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Technical Brief 457

FIGURE 29. TURN OFF VIA SHOWING BOTH CHANNELS FIGURE 30. TURN OFF VIA SHOWING +3.3V DETAILS

FIGURE 31. TURN ON INTO OC SHOWING BOTH CHANNELS FIGURE 32. TURN ON INTO OC SHOWING +5V DETAILS

FIGURE 33. RESPONSE TO SHORT DURING OPERATION FIGURE 34. RESPONSE TO OC DURING OPERATION1

HIP1012A (+5V and +3.3V) Figures (Continued)

Ch4 PGOOD

Ch1 3/12VG

Ch2 5VG

Ch3 (PWRON2)’

5VICR = 1A3.3VICR = 5A

Ch4 PGOOD

Ch1 3/12VG

Ch2 I3.3V

Ch3 (PWRON2)’

5VICR = 1A3.3VICR = 5A

Ch3 CTIM

Ch1 3/12VG

Ch2 5VG

Ch4 (PWRON2)’

5VICR = 1A3.3VICR = 5A

Ch4 PGOOD

Ch2 5VG

Ch1 I5V

Ch3 CTIM

5VICR = 1A3.3VICR = 5A

Ch4 PGOOD

Ch2 5VG

Ch1 I5V

Ch3 CTIM

5VICR = 1A3.3VICR = 5A

Ch4 PGOOD

Ch2 5VG

Ch1 I5V

Ch3 CTIM

5VICR = 1A3.3VICR = 5A

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Technical Brief 457

HIP1012A (+5V and 12V)The HIP1012A eval board can also be configured for +5V & +12V Hot Swap control. To do this, jumpers JP3 and JP4 must be removed.

FIGURE 35. RESPONSE TO OC SHOWING BOTH CHANNELS

HIP1012A (+5V and +3.3V) Figures (Continued)

Ch4 PGOOD

Ch2 5VG

Ch1 3V/12VG

Ch3 CTIM

5VICR = 1A3.3VICR = 5A

HIP1012A (+5V and 12V) Figures

FIGURE 36. SCHEMATIC FOR +5V AND +12V OPERATION

3/12VS1

3/12VG2

VDD3

MODE/4

PWRON25

5VG6

5VS7

3/12ISEN14

RILIM13

GND12

CPUMP11

CTIM10

5VISEN8

PGOOD9

U1

HIP

1012

A

PWRON1

C3

R1

C2

R5

3 /12VIN

GND

GND

5VIN

VDD

3 / 12VOUT

GND

GND

5VOUTJP1

JP2

R2

R4

C1

C4

Q1

Q2

1

R3

CEC1 CEC2

JP3

JP4

LED1

R101

C5

100mΩ

20mΩ

20Ω

10kΩ

20Ω

0.1µF

0.047µF

0.01µF

0.01µF

0.1µF

Note: Test point number equals HIP1012A pin number.

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Technical Brief 457

ISL6173 (+3.3V and +2.5V)Figure 38 shows the ISL6173 dual low voltage Hot Swap controller. This IC targets applications between +2.1V and +3.6V for +Vin1, with a second channel controlling applications from +0.7V to +Vin1. The ISL6173 is biased via +Vin1. For the following measurements, channel 1 will control +3.3V, and channel 2 +2.5V.

Both Figures 41 and 42 show the device turning on due to the enable lines being asserted (forced low). Figure 41 shows each output in a soft-start ramp up after being enabled, while Figure 42 shows more detail regarding only channel 1 (+3.3V in this case) during soft-start.

Figures 43 and 44 show an OC condition occurring during operation on channel 1 (+3.3V). The device enters CR mode until CT1 times out, at which point the switch on channel 1 latches off. In Figure 44, note that (PG1)’ is triggered upon VO1 dipping, while (FLT1)’ stays high until CT1 times out. The nominal time-out for this device is (CTIM*1.178)/10µA.

Both Figures 45 and 46 show an OC condition occurring during operation on channel 1 (+3.3V). Figure 45 shows the gate signal and output voltage of channel 2 staying high while channel 1 shuts down. Figure 46 shows the Power Good and Fault signals for each channel, again note that (PG1)’ and (FLT1)’ are tripped, while (PG2)’ and (FLT2)’ remain unaffected.

Figures 47 and 48 show an OC condition occurring during operation on channel 1 (+3.3V). The device enters CR mode but the load recovers before CT1 has a chance to time out. Notice that (PG1)’ is triggered with the dip in VO1, then recovers, while (FLT1)’ stays high due to CT1 never timing out. The nominal time-out for this device is (CTIM*1.178)/10µA.

In Figure 49, the ISL6173 is in reset mode, which means the device will attempt to bring up channel 1 again after discharging CT1 64 times. This process will repeat infinitely.

In the case of high di/dt shorts, a WOC condition exists (see Figure 65). The controller will immediately pull GT to GND before attempting to enter CR mode. Note that the load is released before timeout occurs here.

Both channels are disabled by bringing their respective enable lines high (see Figure 66).

FIGURE 37. +5V AND +12V EVAL BOARD PICTURE

HIP1012A (+5V and 12V) Figures (Continued)

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PG2T2

GND_OUT

VO1

VO2

1

1

1

1

1

1

R3390

J9

TP7

D6MBR130P

TP18

J10

R26390

R54100

5B/TO

C247µF

D3LED55B/TO

TP17

J8

C1747µF

D4

LED55B/TO

5B/TO

R53100 D1

MBR130P5V

5V

VO1

VO2

Technical Brief 457

ISL6173 (+3.3V and +2.5V) Figures

FIGURE 38. EVAL BOARD SCHEMATIC

OPEN = LatchCLOSE = Retry

OPEN = DisableCLOSE = Enable

3.3V

2.5V

FLT1

FL

NO STUFF

NO STUFF

GND_IN

Vi_1

Vi_2

5V

1

1

1

1

1 2

1

5 6 7 8 1 2 3

4

1

1

1

1

1

1 1

1

1

1

1

1

1 2

1 2

11 RTR/LTCH8

BIAS12

CPQ+13

CPQ-11

CPVDD14

PGND10

GND9CT1

7

CT215

VS2

22

SNS2

21

GT2

18

VO2 20

VO1 2GT1

4

SNS1

1

VS1

28

EN1

26

EN2

24

UV1 27

PG1 6

FLT1 5

SS1 3

PG2 16

FLT2 17

SS2 19

UV2 23

OCREF 25

GND1 29

5 6 7 8 1 2 3

4

R1710K

C2110µF

SW3

R92.55K

TP2

C130.47µF

TP15

TP16

TP13

C200.01µF

J3CON2

RS21K

R1810K

R1610K

TP11

M1IRF7821

TP14

R30

1K

R1114.7K

TP3

TP9

C220.022µF

R101K

C51000pF

C30.1µF

TP8D5

LED5

C10

0.033µF

J4

TP6

RS11K

R200

R140

C18220µF

R291.1K

R311K

R2390

TP5

R121K

C40.1µF

C61000pF

C120.15µF

C1220µF

SW2

C9

0.033µF

C142.2µF

R150

R10.01

TP12

J6

R321.1K

TP1

R83.57K

R25390

TP4

TP10

C110.15µF

J2CON2

C190.01µF

J1CON2

R1910K

J7

D2

LED5SW1

J5

R270.01

ISL6173

U1

M2IRF7821

5V

5V

Vi_1

Vi_2

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R615

R34

10

R36

10

R395

R405

R415

R465

R475

R485

5678

123

4

M6IRF7821

5V

5678

123

4

M4IRF7821

R625

R5001

R5201

R635

1TP22

R645

1TP23

1TP24

1TP25

1TP27

1TP29

Technical Brief 457

1TP30

R5949.9

VO2

VO1

R6049.9

NC88

OUTA 7

V+ 6

OUTB 5IN2_4 GND3 IN22 NC11

U2

EL7202/SO

1

TP31

1

TP

35

NC8 8

OUTA 7

V+ 6

OUTB5

IN2_4 GND3 IN22 NC11

U3

EL7202/SO1

TP

36

1

TP32 5678

123

4

M5IRF7821

R33

10

R35

10

R371

R381

R421

R431

R441

R451

5678

123

4

M3IRF7821

R4901

R5101

1TP19

5V

12

34

J11

1TP20

1

2

3

4J12

1TP21

R551K

R561K

R571K

SW6

R581K

SW4

SW5

1

TP

33

1TP26

SW7

1TP28

1

TP

34

FIGURE 39. EVAL BOARD SCHEMATIC (CONTINUED)

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Technical Brief 457

ISL6173 (+3.3V & +2.5V) Figures

FIGURE 40. ISL6173 EVAL BOARD PICTURE

FIGURE 41. TURN ON VIA (EN)’ SHOWING BOTH CHANNELS FIGURE 42. TURN ON SHOWING CHANNEL 1 DETAILS

CH4 (EN2)’ CH2 VO2

CH1 VO1CH3 (EN1)’

BOTH CHANNELS ICR = 2.2ABOTH CHANNELS IWOC = 6.6A

CH4 GT1

CH2 (PG1)’

CH1 VO1

CH3 SS1

BOTH CHANNELS ICR = 2.2ABOTH CHANNELS IWOC = 6.6A

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FIGURE 43. RESPONSE TO OC IN LATCH MODE (CT) FIGURE 44. RESPONSE TO OC IN LATCH MODE ((PG)’)

FIGURE 45. OC CHANNEL COMPARISON (VO AND GT) FIGURE 46. OC CHANNEL COMPARISON ((FLT)’ AND (PG)’)

FIGURE 47. OC WITH RECOVERY BEFORE TIMEOUT (CT) FIGURE 48. OC WITH RECOVERY BEFORE TIMEOUT ((PG)’)

ISL6173 (+3.3V & +2.5V) Figures (Continued)

CH4 ILOAD3.3V

CH2 GT1

CH1 VO1

BOTH CHANNELS ICR = 2.2A

CH3 CT1

BOTH CHANNELS IWOC = 6.6A

BOTH CHANNELS ICR = 2.2ABOTH CHANNELS IWOC = 6.6A

CH4 ILOAD3.3V

CH2 (PG1)’

CH1 VO1

CH3 (FLT1)’

CH4 GT2

CH2 GT1

CH1 VO1

BOTH CHANNELS ICR = 2.2A

CH3 VO2

BOTH CHANNELS IWOC = 6.6A

CH4 (PG2)’

CH2 (FTL1)’CH1 (PG1)’

BOTH CHANNELS ICR = 2.2A

CH3 (PG2)’

BOTH CHANNELS IWOC = 6.6A

CH3 CT1

CH2 GT1

CH1 VO1

BOTH CHANNELS ICR = 2.2A

CH4 ILOAD3.3V

BOTH CHANNELS IWOC = 6.6A

CH4 ILOAD3.3V

CH3 (FTL1)’

CH2 (PG1)’

BOTH CHANNELS ICR = 2.2A

CH1 VO1

BOTH CHANNELS IWOC = 6.6A

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ISL6111 (+12V, -12V, +3.3V, +5V)Figures 52 and 53 show the ISL6111 PCI Hot Plug power switch controller. This IC provides power control for the four legacy supplies (+12V, -12V, 3.3V, 5V) to a PCI or PCI-X slot. The +12V and -12V switches are integrated, while the higher power 3.3V and 5V lines require external N-channel FETs.

Refer to Figures 54 and 55. Though on different time scales, both figures show the same event; Figure 54 shows all four output voltages ramping up, and Figure 55 gives detailed information pertaining to a single rail (+3.3V) at startup. There is a 1Ω resistive load on the +3.3V output.

Refer to Figures 56 and 57. Though on different time scales, both figures show the same event; Figure 56 shows all four output approaching GND, and Figure 57 gives detailed information pertaining to a single rail (+3.3V) at shutdown by EN. There is a 1Ω resistive load on the +3.3V output.

Both Figures 58 and 59 show the same event, each with a different set of details. Note that PGOOD goes low as soon as 3.3VS drops, but FLTLN waits until CR mode has expired. The nominal time-out period for this device is CTIM x 150kΩ.

Turning on into a direct short, the +3.3V section of the controller goes immediately into CR mode until CRTIM times out. The nominal time-out period for this device is CTIM x 150kΩ (see Figure 46).

FIGURE 49. OC IN RESET MODE FIGURE 50. RESPONSE TO WOC

FIGURE 51. TURN OFF VIA (EN)’

ISL6173 (+3.3V & +2.5V) Figures (Continued)

CH3 CT1

CH2 GT1

CH1 VO1

BOTH CHANNELS ICR = 2.2A

CH4 ILOAD3.3V

BOTH CHANNELS IWOC = 6.6A

CH3 CT1

CH2 GT1

CH1 VO1

BOTH CHANNELS ICR = 2.2A

CH4 ILOAD3.3V

BOTH CHANNELS IWOC = 6.6A

CH4 (EN2)’

CH2 VO2

CH1 VO1

CH3 (EN1)’

BOTH CHANNELS IWOC = 6.6ABOTH CHANNELS ICR = 2.2A

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Technical Brief 457

ISL6111 (+12V, -12V, +3.3V, +5V) Figures

FIGURE 52. EVAL BOARD SCHEMATIC

FIGURE 53. EVAL BOARD PICTURE

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FIGURE 54. TURN ON SHOWING ALL OUTPUTS FIGURE 55. TURN ON SHOWING +3.3V DETAILS

FIGURE 56. TURN OFF SHOWING ALL OUTPUTS FIGURE 57. TURN OFF SHOWING +3.3V DETAILS

FIGURE 58. RESPONSE TO OC ON +3.3V CHANNEL FIGURE 59. RESPONSE TO OC ON +3.3V CHANNEL

ISL6111 (+12V, -12V, +3.3V, +5V) Figures (Continued)

CH2 +12VOUT

CH4 +5VOUT

CH1 -12VOUT

CH3 +3.3VOUT

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH2 EN

CH4 ILOAD3.3V

CH3 3VG

CH1 +3.3VOUT

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH2 +12VOUT

CH4 +5VOUT

CH1 -12VOUT

CH3 +3.3VOUT

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH2 EN

CH4 ILOAD3.3V

CH3 3VG

CH1 +3.3VOUT

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH2 CRTIM

CH4 ILOAD3.3V

CH3 FTLN

CH1 +3.3VOUT

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH3 PGOOD

CH4 ILOAD3.3V

CH2 3VG

CH1 3VS

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Technical Brief 457

ISL6118 (+5V x2)Figures 61 and 62 show the ISL6118 dual power supply controller. This IC provides fully independent OC fault protection for the +2.5V to +5.5V environment, with integrated MOSFETs. For ease of testing, EN1 and EN2 were tied together on this board.

Refer to Figures 63 and 64. After EN is asserted, notice the soft-start ramp of both outputs to VIN, in this case +5V. Also

notice that FAULT2 is only an indicator of an OC timeout, thus is not an indicator of under voltage conditions.

Figure 65 shows an OC condition occurring through channel 2 of the IC. Note that channel 1 stays up regardless of the condition of channel 2. Figure 66 shows turning on into an OC condition on channel 2. Again, channel 1 is unaffected.

FIGURE 60. TURN ON INTO SHORT ON +3.3V

ISL6111 (+12V, -12V, +3.3V, +5V) Figures (Continued)

+5VICR = 1A+3.3VICR = 5A+12VICR = 650mA-12VICR = 140mA

CH2 CRTIM

CH4 ILOAD3.3V

CH3 3VG

CH1 +3.3VOUT

ISL6118 (+5V x2) Figures

FIGURE 61. EVAL BOARD SCHEMATIC FIGURE 62. EVAL BOARD PICTURE

1

2

3

4

8

7

6

5EN2 FAULT_OUT2

VIN OUT1

OUT2EN1ISL6118

(VIN)

FAULT_OUT1C1

C2

C4

R1

R3

R5

D1

D2D3

D5

R6

R7

R8

R10

F1

SW1

TP2

C3

R2

R4

D4 R9

TP3

TP4

TP9 TP10

TP6

TP7

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FIGURE 63. TURN ON VIA EN FIGURE 64. TURN OFF VIA EN

FIGURE 65. RESPONSE TO OC CONDITION FIGURE 66. TURN ON INTO SHORT

ISL6118 (+5V x2) Figures (Continued)

CH4 FAULT2

CH3 EN_1&2

CH1 OUT_1/CH2 OUT_2

BOTH CHANNELS ICR = 600mA

CH4 FAULT2

CH3 EN_1&2

CH1 OUT_1/CH2 OUT_2

BOTH CHANNELS ICR = 600mA

CH4 FAULT2

CH2 OUT_2

CH1 OUT_1/CH3 EN_1&2

BOTH CHANNELS ICR = 600mA

CH4 FAULT2

CH2 OUT_2

CH1 OUT_1

BOTH CHANNELS ICR = 600mA

CH3 EN_1&2

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Setting the Overcurrent Trip PointSetting Hot Plug Over Current Trip PointsIn general, Intersil hot plug devices sense load current through a sense resistor, then compare the voltage generated across this sense resistor to a voltage programmed via a “set” resistor

Steps to Set OC Trip Point: (Steps may vary slightly by part)1. Select desired OC trip point level2. Determine RISET by selecting sense threshold voltage to

design to3. Calculate RISENSE based on OC level selected in step 1

HIP1012A, ISL6115, ISL6116 DevicesTo set HIP1012A, ISL6115, and ISL6116 CR levels, use the equation:

With:

Or

For PCI Applications:Set RCRSET to 4.22kΩ, which provides a nominal current trip level 110%-130% higher than maximum specified PCI range

For Non-PCI Applications:Do NOT use RCRSET > 15kΩ (thermal considerations)

Do select RCRSET > 3.0kΩ to avoid noise faults

ISL6173 (+3.3V and +2.5V)To set ISL6173 CR level, use the equation:

Where:

ISL6118The ISL6118 current sense and limiting circuitry sets the current limit to a nominal 600mA.

HIP1012A

RISET RESISTOR (Ω) NOMINAL OC VTH (mV)

10k 200

4.99k 100

2.5k 50

750 15

ISL6115, ISL6116

RILIM RESISTOR (kΩ) NOMINAL OC VTH (mV)

15 150

10 100

7.5 75

4.99 50

RISENSEVthIOC----------=

Vth RISET 10µA•=

Vth RISET 20µA•=

SUPPLY(V ICR)

NOMINAL CURRENT REGULATION LEVEL (10%) FOR EACH SUPPLY

+3.3 ((100µA x RCRSET)/8.54)/RRSENSE

+5.0 ((100µA x RCRSET)/12)/RRSENSE

+12 (100µA x RCRSET)/0.7

-12 (100µA x RCRSET)/3.3

ICRISET RSET•( )

ISNS---------------------------------------=

ISETIREF

4------------- and IREF

VOCREFROCREF------------------------==

IREF typically 80µA( )=

FIGURE 67. CURRENT REGULATION vs VOUT (VIN = 3.3V)

-40°C

25°C

85°C

1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00VOUT (V)

I OU

T (m

A)

700

650

600

550

500

FIGURE 68. CURRENT REGULATION vs VOUT (VIN = 5V)

-40°C

25°C

85°C

1.3 1.5 2.0 2.5 3.0 3.5 4.0 4.5VOUT (V)

I OU

T (m

A)

700

650

600

550

5004.8

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Summary of Overcurrent ResponseHIP1012A - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until programmed timeout occurs. If timeout occurs, both gates latch off. If the load current exceeds 300% of the programmed OC setpoint, affected gate is immediately pulled to ground, then modulated to regulate current to current regulation level until timeout occurs.

HIP1013 - If OC setpoint is exceeded, both gates will latch off ~2µs after OC event

HIP1011, A, B, D, E - If programmed OC setpoint is exceeded, all outputs latch off.

ISL6115, ISL6116, ISL6117, ISL6120 - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until programmed timeout occurs. If timeout occurs, the gate latches off. If the overcurrent voltage threshold is exceeded by more than 150mV, the affected gate is immediately pulled to ground, then modulated to regulate current to current regulation level until timeout occurs.

ISL6118, ISL619, ISL6121 - If OC setpoint is exceeded, current is regulated then the gate latches off ~12ms after OC event.

ISL6111 - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until programmed timeout occurs. If timeout occurs, all four gates latch off.

HIP1020 - This device does not provide current monitoring.

ISL6140, ISL6150 - If programmed OC setpoint is exceeded for more than 2µs, gate will latch off.

ISL6173 - Two levels of overcurrent detection are present, CR mode and WOC (Way Overcurrent) mode. If load current reaches OC setpoint, the gate is modulated to regulate current to current regulation level until current drops below CR or programmed timeout occurs. If timeout occurs, output will either latch off or indefinitely retry depending on condition of RTR/LTCH pin. WOC mode is reached upon a very high di/dt spike of >300% CR. Gate is pulled to GND immediately, then the device enters CR mode.

ISL6141/51 - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until 500µs timeout occurs. If the overcurrent voltage threshold is exceeded by more than 150mV, the affected gate is immediately pulled to ground, then modulated to regulate current to current regulation level until 500µs timeout occurs. If timeout occurs, the gate latches off.

ISL6142/52 - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until programmed timeout occurs. If the overcurrent voltage threshold is exceeded by more than 150mV, the affected gate is immediately pulled to ground, then modulated to regulate current to current regulation level until programmed timeout occurs. If timeout occurs, the gate latches off.

ISL6161 - If programmed OC setpoint is exceeded, gate is modulated to regulate current to current regulation level until programmed timeout occurs. If timeout occurs, both gates latch off. If the load current exceeds 300% of the programmed OC setpoint, affected gate is immediately pulled to ground, then modulated to regulate current to current regulation level until timeout occurs.

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Hot Plug/Hot Swap Target ApplicationsHOT SWAP/HOT PLUG TARGET APPLICATIONS

INTERSILPART

NUMBER

BIASVOLTAGE

(V)

CONTROLLED VOLTAGE(S)

(V) PCICOMPACT

PCISTORAGESYSTEMS

-48VTELECOM USB INFINIBAND

GENERALPURPOSE

HIP1011 +12 +12, -12, +5, +3.3

Y Y

HIP1011A +12 +12, -12, +5, +3.3

Y Y

HIP1011B +12 +12, -12, +5, +3.3

Y Y

HIP1011D +12 +12, -12, +3.3, +5 x2

Y

HIP1011E +12 +12, -12, +3.3, +5 x2

Y

HIP1012A +12 +12/+5 or +5/+3.3

Y

HIP1013 +12 +12/+5 or +5/+3.3

Y

HIP1020 +12 to +5 +12/+5/+3.3 or+5/+3.3

Y Y

ISL6111 +12 +12, -12, +5, +3.3

Y Y Y

ISL6115 +12 +12 Y Y

ISL6116 +12 or -V +5 or -V Y Y Y

ISL6117 +12 +3.3 Y Y Y

ISL6118 +2.5 to +5.5 2.5 to 5.5 Y Y Y

ISL6119 +2.5 to +5.5 2.5 to 5.5 Y Y

ISL6120 +12 +2.5 Y Y

ISL6121 +2.5 to +5.5 2.5 to 5.5 Y Y Y

ISL6140/50 -10 to -80 -10 to -80 Y Y

ISL6141/51 -20 to -80 -20 to -80 Y Y

ISL6142/52 -20 to -80 -20 to -80 Y Y

ISL6160 +12 and +5 +12/+5 Y Y

ISL6161 +12 +12/+3.3 Y Y

ISL6173 +2.1 to +3.6 +2.17 to +3.6, +0.7 to VBIAS

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List of FiguresPage

ISL6116 (+5V) Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2TURN ON VIA PWRON INTO NOMINAL LOAD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2TURN ON VIA PWRON INTO SHORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2RESPONSE TO OC DURING OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3RESPONSE TO FALSE FAULT EVENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

ISL6116 (-12V) Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3ISL6116EVAL1 NEGATIVE VOLTAGE LOW SIDE CONTROLLER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3ISL6116 EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3TURN ON INTO NOMINAL LOAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4TURN ON INTO OVERCURRENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4RESPONSE TO OC DURING OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

ISL6116 (-48V) Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ISL6116 EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ISL6116 EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5TURN ON VIA LOGIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5TURN ON INTO OC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5RESPONSE TO OC DURING OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6TURN OFF VIA LOGIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

ISL6115 (+12V) Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ISL6115 EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ISL6115 EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6TURN ON VIA PWRON INTO NOMINAL LOAD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7TURN OFF VIA PWRON. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7TURN ON INTO OC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7RESPONSE TO OC DURING OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

HIP1012A (+5V and +3.3V) Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8HIP1012A EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8HIP1012A EVAL BOARD PICTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9LOAD CIRCUIT SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9LOAD CIRCUIT EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9TURN ON SHOWING BOTH CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9TURN ON SHOWING +3.3V DETAILS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9TURN OFF VIA SHOWING BOTH CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10TURN OFF VIA SHOWING +3.3V DETAILS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10TURN ON INTO OC SHOWING BOTH CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10TURN ON INTO OC SHOWING +5V DETAILS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10RESPONSE TO SHORT DURING OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10RESPONSE TO OC DURING OPERATION1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10RESPONSE TO OC SHOWING BOTH CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

HIP1012A (+5V and 12V) Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11SCHEMATIC FOR +5V AND +12V OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11+5V AND +12V EVAL BOARD PICTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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Page 26: Understanding Intersil Hot Plug Devices

Technical Brief 457

Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned toverify that the Application Note or Technical Brief is current before proceeding.

For information regarding Intersil Corporation and its products, see www.intersil.com

ISL6173 (+3.3V and +2.5V) Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13EVAL BOARD SCHEMATIC (CONTINUED) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14ISL6173 EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15TURN ON VIA (EN)’ SHOWING BOTH CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15TURN ON SHOWING CHANNEL 1 DETAILS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15RESPONSE TO OC IN LATCH MODE (CT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16RESPONSE TO OC IN LATCH MODE ((PG)’) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16OC CHANNEL COMPARISON (VO AND GT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16OC CHANNEL COMPARISON ((FLT)’ AND (PG)’) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16OC WITH RECOVERY BEFORE TIMEOUT (CT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16OC WITH RECOVERY BEFORE TIMEOUT ((PG)’) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16OC IN RESET MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17RESPONSE TO WOC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17TURN OFF VIA (EN)’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

ISL6111 (+12V, -12V, +3.3V, +5V) Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18TURN ON SHOWING ALL OUTPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19TURN ON SHOWING +3.3V DETAILS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19TURN OFF SHOWING ALL OUTPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19TURN OFF SHOWING +3.3V DETAILS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19RESPONSE TO OC ON +3.3V CHANNEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19RESPONSE TO OC ON +3.3V CHANNEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19TURN ON INTO SHORT ON +3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

ISL6118 (+5V x2) Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20EVAL BOARD SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20EVAL BOARD PICTURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20TURN ON VIA EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21TURN OFF VIA EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21RESPONSE TO OC CONDITION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21TURN ON INTO SHORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

ISL6118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22CURRENT REGULATION vs VOUT (VIN = 3.3V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22CURRENT REGULATION vs VOUT (VIN = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

26 TB457.0April 18, 2006