TRADE-OFFS IN POWER AMPLIFIERS

Chapter 29

TRADE-OFFS IN POWER AMPLIFIERS

Chung Kei Thomas Chan, Steve Hung-Lung Tu and Chris ToumazouCircuits and Systems Group, Imperial College of Science, Technology and Medicine

29.1. IntroductionThe most power-consuming part in a mobile phone is the power amplifier,which amplifies the modulated RF signal and delivers it to the antenna. Ahighly efficient power amplifier reduces the power consumption of the phoneand the heat generated. The reduction in the power consumption increases the“talktime” and reduces the size and the weight of the battery. The reductionin the heat generated reduces the risk of local overheating and relaxes the heatdissipation requirement of the package. With these benefits, a highly efficientpower amplifier enhances the competitiveness of a product in a keen mobilecommunication market.

In order to reduce power loss, the number of transistors is minimized. Usu-ally, only one transistor is required for a single-ended power amplifier and theuse of resistors is avoided. Therefore, many circuit techniques, such as cas-code output and output source follower, are not generally applicable to poweramplifier circuits. Instead, impedance matching and the harmonic eliminationare achieved by passive components, such as inductors, capacitors, transmis-sion lines [1] and coaxial lines [2]. A general model for power amplifiers isshown in Figure 29.1.

The transistor is connected in a common-source configuration. The loadresistor at the drain of the transistor in ordinary common-source amplifiers isreplaced by a large inductor, which is called the Radio Frequency Choke(RFC) or “Big Fat” inductor (BFL). The inductance of should be largeenough to maintain an almost constant current following through it. In otherwords, the impedance of the inductor should be substantially high for AC sig-nals and is negligible for DC signals so that it provides DC bias with very highAC impedance. A filtering and matching network is required to reduce harmon-ics due to large-signal operation of the transistor and deliver sufficient powerto the load. Depending on the conduction angles and the load networks, poweramplifiers can be categorized under many classes: Class A, Class B, Class AB,Class C, Class D, Class E and Class F [3,4]. In Section 29.2, different classesof power amplifiers are briefly described and compared in terms of normalizedpower capability and efficiency. Among different classes of power amplifiers,

843C. Toumazou et al. (eds), Trade-Offs in Analog Circuit Design: The Designer’s Companion, 843–882.© 2002 Kluwer Academic Publishers. Printed in the Netherlands.

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Class E power amplifiers provide 100% ideal efficiency with minimization oftransitions power loss and are suitable for linearization with envelope elimina-tion and restoration (EER) techniques [5]. Therefore, special emphasis is paidon the Class E power amplifier in the later part of this chapter.

Since the Class E tuned power amplifier was introduced by Sokals [6], manypapers on highly efficient Class E power amplifiers have been published [7–14]. Analyses have focused on variations of circuit components [8], operatingduty cycle [9] as well as power efficiency [10, 11]. The power efficiency of thisswitch-mode power amplifier is theoretically 100%. Thus, if one assumes thatthe switching device is ideal [7] then the losses in the amplifier are theoreticallyzero. Kazimierczuk discussed the effects of the collector current fall time onpower efficiency assuming the current is linear and decays after the transistoris switched off [10]. Blanchard and Yuan extend the analysis by assuming thecurrent is an exponential decay during the fall time [11]. All of these papersare based on the assumption ‘ Q-factor of the output resonant tank is infinite.However, the Q-factor of the passive inductors becomes more critical for thecircuits operating at giga-hertz frequencies. This is not only true for the largesize passive inductors but also for inductors implemented on silicon substrateswhere large resistive and capacitive parasitics reduce the inductor Q-factor.In Section 29.3, the trade-off between harmonic distortion introduced by theloaded quality factor and the power efficiency of the amplifiers is presented. Thepower efficiency of Class E power amplifiers are given. Comparisons are madebetween the drain current exponential decay model employed in the analysisand circuit simulation using HSPICE.

Also, in the literature, most of the papers are based on the assumption that theshunt capacitance is linear. The shunt capacitor in a Class E power amplifieris the capacitor connected across the drain and the source of the switchingtransistor. From classical Class E theory, the required shunt capacitance is

Trade-Offs in Power Amplifiers 845

inversely proportional to the operating frequency [7]. At radio frequency in thegiga-hertz band, the required value may be comparable to the nonlinear parasiticcapacitance of the switching transistor at the drain terminal. The effect ofthis nonlinear drain capacitance cannot be neglected. Analysis of the Class Eamplifier with nonlinear shunt capacitance was presented by Chudobiak [15].Recently, a theory based on numerical methods for hyper-abrupt junctions witha grading coefficient 0.67 and 0.75 was presented by Alinikula [16].In Section 29.4, a new approach for finding the optimal zero-bias capacitance ofthe nonlinear drain-bulk capacitor with a hyper-abrupt junction with a gradingcoefficient where n = 1, 2,. . . , 8, 9 for a tuned operationof Class E amplifiers is presented. The approach is also generalized for anynonlinear drain-bulk capacitor. It is interesting that the nonlinearity of theshunt capacitance indeed enhances the Class E characteristics at the expenseof higher device stress. The use of a small auxiliary linear shunt capacitor tocompensate the nonlinearity of the output drain capacitance is suggested. TheAM-to-PM distortion during the linearization of a Class E power amplifierwith the EER technique can be minimized by this small auxiliary linear shuntcapacitor. In addition, the trade-off between operating frequency and devicestress with compensation of the nonlinear shunt capacitance by means of anauxiliary shunt capacitor is discussed.

29.2. Classification of Power Amplifiers

In this section, different classes of power amplifiers are briefly described.The performance of those classes of power amplifiers is compared in termsof normalized power capability and efficiency. There are two mains groups ofpower amplifiers: (1) current-source amplifiers with the transistor acting as acurrent source, and (2) switch-mode amplifiers with the transistor acting as aswitch [6].

29.2.1. Current-Source Power AmplifiersIn Class A, Class AB, Class B and Class C power amplifiers, the input

transistor, acts as a current source. The operation of these power amplifiersis similar to the conventional common-emitter/common-source amplifiers. Theclassification of these power amplifiers depends on the conduction anglewhich represents the duration of conduction of the transistor per one period.For example, conduction angle = 360° means the transistor conducts all thetime and conduction angle = 180° means the transistor conducts for half ofthe period. Table 29.1 shows a classification of these amplifiers.

The transistor operates in its active region of operation when it conductscurrent. That is, the drain/collector voltage of the transistor has to be higherthan a certain value in order for the device to operate in its active region. Power

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loss in the transistor is inevitable when the transistor conducts current. Thus,very high power efficiency with a reasonable amount of output power cannotbe obtained with these amplifiers [4].

To compare different power amplifier designs in terms of device stress andoutput power, the normalized power capability is defined as the ratio of themaximum output power to the product of the maximum transistor voltage andthe maximum transistor current:

where is the maximum output power, is the maximum drainvoltage and is the drain current.

The higher the normalized power capability is, the smaller the stress is onthe device for the same maximum output power. means either thetransistor voltage or the current is infinite for nonzero output power.

For a current-source power amplifier, the maximum amplitude of the signalacross the load is the supply voltage and therefore the maximum output poweris equal to [4]:

The DC voltage across the RF choke is zero. Therefore, the average drainvoltage of the transistor must be equal to the supply voltage. Corresponding tothe maximum output amplitude, the maximum drain-source voltage is equal to:

The maximum drain current is given by [4]:


Substitute equations (29.2), (29.3) and (29.4) into equation (29.1):

The ideal efficiency of a current-source power amplifier is [17]:

Figures 29.2 and 29.3 show the trade-off between the normalized powercapability and the ideal efficiency. The Class C amplifier,

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has the highest ideal efficiency among other classes of current-source poweramplifier. The high ideal efficiency of the Class C power amplifier comes atthe expense of low normalized power capability. In the extreme case, 100%ideal efficiency can be achieved by the Class C power amplifier with zeronormalized power capability at The Class AB amplifier,

also has the maximum normalized power capability of 0.1298at with 58.18% ideal efficiency. Note that the ideal efficiencyis the maximum achievable efficiency. Practically, power losses in the non-ideal components have to be accounted for. Therefore, different topologies ofpower amplifiers with high ideal efficiency and acceptable normalized powercapability are preferable.

29.2.2. Switch-Mode Power AmplifiersIn Class D, Class E and Class F amplifiers, the transistor acts as a switch.

When an ideal switch is ON, the voltage across the switch is zero. On theother hand, when the switch is OFF, the current through the switch is zero.Therefore, there is no simultaneous nonzero voltage and nonzero current atany time. Therefore, there is no power loss in the ideal switching transistor.Theoretically, 100% power efficiency with a reasonable amount of output powercan be obtained with these amplifiers.

The switch current and voltage are independent of the input drive. Instead,the switch current and voltage are controlled by the response of the load net-work. Therefore, the output does not depend on the envelope variation of theinput drive provided that the input drive is high enough for the switch-modeoperation of the transistor. Therefore, the switch-mode amplifiers are calledconstant-envelope amplifiers.

Class D power amplifier. A Class D power amplifier circuit is shownin Figure 29.4. The circuit is similar to a push-pull Class B amplifier. Thetransistors, and conduct alternatively for 180°.

The difference between this Class D amplifier and a push-pull Class B isthat the transistors act as switches. The switches short alternatively the inputterminals transformer T1 to the ground. Theoretically, the drain voltage of thetransistors is a square-wave with amplitude of and DC component ofThe resonator, which is formed by and is tuned to the fundamentalfrequency of the square-wave. Only a sinusoidal current at the fundamentalfrequency will thus flow through the load and the secondary coil. The primarycurrent is a sinusoidal current at the fundamental frequency of the square-wave.Therefore, the drain current of each transistor contains half of the sinusoidalprimary current when they are turned on.


Theoretically, a push–pull Class D power amplifier can achieve 100% idealefficiency with very high normalized power capability of 0.318 [7]. Note thatthe normalized power capability of a single-transistor Class D power amplifieris only 0.159. As with CMOS logic gates, there is substantial power loss duringon/off transitions of the transistors. In addition, the transformers dissipate asubstantial amount of power and usually have to be implemented as discretecomponents. Therefore, Class D power amplifiers are generally not suitablefor radio frequency mobile applications.

Class E power amplifier. The main shortcoming of the Class D poweramplifier is the power loss during on/off transitions. The drain voltage and thedrain current of the transistor in switch-mode amplifiers are determined by thetransient response of the load output network. It is possible to assemble a loadoutput network such that the power loss during on/off transitions is minimized.

A Class E power amplifier is shown in Figure 29.5. is a radio frequencychoke, which provides a DC path to the supply voltage. When the switch is on,

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the voltage across the shunt capacitor, is small. At switch turnoff, time isrequired to charge up this capacitor. Therefore, delays the increase of thedrain voltage at switch turnoff. and form a resonator nearly tuned to theoperating frequency with a residual reactance. When the switch is off, the DCcurrent from and the sinusoid output current from the LC resonator chargeup and then discharge the shunt capacitor, With appropriate componentvalues, the drain voltage rises to a maximum and then decreases to zero witha zero slope.

The waveforms of the normalized drain voltage and the normalizeddrain-to-source current of an ideal Class E power amplifier are shown inFigure 29.6. The power loss during on/off transitions is minimized by shapingthe drain voltage such that its value is small just after turn-off and before turn-on. The minimization of transitions power loss comes at the expense of largedrain voltage in the middle of the turn-off interval. Thus, the transistor suffershigher stress than that in a Class D power amplifier. The normalized powercapability of a Class E power amplifier is 0.0981 [7].

Class F power amplifier. The power loss at on/off transitions can alsobe minimized when the transitions are sharp enough. The closer the drainvoltage waveform to a square wave, the sharper the transitions are. A squarewave with 50% duty cycle contains only odd harmonics. Therefore, the drainvoltage waveform can be shaped close to a square wave by eliminating evenharmonics and enhancing odd harmonics.

By creating an open circuit for all odd harmonics and a short circuit forall even harmonics at the drain of the transistor, 100% ideal efficiency can be


obtained by a Class F power. The required frequency characteristics can beobtained by using a quarter-wavelength transmission line in the output loadnetwork. The main drawback with this implementation is that the requiredtransmission line occupies substantial space. Alternatively, a lump circuit ele-ment implementation of a Class F power amplifier can be used to provide thedesired frequency characteristics at finite number of harmonics.

A typical Class F power amplifier with lump circuit elements is shown inFigure 29.7. is a radio frequency choke, which provides a DC path to thesupply. prevents DC dissipation in the load. All even harmonics are shortedto ground by the resonators. The load networks provide very high impedancefor the third and fifth harmonics. Only the signal with fundamental frequencyreaches the load. Since the circuit does not provides an open circuit for all oddharmonic, the voltage waveform at the output of the transistor is not perfectlysquare-wave. Therefore, the ideal efficiency for a Class F power amplifier withlump circuit elements is lower than 100%. The performance of Class F poweramplifiers with different output networks is shown in Table 29.2.

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The ideal efficiency and normalized power capability of Class F power ampli-fiers improve with increasing number of odd harmonics included. In contrastto current-source power amplifiers, there is no trade-off between the ideal effi-ciency and the normalized power capability for Class F power amplifiers. ForClass F power amplifiers with lump circuit elements, more passive componentsare required to provide high impedance at more number of odd harmonics.Therefore, the increase in ideal performance comes at the expense of higherpower loss from the passive components and larger space occupied.

29.2.3. Bandwidth Efficiency, Power Efficiency andLinearity

Although switch-mode power amplifiers have superior power efficiency per-formance over current-source amplifiers, they are nonlinear amplifiers. Witha sufficient input drive, the transistor acts as a switch. The voltage across andthe current through a switch are not controlled by the input drive but con-trolled by the transient response of the load network. The amplitude of theoutput of switch-mode power amplifier is not controlled by the input drive.Therefore, switch-mode power amplifiers are also called constant-envelopeamplifiers. Linear amplification of signal cannot normally be obtained withthese amplifiers. A RF signal with a constant envelope and smooth phase tran-sitions can be amplified with these highly efficient nonlinear power amplifiers.Switch-mode power amplifiers are used in GSM (Global System for Mobilecommunication) and DECT (Digital European Cordless Telephone) systemsin which constant-envelope modulation schemes with smooth phase transi-tions such as GMSK (Gaussian Minimum Shift Keying) and GFSK (GaussianFrequency Shift Keying) are employed [3].

Typically, constant-envelope modulation schemes with smooth phase transi-tions need wider bandwidth than those with abrupt phase transitions. Bandwidthefficient modulation schemes such as (Differential Quadra-ture Phase Shift Keying) and OQPSK (Offset Quadrature Phase Shift Keying)in NADS (North American Digital Standard) and Qualcomm CDMA (Code-Division Multiple Access) systems requires linear power amplifiers to avoidspectral regrowth [3].

To achieve both high power efficiency and high bandwidth efficiency,linearization techniques are used to linearize power amplifiers with highpower efficiency. Linearization techniques for current-source power amplifiersinclude feedforward [19], Cartesian feedback [20], digital pre-distortion [21],pre-distortion with cubic spline interpolation [22] and Bi-directional Controlfeedback [23]. Basically, these linearization techniques adjust the input driveto obtain a linear output, and therefore, they are not suitable for switch-modepower amplifiers when the output amplitude is independent of the input drive.


EER [5] techniques can be applied to linearize constant-envelope amplifiers.In an EER system, a RF signal is divided into phase and envelope componentswith an amplitude limiter and an envelope detector respectively. The enve-lope component is used to modulate the supply voltage of the power amplifierwhile the phase component is used to drive the switch-mode transistor at theinput.

EER technique was employed to linearize Class C amplifiers [24]. Since theoutput of Class C and Class F amplifiers is not directly proportional to the supplyvoltage [25], a feedback network from the output to the supply is required.The application of EER on Class E amplifiers does not require such feedbackloop [26] because the output voltage of a tuned Class E power amplifier varieslinearly with the supply voltage [7,27]. However, in Class E amplifiers the largevariation in the supply voltage changes the phase of the output. This AM-to-PMdistortion can be minimized with a phase correcting feedback network [28].A simple alternative to minimize the AM-to-PM distortion is presented inSection 29.4.2.

29.3. Effect of Loaded Q-Factor onClass E Power Amplifiers

In this section, the trade-off between harmonic distortion introduced by theloaded quality factor and the power efficiency of the amplifiers is presented. Thepower efficiency of Class E power amplifiers are given. Comparisons are madebetween the drain current exponential decay model employed in the analysisand circuit simulation using HSPICE.

29.3.1. Circuit AnalysisThe basic circuit of the Class E power amplifier is shown in Figure 29.8. For

simplification, we assume that

The inductance of RF choke is high enough that the current that flowsthrough it can be regarded as dc current.

The output capacitance of the active device is independent of theswitching voltage.

The active device is an ideal switch with zero on resistance and zeroswitching time.

The active device is closed for and open for

The loaded Q-factor at the operating frequency f can be defined as [6]

(a)

(b)

(c)

(d)

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For a series resonant circuit, the load current including harmoniccomponents can be represented as [29]

where

and are the amplitude and the initial phase of in the operatingfrequency, respectively. The subscript n refers to the nth harmonic component.Notice that the input voltage signal of the load network can be any waveformwhereas our assumption in the analysis is the case of equal-magnitude signalfor each harmonic.

By applying Kirchhoff’s current law to the circuit in Figure 29.8, the accurrent equation at node D can be written as

Since the MOSFET is conducting in the time period thedrain–source voltage is zero in this period

The ac current is


From equations (29.8), (29.9) and (29.11) the drain current in the period isgiven as

For the time period the drain current can be described as

where is the fall time of drain current [11] and

where is the decay lifetime.Substituting equations (29.8), (29.13) and (29.14) into (29.9), the current

during the fall time is

for Thus the drain–source voltage during this period is

for

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For the time period the MOSFET turns off and the draincurrent approaches zero, thus the capacitive current is

and the drain–source voltage is

forIt is well known that for Class E switching conditions the drain voltage as

well as its derivative should be zero when the MOSFET turns on [6]. Thus, theboundary conditions are

From equations (29.19) and (29.20), we obtain equations (29.21) and (29.22)respectively.


thus,

In equation (29.23), if are known, we can solve the outputcurrent, drain current, and the current flowing through the shunt capacitor.

29.3.2. Power Efficiency

Typically, power efficiency has two definitions; the power added efficiency(PAE) which defined as

and the power efficiency is simply defined as

In this chapter, the power efficiency is referred to the latter definition. Fromthe previous derivation, we can calculate the power efficiency. The supply dcpower is

and the power consumption for a full cycle of the MOSFET is

thus, the power efficiency is given by

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Substituting equations (29.13), (29.14) and (29.16) into equation (29.26)yields

where

29.3.3. Circuit Simulation and Discussion

With the assumption of harmonic distortion in the output signal at the operat-ing frequency, we can derive equation (29.23), which can be solved numerically.Furthermore, we can also solve for the power efficiency. Figure 29.9 shows thedrain–source voltage waveform normalized to vs time for different loadedQ -factor at For a higher the voltage is shifted to higherdegrees. It is seen that the normalized voltage decreases with The drain-source voltage waveform at is shown in Figure 29.10. Foror 6, the normalized voltages are much lower than the case atFigure 29.11 shows the drain current waveform at For a higherthe normalized current is shifted to higher degrees. For the case thewaveform has the shortest decay angle which means the cross-section part ofdrain current and drain–source voltage is smaller than for higher

Figure 29.12 shows the normalized drain current at Comparedto the case at the drain current has a longer decay. To validate the


analysis, HSPICE circuit simulation for 1.8 GHz operation has been performed.The circuit configuration for simulation is shown in Figure 29.13.

Notice that since the RF choke current, is independent of the loadedquality factor, here we can use lower inductance for the RF choke and thecurrent flowing through it at the beginning of the drain current decay is

+ Const instead of Moreover, in order tocompare the performance influenced by the decay angle of the transistor, we

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use two models, one is a commercial CMOS technology, the other isa commercial CMOS technology and the simulation results are shownin Figure 29.14. The power efficiency decreases with an increase of Forthe model, since it has lower decay angle, higher power efficiencycan be expected. Comparing the results to the model, it shows muchslower decrease with an increase of Figure 29.15 shows a comparison


between the theoretical results and HSPICE circuit simulation results, closeagreement has been obtained. The total harmonic distortion analysis is alsogiven in Figure 29.16, serious distortion can be seen for low as predicted.

29.4. Class E Power Amplifiers withNonlinear Shunt Capacitance

In this section, a new approach for finding the optimal zero-bias capacitanceof the nonlinear drain-bulk capacitor with a hyper-abrupt junction for any

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nonlinear drain-bulk capacitor is presented. The use of a small auxiliary linearshunt capacitor to compensate the nonlinearity of the output drain capacitance issuggested. The AM-to-PM distortion during the linearization of Class E poweramplifier with the EER technique can be minimized by this small auxiliarylinear shunt capacitor. In addition, the trade-off between operating frequencyand device stress is also discussed.


29.4.1. Numerical Computation of OptimumComponent Values

The ideal Class E power amplifier circuit is shown in Figure 29.17.The assumptions made in this analysis are

1

2

3

4

5

6

The transistor acts as an ideal switch.

The inductance of the radio frequency choke, is infinite.

The quality factor, of the resonant tank formed by and isinfinite.

All passive components except are linear.

The shunt capacitor is a hyper-abrupt junction capacitor.

The switching duty cycle is 50%.

Basic equations. The expressions for the output voltage the outputcurrent the fundamental voltage and the charging current are the sameas those for the case of a linear shunt capacitor [7]. Since only pure sinusoidcurrent at operating frequency, can pass through the resonant tank withinfinite the output voltage and current are sinusoidal:

where is the angular time; is the phase shift with respect to the inputand c is the amplitude of the output voltage.

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The series reactance, jX , introduces a phase difference between the outputvoltage and the fundamental component of the drain voltage. The voltage atthe output of the ideal resonator is given by:

If the inductance of is infinite, only constant DC current can flow throughit. Therefore, in Figure 29.17 can be denoted by Applying KCL at thedrain of the transistor,

When the switch is open,

The drain-to-bulk capacitor can be modeled as a reverse-biased hyper-abruptPN junction capacitor:

where is the voltage across the capacitor; is the gradingcoefficient; is the zero-bias capacitance; n is an integer and is thejunction built-in voltage. n and are process dependent.

The charging current is given by

Let the shunt capacitance be equal to the drain-to-bulk capacitorSubstitute equations (29.37) and (29.39) into equation (29.40) and


integrate both sides,

Optimum operation (Alinikula’s method [16] ). Equation (29.42) isused to solve for the capacitor voltage

By applying the Class E conditions and

For 100% efficiency, the output power is equal to the input power.

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Substitute equation (29.48) and solve for

The value of R is determined by the output power and the supply voltage.For 100% efficiency,

Equation (29.46) shows that the phase shift is unaffected by the non-linearity of the parasitic shunt capacitance as long as the Class E opera-tion is maintained. Substitute equations (29.44), (29.45) and (29.52) intoequation (29.43),

The DC voltage across an infinite inductor must be zero. Therefore,

The result of the integration is a (n + l)th order nonlinear equation forunknown Numerical methods are applied to integrate equation (29.57) andsolve the resulting (n + l)th order equation for unknown [16]. Solutions forn = 1, 2, 3 can be obtained by this method. The higher value of n, the higherthe order of the equation. The resulting equation becomes too complicated tobe calculated by numerical means for n > 3.

Physical property approach. In this section, the derivation of a solutionis based on observation of the physical property of capacitors. Equation (29.42)can be written as:


where and are the charges in the capacitor in terms of angulartime and the capacitor voltage respectively. According to the property ofcapacitors, if and only if So, the condition, at

can be written as:

According to the property of capacitors, the rate of change of the voltageacross a capacitor is zero if and only if the charging current is zero. So, thecondition at can be written as:

It is interesting to find that the equations (29.63) and (29.65) for Class Econditions are unaffected by the nonlinearity of the capacitor. Therefore, thephase shift is unchanged and thus the DC current the required load Rand the output voltage amplitude c are unaffected by the nonlinearity of thecapacitor.

From equations (29.66)-(29.68) and (29.89), the charges in the draincapacitor

is also unaffected by the nonlinearity of the drain capacitance and can becomputed given The stored charge is a monotonically

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increasing function of voltage. Therefore, for a given value of the root of thefollowing function can be found by a bisection method.

The calculation of drain voltage is illustrated graphically inFigure 29.18. The parameters in this example aref = 1 GHz, and n = 9. The top-left sub-graph shows the wave-form of and the top-right sub-graph shows the waveform of Thevalue of at a certain value can be obtained by equating the correspondingcharges. Therefore, the two sub-graphs can be combined to form the bottom-right sub-graph which is the relationship between and In the bottom-leftsub-graph, the solid line is the drain voltage waveform when a nonlinear shuntcapacitor n = 9 is used and the dotted line is the drain voltage waveform whena linear shunt capacitor is used. The average voltage across the shunt capacitoris given by,


For the same amount of stored charges, the higher the zero-bias capacitance,the lower the voltage across the capacitor is. Therefore, an increase in thezero-bias capacitance reduces the average voltage across the capacitor. Thatis, is a monotonically decreasing function of The root of thefollowing function can be found by using a bisection method.

The method requires two bisection procedure loops. The outer loop is usedto find the root of in equation (29.72) and the inner loop is used to findthe root of in equation (29.70) for each value of

Fourier analysis. Similar to the linear case, the series reactance jX canbe found with Fourier analysis:

Therefore, by finding the and components ofX can be found.

Normalized power capability. The maximum drain voltage can beobtained by finding the angular time at which maximum drain voltageoccurs [7].

When the switch is closed,

From equation (29.35),

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The maximum drain current is given by [7]:

Using equations (29.79) and (29.82), the normalized power capability can becalculated. The normalized component values and characteristics of a Class Epower amplifier with nonlinear drain capacitance are shown Figure 29.19.

The drain voltage waveform for a Class E power amplifier with a nonlinearshunt capacitance n = 9 is shown in the bottom-left sub-graph of Figure 29.18.In the short time intervals after turn-off and before turn-on, the drain voltagewith a nonlinear shunt capacitance is smaller than that with a linear shuntcapacitance. A Class E power amplifier with a nonlinear shunt capacitancehas better performance in terms of on/off transition power loss due to a smallvariation in frequency or duty cycle. However, the maximum drain voltage fora Class E power amplifier with a nonlinear shunt capacitance is higher than thatwith a linear shunt capacitance. Therefore, there is a trade-off between on/offtransition power loss suppression and normalized power capability.

In Figure 29.19, the bottom-right sub-graph shows the trade-off between thenormalized supply voltage and the normalized power capability. Note that theoutput power is proportional to the square of the supply voltage. Therefore, it isalso a trade-off between the normalized power capability and the output power.The normalized power capability drops sharply with increasing supply voltagewhen the supply voltage is small and decreases slowly when the supply voltageis large. It is also observed that the more nonlinear the shunt capacitance is, thesmaller the normalized power capability becomes.

29.4.2. Generalized Numerical Method

The method is generalized for any nonlinear shunt capacitance. The chargesin the capacitors can be represented in two forms:

Following the same arguments in the previous section, the charge isindependent of the nonlinearity of the drain capacitance for a tuned Class Epower amplifier. Given the expression for nonlinear capacitance thecharge can be obtained by equation (29.84). According to the phys-ical property of capacitors, the amount of stored charges is a monotonically


increasing function of voltage. Given any the drain voltage canbe obtained by finding the root of equation (29.70) with the bisection methodfor each value of angular time

Consider a nonlinear capacitance with parameter such that

Since is a monotonically increasing function of voltage, the volt-age across has to be higher than that across for the sameamount of stored charges, that is, for the same amount of

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Therefore, the average drain voltage is a monotonically decreasingfunction of The root of the following function can be found by using abisection method.

Similar to the method described previously, the generalized method requirestwo bisection procedure loops. The outer loop is used to find the root ofin equation (29.89) and the inner loop is used to find the root of inequation (29.70).

Design example. A 1 GHz 0.4 W Class E power amplifier with supplyvoltage 1.4V was designed with the generalized numerical method. The AMS

CMOS process BSIM3v3 model was used in the simulation. The drainparasitic capacitance was modeled as:

where cgd0, cj, pb, mj, cjsw, pbsw, mjsw and dwc are technology dependentparameters; is the channel width and is the length of the drain.This model of the shunt capacitance satisfies the condition set by equation(29.85) with as the parameter Please refer to Figure 29.17 for the idealcircuit of a Class E power amplifier. From equation (29.68),Let the quality factor Thus, andMinimum channel length of was used to maximize the drain currentdriving capability of the transistor. The optimum width of the transistor andthe required excess reactance were calculated using the generalized numericalmethod: and which corresponds to an inductanceof 0.530 nH. A very large DC-Feed inductor was used in order tosatisfy the assumption of an infinite DC-Feed inductor.

The transient analysis simulations were performed by the Cadence Spectressimulator. The simulation time was set to be long enough for the circuit toreach steady-state. A square wave at 1 GHz was applied to the gate of thetransistor. The waveforms for the drain voltage and the drain-source currentat input power of 17.2 dBm are shown in Figure 29.20. The drain efficiencyand power added efficiency PAE were 95.8% and 80.2% respectively.

Small linear shunt capacitor. In the literature, the use of a shunt linearcapacitor in parallel with the parasitic drain capacitor was mentioned [30,31].


In order to make the effect of the nonlinearity of the parasitic drain capaci-tance negligible, the linear shunt capacitor has to be much larger than that ofparasitic. However, the required shunt capacitance for the tuned operation ofClass E amplifiers at high frequency is small and comparable to the parasiticcapacitor. Therefore, using a large shunt capacitor to minimize the effect of thenonlinearity of parasitic drain capacitance is not possible. In fact, the nonlineardrain capacitance together with a small linear auxiliary capacitor is proposedto provide the required shunt capacitance.

Elimination of AM-to-PM distortion. From Subsection 29.2.3, by apply-ing EER linearization technique on Class E power amplifiers, both high powerefficiency and bandwidth efficiency can be achieved. However, due to the AM-to-PM distortion, there is a trade-off between the maximum supply voltage andthe phase accuracy. To minimize the AM-to-PM distortion a phase-correctingfeedback network, which consists of a limiting amplifier, a phase detector anda phase shifter, was suggested. In this section, a simple idea to minimize theAM-to-PM distortion is described.

From equation (29.66), the phase is theoretically independent ofthe nonlinearity of the shunt capacitance and the supply voltage if thepower amplifier is tuned. Component values for optimal Class E operationat different supply voltage can be found. From Figure 29.19, the variationof the series reactance jX is small compared to the variation of the optimalzero-bias shunt capacitance Therefore, variation of the optimal zero-biasshunt capacitance could be sufficient to minimize the AM-to-PM distortion.However, once the transistor is fabricated, the zero-bias capacitance cannot be

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adjusted with respect to the variation of the supply voltage. A variable aux-iliary shunt capacitor is added in parallel with the drain capacitance. If thecapacitance of the auxiliary capacitor can be adjusted according to the modu-lation of the supply voltage, the AM-to-PM distortion due to the nonlinearityof the shunt capacitor can be minimized. The proposed circuit is shown inFigure 29.21. is the output parasitic capacitance and is the variableauxiliary capacitor.

The variable auxiliary capacitor may be realized by using a network ofcapacitor with controlling transistors [32], The model of the shunt capacitor isgiven by

where is the zero-bias capacitance of the drain–bulk junction and isthe capacitance of the linear auxiliary capacitor. This model of the shuntcapacitance satisfies the condition set by equation (29.85) with as theparameter The optimum values for the linear auxiliary capacitor can becalculated with the generalized method. In this analysis, is fixed and equalto which is the shunt capacitance in the linear case.

Figure 29.22 shows the results of the analysis. In equation (29.91), the firstterm represents the nonlinear capacitance due to the drain parasitic capacitance.The value of this nonlinear term decreases with increasing supply voltage. Ata small supply voltage, the nonlinear term is relatively large and the requiredlinear auxiliary capacitance is small. The characteristic for the nonlinear capaci-tance is dominant. Therefore, the normalized maximum drain voltage increaseswith the supply voltage and the normalized power capability decreases. Ata large supply voltage, the nonlinear term is small and the required linear


capacitance is large. The characteristic for the linear capacitance is dominant.Therefore, the normalized maximum drain voltage tends to reduce to the valuefor the linear case. Thus, the normalized power capability increases with thesupply voltage.

To illustrate the AM-to-PM distortion on Class E power amplifiers, a 1 GHzClass E power amplifier with an abrupt junction drain capacitance was sim-ulated. The power amplifier was designed to output 1 W power at 3.3Vsupply voltage. The component values aren = 1, and

The supply voltage was varied linearly from 0.1 to 3.3V. Asshown in Figure 29.23(a), the output voltage varies very linearly with thesupply voltage. Figure 29.23(b) shows a magnified view of the boxed areain Figure 29.23(a). It is noticed that the phase of the output voltage alsochanges with the supply voltage. This is called the AM-to-PM distortion. Inthis example, the output phase variation can be as large as 14.76°.

Figure 29.24 shows the output voltage of the same Class E power amplifierwith an ideal variable auxiliary shunt capacitor. Figure 29.24(a) shows that the

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output voltage varies linearly with the supply voltage. Figure 29.24(b) showsa magnified view of the boxed area in Figure 29.24(b). It is noticed that thephase does not change significantly with the supply voltage. The phase changebetween 0.1 and 3.3V supply is limited to 2.16° in this example.

Compensation for MHz Operation. At low frequency 1 MHz, therequired linear shunt capacitance is usually much larger than the nonlinear draincapacitance. The drain capacitance is negligible and the required linear shuntcapacitance can be obtained by conventional Class E theory. At high frequency1 GHz, the required linear shunt capacitance is very small and comparable to


the drain capacitance. It is sensible to use the nonlinear drain capacitance toreplace the linear shunt capacitance. At frequency between 1 MHz and 1 GHz,the required linear shunt capacitance is small and thus the drain capacitance isnot negligible. The required shunt capacitance can be provided partially by asmall linear auxiliary capacitor and partially by the drain capacitor. The modelfor the shunt capacitance is given by

where is the nonlinear drain capacitance and is the linear auxiliarycapacitance. This model of the shunt capacitance satisfies the condition set by

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equation (29.85) with as the parameter The optimum values for the linearauxiliary capacitor can be calculated with the generalized method. Analysisresults on a 1.4V 0.4 W Class E power amplifier at frequency ranging from1 MHz to 1 GHz are shown in Figure 29.25. In this analysis, the nonlineartransistor output capacitance is given by equation (29.90) with

As shown in the top-left sub-graph of Figure 29.25, the normalized linearauxiliary capacitor changes from 1 to 0 as frequency increases from 1 MHz to1 GHz. In the bottom-left sub-graph, the normalized power capability decreasesaccordingly as the nonlinear transistor output capacitance becomes dominant.Clearly, there is a trade-off between the operating frequency and the normal-ized power capability. The bottom-right sub-graph shows the drain voltagewaveforms at different frequencies.

29.5. Conclusion

In this chapter, different classes of power amplifiers are compared interms of ideal efficiency, power capability and bandwidth efficiency. Among


current-source power amplifiers, Class C power amplifiers have highest idealefficiency with low normalized power capability whilst Class AB poweramplifiers have high normalized power capability with low ideal efficiency.Theoretically, all switch-mode power amplifiers can achieve 100% ideal effi-ciency. Class D and Class F power amplifiers have the highest possible powercapability of 0.159. Depending on the number of odd harmonics present inthe drain voltage waveform of Class F power amplifiers, the ideal efficiencyvaries from 78.5% to 100% with normalized power capability from 0.125 to0.159. The improvement of ideal efficiency of Class F power amplifiers doesnot come at the expense of normalized power capability but at the expense ofhigher complexity of the circuit. Class E power amplifiers also have 100% idealefficiency with acceptable normalized power capability of 0.0981. The advan-tages of Class E power amplifiers over other classes of switch-mode poweramplifiers are the minimization of power losses during transistor on/off transi-tions and suitability for linearization with EER technique to improve bandwidthefficiency. The latter part of this chapter focuses on Class E power amplifiers.

An analytical method is derived to describe the power efficiency of a ClassE power amplifier taking into account the loaded Q-factor. With the mecha-nism of the power losses associated with the drain current fall time, we derivethe equations governing the operation of Class E power amplifier and theseequations make the performance more predictable. Circuit simulations usingCMOS SPICE models are performed to confirm the validity of our models.Characteristics of this circuit as a function of and have been shown.In terms of power efficiency and linearity, the plausible is in the rangeof 5–10. For small feature size MOS devices, lower fall time angle can beexpected and loaded Q-factor becomes less important for power efficiency.On the other hand, given the continued advances in scaling of silicon MOStechnologies, it is evident that high power efficiency CMOS power ampli-fier is possible in the near future as deep-submicron technologies becomecommercially available.

A theory based on physical properties of capacitor for Class E power ampli-fiers with nonlinear transistor output capacitance is presented. A generalizednumerical method to obtain optimal component values for any nonlinear tran-sistor output capacitance is described. A design example of a realistic Class Epower amplifier with a BSIM3v3 drain capacitance model is used to validatethe method. From simulation results, it is found that the nonlinearity of theshunt capacitance reduces the drain-to-source voltage near on/off transitionsbut increases the maximum drain-to-source voltage. Hence, there is a trade-offbetween reduction of power loss during on/off transitions and the device stress.An alternative way to minimize AM-to-PM distortion in EER linearizationmethod for Class E power amplifiers is also proposed. A small linear auxiliaryshunt capacitor is proposed to provide the required shunt capacitance together

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with the nonlinear transistor output capacitance. A linearized Class E poweramplifier can be used in a system with a more bandwidth efficient modula-tion scheme and thus the trade-off between power efficiency and bandwidthefficiency can be relaxed.

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TRADE-OFFS IN POWER AMPLIFIERS

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