Title of Presentationthor.inemi.org/webdownload/2018/PCBA_Cleanliness_CFP_041618.pdfAnticipated...
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PCBA Cleanliness Recording (available for up to 6 months after webinar) https://inemi.webex.com/inemi/lsr.php?RCID=7596788636014d36b8a25513180d6f1d Call for Participation April 16, 2018 Note: All phones are on mute
Transcript of Title of Presentationthor.inemi.org/webdownload/2018/PCBA_Cleanliness_CFP_041618.pdfAnticipated...
PCBA Cleanliness
Recording (available for up to 6 months after webinar)https://inemi.webex.com/inemi/lsr.php?RCID=7596788636014d36b8a25513180d6f1d
Call for Participation
April 16, 2018
Note: All phones are on mute
PCBA Cleanliness
• Introduction of Project Chairs
• Background
• SOW Review
• How to Join
Note: All phones will be on mute during the presentation. Please type questions
into the chat window.
Project Leaders
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Name Company Email
Mike Bixenman KYZEN [email protected]
San Wong GE [email protected]
Mark Schaffer iNEMI (Project Manager) [email protected]
Background
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Site Specific Problem
• Failures do not occur uniformly across the PCB
• Leadless and BTCs are problematic due to
– Minimal electrical clearance between the power and ground
The Challenge
Cleaning challenged component packages
< 2 Year Lifetime > 2 Year Lifetime
Ambient
Environment
Harsh
Environments
Class 1 Electronics
Failure of the Device is
not a major concern
Class 2 & 3 Electronics
Continued Performance over the
Lifetime of the Product is Required
On Site Test Methods
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Evaluation Criteria /
Method
Visual
Inspection
On Site Ionic
Contamination
Testing
Site Specific
Testing
Objective
Evidence
Visual with Microscope Yes No Yes Yes / No
ROSE No Yes No Yes / No
Corrosivity Index C3 No Yes Yes Yes / No
Ion Chromatography No No Yes Yes
SIR No Limited Today Yes Yes
Ionic Contamination
• Best Practice is to test on production hardware
• Surface Insulation Resistance (SIR)
– Only method that directly measures the impact that ionic
contamination has on the electrical performance of the PCB
• The problem
– Production hardware not designed to run SIR testing
– SIR testing is expensive
– Takes a week to run
– Commonly run at outside labs
IPC B-52 Test Board
• Multi-dimensional test board
• Designed to run SIR/IC on a range of components
• Commonly used to Qualify and Validate process
changes
• Typically analyzed at outside labs
QFN Test Board Design
• SIR / IC Test Board
• 4 Quadrants
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DOE Factors / Levels
• Cleanliness
– Control
– Solder Paste
• No-Clean
• Water Soluble
– Reflow Profile
• Soak
• Ramp to Spike
– Cleaning
• No-Cleaning
• Partial Cleaning
• Total Cleaning
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• Board Design
Features
– Solder Mask Defined
– Non-Solder Mask
Defined
– No-Solder Mask
• Conformal Coating
– Yes / No
Test Methods
• SIR
– IPC TM-650 2.6.3.7
• 40C, 85%RH, 5VDC
• Ion Chromatography
– IPC TM-650 2.3.28
• Localized (Breakoff Quadrants)
• Dye and Pry
– Visual inspection following SIR testing
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SOW Review
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Scope of Work
Predict and understand functional performance of
cleaning single row QFN component packages (single row
QFN is representative of low clearance, leadless electronic
packages) in harsh environments after different cleaning
methods.
Goal
• The goal of this project is to “Develop/Collect a
set of best practice guidelines for”
– Understanding the relationship between ionic
contamination and electrical performance in harsh
environments
– Understanding trade-offs between electrical, ionic
contamination levels, and cleaning costs
– Utilizing the knowledge gained from undertaking the
testing of QFN components and associated DOE,
establish a reference Test Suite or Test Spec for
Cleanliness
IS/IS Not
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Project IS Project IS NOT
Material and component study:
• Focused on QFN / Targeted on this Bottom Terminated Component
• PCB component standoff for out-gassing of solder flux during reflow
• Recommendations on board design/layout
• Solder Mask effects
• H20 soluble and no-clean solders (types and brands TBD by team)
• Cleaning saponifier (types and brands TBD by team)
• Component underfill material (types and brands TBD by team)
• Conformal coating protection (types and brands TBD by team)
Development of a specific standard(s)
Repeat of prior or existing work
Biased towards specific suppliers, geographies, or market segments
Mixed Technology Boards
Other leadless component types
Multi-Row QFN
Fab / Bare PCB Manufacturing
Cleaning process study:
• Permutations of methods for characterizing soldering materials, reflow
conditions, cleaning agents, cleaning machines, conformal coating,
underfill and other cleaning process parameters.
• Development of improved methods for determining: “How clean is
clean enough for the intended application?”
Testing and data correlation:
• Test methods include IC, C3, SIR, “dye and pry” to investigate residue
under the QFN after reflow
• voltage / electric field, temperature/humidity, test time considerations
• Corelate IC/C3/SIR/”dye and pry” results to cleaning parameters
• Rank cleaning methods, assembly parameters and testing results
Task List/Timeline
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Task 1: Develop the Test
Plan (DOEs)x x x
Task 2: Run DOEs x x x
Task 3: Data Analysis x x
Task 4: Test Suite and Test
Spec for Cleanlinessx x x
Task 5: Close out Project x
Anticipated Outcome/Deliverables
• This project will develop a set of best practice guidelines for low
clearance, leadless electronic packages
– Bare board design.
– Validating materials, process conditions and hardware.
– Cleanliness levels.
• Test methods designed to test at the component site.
• The project will focus on better methods for determining the
electrochemical reliability of specific component types.
• Primary deliverable from this project will be a “Test Suite and Test
Plan for Cleanliness.”, including a tradeoff analysis of costs,
cleaning processes and cleanliness levels.
Schedule
• Call for Participation Webinars:
– Session 1: Monday, April 16th 11 am – Noon ET
– Session 2: Tuesday, April 17th 9 am – 10 am CST
• Initial Sign up ends May 18th
• Project Kickoff Plan
– Early June, Time for meetings TBD based on sign-ups
• Duration (Approximately 12 months)
– Start in June 2018 and present findings by end of July 2019.
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How to Join
• Go to the project website and download the project statement :
http://community.inemi.org/pcba_cleanliness
• For iNEMI Members:
– Download the Project Statement
– Fax the completed statement to +1 (703) 834-2735 or scan + email to
• For non-members:
– Discuss annual membership fees with Marc Benowitz in North America
([email protected]), Haley Fu in Asia ([email protected]), or Grace
O'Malley in Europe ([email protected]).
– Complete the iNEMI membership application. (www.inemi.org)
– Fax the completed documents to +1 (703) 834-2735 or scan + email:
– Download the Project Statement
– Fax the completed statement to +1 (703) 834-2735 or scan + email:
Please Note: iNEMI membership is required to participate in the iNEMI
PCBA Cleanliness Project. 20
