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Threshold Voltage Control of Multilayered MoS2 Field-Effect Transistors via Octadecyltrichlorosilane and their Applications to Active Matrixed Quantum Dot Displays Driven by Enhancement-Mode Logic Gates

Jeongkyun Roh, Jae Hyeon Ryu, Geun Woo Baek, Heeyoung Jung, Seung Gi Seo, Kunsik An, Byeong Guk Jeong, Doh C. Lee, Byung Hee Hong, Wan Ki Bae, Jong-Ho Lee, Changhee Lee,* and Sung Hun Jin*

DOI: 10.1002/smll.201803852

1. Introduction

In a recent past, among 2D nongraphene materials, transition metal dichalcoge-nides (TMDCs) have gained magnificent attention as a potential use in next-gener-ation nanooptoelectronic devices. Unlike graphene, TMDCs exhibit a sizable direct (or indirect) band gap that is one of the favorable assets in many optoelectronic applications such as field-effect transis-tors (FETs),[1,2] nonvolatile memory cells,[3] biochemical sensors,[4–6] and photodetec-tors.[7] In the family of semiconducting TMDCs, molybdenum disulfide (MoS2) has been the most widely studied because of easy preparation of films via exfolia-tion (or chemical vapor deposition (CVD) growth), excellent electrical and optical properties, mechanical and thermal sta-bility, and the absence of dangling bonds, etc.[8,9] Owing to the excellent switching properties with high field-effect mobility exceeding 100 cm2 V−1 s−1, high current on-to-off ratio (>108), and nearly ideal subthreshold swing (SS),[1,2,10] intensive

In recent past, for next-generation device opportunities such as sub-10 nm channel field-effect transistors (FETs), tunneling FETs, and high-end display backplanes, tremendous research on multilayered molybdenum disulfide (MoS2) among transition metal dichalcogenides has been actively per-formed. However, nonavailability on a matured threshold voltage control scheme, like a substitutional doping in Si technology, has been plagued for the prosperity of 2D materials in electronics. Herein, an adjustment scheme for threshold voltage of MoS2 FETs by using self-assembled monolayer treatment via octadecyltrichlorosilane is proposed and demonstrated to show MoS2 FETs in an enhancement mode with preservation of electrical para meters such as field-effect mobility, subthreshold swing, and current on–off ratio. Furthermore, the mechanisms for threshold voltage adjustment are systematically studied by using atomic force microscopy, Raman, tem-perature-dependent electrical characterization, etc. For validation of effects of threshold voltage engineering on MoS2 FETs, full swing inverters, com-prising enhancement mode drivers and depletion mode loads are perfectly demonstrated with a maximum gain of 18.2 and a noise margin of ≈45% of 1/2 VDD. More impressively, quantum dot light-emitting diodes, driven by enhancement mode MoS2 FETs, stably demonstrate 120 cd m−2 at the gate-to-source voltage of 5 V, exhibiting promising opportunities for future display application.

Field-Effect Transistors

Dr. J. Roh, G. W. Baek, Dr. H. Jung, K. An, Prof. J.-H. Lee, Prof. C. LeeDepartment of Electrical and Computer EngineeringInter-University Semiconductor Research CenterSeoul National University1 Gwanak-ro, Gwanak-gu, Seoul 08826, Republic of KoreaE-mail: chlee7@snu.ac.krJ. H. Ryu, S. G. Seo, Prof. S. H. JinDepartment of Electronic EngineeringIncheon National UniversityAcademy-ro, Yeongsu-gu, Incheon 22012, Republic of KoreaE-mail: shjin@inu.ac.kr

The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/smll.201803852.

B. G. Jeong, Prof. D. C. LeeDepartment of Chemical and Biomolecular EngineeringKorea Advanced Institute of Science and Technology (KAIST)Daejeon 34141, Republic of KoreaProf. B. H. HongDepartment of ChemistrySeoul National University1 Gwanak-ro, Gwanak-gu, Seoul 08826, Republic of KoreaProf. W. K. BaeSKKU Advanced Institute of Nano Technology (SAINT)Sungkyunkwan UniversitySeobu-ro, Jangan-gu, Suwon-si 16419, Gyeonggi-do, Republic of Korea

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studies have been toward understanding on fundamental oper-ation principles in single (or multilayered) MoS2 FETs and their electrical performance improvement, for example, on electrical contact properties. In parallel, a variety of digital and analog cir-cuits have been demonstrated based on MoS2 FETs.[11–13] More-over, excellent mechanical flexibility, transparency, and superior electrical properties for MoS2 FETs as the aforementioned are appealing aspects for the potential use in driving circuits for next-generation displays.[14] However, there have been few attempts to demonstrate organic light-emitting diode (OLED) (or quantum dot (QD)) display pixels driven by MoS2 FETs.[15–17]

Despite its superior electrical characteristics of MoS2 FETs and promising potential uses in semiconductor and display industry, there are several hurdles to overcome for achieving high impacts on electronic applications. For a variety of electronic applica-tions based on multilayered MoS2 FETs, one of the most critical issues is to control threshold voltage because TMDCs are not intrinsically compatible with conventionally used-substitutional doping processes in Si technologies. In this sense, most of the MoS2 FETs, reported in literatures, have been operational in the depletion mode, which is turned on at the gate-to-source bias of zero voltage in off bias condition, thereby being plagued by power loss in typical driving circuit systems. This phenomenon has been observed in both monolayer and multilayered MoS2 FETs in different device architectures (i.e., top-gated or bottom-gated).[2,10,18,19] This feature is undesirable in most applications, particularly for logic gates and display backplanes because either additional negative bias appliance or a complicated compensa-tion circuit is required to turn off switching devices (or circuits) properly. Furthermore, depletion-mode FETs are not desirable for operational stability because they exhibit large gate overdrive voltage (i.e., effective bias applied to channel, VOV = VGS−VTH) as a result of negative threshold voltage implying that large bias stress applies during operation. Therefore, the device imple-mentation scheme, being operational in the enhancement-mode MoS2 FETs controlled by intentional threshold voltage adjust-ment, is of significance not only for the practical uses but also for achieving high stable devices.

Different from silicon-based metal-oxide-semiconductor FETs (MOSFETs) that can easily tune the threshold voltage by substitutional doping through ion implantation, threshold voltage engineering as a controllable manner has been a chal-lenging issue in various types of FETs based on nanomaterials such as organic semiconductors,[20] amorphous metal oxides,[21] and carbon nanotubes.[22] Similar to other types of nanomate-rial-based FETs, there have been some studies on controlling threshold voltage of TMDC FETs. Recently several studies have addressed the modulation of threshold voltage of TMDC FETs via a variety of methods; (i) employing metal with different work function for gate electrode,[12,23,24] (ii) inducing interface dipole at the gate insulator interface by fluoropolymer[25,26] or self-assembled monolayer (SAM),[27] (iii) employing molecular doping,[28] (iv) controlling device structure,[11,29] and (v) applying surface treatment by annealing.[30,31] However, each method has peculiar drawbacks such as limited tunability, deterioration of field-effect mobility, and incompatibility with a high-temper-ature annealing process, etc. More importantly, there have been less attention and demonstration to address the utilization and its necessity of threshold voltage-modulated TMDC-FETs in

practical applications, for instance, logic gates and display back-plane circuits.

In this study, we demonstrated threshold voltage control of MoS2 FETs to achieve enhancement-mode FETs and its appli-cation to logic gates and driving circuits for one of the repre-sentative next-generation displays as QD light-emitting diodes (QD-LEDs). Herein, we employed a back-channel modification method by using SAM to induce the interfacial dipole, and achieved a threshold voltage shift as a controllable manner. Atomic force microscopy (AFM) and Raman spectroscopy were used to physically validate the SAM-treatment effects on the back channel of MoS2, and threshold voltage shift of MoS2 FETs was observed by varying the SAM-treatment time. Moreover, temperature-dependent measurement was performed in order to identify the effects of SAM treatment on the charge trans-port behaviors. After facilitating enhancement-mode MoS2 FETs with back-channel SAM treatment, we implemented depletion-load enhancement-drive n-channel metal-oxide-semiconductor (NMOS) inverter and one pixel driving circuit for QD-LEDs, fol-lowed by systematic analysis via load lines.

2. Results and Discussion

2.1. Hysteresis-Free MoS2 FETs by Multiple Annealing Scheme

For the systematic study on effects of SAM treatment for the threshold voltage of MoS2 FETs, we implemented hysteresis-free MoS2 FETs by employing a multiple annealing scheme.[32] Figure 1a illustrates the fabrication process for multilayered MoS2 FETs, followed by surface modification by SAM treat-ment. Right before SAM treatment, removal of organic resi-dues, which could be possibly contaminated during MoS2 exfoliation and photolithographic patterning, was mandatory via a multiple thermal annealing scheme in an ambient of mixture of Ar/H2.[32] The implemented multilayered MoS2 FETs were fully evaluated for transfer and output characterization, indi-cating that typical n-type transfer characteristics of the MoS2 FETs were exhibited in the linear regime where drain-to-source voltage (VDS) was 0.1 V (Figure S1, Supporting Information). It is worthwhile to note that MoS2 FETs exhibit a negligible hyster-esis gap (i.e., the threshold voltage difference between forward sweep and backward sweep, ΔVTH = VTH(Forward)−VTH(Backward)) even in air without any passivation layer. This is attributed to the reduction of possible candidates for trap sites via a multiple annealing scheme.[32,33] Therefore, it is an important start line to address threshold voltage control of MoS2 FETs because a negligible hysteresis gap manifests low defect levels in device itself as well as clean surface of MoS2, which secure for repro-ducible SAM-treatment condition, leading to meaningful inves-tigation into pure effects on SAM treatment. The field-effect mobility (μFET) and threshold voltage (VTH) were extracted as 24 cm2 V−1 s−1 and −1.3 V, respectively, by using a maximum transconductance (gm_max) method, according to Equation (1)

IW

LC V V V Vµ= ⋅ − −

⋅

1

2DS ox FET GS TH DS DS (1)

where IDS is the drain-to-source current, W is the channel width, L is the channel length, Cox is the unit-area capacitance

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of the gate dielectric, μFET is the field-effect mobility, and VGS is the gate-to-source voltage. Even though the implemented MoS2 FETs show excellent electrical performance with no hys-teresis, which can be comparable to the reported performance in literatures,[26,29,30] the devices show depletion-mode behav-iors similar to the previous reports with a negative threshold voltage of −1.3 V (VTH < 0). This can yield the large gate over-drive voltage (VOV) of 4.3 V with the fixed gate bias range of 3 V. The gate overdrive voltage (VOV) can be defined as the differ-ence between the gate-to-source voltage (VGS) and the threshold voltage (VTH) (i.e., VOV = VGS−VTH), and it represents the effec-tive voltage applied to the channel of MoS2. In this regard, high gate bias stress of 4.3 V, being equivalent to the electric field of 4.3 MV cm−1, is applied to channel during the operation.

This is a good indication on potentially harmful degradation for device reliability in depletion-mode MoS2 FETs for potential real applications.

2.2. Surface Analysis on the Octadecyltrichlorosilane-Treated MoS2

In order to modulate the threshold voltage of MoS2 FETs that can be operational in the enhancement mode in lieu of deple-tion mode, we employed back-channel modification of MoS2 FETs by SAM. Figure 1b shows schematic cartoon for the fab-ricated device structure of MoS2 FETs and chemical structure of octadecyltrichlorosilane (ODTS) as SAM, employed in this work. Graphical illustration of proposed reaction mechanism of ODTS

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Figure 1. a) Device fabrication process by using a multiple annealing scheme, followed by SAM treatment. b) Device structure of the multilayered MoS2 FETs and the proposed reaction mechanism of ODTS-SAM on the back channel of MoS2. c) Transfer characteristics of the MoS2 FETs in the linear regime where drain-to-source voltage (VDS) is 0.1 V before (black circle and line) and after (red triangle and line) ODTS treatment. d) Raman spectra of the multilayered MoS2 before and after ODTS treatment. The insets describe the two characteristic vibrational modes of MoS2, in-plane vibration mode E1

2g, and out-of-plane vibration mode A1g. 10 μm × 10 μm AFM topographical images of the multilayered MoS2 flake e) before and f) after ODTS treatment. The thickness of the MoS2 flake is 10 nm, and surface profiles, along with the red dashed lines, are illustrated in the insets of (e) and (f).

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treatment onto the back channel of MoS2 flakes is displayed in the inset of Figure 1b. SAMs with silane groups have been frequently applied to oxide surfaces such as SiO2, Al2O3, and indium gallium zinc oxide (IGZO) to modulate surface energy, interfacial trap density, work function, or charge carrier densities, etc.[34–37] Anchor groups of silane SAMs would react favorably with hydroxyl groups on the oxide surface, which lend to form a strong chemical bonding. Even though hydroxyl groups are con-ceptually not available on the surface of 2D materials, there have been several reports on surface modification of 2D materials including graphene, MoS2, WSe2, and black phosphorous by SAMs. However, SAM formation even on the surface of TMDCs with low density of hydroxyl groups would not be theoretically explained, experimental evidence on SAM formation on TMDCs with low density of hydroxyl groups was frequently observed.

Until now, the formation mechanism of SAMs has been understood as one of the possible mechanisms due to a 2D self-polymerization process via defect mediation.[38–41] Surface defect sites on 2D materials, possibly caused by several candi-dates such as oxidation, contamination, or vacancy around edge of 2D crystals, could be rationally used as nucleation sites for SAM formation. Thus, when one of the silane SAM molecules forms a strong chemical bonding with one of the defect sites on the surface of 2D materials (i.e., nucleation site), other silane SAM molecules no longer need bonding sites on the surface. Other than bonding sites on the surface, they would adhere to the nucleation sites via OSiO bonding, and sequential chemical reactions between silane SAM molecules could lead to 2D self-polymerization. Through the plausible process, con-ceived as hypothesis, densely packed SAM could be possibly formed on 2D materials, which are not available with a large amount of hydroxyl groups on the surface.

Herein, we used a trichlorosilane SAM that has three chlorine atoms at the anchor group. With air exposure, these chlorine atoms are changed to hydroxyl groups (OH), leading to the formation of HCl, and replaced hydroxyl groups form a chemical bonding with either hydroxyl group on surface or at adjacent molecules. Among three hydroxyl groups in SAM molecules, one of them might start to form a strong covalent bonding with one of the surface hydroxyl groups that are abun-dantly available on the surface of thermally oxidized Si wafers, and hence the others could immediately react with adjacent SAM molecules by forming SiOSi bonding. On the other hands, in the case of minimum surface hydroxyl groups like 2D materials, one of the hydroxyl groups in SAM molecules that are supposed to form a strong chemical bonding with a surface hydroxyl group remains unreacted. Because of hydroxyl groups in SAM that accidently remain unreactive, negative pole is induced at the interface, possibly leading to de-population of electrons. (i.e., p-doping effect). As a result of de-populated electrons caused by ODTS treatment on the back channel, threshold voltage of MoS2 FETs shifts to the positive direction after ODTS treatment as shown in Figure 1c.

Raman spectroscopy was used to examine effects of ODTS treatment on MoS2. Figure 1d shows the Raman spectra of the multilayered MoS2 before and after the ODTS treatment. Raman spectroscopy is a powerful tool to observe vibrational characteristics of 2D materials, and has often been used to study MoS2. Two characteristic vibrational modes (i.e., E1

2g

and A1g) were observed for MoS2. E12g mode is attributed to

the in-plane vibration between molybdenum (Mo) and sulfur (S) atoms, whereas A1g mode is resulted from the out-of-plane vibration between Mo and S atoms. After the ODTS treatment, Raman peaks of two characteristics mode, E1

2g and A1g, were blueshifted by 0.65 and 0.64 cm−1, respectively, which indi-cates p-doping effect of ODTS treatment.[42–44] The blueshift of Raman peaks is attributed to suppression of electron–phonon coupling caused by reduced electron density.[28,45] Figure 1b shows that ODTS treatment on the back channel of MoS2 hap-pens to yield negative dipoles at the interface associated with the plausible 2D self-polymerization as mentioned previously. Thus, electrons are de-populated by the induced interfacial dipole. Reduced electron density causes to suppress electron–phonon scattering, which results in the increased phonon frequencies.

In addition, we observed the morphological change of MoS2 flakes with the ODTS treatment by AFM. Figure 1e,f shows the 10 μm × 10 μm AFM images of MoS2 flakes before and after the ODTS treatment, respectively. The thickness of the MoS2 flake is 10 nm that corresponds to 14 monolayers of MoS2 and surface profiles along with the red dashed lines were illustrated in the inset of Figure 1e,f. Surface roughness, as a root mean square value, was increased from 0.54 to 1.95 nm after the ODTS treatment, and the surface became fuzzy after ODTS treatment as shown in the surface profiles (Figure 1f). This is a similar observation that was reported for the graphene after SAM treatment,[38] indicating that SAM treatment might cause to increase the surface roughness and fuzzy morphology. In addition, especially being observed at the edge of the SAM-treated MoS2 flake as compared to a center of flake, the rough surface profile hints that nucleation sites of SAM at the edge are possibly more populated than those of the surface of the MoS2 flake. This is one of the reasonable evidence to substan-tiate that SAM treatment can do effects on threshold voltage adjustment for multilayered MoS2 FETs.

2.3. Threshold Voltage Shift by ODTS Treatment and Tempera-ture-Dependent Electrical Characteristics

For the better understanding of a threshold voltage shift mech-anism associated with ODTS treatment, we systematically designed experimental conditions depending on treatment time duration and its variation according to the conditions. In the present work, thickness of multilayered MoS2 is in the range from 8 to 35 nm, corresponding to 15 and 54 layers. In this range of thickness of MoS2, electrical performance of MoS2 depending on thickness is negligibly observed. More charac-terization for threshold voltage shift versus a surface-to-volume ratio is displayed and discussed in Figure S2 (Supporting Infor-mation). All results were within similar trends as compared to the previous reports.[44]

Figure 2a–c shows the transfer characteristics of the MoS2 FETs before and after ODTS treatment for 4, 8, and 12 h, respectively. The thicknesses of the MoS2 of each representa-tive device for 4, 8, and 12 h ODTS treatment are 15, 32, and 25 nm, respectively. As shown in Figure 2a–c, ODTS treatment yields positive threshold shift without degrading field-effect

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mobility and increasing the hysteresis gap. This phenom-enon was observed in more than ten devices, and the average mobility degradation after ODTS treatment was within 3% regardless of ODTS-treatment time as shown in Figure S3 (Supporting Information). As one of the key process parame-ters on ODTS treatment, time duration effects could be critical for ODTS treatment. Thus, we investigated ODTS time effects on electrical performance of multilayered MoS2 FETs. As ODTS-treatment time increased, the threshold voltage shift also increased from 0.56 V (for 4 h) to 0.85 V (for 8 h) and 1.05 V (for 12 h). The threshold voltage shift by ODTS treatment can be explained by the amount of dipoles induced by ODTS, accu-mulating excess holes near the MoS2–ODTS interface. From the threshold voltage shift, the change of charge carrier densities by ODTS treatment can be estimated by the parallel capacitor model with equation n = CoxΔVTH/e, where n is the charge car-rier concentration, ΔVTH is the threshold voltage shift by SAM treatment, i.e., ΔVTH = VTH (before ODTS)−VTH (after ODTS), and e is the elementary charge of 1.602 × 10−19 C. The modu-lated charge densities were in the range of 1.0–2.5 × 1012 cm−2, which is one order of magnitude higher than the ones of the previous work employed SAM treatment on the front channel, i.e., gate dielectric.[46] This clearly shows that back-channel modification by SAM treatment is an efficient way to control carrier densities, leading to adjustment of a threshold voltage. Figure 2d shows the threshold voltage shift by ODTS treatment with respect to the ODTS treatment time. Threshold voltage shift was increased as the treatment time increased, but the average threshold voltage shifts from the multiple device meas-urements did not show the same trend. As ODTS-treatment

time duration increased to 12 h, the average value of threshold voltage shift decreased with an increased device variation as compared to the one with 8 h ODTS treatment. This may be attributed to the nonideal chemical reaction of ODTS. Because ODTS has three reaction sites at the anchor group, they happen to react not only with MoS2 (i.e., self-assembly, hori-zontal polymerization) but also with each other, resulting in either covalent attachment or vertical polymerization.[47] As the ODTS-treatment time increases, the portion of covalent attach-ment or vertical polymerization increases, yielding nonuniform ODTS treatment. In the case of 12 h ODTS-treatment time, the nonuniform ODTS treatment may result in large variation of threshold voltage shift in the MoS2 FETs.

In order to evaluate the effect of ODTS treatment on the charge transport property of the MoS2 FETs, we observed the temperature-dependent transfer characteristics. To eliminate the device variation effect, temperature-dependent measurement was first performed before ODTS treatment, and then the same devices were re-characterized with various temperature after ODTS treatment. Figure S4 (Supporting Information) shows the temperature-dependent transfer characteristics before SAM treatment (Figure S4a (Supporting Information): linear-linear scale; and Figure S4c (Supporting Information): log- linear scale) and after ODTS treatment (Figure S4b (Supporting Information): linear-linear scale; and Figure S4d (Supporting Information): log-linear scale). The change of hysteresis with respect to the temperature is shown in Figure 3a. More fre-quently, hysteresis of FETs increases as temperature increases because of the thermally activated interfacial traps.[48] As shown in Figure 3a, the MoS2 FETs after ODTS treatment showed

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Figure 2. Transfer characteristics of the ODTS-treated MoS2 FETs for a) 4 h, b) 8 h, and c) 12 h. Transfer characteristics were obtained at the linear regime where drain-to-source voltage (VDS) was 0.1 V. d) The maximum (blue square) and average value (red circle) of threshold voltage shift from the multiple sample measurements with respect to the ODTS treatment time. The error bars represent the standard deviation.

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gentle increase of hysteresis with temperature as compared to the MoS2 FETs before ODTS treatment. This represents that the back-channel treatment by ODTS reduced the density of thermally activated interfacial trap densities that resulted from the gaseous adsorbates such as oxygen and water molecules. We also examined the temperature-dependent mobility of the MoS2 FETs before and after the ODTS treatment. Figure 3b shows the temperature dependence of mobility of MoS2 FETs before and after ODTS treatment. At the temperature (T) range higher than 100 K, the mobility is dominantly limited by the optical phonon scattering mechanism, which follows the power law relationship (μ ∼ T−γ) with an exponent, γ, higher than 1.[49] As shown in Figure 3b, the temperature dependency of field-effect mobility of MoS2 FETs before and after ODTS treatment also follows a μ ∼ T−γ with γ = 1.88 and 1.44, respec-tively. After ODTS treatment, the reduced exponent in the power law dependency, γ, implies that temperature-dependent mobility limiting associated with charge scattering effects was diminished.[50,51] One of the possibilities is that the homopolar phonon mode that is related to the out-of-plane vibrations of MoS2 was suppressed by ODTS treatment, similar to the effect of using top-gated structure,[51] resulting in the reduced expo-nent (γ) in the power law. From the temperature-dependent-hys-teresis characterization and field-effect mobility measurements, we confirmed that ODTS molecules were well treated on the back channel of MoS2, and it also influenced the device stability by reducing thermally activated interfacial traps. Furthermore, we found that ODTS treatment on the back channel of MoS2 can suppress one of the temperature-dependent mobility-lim-iting scattering mechanisms, presumably due to passivation of MoS2 surface from atmosphere.

To investigate into ODTS-treatment effects on device sta-bility, electrical performance of MoS2 FETs stored in air was systematically evaluated by tracking electrical performance for 30 d. The results show that ODTS treatment can significantly improve longevity of MoS2 FETs. As shown in Figure S5a,b (Supporting Information), the MoS2 FET without ODTS treat-ment exhibited a significant degradation in 30 d stored in air, whereas the device with ODTS treatment preserved its ini-tial electrical properties during the test period of 30 d. To quantitatively analyze the electrical degradation, Figure S5c

(Supporting Information) shows the change of normalized ON-current in linear regime, where VDS = 0.1 V and VGS = 3 V, as the time duration in air increases up to 30 d. As per MoS2 FETs without ODTS treatment, 74% degradation of on-current after 30 d was observed as compared to the initial on-current. On the other hand, the device with ODTS treatment still exhibited 88% level of initial ON-current (i.e., 12% degradation) after 30 d stored in air. The degradation of MoS2 FETs without ODTS treat-ment is presumably attributed to adsorption of gaseous mole-cules, which can disturb electrical transports, leading to degrada-tion of electrical properties associated with trap states, possibly located in front and back-channel interface in MoS2 FETs. Thus, ODTS treatment can efficiently passivate MoS2 from atmosphere because of the hydrophobic nature of ODTS. It is worthwhile noting that excellent environmental stability of MoS2 FETs with ODTS treatment is achieved by only few nanometer scale pas-sivation layer. The results indicate that back-channel passivation even with ultrathin hydrophobic SAM layers can be one of the efficient ways to improve stability of MoS2 FETs. Furthermore, we examined the change of the field-effect mobility (μFET) and threshold voltage (VTH) of the devices over time stored in air. As shown in Figure S5d (Supporting Information), the MoS2 FET without ODTS treatment shows rapid deterioration of the field-effect mobility and increase of the threshold voltage, as a result of trap creation by adsorbed gaseous molecules. On the other hand, the device with ODTS treatment impressively preserves its initial field-effect mobility within a 5% fluctuation, and exhibits much lower threshold voltage shift. Moreover, as an effective control method for circuit applications, the threshold voltage needs to be successively modulated to provide more design margin of threshold voltage adjustment. In this sense, the pro-posed ODTS treatment on the back channel is limitedly allow-able for Vth control. Thus, we proposed to use aging in air for the implemented MoS2 FETs with ODTS treatment for ensuring the increase of a span of Vth control. All the experimental results in this work were reported and the threshold control scheme was validated as shown in Figures S6 and S7 (Supporting Informa-tion). In addition, analytical analysis (Tables S1 and S2, Sup-porting Information) for aging effects in air elucidated that the aging scheme itself can provide additional Vth shift contribution up to about 40% in the total Vth shift capability.

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Figure 3. a) Temperature-dependent hysteresis of the MoS2 FETs before (red circle) and after (blue square) ODTS treatment. Here, hysteresis is defined as the threshold voltage difference between forward and backward sweep. b) Mobility change of MoS2 FETs before and after ODTS treatment with respect to the temperature. The temperature-dependent mobility follows the power law μ ∼ T−γ with the exponent of γ = 1.88 and 1.44, before and after ODTS treatment, respectively.

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2.4. Logic Gate Based on Enhancement and Depletion-Mode MoS2 FETs

As one of the applications for enhancement-mode MoS2 FETs, we implemented full swing depletion-load NMOS inverter. Figure 4a shows the circuit diagram and device structure of depletion-load NMOS inverter, and the SAM-treated MoS2 FETs and the pristine MoS2 FETs without SAM treatment were used as enhancement-mode and depletion-mode FETs, respectively. Figure 4b shows the intersection points between output charac-teristics of the pull-down transistor and the load line, leading to operational points for the NMOS inverter as load-line analysis. Figure 4c shows the voltage transfer characteristics (VTC) of the inverter with a different supply voltage (VDD), and the esti-mated VTC points obtained from the load line analyses when the drain-to-source voltage was 3 V. At the supply voltage of 3 V, the inverter showed a good voltage transition behavior with a maximum gain of 18.2 and a noise margin of ≈45% of 1/2 VDD. This is one of the validations that SAM treatment, proposed in this work, can engineer the threshold voltage shift toward enhancement mode for multilayered MoS2 FETs.

2.5. QD-LED Pixel Driven by Multilayered MoS2 FETs in Enhancement Mode

In order to verify current-driving capability of enhancement-mode MoS2 FETs, we demonstrated the driving circuit of next-generation display, QD-LEDs. CdSe/Zn1-XCdXS red QDs

were used in this study, and inverted structure QD-LEDs (150 nm indium tin oxide (ITO)/50 nm ZnO/20 nm QDs/60 nm 4,4′-bis(N-carbazolyl)-1,1′-biphenyl (CBP)/10 nm MoO3/100 nm Al) were fabricated and characterized prior to the integration with the enhancement-mode MoS2 FETs. An inverted structure with bottom cathode was adopted because of an advantageous combination with n-type driving transis-tors; With an inverted structure, a cathode of QD-LEDs can be directly connected to a drain electrode of the driving transistors. This can minimize gate-to-source voltage (VGS) drop of driving transistors caused by a degradation-mediated change of oper-ating voltage of a QD-LED, and hence prevent image sticking of display pixels.[52,53] The normalized electroluminescence spec-trum of the QD-LEDs was exhibited to have an emission peak of 625 nm (Figure S8a, Supporting Information). The inverted QD-LEDs exhibited a decent peak value (≈6.5%) as external quantum efficiency (Figure S8b, Supporting Information), which is similar to the previous work.[54] After evaluating per-formance of QD-LEDs, we electrically integrated the enhance-ment-mode MoS2 FETs to the QD-LED by connecting the bottom cathode of the QD-LED and the drain electrode of the MoS2 FET with a gold wire as depicted in Figure 5a. Figure 5b shows the current (I) (or luminance (L))–voltage (V) character-istics of the QD-LED along with the load lines of the driving MoS2 FETs with a different gate-to-source voltage (VGS) from 3 to 5 V. The operating points, intercepted in Figure 5b, represent operating bias condition of the QD-LED driven by the MoS2 FET, corresponding to the luminance as denoted by the arrows. Figure 5c displays emission of the QD-LEDs with a different

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Figure 4. a) Schematics and graphical cartoon for depletion-load NMOS inverters. b) Output characteristics of the pull-down transistor along with the load line characteristic. c) Voltage transfer characteristics (VTC) of the depletion-load NMOS inverter with the supply voltage (VDD) from 1 to 3 V. The black dots are estimated VTC points from the load line when the supply voltage was 3 V. Maximum gain of the inverter at the supply voltage of 3 V was 18.2. The inset in (c) illustrates an optical microscope image for depletion-load NMOS inverters externally wired for electrical probing.

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gate-to-source voltage of the MoS2 FETs. With the gate-to-source voltage of 3 V, the QD-LED started to emit the light with a lumi-nance around 10 cd m−2, and increased to 50 cd m−2 when the gate-to-source voltage was 4 V. The luminance of the QD-LED reached to 120 cd m−2 at the gate-to-source voltage of 5 V. This luminance is the same order as the commercial product of mobile displays, which use the luminance ranging from 100 to 500 cd m−2. Note that we used a conventional device width-to-length ratio of 3 (W = 30 μm, L = 10 μm) for the driving MoS2 FET, whereas the emitting area of the QD-LED is extremely large (1.4 mm × 1.4 mm), as compared to the conventional pixel size of displays that use several tens of micrometers as a pixel length and width. In consideration of an aperture ratio for the QD-LED used in this work, the emission area has two or three orders of magnitude larger than that of conventional display pixel. Thus, it can be speculated that the enhancement mode MoS2 FETs in this study are capable of driving QD-LED display pixels in the entire operating range. This manifests the potential use of MoS2 FETs in the driving circuits is promising for the ultrahigh resolution next-generation display backplanes.

3. Conclusion

For the development of novel schemes for a threshold voltage control, being plagued in semiconducting 2D transition metal dichalcogenides FETs, SAM treatment via octadecyltrichlorosi-lane for multilayered MoS2 FETs was proposed and validated to enable FETs to be operational in enhancement mode.

All electrical properties, as compared to MoS2 FETs before ODTS treatment, were perfectly preserved without degradation in terms of field-effect mobility, SS, and current on–off ratio. Furthermore, SAM-treatment effects and their mechanisms were elucidated by AFM, Raman spectroscopy, and electrical characterization. Moreover, full swing inverters, comprising enhancement mode drivers and depletion mode loads, were perfectly demonstrated to play a role for the future QD-LEDs driving via fundamental logic gates. More practically, full dem-onstration of QD-LEDs, driven by a driving transistor of MoS2 FETs, was achieved to show a stable 120 cd m−2 at the gate-to-source voltage of 5 V.

4. Experimental Section

Field-Effect Transistor Fabrication: Figure S9a (Supporting Information) describes the fabrication process of bottom-gated multilayered MoS2 FETs. 10 nm silicon dioxide (SiO2) was thermally grown on the heavily doped p-type silicon wafers, and then cleaned by piranha solution for 15 min. MoS2 bulk crystal was purchased from SPI Supplies (429ML-AB), and mechanically exfoliated MoS2 flakes were transferred onto the precleaned Si/SiO2 (≈10 nm) substrates by polydimethylsiloxane stamps. A conventional photolithography process was performed to define the source and drain electrode patterns, followed by thermal evaporation of Au (70 nm) and lift-off technique. The defined channel width (W) and length (L) of the MoS2 FETs were 30 and 10 μm, respectively. During the fabrication process, we performed multiple thermal annealing to remove contaminations such as organic and photoresist residues, as well as gaseous molecules. First annealing was performed after the transferring process, and the second annealing was applied after the lift-off process.

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Figure 5. a) Graphical illustration of the integration between the enhancement-mode MoS2 FET and the inverted structure QD-LED. b) Output characteris-tics of the enhancement-mode MoS2 FET and the current–voltage–luminance (I–V–L) characteristics of the inverted QD-LED along with the driving current level of the MoS2 FET when gate-to-source voltage (VGS) was from 3 to 5 V. c) Photographs of emission from the QD-LED driven by the enhancement-mode MoS2 FET. As the gate-to-source voltage (VGS) increases from 3 to 5 V, luminance of the QD-LED was increased from 10 to 120 cd m−2.

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Tube furnace was used for the thermal annealing, and the samples were annealed at 400 °C for 1 h under the mixture gas flow of H2 (300 sccm) and Ar (300 sccm). Figure S9b (Supporting Information) shows the fabricated MoS2 FETs on Si/SiO2 substrates. As shown in Figure S9b (Supporting Information), multiple devices were fabricated on the same substrate by repeating the selective photolithography process to each MoS2 flake for the statistical study. The thickness of MoS2 flakes was measured by the AFM (Park system, XE-100).

SAM Treatment: One of the most common SAM materials, ODTS, was purchased from Sigma-Aldrich, and used as a surface modification material for MoS2. For the SAM treatment, the fabricated MoS2 FETs and the substrates with MoS2 flakes were dipped in toluene solution containing ODTS (3 × 10−3 m) in ambient air, at room temperature. Dipping time was varied from 4, 8, and 12 h. The contact angle and ellipsometry measurement were conducted to evaluate the quality of SAM, and a similar water contact angle (103°) of ODTS-treated SiO2 (Figure S10a, Supporting Information) and a thickness of ODTS (3.2–5.9 nm depending on SAM-treatment time) (Figure S10b, Supporting Information) were observed as compared to the previously reported value, which implies that our SAM-treatment condition is quite optimized.[55–58]

MoS2 Flake Surface Analysis: Morphological change of MoS2 flakes with SAM treatment was investigated by using the AFM. Triple Raman spectrometer (Horiba Jobin-Yvon, T64000) was used to analyze the Raman spectra of MoS2 flakes with a 514 nm laser excitation.

Electrical Characterization: All the electrical properties of MoS2 FETs were measured by using the semiconductor device parameter analyzer (Agilent, B1500A) in ambient air. Transfer characteristics were obtained in a linear regime where drain-to-source voltage (VDS) was 0.1 V. For the temperature-dependent measurement, substrate temperature was varied from 30 to 120 °C with a 30 °C step.

QD-LED Fabrication: CdSe/Zn1-XCdXS QD and ZnO nanoparticles were synthesized as reported elsewhere.[54,59] Inverted structure QD-LED was fabricated on the ITO-patterned glass substrates. As an electron injection layer, ZnO solution was spin-coated and annealed at 100 °C for 30 min under N2 atmosphere to form 40 nm of ZnO thin film. After depositing QDs on ZnO, CBP and molybdenum oxide were thermally evaporated as a hole transporting layer and a hole injection layer, respectively. Then, Al was deposited with a shadow mask to form the anode. The defined QD-LED emission area was 1.96 mm2 (1.4 mm × 1.4 mm). Al anode was connected to the source electrode of the enhancement-mode MoS2 FETs with Au wire. The current–voltage–luminance (I–V–L) characteristics of the MoS2 FET-driven QD-LED were measured by the Keithley-236 source-measure unit, a Keithley-2000 multimeter unit coupled with a calibrated Si photodiode (Hamamatsu S5227-1010BQ), and a photomultiplier tube detector. The luminance of QD-LED was calculated from the photocurrent measured by the Si photodiode. The electroluminescence spectra of QD-LED were obtained by using a spectro-radiometer (CS-2000).

Supporting InformationSupporting Information is available from the Wiley Online Library or from the author.

AcknowledgementsThis work was supported by the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT and Future Planning (NRF-2017R1A2B2009042).

Conflict of InterestThe authors declare no conflict of interest.

Keywords

field-effect transistors, logic gate, MoS2, quantum-dot light-emitting diode, threshold voltage control

Received: September 18, 2018Revised: November 23, 2018

Published online:

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