The K computer: Project overview - FujitsuThe K computer: Project overview Author SHOJI, Fumiyoshi...
Transcript of The K computer: Project overview - FujitsuThe K computer: Project overview Author SHOJI, Fumiyoshi...
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The Next-Generation Supercomputer
The K computer: Project overview
SHOJI, Fumiyoshi
Next-Generation Supercomputer R&D Center,
RIKEN
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The “K computer”Outline
Project Overview
System Configuration of the “K computer”
Facilities for the system
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The “K computer”Outline
Project Overview
System Configuration of the “K computer”
Facilities for the system
![Page 4: The K computer: Project overview - FujitsuThe K computer: Project overview Author SHOJI, Fumiyoshi Created Date 20101126152635Z ...](https://reader031.fdocuments.net/reader031/viewer/2022011900/5f03ede77e708231d40b77fc/html5/thumbnails/4.jpg)
The “K computer”What is “K computer” ?
“京 (Kei)” is a nickname of the Next-Generation Supercomputer system.
The name was chosen from public applications this July.
“京” is a Japanese prefix number like “mega, tera, peta, etc.”, which means
1016, or 10 peta.
“万(man)=104”, “億(oku)=108”, “兆(cho)=1012”, “垓(gai)=1020 ”,・・・・
“K computer” is assigned for English documents.
A logo was also determined.
It was written by a famous Japanese calligrapher
Souun TAKEDA.
Another meaning of the “京” is “a big gate.”
A new era of computational science is coming
though the gate “京.” by hoping promised
future success.
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The “K computer”Goals of the Next-Generation Supercomputer project
Development and installation of the most advanced high performance supercomputer system with LINPACK performance of 10 petaflops.
Development and deployment of application software, which should be made to attain the system maximum capability, in various science and engineering fields.
Establishment of an “Advanced Institute for Computational Science:AICS” as one of the Center of Excellence around supercomputing facilities.
→The AICS has been established in Kobe at October 2010.
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The “K computer”Schedule of the project
FY2008 FY2009 FY2010 FY2011
Computerbuilding
Researchbuilding
FY2007FY2006 FY2012
Next-GenerationIntegrated NanoscienceSimulation
Next-GenerationIntegratedLife Simulation
VerificationVerificationDevelopment, production, and evaluationDevelopment, production, and evaluation
Tuning and improvement
Tuning and improvement
ConstructionConstructionDesignDesign
ConstructionConstructionDesignDesign
Development, production, and evaluationDevelopment, production, and evaluation
System
Bu
ild
ing
sA
pp
lica
tio
ns
Prototype, evaluation
Prototype, evaluation
VerificationVerification
Detailed designDetailed designConceptual
designConceptual
designProduction, installation,
and adjustment
Production, installation, and adjustment
We are here.
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First installation of the K computer
The eight racks has been housed at
October 1, 2010.
First Linpack result by a part of the
system
Rmax:48.03TFLOPS(Rpeak:52.22TFLOPS)
Power:57.96kW
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The “K computer”Outline
Project Overview
System Configuration of the “K computer”
Facilities for the system
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The “K computer”System configuration
Compute Nodes
Interconnect NetworkMulti-dimensional Mesh/Torus
Global File System
Local File System
Global I/O NetworksGlobal I/O Networks
Netw
ork
s for C
ontro
l and M
anagem
ent
Internet
FrontendServers
FrontendServers
ControlServersControlServers
ManagementServers
SystemConfiguration
Job & UserManagement
Number of CPUs > 80KNumber of cores > 640KTotal memory capacity > 1PB
Users
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The “K computer”CPU features (Fujitsu SPARC64TM VIIIfx) 8 cores
2 SIMD operation units/core
2 Multiply & add floating-point operations (SP or DP) are executed in one SIMD instruction
256 FP registers/core (double precision)
Performance
16GFLOPS/core, 128GFLOPS/CPU
2.2GFLOPS/W (58W at 30℃ by water cooling)
Hardware barrier among cores
Pre-fetch instruction
Shared 6MB L2 Cache (12-way)
Software controllable cache (sectored cache)
45nm CMOS process, 2GHz22.7mm x 22.6mm760 M transistors
Reference: SPARC64TM VIIIfx Extensionshttp://img.jp.fujitsu.com/downloads/jp/jhpc/sparc64viiifx-extensions.pdf
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Compute nodes and NetworkCompute nodes (CPUs): > 80,000
Number of cores: > 640,000
Peak performance: > 10PFLOPS
Memory: > 1PB (16GB/node)
6-dimensional mesh/torus network: Tofu
10 connections to each adjacent node
Peak bandwidth: 5GB/s x 2 for each connection
Logically 3-dimensional torus network
SPARC64TM VIIIfx
Courtesy of FUJITSU Ltd.
ノード
CPU: 128GFLOPS(8 Core)
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
CoreSIMD(4FMA)
16GFlops
L2$: 5MB
64GB/s
CoreSIMD(4FMA)16GFLOPS
MEM: 16GB
x
y
z
5G
B/s (p
eak) x
2
5GB/
s (pea
k)x
2
5GB/
s(pe
ak) x
2
5GB/s(peak) x 2
5G
B/s (p
eak) x
2
Compute node
L2$:6MB
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The “K computer”Packaging of the system A rack consists of 24 system boards, 6 IO boards, power supply units, system
storages, and diagnostic processors.
A hose pipe is connected to the water loop under the floor.
システムボード
CPU
ICC
LSI for interconnect
System Board
2060mm~560m
m
~460mm
796mm
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The “K computer”Outline
Project Overview
System Configuration of the “K computer”
Facilities for the system
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AICS: location of the K computer in Kobe
450km (280miles) west from Tokyo
Tokyo
Kobe
Kyoto
AICS (Advanced Institute for Computational Science) was established at RIKEN last July.
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Layout of the buildings
Computer building
Chillers
Research Building
Substation Supply
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More than 800 racks will be housed.
Image of the K computer
The full system will be in operational in 2012.
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The “K computer”Summary
“The Next-Generation Supercomputer”
→ “京(kei)”,”K computer”
The facilities for the K computer is complete.
The installation of the K computer has started.
The first measurement of LINPACK on a part of the system has
been done.
The full system of the K computer will be in operational at 2012.
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Thank you for your attention !
A photo in the early evening