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The Hashemite University

Department of Electrical Engineering

Electronics.2 Laboratory Manual

Table of Content Page

1. General Lab Rules i

2. Electronics.2 Lab Experiments:

- Experiment 1: The Common Emitter Amplifier (AC Analyses) - Experiment 2: The Common Collector Amplifier (AC Analyses) - Experiment 3: Op-Amp Characteristics - Experiment 4: Inverting, Non-inverting and Summing Op-Amp Circuits - Experiment 5: Comparator, Integrator and Differentiator - Experiment 6: Multistage Amplifiers - Experiment 7: JFET Amplifiers - Experiment 8: Amplifier Frequency Response - Small project

3. Appendixes:

a) Multisim Tutorial

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General Lab Rules

• Be PUNCTUAL for your laboratory session. • Foods, drinks and smoking are NOT allowed. • Open-toed shoes are NOT allowed. • The lab timetable must be strictly followed. Prior permission from the Lab

Supervisor must be obtained if any change is to be made. • Experiment must be completed within the given time. • Respect the laboratory and its other users. Noise must be kept to a minimum. • Workspace must be kept clean and tidy at all time. Points might be taken off on

student/group who fail to follow this. • Handle all apparatus with care. • All students are liable for any damage to equipment due to their own negligence. • At the end of your experiment make sure to switch off all the instruments. • Students are strictly PROHIBITED from taking out any items from the laboratory

without permission from the Lab Supervisor. • Students are NOT allowed to work alone in the laboratory. • Please consult the Lab Supervisor if you are not sure on how to operate the

laboratory equipment. • Report immediately to the Lab Supervisor if any injury occurred. • Report immediately to the Lab Supervisor any damages to equipment, hazards,

and potential hazards. • Please refer to the Lab Supervisor should there be any concerns regarding the

laboratory.

Grading Policy

The total mark for this lab is distributed as follows

Lab Report 20% Quizzes 10% Prelab 5% Attendance 5% Mid-term Exam 20% Final Exam 40%

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Guidelines for Writing Lab Report The most effective way to acquire the practical skills in engineering studies is usually by experimenting in a laboratory. The process of experimentation involves organization, observation, familiarization with various pieces of equipment, working with others, writing, and communicating ideas and information. These are the skills required of an engineer. In a practical situation, such as that in the industry or university research, experiments are designed for the purpose of clarifying research questions or conflicting theories by means of collecting a series of data. The conclusions drawn from that data can be used to validate a theory or sometimes to develop a theory that explains the behavior of an engineering object. The report for this kind of experiments must includes an introduction to the topic and purpose of the experiment, the theory, method, procedure, equipment used in the experiment, the data presented in an organized manner, and the conclusions based on the data gathered. In engineering education, lab experiments are usually designed to enhance the understanding in engineering topics. Students are supposed to "dirty their hand" in preparing the experiment setup, organize the experiment flow, and learn to observe the salient features as well as to spot any unexpected occurrence as part of the training to acquire the practical skill to become an engineer. Although the introduction and the procedure are usually given in the lab handouts, students should practice writing a proper lab report which includes all the necessary sections, targeting at a reader who does not have any prior knowledge about the experiment. This is to develop the skill in documenting the laboratory work and communicating that experience to others. This write-up gives some guidelines on what to write in each section in preparing laboratory reports for engineering curricula.

Title Page The title page should contain the title of the experiment, the code and title of the course, the name of the writer, the date when the experimental work was performed, submission date of the lab report, and the name of lecturer for whom the report is prepared for.

Introduction or Objectives An introduction is necessary to give an overview of the overall topic and the purpose of the report. The motivation to the initialization of the experimental work can be included. Its content should be general enough to orientate the reader gracefully into the subject materials.

Theoretical Background This section is to discuss the theoretical aspects leading to the experiment. Typically, this involves the historical background of the theories published in the research literature and the questions or ambiguities arose in these theoretical work. Citations for the sources of information should be given in one of the standard bibliographic formats (for example, using square brackets with the corresponding number [2] that points to the List of References). Explore this background to prepare the readers to read the main body of the report. It should contain sufficient materials to enable the

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readers to understand why the set of data are collected, and what are the salient features to observe in the graph, charts and tables presented in the later sections. Depending on the length and complexity of the report, the introduction and the theoretical background may be combined into one introductory section. Experimental Method, Procedure and Equipment This section describes the approach and the equipment used to conduct the experiment. It explains the function of each apparatus and how the configuration works to perform a particular measurement. Students should not recopy the procedures of the experiment from the lab handout, but to summarize and explain the methodology in a few paragraphs.

Observations, Data, Findings, Results The data should be organized and presented in the forms of graphs, charts, or tables in this section, without interpretive discussion. Raw data which may take up a few pages, and most probably won't interest any reader, could be placed in the appendices.

Calculations and Analysis The interpretation of the data gathered can be discussed in this section. Sample calculations may be included to show the correlation between the theory and the measurement results. If there exists any discrepancy between the theoretical and experimental results, an analysis or discussion should follow to explain the possible sources of error. The experimental data and the discussions may also be combined into one section, for example, under the heading called "Discussion of Experimental Results".

Conclusions The conclusions section closes the report by providing a summary to the content in the report. It indicates what is shown by the experimental work, what is its significance, and what are the advantages and limitations of the information presented. The potential applications of the results and recommendations for future work may be included.

Appendices The appendices are used to present derivations of formulae, computer program source codes, raw data, and other related information that supports the topic of the report.

List of References The sources of information are usually arranged and numbered according to the order they are cited in the report. The reference materials may be entered in the following formats: [1] Author, "Title of the book", 2nd edition, New York: Publisher, 1989. [2] Author, "Title of the paper", Journal name, Vol. 2, No. 3, Jan 1990, pg. 456-458. [3] Author, "Title of the paper", Proceedings of Conference 1991, pg. 5-6. [4] Author, "Title of the thesis", Ph.D. thesis, Rice University, Houston, May 1973.

Electronics.2 Lab Experiments

Lab Session 1: Common Emitter Amplifier Electronics Lab.2

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Lab Session 1 The Common Emitter Amplifier ----------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili

OBJECTIVES: After performing this experiment, you should be able to:

• Determine the voltage gain of a common-emitter (CE) amplifier. • Determine the input impedance of a CE amplifier. • Determine AC resistance of the emitter ( er ) for a CE amplifier. • Explain the role of coupling and bypass capacitors in a CE amplifier. • Demonstrate the effect that a load has on the voltage gain of a CE amplifier.

SUMMARY OF THEORY: In a common-emitter (CE) amplifier, the input signal is applied between the base and emitter, and the output signal is developed between the collector and emitter. The transistor’s emitter is common to both the input and output circuit; hence, the term common emitter. The common-emitter (CE) amplifier is the most common BJT amplifier configuration. This amplifier has the following characteristics:

1. High voltage gain. 2. High current gain. 3. Moderate input resistance. 4. Moderate output resistance. 5. 180° voltage phase shift between the input and output waveforms.

To make any transistor circuit amplify AC signals, the base-emitter junction must be forward biased, and the base-collector junction must be reverse-biased. The purpose of bias circuits is to establish and maintain the proper DC operating conditions for the transistor. There are several ways to apply DC bias. The simplest method, called base bias or fixed bias, is frequently unsatisfactory due to manufacturing variations between transistors and sensitivity to temperature changes. Base bias is recognized by a single resistor connected from CCV to the transistor base. A much more widely used bias circuit is called voltage-divider bias. Voltage-divider bias is not as sensitive to transistor variations and temperature changes. Voltage-divider bias is shown in Figure1(a). To analyze any amplifier, start with the DC parameters. The steps to solve for the DC parameters for the CE amplifier with voltage-divider bias illustrated in Figure 1(a) are:

1. Mentally remove capacitors from the circuit since they appear open to DC. This causes the load resistor, LR , to be removed. Solve for the base voltage, BV , by applying the voltage divider rule to 1R and 2R , as illustrated in Figure 1(b).


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2. Subtract the 0.7 V forward-bias drop across the base-emitter diode from BV to obtain the emitter voltage, EV , as illustrated in Figure 1(c).

3. The DC current in the emitter circuit is found by applying Ohm’s law to ER . The emitter current, EI , is approximately equal to the collector current, CI . The transistor appears to be a current source of approximately EI into the collector circuit, as shown in Figure 1(d).

The AC parameters for the amplifier can now be analyzed. The AC equivalent circuit is shown in Figure 2. The capacitors appear to be an AC short. For this reason, the AC equivalent circuit does not contain ER . Using the superposition theorem, CCV is replaced with a short, placing it at AC ground. The analysis steps are:

1. Replace all capacitors with a short and place CCV at AC ground. Compute the AC resistance of the emitter, er , from the equation:

eE

26 m VrI

= (1)

2. Compute the amplifier’s voltage gain. Voltage gain is the ratio of the output voltage divided by the input voltage. The input voltage is across the AC emitter resistance to ground which, in this case, is er . The output voltage is taken across the AC resistance from collector to ground which, in this case, is

CR . For the circuit in Figure 2, the output voltage divided by the input voltage can be written:

With ER bypassed: out C C CV

in e e e

V R RAV r r

ι= = ≅

ι (2)

With ER unbypassed: out C C CV

in e e E E

V R RAV (r R ) R

ι= = ≅

ι + (3)


3

3. Compute the total input resistance seen by the AC signal: With ER bypassed: in 1 2 eR R R r= β (4)

With ER unbypassed: in 1 2 e ER R R (r R )= β + (5)

4. Compute the total input resistance seen by the AC signal: (Assuming or = ∞ )

out CR R≅ (6) 5. Compute the voltage gain from the source to the load:

L in LV

S S in L out

V R RAV r R R R

=+ +

(7)

Fig.2: AC Equivalent Circuit of CE Amplifier.

EQUIPMENTS:

• Variable DC Power Supply • Dual-Trace Oscilloscope • Breadboard • Resistors • Capacitors • Potentiometer • 2N3904 NPN Transistor


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PROCEDURE:

Part 1: DC Measurements

1. Measure and record the values of the resistors.

2. Construct the amplifier shown in Figure 3. The signal generator should be turned off. Measure and record the DC voltages listed in Table 1.

3. Using the measured resistances and the value of ß determined in step (2),

compute the DC parameters listed in Table 1 for the CE amplifier shown in Figure 3. Your measured and computed values should agree within 10%. (Show your calculations)

DC

Parameter Computed

Value Measured

Value

BV

EV

EI

CV

CEV

β Table.1: DC Parameters of CE Amplifier

Fig.3: CE Amplifier

Part 2: AC Measurements 4. Compute the AC parameters listed in Table 2 (show your calculation). The AC

base voltage, bν , represents the signal input to the amplifier, inV . Multiply the input signal by the computed voltage gain to obtain the output signal.

5. Disconnect the load resistance LR . Turn on the signal generator and adjust SV

for a 0.1 PV sine wave at 1.0 kHz. Measure the peak-to peak values of the input and output waveforms, and record these values in Table 2. Use the measured signal voltages to calculate the voltage gain of the amplifier.


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6. Carefully sketch the input and output waveforms showing the phase shift between them.

7. Restore the circuit to its original configuration shown in Figure 3. Set LR to

1kΩ , and measure the peak-to peak value of the output waveform. Record your measured and calculated values. Use this measured voltage to calculate the voltage gain from the input to the load L inV V . Record it in Table 2.

8. Using the basic laws of voltage division, you can easily determine the input

impedance of this amplifier as follows: • Insert a 47 kΩ potentiometer between the signal generator and the

input coupling capacitor. • Adjust the potentiometer until outV drops to one-half the value noted

prior to insert the potentiometer. • Power down, and remove the pot from the circuit without disturbing its

setting. • Measure the adjusted resistance of the potentiometer, and record this

value in Table 2. This value equals the input impedance of the amplifier.

9. Remove 2C from the circuit. Measure the AC signal voltage at the transistor’s base, emitter, and collector. Measure the voltage gain of the amplifier.

10. With 2C open ( ER unbypassed): repeat steps (7) and (8). Compare the result values with the calculated values obtained from step (4).

11. To measure the output resistance outR of the CE Amplifier connect a 1 KΩ potentiometer connected between the output coupling capacitor and ground. Adjust the potentiometer until outV drops to one-half the previous value. Remove the potentiometer and measure its resistance. By the voltage divider role, the resistance of the potentiometer equals the output resistance of the amplifier.

AC Parameter Computed

Value ER byp. ER unbyp.

Measured Value

ER byp. ER unbyp.

b inVν =

er

VA

C outVν =

inR

L inV V Table.2: AC Parameters of CE Amplifier


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QUESTIONS & PROBLEMS:

1. Explain a simple test to determine if a transistor is saturated or cut off. 2. Refer to Table 1: How close are your calculated values of the DC parameters

to the measured value? Explain any discrepancies.

3. Is the amplifier shown in Figure 3 midpoint biased? Support your answer using values from Step (3).

4. Refer to the waveforms that you drew from Figure 3. Explain why the output signal is 180° out of phase with the input.

5. Refer to Table 2: How close are your calculated value of AC parameters to the measured value? Explain any discrepancies.

6. Refer to Step (7): What happened to the voltage gain of the circuit when the load resistance was connected? Explain why you think this happened.

7. Refer to Step (9): What happened to the voltage gain of the circuit when the bypass capacitor was removed? Explain why you think this happened.

Lab Session 2: Common Collector Amplifier Electronics Lab.2

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Lab Session 2 Common Collector Amplifier

----------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili


• Compute and measure the DC parameters of Common Collector (CC) Amplifier.

• Compute and measure the AC parameters of (CC) amplifier including the voltage gain, input resistance and power gain.

• Test the effect of different load resistors on the AC parameters of the (CC) amplifier.

SUMMARY OF THEORY: The common-collector (CC) amplifier is the second most common BJT amplifier configuration. The common-collector (CC) amplifier (also called the emitter-follower) has the input signal applied to the base and the output signal is taken from the emitter. This amplifier has the following characteristics:

1. Almost unity voltage gain. 2. High current gain. 3. High input resistance. 4. Low output resistance. 5. 0° voltage phase shift between the input and output waveforms.

Figure 1(a) illustrates a (CC) amplifier using a PNP transistor with voltage-divider bias. Frequently, a (CC) amplifier follows a voltage amplifier. Instead of having separate bias resistor bias may be obtained through a DC path connected from the previous stage as illustrated in Figure 1(b). This technique is common in power amplifiers.

Fig.1: (a) CC with PNP Transistor (b) CE and CC Amplifiers


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Analysis of the amplifier begins with the DC parameters. These procedures are described in Experiment 6 and summarized here for the PNP transistor shown in Figure 1(a).

1. Mentally remove the capacitors from the circuit since they appear open to DC. This causes the load resistor, RL to be removed.

2. Solve for the base voltage. BV , by applying the voltage-divider rule to 1R and 2R .

3. Add the 0.7 V forward-bias drop across the base-emitter diode from BV to obtain the emitter voltage, EV . (Note that the emitter is at a higher voltage in the PNP case.)

4. The DC current in the emitter circuit is found by applying Ohm's law to ER . The voltage across the emitter resistor is the difference between the supply voltage ( EEV ) and EV . The collector current is nearly equal to the emitter current, and the collector voltage is Zero.

The AC parameters for the amplifier can now be analyzed. The equivalent AC circuit is illustrated in Figure 2. The analysis steps are:

1. Replace all capacitors with a short. Compute the AC resistance of the emitter, er , from the equation:

eE

25 m VrI

= (1)

2. Compute the amplifier's voltage gain. Voltage gain is the ratio of the output voltage divided by the input voltage. The input voltage is applied across er and the AC emitter resistance, whereas the output voltage is taken only across the AC emitter resistance. Thus, the voltage gain is based on the voltage divider equation:

( )

( )e E L E Lout

Vin e E Le e E L

R R R RVA 1V r R Rr R R

ι= = =

+ι + (2)

3. Compute the total input resistance seen by the AC signal:

( ) in 1 2 e E LR R R r R R= β + (3)

4. Compute the total output resistance seen by the AC signal:

1 2out E L e e

R RR R R r r

⎛ ⎞= +⎜ ⎟β⎝ ⎠

(4)


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5. Compute the amplifier's power gain. In this case, we are only interested in the power delivered to the load resistor. The output power is 2

out LV R . The input power is 2

in inV R . Since the voltage gain is approximately 1, the power gain can be expressed as a ratio of inR to LR .

2ou t

2L in inP V2

in L L

in

VR R RA AV R RR

⎧ ⎫= = =⎨ ⎬

⎩ ⎭ (5)

These formulas were derived for the particular (CC) amplifier shown in Figure 2. You should not assume that these equations are valid for other configurations. One common application of the CC amplifier is as a buffer. A buffer is used to compensate for an impedance mismatch between a load and a source. Because the emitter follower has relatively high input impedance and low output impedance, it is commonly used to couple a high-impedance source to a low-impedance load. You will look at this application in this experiment.

(a) (b)

Fig.2: (a) CC Amplifier (b) AC Equivalent Circuit


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PROCEDURE: Part 1: DC Measurements

1. Measure and record the resistance value of the resistors listed in Table 1.

Table.1

Fig.3: (CC) Amplifier

2. Construct the amplifier shown in Figure 3. The signal generator should be turned off. With the power supply on, measure and record the DC voltages listed in Table 2.

3. Using the measured resistances and the value of ß determined in step (2),

compute the DC parameters listed in Table 2 for the (CC) amplifier shown in Figure 3. Your measured and computed values should agree within 10%. (Show your calculations)

Table.2: DC Parameters of CC Amplifier

Resistor Listed Value

Measured Value

1R 33 KΩ

2R 10 KΩ

ER 1.0 KΩ

LR 1.0 KΩ

DC Parameter

Computed Value

Measured Value

BV

EV

EI

CV β


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Part 1: AC Measurements 4. Compute the AC parameters listed in

Table 3. Assume bυ is the same as the source voltage, SV . Use the procedure outlined in the Summary of Theory to compute these parameters. Show your calculations.

Table.3: AC parameters of CC Amplifier

5. Turn on the signal generator and set SV for 1.0 p pV − at 1.0 KHz. Use the oscilloscope to set the proper voltage and check the frequency. Measure the peak to peak input and output signal voltages, and determine the voltage gain,

VA .

6. With a two-channel oscilloscope, compare the input and output waveforms. What is the phase relationship between inV and outV ?

7. Measure inR using the method employed for the CE amplifier in

Experiment6:

• Insert a 47 KΩ potentiometer between the signal generator and the input coupling capacitor.

• Connect the oscilloscope and adjust the potentiometer until the output signal displayed on the oscilloscope is exactly half the input voltage.

• Power down and carefully remove the potentiometer from the circuit without disturbing its setting.

Measure the resistance of the potentiometer and record this value in Table 3. This value is approximately equal to the amplifier input impedance.

8. To measure the output resistance outR of the (CC) amplifier, connect a 1KΩ potentiometer between the output coupling capacitor and ground. Adjust the potentiometer until outV drops to one half its previous value. Remove the potentiometer and measure its resistance. By the voltage divider rule, this resistance equals the output resistance of the amplifier.

9. Replace RL with a 10 KΩ variable resistor set to 1.0 KΩ. Connect an

oscilloscope probe to the emitter. Raise the signal amplitude until you just begin to observe clipping. If the positive peaks are clipped, you are observing cutoff because the transistor is turned off. If the negative peaks are clipped, this is called saturation clipping because the transistor is fully conducting. What type of clipping is first observed?

10. Vary RL while observing the output waveform. Describe your observations.

AC Parameter

Computed Value

Measured Value

bυ eυ

er VA inR outR PA


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11. To demonstrate the load effect on a common emitter amplifier, connect the circuit shown in Figure 4:

Fig.4: CE Amplifier

12. Set S p-pV 0.1 V= at 10 KHz. Measure and record LV . Calculate the voltage

gain from source to load, L SV V .

13. To demonstrate the use of a common collector amplifier stage to buffer a low impedance load from a high output resistance of the common emitter amplifier, connect the circuit shown in Figure 5:

Fig.5: CE and CC Amplifiers

14. Repeat step (12) for the circuit of Figure 5. Set the oscilloscope to the AC

coupling.


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1. In step (6), you observed the phase relationship between the input and output waveforms. Is the phase relationship you observed the same for an NPN circuit? Explain.

2. In step (9), you observed the effect of clipping due to saturation or cutoff of the transistor. The statement was made that if the positive peaks are clipped, you are observing cutoff clipping because the transistor is turned off. Is this statement true if the CC circuit had been constructed with an NPN transistor? Why or why not?

3. The circuit used in this experiment used voltage-divider bias.

(a) Compared to base bias, what is the advantage?

(b) What disadvantage does it have?

4. Common-collector amplifiers do not have voltage gain but still provide power gain. Explain.

5. Explain the results of steps (10) and (12). Did the emitter follower stage have a noticeable effect on the voltage gain from source to load, L SV V .

Lab Session 3: Op-Amp Characteristics Electronics Lab.2

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Lab Session 3 Op-Amp Characteristics ----------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili OBJECTIVES: After performing this experiment, you should be able to:

• Explain the meaning of common op-amp specifications. • Use IC op-amp specification sheets to determine op-amp characteristics. • Measure the input offset voltage, bias current, input offset current, and common

mode rejection ratio (CMRR) for LM 741 op-amp.

SUMMARY OF THEORY: An operational amplifier (op-amp) is a linear integrated circuit that incorporates a DC-coupled, high-gain differential amplifier and other circuitry that give it specific characteristics. The ideal op-amp has certain unattainable specifications, but hundreds of types of operational amplifiers are available, which vary in specific ways from the ideal op-amp. Important specifications include very large open-loop gain, high input impedance, and low output impedance. There are other specifications for op-amp that are important in certain applications. These specifications can be divided into two categories: DC parameters and AC parameters. DC parameters include input bias current, input offset current and input offset voltage. Input bias current ( BiasI ) is the average of the input currents required at each input terminal of the op-amp. Input offset current ( OSI ) is the absolute value of the difference between the DC bias currents.

B1 B 2Bias

I II2+

= (1)

os B1 B 2I I I−= (2) Input offset voltage ( IOV ) is the amount of voltage that must be applied between the input terminals of an op-amp to give zero output voltage. AC parameters include the slew rate and CMRR. The slew rate of an op-amp is a measure of how fast the amplifier's output voltage can respond to a change in input voltage. Slew rate is typically, expressed in units of volts per microsecond (V/µs) by the following equation:


2

OVSlew Ratet

Δ =

Δ (3)

Where: Δ OV : is a change in output voltage. Δt: is the time interval over which the output voltage changes. The slew, rate of an amplifier is one of two factors that determine the amplifier's maximum operating frequency. The other determining factor is the peak output voltage. By formula,

m axp k

s lew rateƒ2 V

=

π (4)

This formula identifies the maximum sine wave frequency that a given amplifier can produce without distortion. CMRR is the ratio of the op-amp’s differential gain divided by the common-mode gain:

vd

cm

ACMRR 20 LogA

⎛ ⎞= ⎜ ⎟

⎝ ⎠ (5)

The data sheet for a specific op-amp contains these specifications, a description of the op-amp, the device pin-out, internal schematic, maximum ratings, suggested applications, and performance curves.

Since the input stage of all op-amps is a differential amplifier, there are two inputs marked with the symbols (+) and (-). These symbols refer to the phase of the output signal compared to the input signal and should be read as non-inverting (+) and inverting (-) rather than “plus” or “minus”. If the non-inverting input is more positive than the inverting input, the output will be positive. If the inverting input is more positive, then the output will be negative. The symbol for an op-amp is shown in Figure 1(a). Figure 1(b) shows a typical 8-pin dual-in-package (DIP) with an identifier for pin 1. And Figure 2 shows the pin diagram for LM 741 op-amp.

Fig.1: (a) The Symbol for an Op-Amp (b) Typical 8-pin DIP Op-Amp


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Fig.2: The Pin Diagram for LM741 Op-Amp

Prelab:

Read the specification sheet for the LM 741 op-amp and determine the typical and maximum values for each quantity listed in Table1.

EQUIPMENTS:

• Variable DC Power Supply • Dual-Trace Oscilloscope • Breadboard • Resistors • Capacitors • LM741 Op-Amp


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PROCEDURE: Caution: You should never apply an input signal to an op-amp unless both supply voltages are connected to the IC.

1. Examine the specification sheet for the LM 741 op-amp. From the specification sheet, determine the typical and maximum values for each quantity listed in Table1. Record the specified values for TA = 25°C.

Specified Value Measured Value Step Parameter

Minimum Typical Maximum

2d Input offset voltage, IOV

3d Input bias current, BiasI

3e Input offset current, osI

4b Differential gain,

vdA

4c Common-mode gain, cmA

4d CMRR Table.1: Op-Amp Parameters

• Input Offset Voltage:

2. In this step, you will measure the input offset voltage, IOV , of LM 741 op-amp.

The input offset voltage is the amount of voltage that must be applied between the input terminals of an op-amp to give zero output voltage.

(a) Measure and record the resistors listed in Table 2. (b) Connect the circuit shown in Figure 3. Install 1 µF bypass capacitor on the

power supply leads as shown. Note the polarities of the capacitor.

(c) Measure the output voltage, IOV . The input offset voltage is found by dividing the output voltage by the closed-loop gain. The circuit will be considered as a non-inverting amplifier for the purpose of the offset calculation.

(d) Record the measured input offset voltage in Table 1.


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Table.2

Fig.3: Measurement of Input Offset Voltage. • Input Bias Current & Input Offset Current:

3. In this step, you will measure the bias current, BiasI , and the input offset current,

OSI , of LM 741 op-amp. The input bias current is the average of the input currents required at each input terminal of the op-amp. The input offset current is a measure of how well these two currents match. The input offset current is the difference in the two bias currents when the output voltage is 0 V.

(a) Measure and record the resistors listed in Table 3. (b) Connect the circuit shown in Figure 4.

Table.3 Fig.4: Measurements of IBias & IOS

(c) Measure the voltage across 1R and 2R of Figure 3. Use Ohm’s law to calculate the current in each resistor.

(d) Record the average of these two currents in Table 1 as the input bias

current, BiasI .

(e) Record the difference in these two currents in Table 1 as the input offset current, OSI .


Measured Value

R ƒ 1.0 MΩ

iR 10 kΩ

CR 10 kΩ


Measured Value

1R 100 kΩ

2R 100 kΩ


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• Common Mode Rejection Ratio:

4. In this step, you will measure the common-mode rejection ratio, CMRR, of LM 741 op-amp. The CMRR is the ratio of the op-amp’s differential gain divided by the common-mode gain.

(a) Measure and record the resistors listed in Table 4. For an accurate

measurement, resistors AR and BR should be closely matched, as should

CR and DR . (b) It is more accurate to compute the differential gain, vdA , based on the

resistance ratio than to measure it directly. Determine the differential gain by dividing the measured value of CR by AR . Enter the differential gain,

vdA , in Table 1.

(c) Connect the circuit shown in Figure 5. Set the signal generator for 1.0 P PV −

at 1 kHz. Using the DMM measure the output voltage, out(cm)V . Determine the common-mode gain, cmA , by dividing out(cm)V by in(cm)V .

(d) Determine the CMRR, in decibels, for your LM 741 op-amp. Record this result in Table1.

Table.4

Fig.5: Measurement of CMRR


Measured Value

RA 100Ω

RB 100Ω

RC 100 kΩ

RD 100 kΩ


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• Slew Rate:

5. In this step, you will measure the slew rate of LM 741 op-amp. Slew rate is defined as the maximum rate of change of the output voltage under large-signal conditions. Slew rate imposes a limit on how fast the output can change and affects the frequency response of the op-amp. It is measured in units of volts/microsecond. It is usually measured using a unity gain amplifier (voltage-follower) with a fast-rising pulse.

(a) Connect the unity gain circuit shown in Figure 6. Set the signal generator

for a 10 P PV − square wave at 10 kHz. The output voltage will be slew-rate limited. It does not respond instantaneously to the change in the input voltage.

(b) Measure the rate of rise (slope) of the output waveform, as shown in Figure 7.

(c) Compare your measured slew rate with the typical value for a unity-gain LM 741 op-amp of 0.5 V/µs.

Fig.6: Measurement of Slew Rate

Fig.7: O/P vs I/P Waveforms


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EVALUATION AND REVIEW QUESTIONS:

1. What is the meaning of the (+) and (-) terminal on the op-amp symbol? 2. Explain the meaning of input offset voltage. 3. What is the difference between the input bias current and the input offset current? 4. What is the difference between differential gain and common-mode gain? 5. Explain how you measured the CMRR of the LM 741. What is the advantage of a

high CMRR?

Lab Session 4:Inverting, Noninverting and Summing Op-Amp Circuits Electronics Lab.2

1

Lab Session 4 Inverting, Non-inverting and Summing Op-Amp Circuits

----------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili


• Analyze the operation of the inverting, non-inverting and summing amplifier. • Determine and measure the closed-loop voltage gain of an inverting and a

noninverting amplifier. • Demonstrate the effects of load resistance on amplifier gain. • Demonstrate the relationship between the gain and the bandwidth for operational

amplifiers.

SUMMARY OF THEORY: Operational amplifiers can be used to perform mathematical operations on voltage signals such as inversion, addition, subtraction, integration, differentiation, and multiplication by a constant. In this experiment we will introduce the inverting, non-inverting and summing amplifiers. The basic inverting op-amp configuration is shown in Figure 1. The inverting amplifier produces a 180° voltage phase shift from its input to its output. Inverting amplifiers can also be designed for a wide range of voltage gains. At the same time, the inverting amplifier has many characteristics that are determined largely by the external biasing resistor, 1R (input resistor) and fR (feedback resistor):

• Inverting amplifiers are capable of extremely high voltage gains.

fV

1

RA -R

= (1)

• The gain of an inverting amplifier is extremely stable and easy to calculate. • Input resistance: 1iR R= (2)

Fig.1: Inverting Amplifier


2

• Output resistance: 0oR = Ω (3) • Inverting amplifiers are easier to design and troubleshoot than common emitter or

common source amplifiers. Another configuration of op-amp is the noninverting amplifier as shown in Figure 2. The non-inverting amplifier shares many characteristics with the inverting amplifier ( 0oR = Ω , high voltage gain …), with some exceptions:

• As the name implies, the output of this amplifier is in phase with its input. • The noninverting amplifier has significantly higher input impedance than a comp-

arable inverting amplifier: iR = ∞ Ω (4)

• Closed voltage gain: 1

1 fv

RA

R= + (5)

As shown in Figure 2, the input is connected directly to the non-inverting terminal of the op-amp. As a result, the circuit input impedance is equal to (or greater than) the input impedance of the op-amp itself. When compared to discrete amplifier circuits (like the emitter or source follower), the non-inverting amplifier shares some of their characteristics as well. It has high input impedance and low output impedance, and the input and output signals are in phase. The major difference is that non-inverting amplifiers can have high voltage gain, whereas emitter and source followers are limited to voltage gains of slightly less than unity.

Fig.2: Non-inverting Amplifier

A special configuration of non-inverting amplifier is the "unity gain buffer" shown in Figure 3 (when fR = 0). Unity gain buffer provides voltage gain equal to one as we can see from equation 5.

Fig.3: Unity Gain Buffer


3

The inverting amplifier can be modified to accommodate multiple input signals as in Figure 4.

Fig.4: Summing Amplifier

With this configuration, the output signal is the sum of the two input signals and determined by the following equation:

1 21 2

( V )f fo

R RV V

R R= − + (6)

The amplifier can be extended to any number of inputs. For this reason, it can be used to build a digital-to-analog converter (DAC).

Equipments:

• Variable DC power supply • Function generator • Dual-trace oscilloscope • Breadboard • Resistors • LM741 op-amp (or equivalent) • Never apply an input signal to an op-amp unless both supply voltages are

connected to the IC.


4

PROCEDURE: Part 1: Inverting Amplifier

1. Construct the circuit shown in Figure 5. Connect a 500 Hz, 1 p-pV sine wave to the input and use the oscilloscope to observe the input and output signals.

Note: When you are using a function generator with DC offset controls, make sure that the offset is either set at 0 V or disabled.

Fig.5: Inverting Amplifier

2. Measure the peak-to-peak values of the input and output waveforms, and record

their values. Then, sketch both waveforms. 3. Use your results from Step (2) to calculate the closed-loop voltage gain for the

circuit.

4. Table 1 lists a series of resistance values to be used in place of fR . For each value listed, repeat the measurements and calculations in Steps (2) and (3).

fR Vin Vout Av (Calculated) Av (Measured)

27 kΩ

33 kΩ

47 kΩ

82 kΩ Table.1

5. Measure the inverting amplifier circuit's input impedance by adding a 10 kΩ

potentiometer in series with the input. Adjust the pot such that the gain reduces to the 50% of the value you measured in step (2).

6. Return fR to 10 kΩ. Connect a 10 kΩ resistor as a load, and increase the input signal to 5 p-pV . Power up, and measure the output voltage across the load. Use this value to calculate vA . Record these values in Table 2.

7. Repeat Step (6) for the other two load values listed in Table 2.


5

LR Vin Vout Av

10 kΩ 100 Ω 47 Ω

Table.2

8. Connect a 1 kΩ potentiometer as a load. It should initially be adjusted to its highest setting. Slowly decrease the value of the potentiometer until you begin to see a decrease in output voltage or the output waveform begins to distort. Measure the resistance of the pot, and record this value.

Part 2: Non-inverting Amplifier

Fig.6: Non-inverting Amplifier

9. Construct the circuit shown in Figure 6. Connect a 500 Hz, 1 p-pV sine wave to the input and use the oscilloscope to observe the input and output signals.

10. Repeat steps (2) and (3) for Figure 6.

11. Increase the input signal frequency from 1 KHZ to 600 KHz and measure the

amplitude of Vin and Vout. Calculate the gain in dB, where dB is out10

in

V20 L og

V⎛ ⎞⎜ ⎟⎝ ⎠

.

Record your results in the Table 3. Reduce the amplitude of Vin if waveform of Vout begins to distort.

Frequency KHz

inV volt

outV volt

out

in

VV

out

in dB

VV

1 10 100 200 600

-2 dB -3 dB

Table.3


6

12. Plot the results on semi-log paper. You may need to make more measurements around frequencies where the changes occur more rapidly in order to find the -3 dB corner frequencies.

Part 3: Unity Gain Buffer

Fig.7: Unity-Gain Buffer 13. Construct the Unity gain buffer shown in Figure 7.

14. Apply a 2Vp-p, 1 kHz sinusoidal input signal to the amplifier. Display Vin and Vo

at the same time. Record the peak-peak voltage for both input and output signal and the phase shift between them.

15. Increase the frequency till you see some appreciable phase shift (maybe 5%), or

till the output waveform distorts. Record this value.

Part 4: Summing Amplifier

16. Construct the circuit shown in Figure 8. Note that the signal generator is supplying both inputs to the summing amplifier, which is op-amp 2. Note that op-amp1 in Figure 8 is included simply as a buffer; that is, it is being used to provide isolation between the two summing amplifier inputs.

Fig.8: A Two-Input Summing Amplifier.


7

17. Measure and record the peak-to-peak output voltage. 18. Change R1 to 22 kΩ, and measure the peak-to-peak output voltage.

19. Restore R1 to 10 kΩ, and change Rf to 22 kΩ. Measure the peak-to-peak output

voltage.


1. Refer to Figure 5. What was the phase relationship between the input and the output signals? Explain this phase relationship.

2. Refer to your results from Step (3). Compare your measured value of vA to the

calculated value? Explain the reasons for any significant difference between these two values?

3. Refer to Table 2: What effect did a change in load have on the voltage gain of the amplifier?

4. Refer to Step (8): Based on your knowledge of op-amp output impedance, explain why the output waveform began to change at this value of LR .

5. Refer to Step (11): Calculate the maximum operating frequency using the op-

amp’s slew rate (from the spec sheet). How does this value compare with your measured value? Explain any difference between your calculated and measured values.

Lab Session 5: Comparator, Integrator and Differentiator Electronics Lab.2

1

Lab Session 5 Comparator, Integrator and Differentiator

----------------------------------------------------------------------------- Prepared by: Dr. Osama Aloquili


• Construct and test comparator, integrator and differentiator circuits. • Determine the response of these circuits to various waveforms.

SUMMARY OF THEORY: A nonlinear application of an op-amp is the comparator. A comparator is a circuit used to compare two input voltages and to provide a DC output that indicates which of the two inputs is greater. A comparator circuit is essentially a very high gain op-amp having a plus (+) and a minus (-) inputs. The output of the comparator is a logic level that provides an indication of when the plus input voltages is greater than the minus input or when the plus input is less than the minus input. Although an op-amp can be used for this purpose, special comparator ICs are available which are better suited for the operation. Figure 1 shows an inverting 741op-amp used as a level detector. If a LED is connected at the output, the indicator LED goes on whenever the input inV goes below refV and goes off whenever inV goes above refV .

Fig.1: Comparator Circuit

Inverting comparator output:

out satV V= + when in refV V< (1)

out satV V= − when in refV V> (2) There are two other nonlinear circuits that have application in waveform generation and signal processing - the integrator and the differentiator. An integrator produces an output voltage that is proportional to the integral (sum) of the input voltage waveform over time.


2

A simple integrator circuit can be constructed as shown in Figure 2 using an operational amplifier, a resistor and a capacitor. It can be shown that:

t

out in0in fb

1V V (t) dtR C

= − ∫ (3)

Fig.2: Integrator Circuit

Unfortunately this integrator is often unstable and hence not very practical. This is because even the slightest DC offset in the input voltage will drive the output into saturation. For this reason, a resistor fbR as shown in Figure 3 is added in parallel to the capacitor to limit this effect and to limit the minimum input frequency allowed. With fbR in place, the circuit is known as a leaky integrator (also known as a running average or Miller integrator).

Fig.3: Leaky Integrator Circuit

Integration will be performed only at frequencies above the break frequency caused by the feedback resistor:

fb fb

12 R CΒƒ =π (4)


3

The opposite of integration is differentiation. A differentiator circuit produces an output that is proportional to the derivative or rate of change of the input voltage over time. Differentiator circuit can be constructed as shown using an operational amplifier, a resistor, and a capacitor. Unlike an ideal integrator circuit where the slightest DC offset in the input eventually drives the output into saturation, for the differentiator we need not be concerned about a DC offset in the input since the derivative of a constant is always zero. For this circuit, it can be shown that:

in

outdVV RCdt

= − (5)

Fig.4: Differentiator Circuit

Since the output voltage of a differentiated is proportional to the input frequency, high frequency signals (such as electrical noise) may saturate or cutoff the amplifier. For this reason: a resistor is placed in series with the capacitor in the input as shown in Figure 5. This establishes high frequency limit beyond which differentiation no longer occurs:

in in

12 R CΒƒ =π (6)

Fig.5: Stable Differentiator Circuit

To achieve greater attenuation at higher frequencies (or prevent oscillation), a feedback capacitor is added in parallel with the feedback resistor. This establishes another break frequency that can be calculated as in the integrator.


4

PROCEDURE: Part 1: Comparator with 741 IC Used as a Level Detector

1. Construct the circuit of Figure 6(a). Adjust the function generator to produce a 5- p pV − sine wave at a frequency of 1 KHz. Measure and record the resistor values.

(a) (b)

Fig.6: Comparator Circuits 2. Set up your oscilloscope so that both channels are ground-referenced to the center

of the Osc. Screen. (This will enable you to use the oscilloscope to measure the value of input voltage that causes the op-amp output to change states). To establish the center of the grid as the ground reference:

• Set GND switch to the ground (GND) position. • Move both channels to the center of the CRT display. • Set both switches to the DC position to provide dc coupling.

3. Observe the circuit input and output for the same vertical sensitivity (V/Div).

Determine the magnitude of the input voltage at which the output changes state, and record this value.

4. Sketch both waveforms.

5. Modify the circuit as shown in Figure 6(b). Repeat Steps (3) and (4). Record the reference voltage value, and sketch the waveforms.


5

Part 2: Integrator

6. Construct the circuit shown in Figure 7. Apply a square wave output of around 100 Hz, p p3V − from the function generator to inV , sketch inV and o u tV . What do you observe? Why? Increase the input frequency until you get the correct output.

Fig.7: Integrator Circuit

7. Apply a p p3V − of 500Hz sine wave to the integrator and sketch the observed

inV and outV on the same time scale. Note any phase shift of the output voltage with respect to the input voltage.

8. Vary the frequency of inV frown 100Hz to 50KHz. Calculate the gain in dB.

9. Record the results in the Table 1 and plot the gain vs. frequency on semi-log graph paper.

Frequency (Hz)

inV (Volt)

outV (Volt)

out

in dB

VV

Phase Shift

200 500 1K 4K 5K 10K 20K 50k

-2dB -4dB

Table.1


6

Part 3: Differentiator

10. Connect the circuit shown in Figure 8.

Fig.8: Differentiator Circuit

11. Apply a 1 pV sine wave at 500 Hz to the differentiator and sketch the observed

inV and outV on the same time scale. Note any phase shift of the output voltage with respect to the input voltage.

12. Vary the frequency of inV as shown in the Table 2 and record the results.

Calculate the gain in dB.

Frequency (Hz)

inV (Volt)

outV (Volt)

out

in dB

VV

Phase Shift

500

200

1000 Table 2

13. Set inV to 1 pV of a triangular wave at 200 Hz. Sketch the observed inV and

outV on the same time scale.


7


1. Using the nominal values of the resistors shown in Figure 6(a), calculate refV . Compare this value to the voltage measured in Step (3)? Explain any discrepancy between the two values.

2. Refer to the waveforms you recorded in Figure 6. Explain the input/output

relationship that you observed for these two circuits.

3. Refer to Figure 7: What is the cutoff frequency with fbR connected?

4. In step (8), explain why the output peak-to-peak value decreases as the frequency is increased.

5. Refer to step (9): What is the rate of the roll-off gain of the low pass filter in dB?

6. Refer to Figure 8: What are the theoretical break frequencies for the differentiator?

Lab Session 6: Multistage Amplifiers Electronics Lab.2

1

Lab Session 6 Multistage Amplifiers -------------------------------------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili


• Construct a two-stage transistor amplifier. • Measure the DC and AC parameters including the input resistance, output resistance, voltage

gain, and power gain. SUMMARY OF THEORY: A single stage of amplification is often not enough for a particular application. The overall gain can be increased by using more than one stage. Practical transistor amplifiers usually consist of a number of stages connected in cascade. In addition to provide gain, the first (or input) stage is usually required to provide a high input resistance in order to avoid loss of signal level when the amplifier is fed from a high resistance source. In a differential amplifier the input stage must also provide large common mode rejection. The function of the middle stage of an amplifier cascade is to provide the bulk of the voltage gain. In addition, the middle stage provides such other functions as the conversion of the signal from differential mode to single ended mode and the shifting of the DC level of the signal. Finally, the main function of the last (or output) stage of an amplifier is to provide a low output resistance in order to avoid loss of gain when a low-valued load resistance is connected to the amplifier. Also, the output stage should be able to supply the current required by the load in an efficient manner. The two-stage linear amplifier is shown in Figure 1. It uses two common emitter (CE) circuits, with the PNP and NPN transistors connected in a cascade Amplifier. AR and BR are not considered part of the amplifier, but are only used to attenuate the input signal from the function generator by a known factor. To analyze the amplifier, start with the DC parameters. Use measured values of components in your calculations. The steps to solve for the DC parameters for this amplifier are:

1. Mentally remove (open) capacitors from the circuit since they appear open to DC. Solve for the base voltage, BV of 1Q . By inspection, the DC base voltage is zero; however if the resistors are not equal, the base voltage can be found by applying the voltage-divider rule and the superposition theorem to 1R and 2R .

2. Add the 0.7 V forward-bias drop across the base-emitter diode of 1Q from BV to obtain the

emitter voltage, EV of 1Q .

3. Find the voltage across the emitter resistors and apply Ohm's law to solve for the emitter current EI of 1Q .


2

4. Assume the emitter current (step 3) is equal to the collector current, CI , of 1Q . Find the voltage across C1R and the voltage drop across 1Q . Solve for the DC voltage drop across the equivalent resistance to find the voltage at the collector of 1Q .

5. Compute the base voltage of 2Q by applying the superposition theorem and voltage divider

rule to 3R and 4R . Subtract 0.7 V from the base voltage of 2Q to find the emitter voltage of

2Q Find the voltage across the emitter resistors and apply Ohm's law to determine the emitter current in 2Q .

6. Assume the emitter current (step 5) is equal to the collector current CI , of 2Q . Find the

voltage across C2R and the voltage drop across 2Q .

Fig.1: Two-Stage Linear Amplifier The AC parameters for the amplifier can now be analyzed. The AC analysis steps are:

1. Replace all capacitors with a short. The AC resistance in the emitter circuit includes the unbypassed emitter resistor and the AC resistance of the transistor. Compute the AC emitter resistance of each transistor, er , from the equation:

eE

25mVrI

= (1)


3

2. Compute the input and output resistance of 1Q . The input resistance includes the bias resistors in parallel with the AC resistance of the emitter circuit reflected into the base circuit. The output resistance is simply the value of the collector resistor.

in(Q1) 1 2 e E2R R || R || (r R )= β + (2) 3. Compute the input and output resistance of 2Q . As before, the input resistance includes the

bias resistors and the AC emitter resistance reflected to the base circuit. The output resistance is again the collector resistor.

in(Q2) 3 4 e E4R R || R || (r R )= β + (3)

4. Compute the unloaded gain, V(NL)A of each stage. The unloaded voltage gain for the common-emitter transistors can be written:

out C C Cv(NL)

ein e e e(ac) e(ac)

V I R RAV I (r R ) (r R )

= = =+ + (4)

5. Compute the overall gain of the amplifier. It is easier to calculate the voltage gain of a multistage amplifier by computing the unloaded voltage gain for each stage, then including the loading effect by computing voltage dividers for the output resistance and input resistance of the following stage. This idea is illustrated in Figure 2. Each transistor is drawn as an Amplifier consisting of an input resistance, inR , an output resistance, outR , along with its unloaded gain, V(NL)A . Then, the overall loaded gain. VA , of this amplifier can be found by:

in2

V V1 V2out1 in2

RA A AR R

⎛ ⎞= ⎜ ⎟+⎝ ⎠

(5)

Note that if a load resistor was added across the output, an additional voltage divider consisting of the output resistance of the second stage and the added load resistor is used to compute the new gain.

Fig.2: Two-Stage Amplifier


4

PROCEDURE:

1. Measure and record the values of the resistors listed in Table 1. Compute the DC parameters for the amplifier listed in Table 2.

Table 2: DC Parameters of the Multi-Stage Amplifier

Table 1

2. Construct the two-stage bipolar transistor amplifier shown in Figure 1. The function generator should be turned off. Measure and record the DC voltages listed in Table 2.Your measured and computed values should agree within 10%.

3. Compute the AC parameters listed in Table 3. The gains for each stage are not loaded. The output resistance of 1Q ( out(Q1)R ) is simply the collector resistor; the input resistance of 2Q is determined by the procedure given in the Summary of Theory.

4. Compute the overall gain of the amplifier using the computed gains from Table 3 and the input and output resistance between the stages (see step 5 of the AC analysis in the Summary of Theory). Enter the computed overall gain, VA , on the first line of Table 4. Using this value. Compute the expected output voltage and record the computed output voltage on the last line of T able 4.

DC Parameter

Computed Value

Measured Value

(Q 1)VB

E (Q 1)V

E (Q 1 )I

C (Q 1)V

CE(Q1)V

B(Q2)V

E (Q 2)V

E(Q2)I

C (Q 2)V

CE(Q2)V


Measured Value

AR 100 kΩ

BR 2.0 kΩ

1R 330 kΩ

2R 330 kΩ

E1R 33 kΩ

E2R 1.0 kΩ

C1R 22 kΩ

3R 47 kΩ

4R 22 kΩ

E3R 4.7 kΩ

E4R 220 kΩ

C2R 6.8 kΩ

LR 10 kΩ


5

5. Connect the function generator voltage to the divider composed of AR and BR as shown in Figure 1. (Note: The purpose of these resistors is to attenuate the generator signal by a known amount; they will not be considered part of the amplifier). Turn on the function generator and set SV for a 0.5 Vpp sine wave at 10 KHz. (Check voltage and frequency with the oscilloscope). Measure the AC signal voltage at the amplifier's output ( out (Q 2)V ) and record the value on the last line of Table 4. Then use i nV and outV to find the measured overall gain, VA . Record the measured overall gain in the first line of Table 4.

AC

Parameter Computed

Value e(Q1)r

e(Q2)r

Q1V(NL)A

Q 2V(NL)A

out (Q1)R

in(Q2)R Table.3: Computed AC Parameters Table.4: Computed & Measured AC Parameters

6. The measurement of the total input resistance, in (to t)R , is done indirectly by using a potentiometer as shown in Figure 3. The output signal ( outV ) set by SV to a convenient level with the amplifier operating normally (no clipping or distortion). Using the basic laws of voltage division, you can easily determine the input impedance of this amplifier as follows:

• Insert a 100 kΩ potentiometer in series between the base of the transistor 1Q and the input coupling capacitor.

• Adjust the potentiometer until outV drops to one-half the value noted prior to insert the potentiometer.

• Power down, and remove the pot from the circuit without disturbing its setting. • Measure the adjusted resistance of the potentiometer, and record this value in Table 4.

This value equals the input impedance of the amplifier.

7. In this step you will measure the output resistance of the amplifier. The computed output

resistance is the same as C2R , the load resistor of 2Q . To measure the output resistance outR connect a 10 KΩ potentiometer connected between the output coupling capacitor and ground. Adjust the potentiometer until outV drops to one-half the previous value. Remove the potentiometer and measure its resistance. By the voltage divider role, the resistance of the potentiometer equals the output resistance of the amplifier.

AC Parameter

Computed Value

Measured Value

VA in(Q1)R

out(Q2)R in (Q1)V

out(Q2)V


6

Fig.3: Measurement of in (to t)R


1. Explain why it is necessary to measure the input resistance indirectly. 2. When you calculated the AC parameters, you were instructed to consider the capacitors as

shorts. Under what conditions is this assumption not warranted? 3. For the circuit in the experiment, the output resistance of both transistors was considered to

be the individual collector resistor. Explain. 4. Assume you wanted to use base bias for 2Q as shown in the circuit of Figure 2.

(a) Explain the changes you would make to the amplifier to accomplish this. (b) What disadvantage would result from this change?

5. What is the phase between the input and output signal? Explain your answer.

Lab Session 7: Common Source Amplifier Electronics Lab.2

1

Lab Session 7 JFET Amplifiers -------------------------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili


• Measure the DC and AC parameters for self-biased common-source and common-drain amplifiers.

• Explain the differences between the AC operating characteristics of typical common source and common-emitter amplifiers.

• Test a common-drain amplifier with current-source biasing. SUMMARY OF THEORY: There are several similarities between common-source (CS) and common-emitter (CE) amplifiers. Both provide a measurable amount of voltage gain, and both have a 180° voltage phase shift between their input and output signals. At the same time, however, they also have several differences. Perhaps the biggest difference is that JFETs are voltage-controlled devices and BJTs are current-controlled devices. Also, the CS amplifier typically has much higher input impedance than the CE amplifier. Finally, the voltage gain calculation for a CS amplifier is very different from that of a CE amplifier. In this experiment, you will test AC configurations of JFET amplifiers, beginning with a self-biased common-source amplifier as illustrated in Figure 1(a), then a self-biased common-drain amplifier as illustrated in Figure 1(b). You will then add a current-source load and observe the improvement in follower action.

(a) (b)

Fig.1: (a) Common Source Amplifier (b) Common Drain Amplifier


2

The DC bias of a JFET is determined by the device transfer characteristic (Vp and DSSI ) and the DC self-bias determined by the source resistor. The AC voltage gain at this DC bias point is then dependent on the device parameters ( mg ) and circuit drain resistance. AC Voltage Gain: The voltage gain of the amplifier as in Figure 1 is calculated from

outV m D m D L

in

VA g R -g (R R )V

= = − ⎡ ⎤⎣ ⎦ (1)

Where:

( ) DSSm m0 GS P m0

P

2Ig g 1 V V with gV

= − = (2)

GSP

D

DSS

VVI1

I

=−

AC Input Impedance: The AC input impedance is in GR R= (3) AC Output Impedance: The AC output impedance is out DR R= (4) EQUIPMENTS:

• Variable DC power supply • Function generator • Dual-trace oscilloscope • Breadboard • Resistors, Capacitors • 2N3819A JFET Transistor (or equivalent)


3

PROCEDURE: Common-Source JFET Amplifier

1. Measure and record the resistance value of the resistors listed in Table 1.


Measured Value

SR 1.0 KΩ

DR 3.3 KΩ

GR 1.0 MΩ

LR 10 KΩ Table.1

2. Construct the circuit shown in Figure 2. Place your DMM in the drain circuit to

measure DI . Turn off the function generator and set SR initially to be 1 KΩ .

3. Measure the gate-source voltage G SV and the drain current DI . Change SR to 1.5 KΩ , and then repeat the measurements.

4. Use your results from step (2) to calculate G SVΔ and DIΔ . Then, use these values

to calculate mg .

5. Using the rated value of DR and the value of mg found in step (4), calculate the open-load voltage gain of the amplifier.

6. Restore the initial settings and turn on the function generator as shown in

Figure.2. Set the signal generator for 500 mVpp sine wave at 1.0 kHz. Check the amplitude and frequency with your oscilloscope.

Fig.2: Common Source Amplifier


4

7. Measure the DC voltage at the drain, source, and gate. Use the source voltage and source resistance to compute DI . Enter the data in Table 2. Compare the input and output AC voltage by viewing Vin and Vout simultaneously on a two-channel oscilloscope. Measure the voltage gain and note the phase difference (0 or 180°) between the input and output signals. Record these values in Table 2.

DC & AC Parameters DC Values AC ValuesGate Voltage, GV

Source Voltage, SV

Drain Voltage, DV Drain Current, DI Input Voltage, inV Output Voltage, outV Voltage Gain, VA Phase Difference

Table.2: Data for Common Source Amplifier 8. Change the source resistor from 1.0 KΩ to a 620 Ω resistor in place of SR . You

should observe a slight increase in gain with the smaller resistor. Can you explain this gain increase? (Hint: consider mg ).

9. Now change the load resistor from 10 KΩ to 100 KΩ . Explain the observed gain

change.

10. Connect a 2 MΩ potentiometer between the function generator and the input coupling capacitor. Initially, the pot should be at its lowest setting. Measure the input impedance of the amplifier as follows:

• Adjust the input so that you get the maximum undistorted output signal. • Slowly increase the resistance of the potentiometer until outV is

reduced to one-half its original value. • Disconnect the power from the circuit, and carefully remove the

potentiometer. Measure its resistance, and record this value.


5

Common-Drain Self-Biased JFET Amplifier

11. Change the circuit to the self-biased common-drain configuration as shown in Figure 3. The drain is connected directly to +15 V. Measure the DC voltage at the drain, source, and gate and compute DI . Observe the input and output AC voltages with the oscilloscope. Measure the voltage gain and note the phase. Enter the data in Table 3.

Fig.3: Common Drain Amplifier

DC & AC Parameters DC Values AC ValuesGate Voltage, GV

Source Voltage, SV

Drain Voltage, DV Drain Current, DI Input Voltage, inV Output Voltage, outV Voltage Gain, VA Phase Difference

Table.3: Data for Common Drain Self-Biased Amplifier Common-Drain Current-source JFET Amplifier

12. As you observed in step (7), the voltage gain is much less than 1.0 due to the transconductance, mg . The reciprocal of mg (1/ mg ) is analogous to er of a bipolar transistor, but with higher resistance. This forms a voltage divider with SR as shown in Figure 4.

To improve the gain: the divider is constructed with a very much larger resistance in the form of a JFET current source instead of a fixed resistor as shown in


6

Figure-5. Modify the self-biased circuit to include the current source. Remove the output coupling capacitor and the load resistor and lift the ground end of SR . Connect the drain of a JFET current source to this point as shown in Figure 5(b). Notice that the output is taken at the bottom of S1R .

13. Measure and record the parameters listed in Table 4 for the common-drain, current- source amplifier. Note the change in the gain.

(a) (b)

Fig.5: (a) 1/gm and RS form a Voltage Divider (b) Common Drain Current-Source Amp.

DC & AC Parameters DC Values AC Values1Q Gate Voltage, GV

1Q Source Voltage, SV

1Q Drain Voltage, DV

2Q Gate Voltage, GV

2Q Source Voltage, SV

2Q Drain Voltage, DV Drain Current, DI

Input Voltage, inV Output Voltage, outV

Voltage Gain, VA Phase Difference

Table.4: Data for Common Drain Current-Source Amplifier


7


1. (a) What advantage does a common-drain amplifier have compared to a common-emitter amplifier?

(b) What disadvantage does a common-drain amplifier have compared to a common- emitter amplifier?

2. Compare the common-source and common drain amplifiers tested in this experiment. What are the significant differences between them? What things do they have in common?

3. Refer to Steps (5) and (7). How did your measured value of VA compare to the calculated value? If there is a significant difference, how do you account for this variation?

4. For the common-source amplifier (Figure 2), what would you expect to happen to the DC and AC parameters if the bypass capacitor, 2C , were open?

5. What happened to the voltage gain of the amplifier when the load was changed in Step (9)? Explain why this happened.

6. For the common-drain current-source biasing circuit shown in Figure 5,

(a) Why is it useful to have the source resistor, 1SR , equal to 2SR ?

(b) Why was the gain much better with current-source biasing than self-bias?

Lab Session 8: Amplifier Frequency Response Electronics Lab.2

1

Lab Session 8 Amplifier Frequency Response

--------------------------------------------------------------------------------- Supervised by: Dr. Osama Al-Oquili


• Compute the three lower break frequencies for a CE amplifier and use them to compute the overall lower critical frequency, CLƒ .

• Measure the overall low-frequency response of the CE amplifier. • Measure the phase difference between the input and output signals at the critical

frequency. • Compute the upper break frequencies for a CE amplifier and the overall upper

critical frequency, CUƒ . • Measure the overall upper critical frequency of the CE amplifier.

Summary of Theory: The frequency response of an amplifier is the variation in the output as the frequency is varied. The analysis of the frequency response of an amplifier can be considered in three frequency ranges: the low-, mid-, and high-frequency regions. In the low-frequency region the capacitors used for DC isolation (AC coupling) and bypass operation affect the lower cutoff (lower 3-dB) frequency. In the mid- frequency range only resistive elements affect the gain, the gain remaining constant. In the high-frequency region of operation, stray wiring capacitances and device inter-terminal capacitances will determine the circuit's upper cutoff frequency. Amplifier Low Frequency Response: If a capacitor is in series with the signal path, a high-pass filter is formed causing low signal frequencies to be attenuated at the output. The input and output coupling capacitors are examples of series capacitors. In performing their intended job of blocking DC, they also attenuate low signal frequencies, causing an AC signal to be developed across them. Also, a phase shift is introduced by the coupling capacitors because 1C forms a lead circuit with inR of the amplifier, and 3C forms a lead circuit with L CR and R as shown in Figure 1. The effect of the coupling capacitors is illustrated in Figure 1. Looking into the amplifier, as illustrated in Figure 1(a), you see an equivalent capacitor in series with the input resistance of the amplifier, forming the high-pass filter shown in Figure 1 (b).


2

Fig.1 (a): CE Amplifier Fig.1 (b): Input High Pass Filter The cutoff frequency due to the input coupling capacitor is:

C1i S 1

1 Hz2 (R R )C

ƒ =π +

With: i 1 2 eR R R r= β (1)

The phase shift introduced due to the input coupling capacitor is:

1 C1

in S

XtanR R

− ⎛ ⎞θ = ⎜ ⎟+⎝ ⎠

(2)

The output coupling capacitor forms the same type of network. The cutoff frequency due to the output coupling capacitor is:

C3C L 3

1 Hz2 (R R )C

ƒ =π +

(3)

The phase shift introduced due to the output coupling capacitor is:

1 C3

C L

XtanR R

− ⎛ ⎞θ = ⎜ ⎟+⎝ ⎠

(4)

Another RC circuit that affects the low frequency response is when a parallel bypass capacitor is across the emitter resistor, ER . Recall that the gain of a CE amplifier is determined by the ratio of the AC collector resistance to the AC emitter resistance. When a bypass capacitor is placed across ER , the AC resistance in the emitter circuit is much lower for frequencies above the critical frequency, causing the gain to be higher. Below the critical frequency, the bypass capacitor looks open, causing the gain of the amplifier to be reduced. The cutoff frequency due to the emitter bypass capacitor is:

C2e 2

1 Hz2 R C

ƒ =π

With: e E e thR R (r R )= + β (5)

Where: th 1 2 SR R R R= Lower Cutoff (lower 3-dB) Frequency: Each capacitor used will result in a lower cutoff frequency. The overall lower cutoff frequency at the network is then the largest of these lower cutoff frequencies.


3

Amplifier High Frequency Response: The upper frequency response of an amplifier is typically controlled by the parallel (shunt) capacitances that are internal capacitances formed between each pair of terminals of a transistor. Capacitance that is in parallel with the signal path forms a low pass filter causing higher signal frequencies to be attenuated at the output. The frequency at which the internal capacitance becomes important is dependent on the circuit and the device, but it is typically well above 1 MHz. To reduce these frequencies, so they can be measured more accurately we will add additional capacitance in this experiment between the various leads of the transistor. A typical transistor amplifier, showing the various shunt capacitances, is illustrated in Figure 2(a). At high frequencies, the coupling capacitors have very low reactance, so they can be ignored (placed with shorts). The equivalent high-frequency circuit is shown in Figure 2(b). The Thevenin resistance of the generator is part of the RC network, forming the low-pass filter. Notice that bcC in the original circuit is shown as two Miller capacitances, in (Miller )C and out (Miller )C in the equivalent circuit.

Fig.2 (a): Transistor Amplifier Showing Internal Capacitances

Fig.2 (b): Equivalent High Frequency Circuit

We can find the upper cutoff frequency by tracing the discharge path for the capacitors. On the input side, the equivalent capacitance is eq (in ) be in ( Miller )C C C= + .

Where ( )in(Miller) bc VC C 1 A= + . These capacitors can discharge through the parallel

combination consisting of eq (in ) 1 2 S eR (R R ) R ( r )= β as shown in the equivalent circuit. The cutoff frequency for the input circuit can be found from the equation:

Hieq (in ) eq (in )

12 R C

ƒ =π

(6)

Because the output voltage of a high-frequency input RC circuit is across the capacitor,


4

the output of the circuit lags the input. The phase angle is expressed as:

eq(in)1

Ceq(in)

Rtan

X−⎛ ⎞

θ = ⎜ ⎟⎜ ⎟⎝ ⎠

(7)

At output connection of the circuit, the cutoff frequency can be found as:

Hoeq (out ) eq (out )

12 R C

ƒ =π

(8)

Where: eq(out ) ce out (Miller )C C C= + , Vout (Miller ) bc

V

1 AC C

A⎛ ⎞+

= ⎜ ⎟⎜ ⎟⎝ ⎠

eq (out ) C LR R R= The phase shift introduced by the output RC circuit is:

eq (out )1

Ceq (out )

Rtan

X−⎛ ⎞

θ = ⎜ ⎟⎜ ⎟⎝ ⎠

(9)

The most important parameter for high-frequency analysis with inverting amplifiers is the Miller capacitance. Other internal characteristics (such as varying β, internal base resistance, and stray capacitance) also affect the response, so the calculated cutoff frequency may differ from the measured one. Upper Cutoff (upper 3-dB) Frequency: Each of the two capacitances used will result in an upper cutoff frequency. The overall upper cutoff frequency at the network is then the lower of the two critical high frequencies.


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PROCEDURE: Part 1: Amplifier Low Frequency Response

1. Measure and record the values of the resistors listed in Table 1.


Measured Value

SR 620 Ω 1R 68 KΩ 2R 10 KΩ ER 560 Ω CR 3.9 KΩ LR 10 KΩ

Table.1: Resistors Values Table.2: DC and AC Parameters of CE Amplifier

2. Compute the DC and AC parameters for the CE amplifier shown in Figure 3. Tabulate your calculations in Table 2 (the first five are DC parameters; the last three are AC).

3. Construct the amplifier shown in Figure 3. Then measure and record the

parameters listed in Table 2 (in the open boxes) and confirm your calculations. Recheck your work if the calculated and measured values differ significantly.

Fig.3: CE Amplifier

4. To compute the low-frequency response, it is necessary to find the equivalent

resistance, eqR , that represents the AC charge and discharge path for each capacitor. From the Summary of Theory, you find that eqR for 1C is

eq 1 2 e SR (R R r ) R= β + . Enter the computed value in Table 3.

Parameter Computed Value

Measured Value

BV EV CV

CEV EI er VA

outV


6

Table.3: Req seen by Each Capacitor and their Lower Critical Frequencies

5. In the same manner as in step (4), you can trace the charge/discharge path for 2C and 3C . For 2C , ER is in parallel with the capacitor, and the combination consisting of er and the reflected resistance of the base circuit. (The reflected resistance of the base circuit is only 4 ohm to 6 ohm because it is divided by β to move it to the emitter circuit). Note that for 3C , the collector resistance appears to be in series with the load resistance. Compute the equivalent resistance seen by

2C and 3C . Enter the computed values in Table 3.

6. Compute the critical frequency for each capacitor ( 1C , 2C , and 3C ). Use Eq(1), Eq(3) and Eq(5) from the Summary of Theory. Use the Req from Table 3 for each capacitor. Enter the computed critical frequency for each capacitor in Table 3. The overall lower cutoff frequency at the network is then the largest of these lower cutoff frequencies.

7. Measure the overall lower critical frequency of the amplifier. Observe the output signal in midband (around 10 KHz) and adjust the signal for 5.0 vertical divisions on the Osc. Screen. The output should appear undistorted. Reduce the generator frequency until the output falls to 70.7% (approximately 3.5 divisions) of the voltage in midband. This frequency is the low critical frequency of the amplifier. Measure and Record this value.

8. Maintaining the input voltage at the level set above, vary the frequency and measure and record Vout to complete Table 4.

Capacitor eqR criticalƒ

1C

2C

3C


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Frequency (Hz)

inV (Volt)

outV (Volt)

out

in dB

VV

Phase Shift

50 100 400 600 800 1 K 2 K 3 k 5 K 10 K

Table.4: Voltage Gain vs Frequency

Part 2: Amplifier High Frequency Response

9. Compute the DC and AC parameters for the CE amplifier shown in Figure 4. The purpose of 4C , 5C , and 6C is to reduce the high-frequency response (as discussed in the Summary of Theory) to make it easier to measure; they do not affect any other parameter. Calculate the parameters in Table 5.

Table.5: DC and AC Parameters of CE Amplifier

10. Construct the amplifier shown in Figure 4. Measure and record the parameters listed in Table 5 (in the open boxes) and confirm your calculations. Recheck your work if the calculated and measured values differ significantly.

Parameter Computed Value

Measured Value

BV EV CV

CEV EI er VA

outV


8

11. In this step, and in steps (12) and (13), you will compute the upper critical frequency due to the input network. First, determine the equivalent input capacitance, Cin, as illustrated in Figure 2. Assume Cbe is equal to 6C since the added capacitor is much larger than the actual base-emitter capacitance. This capacitance is in parallel with in(Miller)C . The input capacitance is found from:

( )eq (in ) be in (Miller )

6 4 V

C C C

C C 1 A

= +

= + + (Use absolute value of gain)

The base-collector capacitance, Cbc, is represented by 4C . In a small-signal transistor such as the 2N3904, this capacitance is small (3 pF to 5 pF). The added 100 pF capacitance in parallel is sufficiently large that you can ignore the actual internal capacitance of the transistor. Record the input capacitance on the first line (Step 11) of Table 6.

Fig.4: Measurement of High Frequency Response

12. Compute the equivalent resistance, eq(in)R , seen by eq(in)C (illustrated in Figure 2 and described in the Summary of Theory). Enter the computed value in Table 6.

13. Compute the upper critical frequency due to the input network, Hiƒ . Enter the computed value in Table 6.

Step Parameter Computed Value

Measured Value

11 eq(in)C 12 eq(in)R 13 Hiƒ 14 eq(out )C 15 cR 16 H oƒ 17 CUƒ

Table.6: High-frequency Parameters


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14. In this step, and in steps (15) and (16), you will compute the upper critical frequency due to the output network. Start by finding the equivalent output capacitance, eq(out )C , as illustrated in Figure 2. Assume Cce is equal to 5C since the added capacitor is much larger than the actual collector-emitter capacitance. This capacitance is in parallel with the output Miller capacitance. The total output capacitance, eq(out )C , is found from:

eq(out ) ce out (Miller )

V5 4

V

C C C

1 A C C

A

= +

⎛ ⎞+= + ⎜ ⎟⎜ ⎟

⎝ ⎠ (Use absolute value of gain)

Record the output capacitance in Table 6.

15. Compute the equivalent resistance, cR , seen by eq(out )C , Since the transistor represents a current source, the capacitor charge/discharge path is only through C LR R Enter the computed value in Table 6.

16. Compute the upper critical frequency due to the output network, H oƒ . Enter the computed value in Table 6.

17. The overall upper critical frequency of the amplifier will be the lower of the two

critical high frequencies. Enter the computed overall upper frequency, CUƒ , in Table 6. Then, observe the output signal in midband (about 1 kHz) and adjust the signal for 5.0 vertical divisions on the scope face. The output should appear undistorted. Increase the generator frequency until the output falls to 70.7% (approximately 3.5 divisions) of the voltage observed in midband. This frequency is the upper critical frequency, CUƒ . Measure and record this frequency in Table 6.

18. Apply an input that provides undistorted output voltage and complete Table 7.

Frequency (KHz)

inV (Volt)

outV (Volt)

out

in dB

VV

Phase Shift

10 50 100 300 500 600 700 900 1000 2000

Table.7: Voltage Gain vs Frequency


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19. Using the semi-log paper, plot the gain versus frequency over the full frequency range obtained from steps (8) and (18). Plot the actual points and connect to obtain the actual plot. Use straight-line approximation curves to obtain the Bode plot.


1. The critical frequency occurs at the frequency at which the output voltage drops to 70.7% of the midband voltage. Prove that this is also the half-power frequency.

2. Assume capacitor 2C was open. How would this affect:

(a) The gain of the amplifier? (b) The low critical frequency of the amplifier? (c) The high critical frequency of the amplifier?

3. Assume the measured lower cutoff frequency was much higher than it should be but other parameters (AC and DC) were normal. You assume one of the capacitors is the wrong size. How could you use another capacitor to quickly isolate which capacitor was incorrect?

4. Assume the amplifier shown in Figure 4 contained an unbypassed 10-ohm resistor in the emitter circuit. What effect does this have on the:

(a) Gain? (b) Miller capacitance? (c) Upper critical frequency?

5. Consider the three capacitors that were placed between the transistor leads ( 4C , 5C , and 6C ). Which had the greatest effect on the upper critical frequency? Explain your answer.

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