TC1782 Scalable Pads - Infineon Technologies

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TC1782 Scalable Pads

Timing and Electromagnet ic Emission AP32146

Appl icat ion Note V1.0 2010-01

Edition 2010-01 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved.

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AP32146 TC1782 Scalable Pads

Timing and Electromagnetic Emission

Revision History: V1.0, 2010-01 Previous Version: none Page Subjects (major changes since last revision)

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Application Note 3 V1.0, 2010-01



Table of Contents

1 Preface ................................................................................................................................................5 2 Introduction ........................................................................................................................................6 2.1 Pad driver scaling in detail ...................................................................................................................6 2.2 Physical basics.....................................................................................................................................7 2.2.1 Load charging.......................................................................................................................................7 2.2.2 Signal integrity......................................................................................................................................8 2.2.3 Power integrity / Electromagnetic emission .......................................................................................12 3 TC1782 test configuration ...............................................................................................................14 4 Specified timings .............................................................................................................................16 5 Measured timings.............................................................................................................................17 5.1 Measurement conditions and naming conventions............................................................................17 5.2 Measured rise/fall times for Class A1 drivers.....................................................................................20 5.3 Measured rise/fall times for Class A1+ drivers...................................................................................21 5.4 Measured rise/fall times for Class A2 drivers.....................................................................................23 5.5 Rise/fall time diagrams for Class A1 drivers ......................................................................................26 5.6 Rise/fall time diagrams for Class A1+ drivers ....................................................................................27 5.7 Rise/fall time diagrams for Class A2 drivers ......................................................................................29 5.8 Rise/fall time diagrams for increased capacitive loads ......................................................................33 6 Measured electromagnetic emission .............................................................................................37 6.1 Microcontroller operation mode..........................................................................................................37 6.2 Description of test equipment.............................................................................................................41 6.2.1 Conducted emission test configuration ..............................................................................................41 6.2.2 Radiated emission test configuration .................................................................................................41 6.2.3 Measurement settings........................................................................................................................42 6.3 Emission test result discussion ..........................................................................................................43 7 Recommended pad driver settings ................................................................................................51 7.1 Signal categories................................................................................................................................51 7.2 Decision tables and diagrams............................................................................................................52 7.2.1 Decision table for pad class A2..........................................................................................................55 7.2.2 Decision table for pad class A1+........................................................................................................57 7.2.3 Decision table for pad class A1..........................................................................................................59 7.2.4 Decision diagrams for pad class A2...................................................................................................60 7.2.5 Decision diagrams for pad class A1+.................................................................................................65 7.2.6 Decision diagrams for pad class A1...................................................................................................70 7.2.7 Decision diagrams for weak driver at high capacitive load ................................................................75 7.2.8 Decision diagrams for medium driver at high capacitive load............................................................80 8 Pad Scaling Calculator (PASTOR)..................................................................................................85 8.1 Scope of the software ........................................................................................................................85 8.2 How to use PASTOR .........................................................................................................................85 8.3 PASTOR screenshots ........................................................................................................................86 Annex A: Measured rise/fall waveforms............................................................................................................90 Annex B: Glossary.............................................................................................................................................150



Timing and Electromagnetic Emission 1 Preface

Output driver scaling, also referred to as „slew rate control“, is an effective technique to reduce the electromagnetic emission and improve the signal integrity of an integrated circuit by reducing the driver strength and/or smoothing the rising and falling edges of one or more pad output drivers.

Output driver scaling makes sense only when a certain margin regarding signal frequency and/or capacitive output load is available. Any driver scaling must maintain proper signal integrity.

This application note presents a huge set of output driver characterization data plus a special software, which shall enable the system designers to select proper driver settings to reduce the electromagnetic emission caused by the driver switching, while maintaining the desired signal integrity. Parameters under consideration are switching frequency, capacitive output load, pad supply voltage and ambient temperature.

Chapter 2 introduces physical basics behind the scaling.

Chapter 3 describes the TC1782 software initialization for timing and emission measurements.

Chapter 4 lists all specified timings which have been validated by measurements as documented in this application note.

Chapter 5 provides values and comparison diagrams of measured rise/fall times under various conditions.

Chapter 6 compares several measured electromagnetic emissions under various conditions.

Chapter 7 recommends useful settings for the drivers by introducing signal categories and giving lots of decision tables and graphs.

Chapter 8 introduces the new Microsoft Excel ™ based software PASTOR, which calculates pad driver timings under various environmental conditions and proposes the best driver scaling under timing, EMC, load, voltage and temperature constraints.

Annex A shows the waveforms of all measured rise/fall times.

Annex B explains all abbreviations used in this application note in a glossary.

Guideline to use this application note:

In most cases an appropriate driver setting is searched for, based on a given signal data rate, a given capacitive load connected to this signal, and a given maximal ambient temperature. As a solution, the diagrams given in Chapter 7 provide the required pad driver settings. These suitable pad driver settings lead to minimum electromagnetic emission under the given constraints for data rate, capacitive load, and operating temperature.

In addition, the measured values of rise and fall times for all driver settings listed in the decision diagrams can be referred in Chapter 5.

The impact of driver settings on electromagnetic emission can be estimated from the diagrams in Chapter 5.

Annex A and B serve as data pool for detailled timing and electromagnetic emission behaviour for all pad driver settings under various temperature and capacitve load conditions. Note that emissions are always measured at room temperature (25°C).

Figure 1: 32-bit microcontroller TC1782

Important notes:

The information given in this application note is valid for Infineon microcontrollers of the AudoMax family, fabricated in 90 nm CMOS technology.

Please note that all numbers given in this application note are not guaranteed in the microcontroller data sheets. They are verified by design without being monitored during the IC fabrication process. The numbers are based on timing measurements performed on center lot devices. Fabrication process windows may lead to deviations of below 10%.



Timing and Electromagnetic Emission 2 Introduction

The output driver scaling principle of the TC1782 microcontroller is shown in Figure 2. The driver configuration is possible by setting corresponding control bits in the port-related output control registers.

2.1 Pad driver scaling in detail Basically, we distinguish between driver control and edge control. Driver control bits set the general DC driving capability of the respective driver. Reducing the driver strength increases the output’s internal resistance which attenuates noise that is imported/exported via the output line.

For a given external load, charging and discharging time varies with the driver strength, thus the rise/fall times will change accordingly. For the sake of low electromagnetic emission, low-speed signals should be driven by weak output drivers. However, high DC-current sinks like LEDs or power transistors may require a stable high output current (strong driver) although the toggle rate is very low.

The controllable output drivers of the TC1782 pins feature three differently sized transistors (strong, medium, and weak) for each direction (push and pull). The time of activating/deactivating these transistors determines the output characteristics of the respective port driver.

The strength of the driver can be selected to adapt the driver characteristics to the application’s requirements:

In Strong Driver Mode, the medium and strong transistors are activated. In this mode the driver provides maximum output current even after the target signal level is reached.

In Medium Driver Mode, only the medium transistor is activated while the other transistors remain off.

In Weak Driver Mode, only the weak transistor is activated while the other transistors remain off. This results in smooth transitions with low current peaks (and reduced susceptibility for noise) on the cost of increased transition times, i.e. slower edges, depending on the capacitive load, and low static current.

Signal slopes or edges define the rise/fall time for the respective output, i.e. the output transition time. Soft edges reduce the peak currents that are drawn when changing the voltage level of an external capacitive load. For a bus interface, however, sharp edges may still be required. Edge characteristics are controlled by the pad pre-driver which controls the final output driver stage.

Figure 2: Pad output driver schematic



Timing and Electromagnetic Emission 2.2 Physical basics Two main constraints have to be met when deciding for a certain clock driver setting: signal integrity and power integrity. Signal integrity must be maintained for all signals driven by the microcontroller. Conditions for good signal integrity are:

- Maximal desired signal frequency is reached.

- Stable-Level-to-Slope ratio is high (at least 2:1, depending on protocol timing).

- High and low signal levels are reached.

- No overshoot or undershoot occurs.

Power integrity must be maintained to ensure proper operation and fulfil EMC requirements. Condititions for good power integrity are:

- Low RF noise on all power supply domains.

- This is equivalent to low switching noise and low electromagnetic emission.

Both issues will be discussed after a general introduction to capacitive load charging.

2.2.1 Load charging Generally, a switching transistor output stage delivers charge to its corresponding load capacitance during rising edge and draws charge from its load capacitance during falling edge. The load capacitance is built by the signal net (traces) on the PCB and all connected receiver input stages (ASIC input pins). Timing diagrams normally show the signal’s voltage over time characteristics. However, the resulting timing is a result of the electrical charge transfer to and from the load capacitance described above. Charge is transferred by flowing current.

A bigger pad driver means a smaller resistance in the loading path of the external load. Figure 3 shows the load current and voltage of two examples of pad drivers connected to a load of C=40pF. The strong driver has an output resistance of 25Ω, the weak driver 50Ω. For times t<0, the output voltage is 0V. At t=0, the load capacitor C is connected to the target output voltage U=5V via the respective driver pullup transistor. As a reaction, the load current steps immediately to the value I=U/R. I is bigger for smaller values of R. This means that the strong driver generates a bigger current jump and charges the load capacitor in a shorter time.

In time domain this leads to bigger reflections for not adapted driver impedances. Since typical trace impedances range from 60 to 120Ω, a strong driver with Z=10Ω is poorly adapted and may cause big voltage over- and undershoots. A weak driver with Z=100Ω may fit perfectly and generate a clean voltage switching signal without over- or undershoots. These effects are discussed in chapter 2.2.2.

In frequency domain, the current peak which is resulting from the charging of the load capacitor and from the over- or undershoots, causes significant RF energy and thus electromagnetic emission on the pad power supply. These

Charging Voltage and Current at 40pF Load

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

-2.0E-09 0.0E+00 2.0E-09 4.0E-09 6.0E-09 8.0E-09 1.0E-08

Time [s]

Vol

tage

[V]

0

0.02

0.04

0.06

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0.14

0.16

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0.2C

urre

nt [A

]

Voltage R=50Ohm Voltage R=25OhmCurrent R=50Ohm Current R=25Ohm

Figure 3: Current-/voltage charging curves for different driver strengths



Timing and Electromagnetic Emission effects are discussed in chapter 2.2.3.

Not only the pad driver impedance, but also the connected capacitive load determines the electromagnetic emission amplitudes. Figure 4 illustrates the differences in charging current and voltage between a capacitive load of 40pF and one of 20pF. In both cases, the driver impedance is set to 50Ω.

As expected, the charging voltage increases faster for a smaller load. However, the starting value of the charging current is only determined by the driver impedance and is thus load-independent. The load affects only the speed of load current decrease. It decreases faster if the load is smaller. This means on the other hand a bigger di/dt for smaller loads, resulting in higer emission for smaller loads.

This disadvantage can be compensated by chosing a smaller pad driver, i.e. a weaker driver setting, causing bigger driver impedance and thus smaller di/dt for the charging current.

The selection of a weaker driver setting slows down the pad switching time, so care must be taken to maintain the required signal integrity.

Charging Voltage and Current at 50Ohm Driver Impedance

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

-2.0E-09 0.0E+00 2.0E-09 4.0E-09 6.0E-09 8.0E-09 1.0E-08

Time [s]

Vol

tage

[V]

0

0.02

0.04

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0.16

0.18

0.2

Curr

ent [

A]

Voltage Cload=40pF Voltage Cload=20pFCurrent Cload=40pF Current Cload=20pF

Figure 4: Current-/voltage charging curves for different capacitive loads

2.2.2 Signal integrity Maintaining signal integrity means to select the rise/fall times such that all signal handshaking and data communication timings and levels are ensured for proper system operation. This means the data interchange between the microcontroller and external ICs (e.g. Flash memory, line drivers, receivers) runs properly.

Therefore, it has to be taken into account that CMOS transistors become slower with rising temperature. Thus the timing of a critical signal has to be matched for proper operation at highest ambient temperature. Depending on the application, common ambient temperature ranges are up to 85°C or up to 125°C. Several automotive control units specify an ambient temperature range from -40°C up to 140°C. The die temperature may reach values above 150°C during operation.

Rules:

• Choose driver characteristics to meet the DC driving requirements. Make sure that the DC current provided by the microcontroller’s pad drivers is sufficient to drive e.g. actuators or LEDs into the desired logic state.

• Choose slope settings to meet system timing constraints at the highest system temperature. Make sure that no too strong driver settings are selected. This would lead to unnecessarily fast signal edges, causing two disadvantages regarding electromagnetic emission: (1) The slopes are too fast and cause undesired high emission energy at higher frequencies; (2) Over- and undershoot appears with the danger of latchup, spikes leading to wrong logic states or increased data delays and undesired high frequency emission.

• If system timing requires strong drivers, consider series termination to avoid over-/undershoot at signal transitions. The value of the termination resistor has to be chosen according the signal line impedance.



Timing and Electromagnetic Emission The following examples describe the signal integrity issues mentioned above.

Let us assume a CMOS push/pull output driver with scalable driver impedance connected to a scalable microstrip trace on the PCB terminated by a reveiver input pin. The driver is controlled by a periodically toggling clock with 2ns slopes at different frequencies.

This simple circuit is shown in Figure 5.

Figure 5: Signal over- and undershoots

Let us further assume the following system settings:

Driver scaling Microstrip scaling Clock rate scaling

Driver name Impedance Zdr

Strong-sharp 20Ω 2cm long 1MHz

Strong-medium 50Ω 5cm long 10MHz

Strong-soft 100Ω 10cm long 100MHz

Medium 200Ω 20cm long -

Weak 1000Ω - -

Please note that the “driver names” for these examples have been selected according the driver settings implemented in the TC1782. Nevertheless, the signal shapes and timings shown in Figures 6 to 11 are based on the simple model of Figure 5 and thus not identical to the physical realization of these drivers. For signal shapes and signal integrity discussion of the real physical TC1782 drivers please refer to chapters 5 and 7 and Annex A.

Figures 6, 7, 8 show the driver scaling impact on signal integrity. Stronger drivers may cause signal over- and undershoot. Figures 9, 10, 11 show the PCB trace length impact. Driver strength should be selected to be as weak as possible to avoid over/undershoot. Of course any timings required by communication protocols must be maintained. Typically, weak driver settings can be used for signals up to 1MHz. Medium settings are valid for signals in the low MHz range, whereas faster signals need strong drivers. Infineon microcontrollers refine their strong drivers by slew-rate control like sharp/medium/soft edge, thus providing a fine tuning capability in the high signal performance class which is especially critical for electromagnetic emission.

Figure 6: A 1MHz clock can be driven by a weak or medium driver. Any strong driver should be avoided due to unnecessary over- and undershoots and higher electromagnetic emission.

Figure 7: A 10MHz signal cannot anymore be driven by a weak driver since the final high and low levels are hardly reached in time. The medium driver may be possible in the shown case of a 10cm long PCB trace. Depending on the communication protocol’s timing requirements, the strong-soft driver may be preferred due to its slightly faster slopes. Strong-medium and strong-sharp drivers are not recommended due to resulting over- and undershoot.

Figure 8: Depending on the protocol’s timing constraints, either strong-medium or strong-sharp drivers must be used. Strong-sharp still has significant over- and undershoots, thus offers worse signal integrity, but has steeper slopes.




Figure 6: Signal integrity for various driver settings at 1MHz clock signal






Figure 9: The PCB trace length determines the signal integrity significantly. Longer traces lead to increased over- and undershoot due to the larger inductive and capacitive components of the trace according the transmission line theory. This ringing effect caused by the trace length is superimposed to the ringing effect caused by strong drivers with steep slope which was discussed in Figures 6 to 8. The strong-sharp driver shown in Figure 9 causes significant ringing on traces longer than 5cm.

Figure 10: For strong-medium driver, the ringing is significantly reduced and the timing even for 100MHz clocks is good up to 10cm long traces.

Figure 11: The strong-soft driver is the preferred choice for signals up to 10MHz. It cannot be used for 100MHz clocks because due to the long slopes the target signal levels are never reached.

Figure 9: Signal integrity for strong-sharp driver at various microstrip line lengths

Figure 10: Signal integrity for strong-medium driver at various microstrip line lengths




Figure 11: Signal integrity for strong-soft driver at various microstrip line lengths

2.2.3 Power integrity / Electromagnetic emission Any switching between low and high voltage levels generates RF noise. Responsible for this electromagnetic energy is the dynamic current which is required to charge and discharge a lot of on-chip and off-chip nodes. In the logic core power supply domain of a microcontroller, the millions of transistors switching nearly simultaneously – triggered by the synchronous clock – draw lots of dynamic current from on-chip capacitors, decoupling capacitors on the PCB and finally the voltage regulator or battery “somewhere” in the system. Preferrably, most of this dynamic switching current should be provided by the on-chip capacitors because in that case, only a small part of high frequency energy is propagated over the PCB, where it is efficiently radiated. If a good RF decoupling concept has been implemented on the PCB (i.e. decoupling capacitors place close to the microcontroller’s power supply pins), most of the RF current is kept within small loops on the PCB.

Figure 12: Spectrum envelope for different clocks and edges

For the I/O domain, the switching currents are drawn by the pad drivers. In contrast to the logic core domain, no on-chip capacitors can be implemented on the microcontroller due to very limited area of the pad frame. For the I/O domain, a very good external decoupling concept must be implemented on the PCB. Nevertheless, the electromagnetic emission caused by pad drivers can in most application cases significantly reduced by using weaker drivers. This driver selection is done by software as explained in section 2.1. From theory, the



Timing and Electromagnetic Emission electromagnetic emission (EME) of trapezoidal pulses (as are typical clock waveforms) is determined by the signal frequency and the signal slopes. In the emission spectrum, the limit curve is determined by two kneepoints which separate the limit curve in damping sections of 0dB/decade, -20dB/decade and -40dB/decade. Figure 12 shows the kneepoint frequencies for several cases of clock frequency and clock edges (i.e. rise/fall times). Good signal integrity is assumed when the rise and fall time takes 10% of one clock period. Any faster edge will not improve signal integrity significantly, but leads to heavily shited damping kneepoints towards higher frequency – see the 1ns egde examples in Figure 12.

The steeper a switching pulse is, the higher frequencies (harmonics) are required to form the rising and falling edges. A rise time of 1ns leads to a spectrum composed from harmonics up to at least 500 MHz.

Assuming a 100MHz (10ns period) clock signal consisting of 10% rise time, 40% high level, 10% fall time and 40% low level, this clock signal already generates at least harmonics up to 500MHz.

Figure 12 indicates that not the clock frequency, but the rise/fall times determine the resulting RF spectrum. Even if a clock driver operates at a relatively low toggle rate, it may generate the same RF spectrum as if it would operate at a significantly higher toggle rate – as long as its rise/fall times are not adjusted to the lower toggle rate by slowing down the transitions. For example, if the mentioned 100MHz clock driver operates at only 10 MHz, its rise/fall times should be extended from 1 ns to 10 ns, still maintaining the 10% ratio relatively to the clock period time. This setting will reduce the emission by 10dB at 50MHz and by more than 30dB above 300MHz.

• General Rule: Choose driver and edge characteristics to result in lowest electromagnetic emission while meeting all system timing requirements (i.e. good signal integrity) at given signal load and highest system temperature.

Figure 13 refers to our pad driver and transmission line simulation model of Figure 5. It shows the simulated electromagnetic emission at the probing point “MEAS” which is an AC-coupled test point with resistive divider to match typical emission scales of up to 80dBµV. Important is the interpretation of relative emission reduction potential when using weaker pad drivers.

For a 1MHz signal, Figure 6 shows that even the weakest driver delivers acceptable signal integrity. Moreover, Figure 13 confirms that the weakest driver reduces electromagnetic emission significantly, compared to the strong and medium settings. At 200MHz, the 1MHz harmonics are reduced by 34dB. At 100MHz, the reduction is ca. 20dB; above ca. 450MHz, the emission stays below 10dBµV (i.e. is uncritical) for all driver settings.

Figure 13: Electromagnetic emission for various driver settings at 1MHz clock signal



Timing and Electromagnetic Emission 3 TC1782 test configuration

Timing measurements were performed at 3 pins, representing the 3 pad driver classes:

- Port pin P1.13 = Class A1 pin (low speed 3.3 V LVTTL output)

- Port pin P5.1 = Class A1+ pin (medium speed 3.3 V LVTTL output)

- Port pin P2.0 = Class A2 pin (high speed 3.3 V LVTTL output)

Electromagnetic emission measurements were performed on the I/O supply net VDDP.

Roughly, these settings can be linked to driven data rates, as documented in Chapter 7. Note that the actual data rate which can be driven by the selected driver depends on additional parameters like external capacitive load, pad supply voltage and ambient temperature.

The driver settings for the respective port pins are configured by bit fields PDx in the Port Driver Mode Register, see Table 1.

Px_PDR Port x Pad Driver Mode Register (F000 0C40H+x*100H) Reset Value: 0000 0000H

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

0 PD7 0 PD6 0 PD5 0 PD4

r rw r rw r rw r rw

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 PD3 0 PD2 0 PD1 0 PD0

r rw r rw r rw r rw

Field Bits Type Description [2:0] rw PD0 Pad Driver Mode for Px.[3:0]

(Class A1 or A2 pads; coding see Table 2) [6:4] rw PD1 Pad Driver Mode for Px.[7:4]




(not used for 16-bit ports) [22:20] rw PD5 Pad Driver Mode for Px.[23:20]



(not used for 16-bit ports) r 3, 7, 11, 0 Reserved

15, 19, Read as 0; should be written with 0. 23, 27, 31

Table 1: Pad driver mode register specification



Timing and Electromagnetic Emission Driver strength and slew rate are controlled by the bit fields in the pad driver mode register Px_PDR, independently of input/output and pull-up/pulldown control functionality as programmed in the Pn_IOCRx register. One Px_PDR register is assigned to each port.

Depending on the assigned pad class, the 3-bit wide pad driver mode selection bit fields PDx in the pad driver mode registers Px_PDR make it possible to select the port line functionality as shown in Table 2:

- Class A1 pins make it possible to select between medium and weak output drivers.

- Class A1+ and A2 pins make it possible to select between strong/medium/weak output drivers. In case of strong driver type, the signal transition edge can be additionally selected as soft/slow (Class A1+) or sharp/sharp-minus/medium/medium-minus/soft (Class A2).

For details on the register structure and bit configurations please refer to the TC1782 specification.

Pad Class PDx.2 PDx.1 PDx.0 Driver Strength

0 Medium driver A1 X X 1 Weak driver

0 X 0 Strong driver soft edge 0 X 1 Strong driver slow edge

A1+

1 X 0 Medium driver 1 X 1 Weak driver 0 0 0 Strong driver, sharp edge 0 0 1 Strong driver, medium edge

A2

0 1 0 Strong driver, soft edge 0 1 1 Strong driver, sharp-minus edge 1 0 X Medium driver selected 1 0 1 1 0 Strong driver, medium-minus edge 1 1 1 Weak driver selected

Table 2: Pad Driver Mode Selection

Please note that sometimes Class A1+ and A2 drivers share the same configuration bits, thus the driver and slew rate settings are not anymory fully individual. For these cases Table 3 lists the resulting combinations of settings. For details on the driver class distribution per bit please refer to the TC1782 specification. PDx.2 PDx.1 PDx.0 A2 Driver Strength A1+ Driver Strength

0 0 0 Strong sharp Strong soft 0 0 1 Strong medium Strong slow 0 1 0 Strong soft Strong soft 0 1 1 Strong sharp-minus Strong slow 1 0 0 Medium Medium 1 0 1 Medium Weak 1 1 0 Strong medium-minus Medium 1 1 1 Weak Weak

Table 3: Possible Driver Strength Combinations in a Mixed Pad Group (A1+ and A2)



Timing and Electromagnetic Emission 4 Specified timings

Rise/fall times are specified for the TC1782 operating conditions: TJ < 150°C and VDDP = 3.3 V ± 5%.

A junction temperature TJ of 150°C corresponds to an ambient temperature of TA < 140°C. The rise/fall times documented in chapter 5 have been characterized for ambient temperatures up to 140°C, thus fully covering the specified operating range. In addition, worst and best case results including ± 5% variation of VDDP are provided.

For details please refer to the TC1782 product specification.

Class Pad driver Load condition Max. specified value

A1 Weak 20 pF 90 ns

A1 Weak 150 pF 350 ns

A1 Weak 20000 pF 50000 ns

A1 Medium 50 pF 40 ns



A1+ Weak 20 pF 90 ns

A1+ Weak 150 pF 350 ns

A1+ Weak 20000 pF 50000 ns

A1+ Medium 50 pF 40 ns

A1+ Medium 150 pF 110 ns

A1+ Medium 20000 pF 15000 ns

A1+ Strong slow 50 pF 28 ns

A1+ Strong soft 50 pF 16 ns

A2 Weak 20 pF 90 ns

A2 Weak 150 pF 350 ns

A2 Weak 20000 pF 50000 ns




A2 Strong soft 50 pF 16 ns

A2 Strong medium minus 50 pF 10 ns

A2 Strong medium 50 pF 5.5 ns

A2 Strong sharp minus 50 pF 4.4 ns

A2 Strong sharp 50 pF 3.3 ns

B Strong sharp 35 pF 2.5 ns *

B Strong sharp 50 pF 3.3 ns *

B Strong sharp 100 pF 6 ns *

* for I/O supply voltage VDDP ≥ 3.13V



Timing and Electromagnetic Emission 5 Measured timings

5.1 Measurement conditions and naming conventions

The test configuration listed in chapter 3 applies. Accordingly, all timings are measured at pins P1.13 (Class A2), P5.1 (Class A1+) and P2.0 (Class A2).

The following parameters are varied for timing measurements to reflect the PVT (process, voltage, temperature) variations anticipated during fabrication and operation:

• Pad supply voltage VDDP in 3 steps: 3.30V (nominal), 3.13V (-5%), 3.47V (+5%).

• Capacitive load according TC1782 specification in 8 steps for weak and medium drivers: 10pF, 15pF, 22pF, 33pF, 47pF, 150pF, 1500pF, 20000pF

• Capacitive load according TC1782 specification in 6 steps for strong-sharp drivers: 10pF, 15pF, 22pF, 33pF, 47pF, 100pF

• Capacitive load according TC1782 specification in 5 steps for all strong driver settings except strong-sharp: 10pF, 15pF, 22pF, 33pF, 47pF

• Ambient �emperature in 6 steps: -40°C, 0°C, +25°C, +40°C, +80°C, +125°C

• For rise/fall time values at other temperatures, a linear interpolation is performed.

• Electromagnetic emission is always measured at TA=25°C.

The pad driver is loaded with the respective capacitance by connecting a lumped SMD 0805 X7R capacitor to the port pin. The port pin is driven by either a Class A1, Class A1+ or Class A2 pad driver.

Please note that the measurement probe capacitance of 3pF must be added to the nominal load capacitors. Therefore, total capacitance values of 13pF up to 50pF are reached. Table 4 shows the reference between real loads and numbers given in the result diagrams. For easy reading, in all result tables and diagrams, the load capacitances are referring to the SMD capacitor values as 10, 15, 22, 33, 47pF.

SMD load Probe capacitance Resulting physical capacitance 10 pF 3 pF 13 pF 15 pF 3 pF 18 pF 22 pF 3 pF 25 pF 33 pF 3 pF 36 pF 47 pF 3 pF 50 pF

>50 pF 3 pF Respective load value +3 pF (may be neglected for large values)

Table 4: Overview of capacitive loads used for timing measurements




Figure 14: Voltage level references for timing measurement at VDDP=3.3V

The results given in Tables 6-8 and in the diagrams of sections 4.5 to 4.8 show the measured rising and falling edge timings. The reference points are 10% and 90% as indicated in Figure 14.

Table 5 lists all parameter variations and test names for reference. These test names are used to indicate the driver settings and load configurations used in sections 4.5 to 4.8 4. All measurements have been performed for VDDP=3.30V at ambient temperatures TA=-40°C, 0°C, 25°C, 40°C, 80°C and 125°C. Rise and fall time values for other temperatures are calculated by interpolation (70°C, 85°C, 110°C) and extrapolation (140°C).





Test Name Driver strength Lumped load capacitance Class A1 Class A1+ Class A2 WEA-10pF Weak 10pF X X X WEA-15pF Weak 15 pF X X X WEA-22pF Weak 22 pF X X X WEA-33pF Weak 33 pF X X X WEA-47pF Weak 47 pF X X X

WEA-150pF Weak 150 pF X X X WEA-1500pF Weak 1500 pF X X X WEA-20nF Weak 20000 pF X X X MED-10pF Medium 10pF X X X MED-15pF Medium 15 pF X X X MED-22pF Medium 22 pF X X X MED-33pF Medium 33 pF X X X MED-47pF Medium 47 pF X X X MED-150pF Medium 150 pF X X X MED-1500pF Medium 1500 pF X X X MED-20nF Medium 20000 pF X X X SSL-10pF Strong-slow 10pF X SSL-15pF Strong-slow 15 pF X SSL-22pF Strong-slow 22 pF X SSL-33pF Strong-slow 33 pF X SSL-47pF Strong-slow 47 pF X SSO-10pF Strong-soft 10pF X X SSO-15pF Strong-soft 15 pF X X SSO-22pF Strong-soft 22 pF X X SSO-33pF Strong-soft 33 pF X X SSO-47pF Strong-soft 47 pF X X SMM-10pF Strong-medium-minus 10pF X SMM-15pF Strong-medium-minus 15 pF X SMM-22pF Strong-medium-minus 22 pF X SMM-33pF Strong-medium-minus 33 pF X SMM-47pF Strong-medium-minus 47 pF X SME-10pF Strong-medium 10pF X SME-15pF Strong-medium 15 pF X SME-22pF Strong-medium 22 pF X SME-33pF Strong-medium 33 pF X SME-47pF Strong-medium 47 pF X SSM-10pF Strong-sharp-minus 10pF X SSM-15pF Strong-sharp-minus 15 pF X SSM-22pF Strong-sharp-minus 22 pF X SSM-33pF Strong-sharp-minus 33 pF X SSM-47pF Strong-sharp-minus 47 pF X SSH-10pF Strong-sharp 10pF X SSH-15pF Strong-sharp 15 pF X SSH-22pF Strong-sharp 22 pF X SSH-33pF Strong-sharp 33 pF X SSH-47pF Strong-sharp 47 pF X SSH-100pF Strong-sharp 100 pF X

Table 5: Abbreviations used in the timing result diagrams




Sections 5.2 to 5.4 list the measured 10% / 90% rise and fall times of all driver, load and ambient temperature conditions, while the I/O supply is kept at nominal value VDDP=3.30V. The last row in every table (section 5.2) lists the slowest measured rise/fall times under worst case conditions (VDDP = 3.30V-5% = 3.13V; TA=140°C). The related waveforms are presented in Annex A.

Sections 5.5 to 5.8 show the measured rise/fall times for different combinations of ambient temperature and capacitive load.

5.2 Measured rise/fall times for Class A1 drivers A1 WEAK CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF

TA (°C) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns)-40 30,93 38,55 39,85 46,46 41,53 48,01 51,34 55,26 67,00 66,70

0 34,41 42,60 44,46 51,10 45,94 52,67 56,36 60,70 73,23 72,86+25 36,96 45,07 47,38 54,03 48,60 55,76 59,37 64,06 76,02 76,59+40 38,21 47,44 49,25 56,27 50,47 57,84 61,30 66,55 78,74 79,08+80 42,00 52,15 53,62 62,25 55,52 63,72 68,19 73,41 84,99 86,71

+125 46,82 55,23 59,41 67,77 61,54 70,31 75,29 79,50 94,29 95,64+140 48,43 56,26 61,34 69,61 63,55 72,51 77,66 81,53 97,39 98,62

WORST CASE 49,63 62,09 62,09 71,87 64,26 73,99 79,27 86,19 99,90 100,95SPEC 150

A1 WEAK CL=150pF CL=1500pF CL=20000pF

TA (°C) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns)-40 156 129 1290 845 17800 11310

0 170 138 1390 911 18990 12030+25 176 143 1420 939 19120 12380+40 182 149 1460 962 19760 12840+80 195 161 1560 1030 20990 13680

+125 207 174 1670 1110 22260 14890+140 211 178 1707 1137 22680 15290

WORST CASE 221 185 1763 1170 23310 15487SPEC 550 65000

A1 MEDIUM CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 11,21 12,81 14,51 15,42 14,83 16,01 18,11 18,43 23,41 21,91+25 12,01 13,57 15,31 16,12 15,53 16,50 19,05 19,54 24,33 22,75+40 12,49 14,30 15,87 16,87 16,32 17,25 19,47 19,91 25,05 23,68+80 13,89 15,68 17,69 18,48 17,81 18,97 21,27 21,78 27,12 25,83

+125 15,29 17,29 19,53 20,41 19,37 20,79 23,58 24,12 29,44 28,26+140 15,76 17,83 20,14 21,05 19,89 21,40 24,35 24,90 30,21 29,07

WORST CASE 16,72 18,57 20,51 21,64 20,64 22,11 25,67 25,96 31,02 29,98SPEC 50

Table 6: Pad driver class A1 – measured rise and fall times (first part)




A1 MEDIUM CL=150pF CL=1500pF CL=20000pF

TA (°C) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns)-40 46,9 37,5 408 256 5190 3280

0 49,9 40,6 438 272 5520 3540+25 51,7 42,0 458 283 5700 3670+40 53,2 43,6 465 291 5810 3770+80 57,7 47,2 492 311 6180 4070

+125 61,5 50,4 513 329 6510 4310+140 62,8 51,5 520 335 6620 4390

WORST CASE 65,9 54,5 530 350 6760 4547SPEC 140 18000

Table 6: Pad driver class A1 – measured rise and fall times (second part)

5.3 Measured rise/fall times for Class A1+ drivers

A1+ WEAK CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF TA (°C) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) tF (ns)

-40 32,89 39,05 39,78 44,15 42,61 47,68 52,51 54,41 67,17 64,990 35,64 43,06 43,68 49,10 47,63 52,56 57,76 60,53 73,73 71,74

+25 39,26 45,62 46,57 51,98 50,53 55,60 60,61 64,07 78,04 75,67+40 39,97 47,50 47,71 53,87 53,55 58,80 62,63 66,16 80,64 78,87+80 44,27 53,08 54,18 60,03 59,21 64,71 69,46 72,63 85,87 84,03

+125 46,89 55,95 59,16 66,51 66,80 72,78 75,43 79,07 97,12 95,39+140 47,76 56,91 60,82 68,67 69,33 75,47 77,42 81,22 100,87 99,18

WORST CASE 52,40 61,14 61,79 69,85 72,10 77,12 79,34 84,04 101,78 101,24SPEC 150

A1+ WEAK CL=150pF CL=1500pF CL=20000pF


0 175 141 1500 952 18260 11920+25 181 147 1530 987 18810 12320+40 190 152 1570 1010 19410 12650+80 200 165 1690 1080 20380 13690

+125 214 176 1780 1170 21370 14670+140 219 180 1810 1200 21700 15000

WORST CASE 231 191 1863 1227 22903 15370SPEC 550 65000

Table 7: Pad driver class A1+ – measured rise and fall times (first part)




A1+ MEDIUM CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 11,83 13,05 14,31 14,97 15,11 16,19 18,16 18,36 23,23 21,96+25 12,84 14,14 15,13 15,76 15,97 16,91 19,04 19,29 24,55 23,10+40 13,09 14,53 15,85 16,50 17,00 17,84 19,73 20,18 25,26 23,91+80 14,88 16,11 17,62 18,15 18,97 19,62 21,80 22,07 27,33 26,20

+125 15,87 17,12 19,61 20,10 21,06 20,60 23,04 23,77 30,73 29,09+140 16,20 17,46 20,27 20,75 21,76 20,93 23,45 24,34 31,86 30,05

WORST CASE 17,20 18,93 20,89 21,01 21,29 21,89 24,46 25,37 32,66 30,68SPEC 50

A1+ MEDIUM CL=150pF CL=1500pF CL=20000pF


0 52,6 41,3 457 283 5720 3580+25 52,8 43,4 468 294 5740 3720+40 55,3 44,5 476 301 5860 3830+80 58,9 48,5 509 323 6340 4110

+125 63,6 52,2 528 343 6670 4480+140 65,2 53,5 534 350 6780 4600

WORST CASE 67,6 54,6 572 365 6997 4613SPEC 140 18000

A1+ STRONG-SLOW CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF

-40 7,66 8,70 9,22 9,83 9,79 10,50 11,55 11,96 15,13 14,060 8,34 9,43 10,13 10,77 10,70 11,44 12,64 13,13 16,45 15,60

+25 8,86 10,01 10,44 11,17 11,13 12,00 13,08 13,75 17,34 16,51+40 9,19 10,26 11,03 11,79 12,08 12,79 13,95 14,34 17,89 17,16+80 10,19 11,49 12,18 12,95 13,02 14,12 15,27 15,60 18,94 18,64

+125 11,43 12,33 13,48 14,31 14,92 15,59 16,83 17,21 21,01 20,64+140 11,84 12,61 13,91 14,76 15,55 16,08 17,35 17,75 21,70 21,31

WORST CASE 12,00 13,42 14,84 14,93 15,81 16,92 17,66 17,97 22,07 21,81SPEC 28

A1+ STRONG- SOFT CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF

-40 4,02 3,09 5,53 3,78 6,18 4,35 8,14 5,60 12,11 7,530 4,28 3,31 5,99 4,09 6,61 4,71 8,92 6,08 12,75 8,27

+25 4,44 3,44 6,05 4,26 6,74 4,87 9,09 6,25 13,24 8,66+40 4,71 3,65 6,53 4,40 7,26 5,13 9,30 6,37 13,42 8,93+80 4,99 4,00 6,83 4,83 7,67 5,58 10,05 7,10 14,21 9,85

+125 5,26 4,35 7,50 5,36 8,03 6,02 10,43 7,77 15,15 10,77+140 5,35 4,47 7,72 5,54 8,15 6,17 10,56 7,99 15,46 11,08

WORST CASE 5,80 4,62 7,81 5,62 8,74 6,36 10,95 8,37 15,60 11,05SPEC 16

Table 7: Pad driver class A1+ – measured rise and fall times (second part)




5.4 Measured rise/fall times for Class A2 drivers A2 WEAK CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 34,97 42,55 43,71 49,20 49,52 54,50 56,58 60,76 71,39 70,94+25 38,13 45,44 45,94 52,15 53,18 58,53 60,36 63,76 75,71 75,19+40 39,89 47,41 48,22 54,90 53,91 59,50 63,27 66,31 78,01 77,96+80 44,25 52,84 53,95 60,06 59,49 65,60 69,60 74,06 84,86 86,14

+125 49,07 58,66 58,31 67,12 63,41 71,47 75,57 81,63 92,10 94,93+140 50,68 60,60 59,76 69,47 64,72 73,43 77,56 84,15 94,51 97,86

WORST CASE 51,57 61,75 60,62 70,45 69,66 77,57 79,12 84,82 97,67 101,02SPEC 150

A2 WEAK CL=150pF CL=1500pF CL=20000pF


0 162 135 1370 905 17290 11510+25 168 140 1400 942 17890 11830+40 171 145 1420 963 18150 12210+80 184 159 1530 1050 19360 13250

+125 200 175 1620 1110 20820 14140+140 205 180 1650 1130 21300 14440

WORST CASE 220 188 1713 1183 22290 14870SPEC 550 65000

A2 MEDIUM CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 11,54 13,03 13,80 14,93 15,46 16,25 17,02 17,74 21,54 21,03+25 12,52 13,67 14,82 15,75 16,65 17,53 18,33 18,78 22,84 22,08+40 13,02 14,43 15,53 16,23 16,75 17,52 18,89 19,53 23,29 22,68+80 14,86 16,10 17,09 17,92 18,80 19,59 21,24 21,60 25,71 25,02

+125 15,85 17,42 19,17 19,97 19,87 21,23 23,16 23,99 28,53 27,65+140 16,18 17,86 19,86 20,65 20,23 21,78 23,80 24,79 29,47 28,53

WORST CASE 17,05 18,65 20,55 21,61 22,09 23,23 24,49 25,11 30,05 29,37SPEC 50

Table 8: Pad driver class A2 – measured rise and fall times (first part)




A2 MEDIUM CL=150pF CL=1500pF CL=20000pF


0 45,6 37,6 369 237 5330 3020+25 46,5 39,0 380 243 5430 3110+40 48,1 40,5 388 253 5600 3210+80 52,1 43,7 407 273 5970 3480

+125 57,0 47,5 438 291 6210 3830+140 58,7 48,8 448 297 6290 3950

WORST CASE 60,3 51,2 466 310 6723 4047SPEC 140 18000

A2 STRONG-SOFT CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF

-40 4,55 6,10 5,08 6,78 5,35 7,11 5,69 7,33 6,60 8,070 4,98 6,52 5,55 7,43 5,96 7,93 6,41 7,94 7,39 8,77

+25 5,38 6,79 5,98 7,53 6,33 8,10 6,84 8,34 7,81 9,16+40 5,69 7,15 6,30 7,87 6,67 8,13 7,29 8,65 8,13 9,45+80 6,48 7,86 7,14 8,53 7,57 8,99 8,21 9,57 9,10 10,32

+125 7,18 8,54 7,80 9,29 8,23 9,68 9,08 10,48 9,82 11,18+140 7,41 8,77 8,02 9,54 8,45 9,91 9,37 10,78 10,06 11,47

WORST CASE 7,60 9,12 8,15 9,80 8,94 10,81 9,73 11,17 10,81 12,06SPEC 16

A2 STRONG-MEDIUM-MINUS CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF

TA (°C) tR (ns) tF (ns) tR (ns) tF (ns) tR (ns) TA (°C) tR (ns) tF (ns) tR (ns) tF (ns)-40 2,34 3,16 2,65 3,63 2,87 3,92 3,23 4,21 3,85 4,89

0 2,57 3,50 2,90 3,96 3,22 4,35 3,58 4,64 4,24 5,32+25 2,76 3,70 3,11 4,19 3,42 4,57 3,81 4,89 4,51 5,58+40 2,91 3,90 3,27 4,36 3,56 4,64 4,01 5,10 4,69 5,74+80 3,28 4,31 3,65 4,72 3,98 5,09 4,50 5,65 5,19 6,32

+125 3,45 4,58 3,82 5,07 4,32 5,53 4,95 6,17 5,69 6,80+140 3,51 4,67 3,88 5,19 4,43 5,68 5,10 6,34 5,86 6,96

WORST CASE 3,91 5,06 4,22 5,42 4,79 6,17 5,24 6,47 5,95 7,27SPEC 10 tbd

A2 STRONG-MEDIUM CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 1,55 1,99 1,78 2,29 1,97 2,57 2,29 2,88 2,81 3,39+25 1,63 2,10 1,86 2,40 2,07 2,69 2,39 3,02 2,92 3,54+40 1,70 2,20 1,94 2,52 2,17 2,80 2,53 3,16 3,02 3,64+80 1,88 2,42 2,11 2,74 2,37 3,06 2,79 3,43 3,29 3,92

+125 2,07 2,69 2,37 3,05 2,56 3,32 3,04 3,79 3,53 4,18+140 2,13 2,78 2,46 3,15 2,62 3,41 3,12 3,91 3,61 4,27

WORST CASE 2,17 2,86 2,49 3,19 2,88 3,64 3,24 3,95 3,84 4,56SPEC 7




Table 8: Pad driver class A2 – measured rise and fall times (second part) A2 STRONG-SHARP- MINUS CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 1,01 1,48 1,24 1,73 1,46 1,94 1,75 2,18 2,24 2,62+25 1,07 1,55 1,31 1,81 1,52 2,02 1,81 2,25 2,31 2,71+40 1,15 1,63 1,39 1,88 1,62 2,15 1,94 2,38 2,43 2,80+80 1,29 1,78 1,51 2,01 1,78 2,24 2,14 2,60 2,63 3,07

+125 1,39 1,85 1,70 2,22 1,95 2,45 2,28 2,84 2,94 3,37+140 1,42 1,87 1,76 2,29 2,01 2,52 2,33 2,92 3,04 3,47

WORST CASE 1,52 2,07 1,78 2,33 2,13 2,66 2,44 2,96 3,13 3,59SPEC 5 tbd

A2 STRONG-SHARP CL=10pF CL=15pF CL=22pF CL=33pF CL=47pF


0 0,63 0,66 0,85 0,84 1,04 1,03 1,34 1,23 1,82 1,59+25 0,64 0,69 0,86 0,87 1,05 1,05 1,35 1,27 1,83 1,60+40 0,68 0,72 0,89 0,84 1,10 1,08 1,40 1,30 1,89 1,66+80 0,73 0,77 0,91 0,94 1,15 1,13 1,50 1,44 2,01 1,78

+125 0,79 0,85 0,96 1,01 1,20 1,22 1,61 1,56 2,18 1,95+140 0,81 0,87 0,97 1,03 1,22 1,25 1,65 1,60 2,24 2,01

WORST CASE 0,83 0,91 1,01 1,07 1,31 1,33 1,67 1,62 2,38 2,11SPEC 2.5 tbd 3.7

A2 STRONG-SHARP CL=100pF

TA (°C) tR (ns) tF (ns) -40 3,20 2,51

0 3,41 2,69 +25 3,47 2,81 +40 3,57 2,86 +80 3,89 3,30

+125 4,23 3,92 +140 4,34 4,13

WORST CASE 4,58 4,39 SPEC 7.5

Table 8: Pad driver class A2 – measured rise and fall times (third part)



5.5 Rise/fall time diagrams for Class A1 drivers

Weak Driver Rise/Fall Times over Temperature

3.3V Pad Supply; Pad Class A1

30,00

40,00

50,00

60,00

70,00

80,00

90,00

100,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140

Ambient Temperature [°C]

Rise

/Fal

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WEA 10 pF Rise TimeWEA 10 pF Fall TimeWEA 15 pF Rise TimeWEA 15 pF Fall TimeWEA 22 pF Rise TimeWEA 22 pF Fall TimeWEA 33 pF Rise TimeWEA 33 pF Fall TimeWEA 47 pF Rise TimeWEA 47 pF Fall Time

Figure 15: Rise/fall times for Class A1 weak driver setting at VDDP=3.30V

Medium Driver Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A1

10,00

12,00

14,00

16,00

18,00

20,00

22,00

24,00

26,00

28,00

30,00

32,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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MED 10 pF Rise TimeMED 10 pF Fall TimeMED 15 pF Rise TimeMED 15 pF Fall TimeMED 22 pF Rise TimeMED 22 pF Fall TimeMED 33 pF Rise TimeMED 33 pF Fall TimeMED 47 pF Rise TimeMED 47 pF Fall Time

Figure 16: Rise/fall times for Class A1 medium driver setting at VDDP=3.30V



Timing and Electromagnetic Emission 5.6 Rise/fall time diagrams for Class A1+ drivers


3.3V Pad Supply; Pad Class A1+

30,00

40,00

50,00

60,00

70,00

80,00

90,00

100,00

110,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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Figure 17: Rise/fall times for Class A1+ weak driver setting at VDDP=3.30V

Medium Driver Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A1+

10,00

12,00

14,00

16,00

18,00

20,00

22,00

24,00

26,00

28,00

30,00

32,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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l Tim

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Figure 18: Rise/fall times for Class A1+ medium driver setting at VDDP=3.30V




Strong Driver Slow-Edge Rise/Fall Times over Temperaure

3.3V Pad Supply; Pad Class A1+

7,00

8,00

9,00

10,00

11,00

12,00

13,00

14,00

15,00

16,00

17,00

18,00

19,00

20,00

21,00

22,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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SSL 10 pF Rise TimeSSL 10 pF Fall TimeSSL 15 pF Rise TimeSSL 15 pF Fall TimeSSL 22 pF Rise TimeSSL 22 pF Fall TimeSSL 33 pF Rise TimeSSL 33 pF Fall TimeSSL 47 pF Rise TimeSSL 47 pF Fall Time

Figure 19: Rise/fall times for Class A1+ strong-slow driver setting at VDDP=3.30V

Strong Driver Soft-Edge Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A1+

2,00

3,00

4,00

5,00

6,00

7,00

8,00

9,00

10,00

11,00

12,00

13,00

14,00

15,00

16,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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SSO 10 pF Rise TimeSSO 10 pF Fall TimeSSO 15 pF Rise TimeSSO 15 pF Fall TimeSSO 22 pF Rise TimeSSO 22 pF Fall TimeSSO 33 pF Rise TimeSSO 33 pF Fall TimeSSO 47 pF Rise TimeSSO 47 pF Fall Time

Figure 20: Rise/fall times for Class A1+ strong-soft driver setting at VDDP=3.30V



Timing and Electromagnetic Emission 5.7 Rise/fall time diagrams for Class A2 drivers



30,00

40,00

50,00

60,00

70,00

80,00

90,00

100,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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l Tim

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Figure 21: Rise/fall times for Class A2 weak driver setting at VDDP=3.30V

Medium Driver Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A2

10,00

12,00

14,00

16,00

18,00

20,00

22,00

24,00

26,00

28,00

30,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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Figure 22: Rise/fall times for Class A2 medium driver setting at VDDP=3.30V




Strong Driver Soft-Edge Rise/Fall Times over Temperaure


4,00

5,00

6,00

7,00

8,00

9,00

10,00

11,00

12,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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SSO 10 pF Rise TimeSSO 10 pF Fall TimeSSO 15 pF Rise TimeSSO 15 pF Fall TimeSSO 22 pF Rise TimeSSO 22 pF Fall TimeSSO 33 pF Rise TimeSSO 33 pF Fall TimeSSO 47 pF Rise TimeSSO 47 pF Fall Time

Figure 23: Rise/fall times for Class A2 strong-soft driver setting at VDDP=3.30V

Strong Driver Medium-Minus-Edge Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A2

2,00

2,50

3,00

3,50

4,00

4,50

5,00

5,50

6,00

6,50

7,00

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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SMM 10 pF Rise TimeSMM 10 pF Fall TimeSMM 15 pF Rise TimeSMM 15 pF Fall TimeSMM 22 pF Rise TimeSMM 22 pF Fall TimeSMM 33 pF Rise TimeSMM 33 pF Fall TimeSMM 47 pF Rise TimeSMM 47 pF Fall Time

Figure 24: Rise/fall times for Class A2 strong-medium-minus driver setting at VDDP=3.30V




Strong Driver Medium-Edge Rise/Fall Times over Temperature


1,00

1,50

2,00

2,50

3,00

3,50

4,00

4,50

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

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SME 10 pF Rise TimeSME 10 pF Fall TimeSME 15 pF Rise TimeSME 15 pF Fall TimeSME 22 pF Rise TimeSME 22 pF Fall TimeSME 33 pF Rise TimeSME 33 pF Fall TimeSME 47 pF Rise TimeSME 47 pF Fall Time

Figure 25: Rise/fall times for Class A2 strong-medium driver setting at VDDP=3.30V

Strong Driver Sharp-Minus-Edge Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A2

0,50

1,00

1,50

2,00

2,50

3,00

3,50

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


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e [n

s]

SSM 10 pF Rise TimeSSM 10 pF Fall TimeSSM 15 pF Rise TimeSSM 15 pF Fall TimeSSM 22 pF Rise TimeSSM 22 pF Fall TimeSSM 33 pF Rise TimeSSM 33 pF Fall TimeSSM 47 pF Rise TimeSSM 47 pF Fall Time

Figure 26: Rise/fall times for Class A2 strong-sharp-minus driver setting at VDDP=3.30V




Strong Driver Sharp-Edge Rise/Fall Times over Temperature3.3V Pad Supply; Pad Class A2

0,50

1,00

1,50

2,00

2,50

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s]

SSH 10 pF Rise TimeSSH 10 pF Fall TimeSSH 15 pF Rise TimeSSH 15 pF Fall TimeSSH 22 pF Rise TimeSSH 22 pF Fall TimeSSH 33 pF Rise TimeSSH 33 pF Fall TimeSSH 47 pF Rise TimeSSM 47 pF Fall Time

Figure 27: Rise/fall times for Class A2 strong-sharp driver setting at VDDP=3.30V



Timing and Electromagnetic Emission 5.8 Rise/fall time diagrams for increased capacitive loads

Weak Driver 150pF Rise/Fall Times over Temperature

3.3V Pad Supply; Pad Classes A1, A1+, A2

100

120

140

160

180

200

220

240

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 WEA 150pF Rise TimeA2 WEA 150pF Fall TimeA1+ WEA 150pF Rise TimeA1+ WEA 150pF Fall TimeA1 WEA 150pF Rise TimeA1 WEA 150pF Fall Time

Figure 28: Rise/fall times for weak driver setting at VDDP=3.30V and 150pF load

Medium Driver 150pF Rise/Fall Times over Temperature3.3V Pad Supply; Pad Classes A1, A1+, A2

30,0

35,0

40,0

45,0

50,0

55,0

60,0

65,0

70,0

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 MED 150pF Rise TimeA2 MED 150pF Fall TimeA1+ MED 150pF Rise TimeA1+ MED 150pF Fall TimeA1 MED 150pF Rise TimeA1 MED 150pF Fall Time

Figure 29: Rise/fall times for medium driver setting at VDDP=3.30V and 150pF load




Weak Driver 1500pF Rise/Fall Times over Temperature


800

900

1000

1100

1200

1300

1400

1500

1600

1700

1800

1900

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 WEA 1500pF Rise TimeA2 WEA 1500pF Fall TimeA1+ WEA 1500pF Rise TimeA1+ WEA 1500pF Fall TimeA1 WEA 1500pF Rise TimeA1 WEA 1500pF Fall Time

Figure 30: Rise/fall times for weak driver setting at VDDP=3.30V and 1.5nF load

Medium Driver 1500pF Rise/Fall Times over Temperature3.3V Pad Supply; Pad Classes A1, A1+, A2

200

250

300

350

400

450

500

550

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 MED 1500pF Rise TimeA2 MED 1500pF Fall TimeA1+ MED 1500pF Rise TimeA1+ MED 1500pF Fall TimeA1 MED 1500pF Rise TimeA1 MED 1500pF Fall Time

Figure 31: Rise/fall times for weak driver setting at VDDP=3.30V and 1.5nF load




Weak Driver 20nF Rise/Fall Times over Temperature


10000

12000

14000

16000

18000

20000

22000

24000

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 WEA 20nF Rise TimeA2 WEA 20nF Fall TimeA1+ WEA 20nF Rise TimeA1+ WEA 20nF Fall TimeA1 WEA 20nF Rise TimeA1 WEA 20nF Fall Time

Figure 32: Rise/fall times for weak driver setting at VDDP=3.30V and 20nF load

Medium Driver 20nF Rise/Fall Times over Temperature3.3V Pad Supply; Pad Classes A1, A1+, A2

2000

3000

4000

5000

6000

7000

8000

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s] A2 MED 20nF Rise TimeA2 MED 20nF Fal lTimeA1+ MED 20nF Rise TimeA1+ MED 20nF Fall TimeA1 MED 20nF Rise TimeA1 MED 20nF Fall Time

Figure 33: Rise/fall times for weak driver setting at VDDP=3.30V and 20nF load




Strong Driver Sharp-Edge 100pF Rise/Fall Times over Temperature;3.3V PadSupply; PadClass A2

2,50

3,00

3,50

4,00

4,50

-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140


Rise

/Fal

l Tim

e [n

s]

SSH 100 pF Rise TimeSSH 100 pF Fall Time

Figure 34: Rise/fall times for Class A2 strong-sharp driver setting at VDDP=3.30V and 100pF load



Timing and Electromagnetic Emission 6 Measured electromagnetic emission

6.1 Microcontroller operation mode In addition to signal integrity, the scaling of pad drivers helps to reduce electromagnetic emission (EME) caused by switching output pins. This is because slower signal edges produce less high frequency contents in the emission spectra.

The following rule should be obeyed when selecting pad driver strength:

Use the weakest/slowest driver setting which provides the required signal timing at worst-case operating conditions.

Worst-case operating conditions wrt. timing are:

- maximal ambient temperature (+140°C)

- minimal pad supply voltage (3.30V -5% = 3.13V)

- realistic capacitive output load (consider trace length and structure (i.e. PCB layer stack, microstrip or stripline, receiver input loads)

- weak driver settings

Worst-case operating conditions wrt. electromagnetic emission are:

- minimal ambient temperature (-40°C)

- maximal pad supply voltage (3.30V +5% = 3.47V)

- strong driver settings

To illustrate the benefits of driver scaling for low EME, some sample measurement results are provided.

The measurements have been performed under the following operating conditions:

All function units of the TC1782 were active according Table 9.

The pad drivers were active according Table 10. Please note that only special function drivers have been activated; general purpose I/Os (GPIO) stayed inactive.

The pad driver settings have been varied according Table 11.

All I/Os not listed in Table 11 were inactive.

Conducted emission is measured at pad supply (VDDP) according to chapter 5.2.1.

Radiated emission is measured in mini-TEM cell according to chapter 5.2.2.



Timing and Electromagnetic Emission Function unit Operating mode Settings PLL • system clock generation • system clock = 180.0 MHz CPU • cyclicSPRAM copy (address 0xC0000000 first 8K

to last 8K and reverse) • module clock = 180.0 MHz

• cycle time = 1.1 µs PCP • 3 tasks executed in cyclic sequential order:

• task 1: PMEM read, increment, store (per pointer over data page, address 0xF0050400); pointer store DMI) • task 2: 32 * 32 multiplication • task 3: value DMI rotate

ASC0 • 8-bit data asynchronous operation • module clock = 80.0 MHz • one stop bit • baud rate = 19.231 kBaud • receiver disabled • deviation from 19.200 kBaud = 0.16 %

ASC1 • 8-bit data synchronous operation • module clock = 80.0 MHz • baud rate = 10.0 MBaud

MultiCAN • CAN0 controlled via Transmit Interrupt. • module clock = 40.0 MHz • CAN1 inactive, (ASC1 in use) • baud rate = 1.0 Mbaud • normal divider mode selected • sample point = 65 %

• 12 time quanta before sample point • 7 time quanta after sample point • (re)synchronization jump width = 2 time quanta

MSC0 • single ended driver used • module clock = 20.0 MHz • LVDS differential Interface disabled • baud rate = 10.0 Mbaud

• data repetition mode (content register MSC0_DD = 0x0000A953)

MLI0 • normal divider mode is selected • module clock = 20.0 MHz • endless transmit • baud rate = 10.0 Mbaud

• module clock = 20.0 MHz SSC0+SSC1 • normal divider mode is selected • baud rate = 2.0 Mbaud • configured as SSC master

• transfer data width is 16 bit • transfer/receive MSB first • shift transmit data on the leading clock edge, latch on trailing edge • idle clock line is low, leading clock edge is low-to-high transition • slave output select leading delay: 1 SCLK periods • slave output select trailing delay: 0 SCLK periods • slave output select inactive delay: 1 SCLK periods • data transmit via receive Interrupt.



Timing and Electromagnetic Emission GPTA0 • normal divider mode selected • module clock = 20.0 MHz

• GPTA running at 20 MHz, 32 GTC cells compare a specific GT0 value and toggle their outputs

• GTO clock = 2.5 MHz • GT1 clock = max. 3 MHz

• Out of 64 LTCs 16 are used as timer with 20 MHz, the other 48 cells use compare. • LTCA2 is only working when GPTA0 is active

SCU • SYSCLK (normal mode) • Pin 4.3 (SYSCLK) toggles at 7.5 MHz FADC • fractional divider mode is selected • module clock = 32.031 MHz

• channel0 to channel3 convert continuously via neighbour trigger

• deviation from 32.000 MHz = 0.10%

ADC0/1 • 16 channels per autoscan • digital clock = 80 MHz • 10Bit resolution • analog clock = 10 MHz

Table 9: Operating modes and settings of TC1782 function units

Active pads Pad function Pad class Driver config. reg.

P0.10 E-ray A data out A2 P0_PDR.PD1

P0.11 E-ray B data out A2 P0_PDR.PD1

P0.12 E-ray A enable out A2 P0_PDR.PD1

P0.13 E-ray B enable out A2 P0_PDR.PD1

P0.14 MSC CLK out A1+ P0_PDR.PD1

P0.15 MSC data out A1+ P0_PDR.PD1

P1.8 SSC1 A1+ P1_PDR.PDSSC1B




P2.1 MLI A2 P2_PDR.PDMSC0

P2.2 MLI A2 P2_PDR.PDMLI0


P2.4 MLI A2 P2_PDR.PD0


P2.6 LED driver A2 P2_PDR.PD0

P2.7 MLI A2 P2_PDR.PD0

P2.8 SSC_SLSO A2 P2_PDR.PDMSC0

P2.9 SSC_SLSO A2 P2_PDR.PDMSC0

P2.10 SSC1_Input A1+ P2_PDR.PDSSC1

P2.11 MSC0 A1+ P2_PDR.PDSSC1

P2.12 MSC0 A1+ P2_PDR.PDSSC1

P2.13 MSC0_Input A1 P2_PDR.PD1

P3.0 RX0DA (A1+) pull-down P3_PDR.PDASC0

P3.1 TX0DA A1+ P3_PDR.PDASC0



Timing and Electromagnetic Emission P3.2 SSC0 A1+ P3_PDR.PDASC0

P3.3 SSC0 (A1+) pull-down P3_PDR.PDASC0

P3.4 SSC0 A1+ P3_PDR.PDASC0

P3.5 SSC0_SLSO A1+ P3_PDR.PDASC0

P3.6 SSC0_SLSO A1+ P3_PDR.PDASC0

P3.7 SSC0_SLSO A2 P3_PDR.PDASC0

P3.8 RX1DA A2 P3_PDR.PD1

P3.9 TX1DA A1 P3_PDR.PD1

P3.12 RXDCAN0 (A1) pull-down P3_PDR.PD1

P3.13 TXDCAN0 A2 P3_PDR.PD1

P3.14 RXDCAN1 (A1) pull-down P3_PDR.PD1

P3.15 TXDCAN1 A2 P3_PDR.PD1

P4.3 SYSCLK A2 P4_PDR.PDEXTCLK0

P5.8 MLI0_Input A2 P5_PDR.PD2


P5.10 MLI0 A2 P5_PDR.PDMLI0


P5.12 MLI0 A1+ P5_PDR.PDMLI0


P5.14 MLI0_Input A1+ P5_PDR.PD2


P6.0 MSC0 A1 P6_PDR.PD0




Table 10: Active pad drivers

Configuration name Class A2 setting Class A1+ setting Class A1 setting

SSH strong-sharp strong-soft medium

SSM strong-sharp-minus strong-soft medium

SME strong-medium strong-soft medium

SMM strong-medium-minus strong-soft medium

SSO strong-soft strong-soft medium

SSL strong-slow1) strong-slow1) strong-slow1)

MED medium medium medium

WEA weak weak weak

Table 11: Configurations of pad scaling



Timing and Electromagnetic Emission 6.2 Description of test equipment

6.2.1 Conducted emission test configuration Conducted emission is measured using the standardized 150Ω network, see Figure 30. This network is used for both port and power supply emission measurements. The frequency range is from 150kHz to 1000MHz.

For reference purpose, only the emission measured on the supply domain VDDP is documented. Since all digital port pin drivers are supplied by VDDP, the electromagnetic emission on this net is influenced significantly by the driver setting variation. Nevertheless, emission variations can be observed on other power supply domains and on passive (i.e. non-switching) pad pins as well due to RF coupling in the microcontroller and on the test board. However, VDDP shows the strongest link between driver down-scaling and emission reduction.

150Ω networks are provided for conducted emission measurements according IEC 61967 part 4 and BISS emission test specification.

Figure 35: Conducted emission probing points

6.2.2 Radiated emission test configuration Radiated emission is measured using the standard Mini TEM Cell according IEC 61967 part 2 and BISS emission test specification, see Figure 31. The frequency range is from 150kHz to 1000MHz.

Figure 36: Radiated emission test setup




6.2.3 Measurement settings Spectrum analyzer: Rohde & Schwarz FSP7

Frequency range: 150kHz to 1GHz

Bandwidth RBW: 10kHz Detector type: Peak detector

Dwell time: 10ms

Pre-Amplifier: internal

Measurement time: For all measurements, the emission measurement time (dwell time 10ms) at one frequency is longer than the test software loop duration.

Data generation software: Rohde & Schwarz EMIPAK 9950

Environment: Temperature 23°C ±5°C

Supply: Nominal voltage ±5%




6.3 Emission test result discussion Note: To eliminate emission effects not caused by the microcontroller, the diagrams in Figures 32 to 43 cut the frequency above 800MHz because of GSM disturbance around 900MHz.

In this section electromagnetic emissions are compared for the different driver settings explained in chapter 6.1. The capacitive loads at all switching port pins have been 10pF (Figures 32, 33) and 47pF (Figures 34, 35), respectively. These emission results were obtained at nominal operating conditions, i.e. room temperature (+25°C), and 3.30V pad supply.

Result: Significant emission is caused by strong-sharp and strong-medium driver settings. Strong-soft setting causes visible emission only in the low frequency range below 100MHz. Medium and weak settings do not show any significant emission.

Table 12 lists average emission damping values caused by different driver settings (0 dB reference is strong-sharp setting):

Driver setting Emission damping (average approx. numbers)

Average toggling speed (1-10 MHz) High toggling speed (>20 MHz)

Strong-sharp 0 dB 0 dB

Strong-sharp-minus -4 dB -6 dB

Strong-medium -6 dB -10 dB

Strong-medium-minus -8 dB -15 dB

Strong-soft -10 dB -20 dB

Strong-slow -10 dB n/a

Medium < -10 dB (noise floor) n/a

Weak < -10 dB (noise floor) n/a

Table 12: Average emission damping from driver settings

Figures 36 and 37 indicate the span of electromagnetic emission with respect to extreme values of pad supply voltage (VDDP) and ambient temperature. Therefore, instead of really changing the ambient temperature, VDDP was selected in a way that the resulting switching waveform was similar to the switching waveform at the respective ambient temperature at nominal VDDP. For “SLOW” case VDDP went below 3.13V (VDDPnom -5%) to reflect the even slower transistors switching at +140°C ambient temperature. Vice versa, the “FAST” case was emulated by VDDP exceeding 3.47V, thus reflecting the faster transistor switching at -40°C ambient temperature.

Result: Voltage and temperature variation within the microcontroller specification leads to maximal ca. 3dB deviation above and below the emission at nominal conditions.

Figures 38 to 43 emphasize the benefit of the 5 available scaling steps in the Class A2 drivers. Therefore, the toggle rate of EXTCLK at port pin P4.3 was selectedto be 22.5MHz, providing a still good signal integrity for strong-soft driver setting, i.e. reaching the 10%/90% signal levels and staying at high/low level ca. 4 times longer than the rise/fall times.

Result: Up to 25dB emission reduction can be obtained if the strong-soft driver setting is used instead of the strong-sharp setting. All other strong driver settings range between these extremes.




Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net for all driver settings at 10pF load

VDDP = 3.30V / Ambient temperature = 25°C

5

10

15

20

25

30

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

strong sharp strong sharp-minus strong medium strong medium-minus strong soft strong slow medium weak

Figure 37: Conducted emission spectra for different driver settings at 10pF

Conducted electromagnetic emission zoom 160MHz - 200MHzon I/O supply net for all driver settings at 10pF load


5

10

15

20

25

30

160 165 170 175 180 185 190 195 200

Frequency/MHz

dBµV


Figure 38: Zoomed conducted noise transfer behaviour for different driver settings at 10pF




Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net for all driver settings at 47pF load


5

10

15

20

25

30

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV


Figure 39: Conducted emission spectra for different driver settings at 47pF

Conducted electromagnetic emission zoom 160MHz - 200MHzon I/O supply net for all driver settings at 47pF load


5

10

15

20

25

30

160 165 170 175 180 185 190 195 200

Frequency/MHz

dBµV


Figure 40: Zoomed conducted noise transfer behaviour for different driver settings at 47pF




Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net for strong sharp driver settings at 10pF loadslow (VDDP=3.13V/Ta=150°C) / nom (VDDP=3.30V/Ta=25°C) /

fast (VDDP=3.47V/Ta=-40°C)

5

10

15

20

25

30

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

SLOW 150°C - 3.13V NOM 25°C - 3.30V FAST -40°C - 3.47V

Figure 41: Conducted emission spectra for strong-sharp driver setting at 10pF and PVT variation

Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net for strong sharp driver settings at 47pF loadslow (VDDP=3.13V/Ta=150°C) / nom (VDDP=3.30V/Ta=25°C) /

fast (VDDP=3.47V/Ta=-40°C)

5

10

15

20

25

30

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

SLOW 150°C - 3,14V NOM 25°C - 3,3V FAST -40°C - 3,47V

Figure 42: Conducted emission spectra for strong-sharp driver setting at 47pF and PVT variation




Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net for all Class A2 strong driver settings at 47pF load


5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

strong sharp strong sharp-minus strong medium strong medium-minus strong soft

Figure 43: Conducted emission spectra for different Class A2 strong driver settings at 47pF

Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net VDDP for strong sharp driver setting at 47pF load

0

5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

Figure 44: Conducted emission spectrum for strong-sharp driver setting at 47pF




Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net VDDP for strong sharp-minus driver setting at 47pF load

0

5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

Figure 45: Conducted emission spectrum for strong-sharp-minus driver setting at 47pF

Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net VDDP for strong medium driver setting at 47pF load

0

5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

Figure 46: Conducted emission spectrum for strong-medium driver setting at 47pF




Conducted electromagnetic emission 150kHz - 800MHz onI/O supply net VDDP for strong medium-minus driver setting at 47pF load

0

5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

Figure 47: Conducted emission spectrum for strong-medium-minus driver setting at 47pF

Conducted electromagnetic emission 150kHz - 800MHzon I/O supply net VDDP for strong soft driver setting at 47pF load

0

5

10

15

20

25

30

35

40

0 100 200 300 400 500 600 700 800

Frequency/MHz

dBµV

Figure 48: Conducted emission spectrum for strong-soft driver setting at 47pF



Timing and Electromagnetic Emission Conclusion:

Generally all strong driver settings (strong-sharp, strong-sharp-minus, strong-medium, strong-medium-minus, strong-soft) lead to considerable emission. Consequently, all “low-speed” signals up to ca. 5MHz should be driven by medium or weak drivers. All “high-rate” signals above ca. 5MHz require strong driver settings in order to achieve good signal integrity. However, the recommended settings depend not only on the signal’s data rate, but significantly on the external capacitive load, the maximal ambient temperature and additional timing protocol constraints such as maximal slew rate.

Detailed selection diagrams for the recommended driver settings depending on given data rates are provided in Chapter 7.



Timing and Electromagnetic Emission 7 Recommended pad driver settings

7.1 Signal categories In the previous chapters, many detailed data was provided for the impact of driver settings and load capacitance on the resulting rise and fall times as well as on conducted and radiated emission.

Generally, the required signal integrity determines the selection of driver strength and slew rate for a given toggle rate and capacitive load. However, due to the simultaneous impact on electromagnetic emission, the weakest possible driver setting which still meets the signal integrity should be chosen.

To decide for the proper pad driver settings for a signal, its electrical characteristics should be considered. This leads to the definition of signal categories by means of clock or data transfer (AC view) or current driving capability (DC view). According to these views, any signal can be classified as shown in Table 13.

Signal category Clock rate Capacitive load DC driving capability System clock >20MHz 10 … 50 pF n/a High-speed data line 5 … 20 MHz 10 … 50 pF n/a Low-speed data line 0.5 … 5 MHz 10 … 50 pF n/a Low-speed control line <1 MHz <20 pF n/a High-current control line n/a n/a 10 … 30 mA Medium-current control line n/a n/a 1 … 10 mA Low-current control line n/a n/a <1 mA

Table 13: Signal categories The following settings for pad output drivers are available, see also Table 2:

• strong driver / sharp edge (Class A2 only)

• strong driver / sharp-minus edge (Class A2 only)

• strong driver / medium edge (Class A2 only)

• strong driver / medium-minus edge (Class A2 only)

• strong driver / soft edge (Classes A1+ and A2 only)

• strong driver / slow edge (Class A1+ only)

• medium driver / no edge configuration available

• weak driver / no edge configuration available




DC Current 1) Driver configuration

Edge configuration

Signal category Capacitive Load

STRONG SHARP System clock >40MHz Medium 2.5 / 10 mA STRONG MEDIUM System clock >20MHz Low 2.5 / 10 mA

High-speed data lines High STRONG SOFT High-speed data lines Low 2.5 / 10 mA

High-current control lines All MEDIUM none Low-speed data lines All 1.0 / 4.0 mA

Medium-current control lines All WEAK none Very low-speed control lines All 0.1 / 0.5 mA

Low-current control line All Table 14: Recommended output driver settings

Note 1) : Two values are given for the DC current of I/O pins in the format “nominal / max mA”. The “max mA” value can only be drawn from a pin if maximal 2 other pins in the same 16-bit port group are also driving this maximum current. This restriction is due to danger of electromigration damage.

The following parameters determine the final selection of driver settings:

• signal performance category (AC and DC)

• maximal temperature

• maximal acceptable electromagnetic emission

7.2 Decision tables and diagrams Following the recommendations given above, the driver setting selection should be based on (1) proper signal integrity and (2) minimal electromagnetic emission. Since electromagnetic emission increases with stronger driver settings, the weakest driver and slew rate settings should be selected that are able to provide the rise/fall times required for the desired signal integrity.

This chapter offers decision numbers in table and graphical format for proper driver settings at maximum clock or data rates expected to be driven. The rise/fall times occupy 1/6th of the clock period each, see Figure 44. If other rise/fall-to-period ratios are of interest, the given data rate values must be multiplied with “desired_ratio divided by 1/6”, see Table 15.

Ratio rise/fall time1) to period Multiply all given frequency values by:

1/20 0.3

1/10 0.6

1/8 0.75

1/6 1.0

1/4 1.5

Table 15: Correction factors for different edge-to-period ratios Note 1) : To calculate the ratio, please select the shorter one from rise and fall time.




Figure 49: Assumed rise/fall timing conditions related to signal period T

Please note that all values given in this chapter are proposals for system application designers using Infineon TC1782 microcontrollers in 90nm CMOS technology. They are based on timing measurements performed on center lot devices. Thus all values are subject to less than 10% offset depending according fabrication process variation. Additionally, pad supply voltages different from nominal conditions impact the resulting timing. The finally selected driver setting should consider these facts.

The decision tables provided in sections 6.2.1 (pad class A2), 6.2.2 (pad class A1+) and 6.2.3 (pad class A1) should be handled in the following way:

• I/O supply voltage has nominal value (VDDP=3.30V) except for WORST and BEST cases.

• Several ambient temperatures are distinguished by color: wide-spread industrial IC temperature specifications: 125°C, 110°C, 85°C, 70°C. 140°C / -40°C as maximal / minimal ambient temperatures for TC1782 during operation. 25°C as room temperature. WORST case: measured at -40°C with increased I/O supply voltage (VDDP=3.30V+5%=3.47V). BEST case: measured at 140°C with decreased I/O supply voltage (VDDP=3.30V-5%=3.13V).

• All values are given in [MHz]; they represent the maximal data rate possible under the named conditions in case the rise and fall time occupy 1/6 of the clock period.

• The strong-sharp driver is additionally characterized with 100pF load according specification.

• The weak driver is additionally characterized with 20nF load according specification.

The driver settings in the decision tables and in the decision diagrams are named as follows:

• SSH=strong-sharp SSM = strong-sharp-minus SME = strong-medium SMM = strong-medium-minus SSO = strong-soft SSL = strong-slow MED = medium WEA = weak



Timing and Electromagnetic Emission Figure 45 shows an example of a decision diagram. The title of each diagram indicates the conditions (Edge-to-period ratio, I/O voltage VDDP, ambient temperature) for the shown values:

Edge is alwaysr “T/6” (meaning the rise time and the fall time take each 1/6 of the data rate period).

Voltage indicates the I/O pad supply voltage VDDP and is nominal “3.30V”. “Best case” conditions are -40°C and VDDP=3.13V (VDDPnom-5%); “worst case” conditions are +140°C and VDDP=3.47V (VDDPnom+5%).

Temperature indicates the ambient temperature and is one of the following values: “-40°C”, “+25°C”, “+70°C”, “+85°C”, “+110°C”, “+125°C” or “+140°C”.

The maximal clock/data rate (“Frequency”) to meet good signal integrity is given in [MHz] for capacitive loads from 10pF to 47pF. After selecting the crossing point of the driver load and the desired data rate, the suggested driver can be read out of the diagram. Figure 45 gives four examples, marked with red circles A to D:

Circle A marks 2MHz data rate at 25pF load. Since the center of the circle stays below the green line, the weak driver is recommended.

Circle B marks 4MHz at 17pF and selects the medium driver since it stays below the blue line.

Circle C marks 8MHz at 30pF and suggests the strong-soft setting (below yellow line).

Circle D marks 33MHz at 20pF and recommends the strong-medium driver (below red line).

Like in Figure 45 (Ta=+140°C), it is always recommended to take the decision diagram for the highest ambient operating temperature of the microcontroller.

General rule: Select always the weakest possible driver which is able to toggle the maximal desired data rate at the given external load and temperature.

Please note that according Table 3, several driver settings are available in several pad classes. Since there are small deviations among same driver scaling in different pad classes, please refer always to the decision diagram of the correct pad class (A1, A1+, A2).

Figure 50: Driver decision diagram example





7.2.1 Decision table for pad class A2

140°C 10pF 15pF 22pF 33pF 47pF 100pF 150pF 1500pF 20nF SSH 189,97 160,79 133,84 100,99 74,30 57,38 SSM 88,91 72,46 65,90 56,88 47,85 SME 59,65 52,58 48,78 42,44 38,99 SMM 35,63 32,06 29,27 26,18 23,89 SSO 18,95 17,41 16,78 15,40 14,49 MED 9,31 8,03 7,63 6,69 5,63 2,83 0,371 0,02648 WEA 2,74 2,39 2,26 1,97 1,70 0,81 0,101 0,00780








Decision table for pad class A2 (continued):

25°C 10pF 15pF 22pF 33pF 47pF 100pF 150pF 1500pF 20nF

SSH 242,60 192,01 158,73 123,46 91,07 72,05 SSM 107,53 92,08 82,51 74,07 61,50 SME 79,37 69,44 61,96 55,19 47,08 SMM 45,05 39,78 36,47 34,08 29,87 SSO 24,55 22,13 20,58 19,98 18,20 MED 12,19 10,58 9,51 8,87 7,30 3,58 0,439 0,03069 WEA 3,67 3,20 2,85 2,61 2,20 0,99 0,119 0,00932

-40°C 10pF 15pF 22pF 33pF 47pF 100pF 150pF 1500pF 20nF SSH 268,82 199,60 163,40 132,28 97,47 78,13 SSM 123,46 104,82 93,63 84,18 68,87 SME 91,58 79,37 71,53 64,35 53,42 SMM 52,74 45,91 42,52 39,59 34,08 SSO 27,32 24,58 23,44 22,74 20,65 MED 14,42 12,48 11,22 10,47 8,54 4,11 0,489 0,03243 WEA 4,40 3,75 3,35 3,08 2,52 1,12 0,132 0,01006

WORST 10pF 15pF 22pF 33pF 47pF 100pF 150pF 1500pF 20nF

SSH 174,61 156,75 124,25 99,43 68,26 54,39 SSM 77,75 70,46 60,42 53,84 45,55 SME 56,52 51,19 44,29 41,27 36,05 SMM 31,92 30,51 26,34 24,86 22,79 SSO 17,74 16,83 S81 14,53 13,80 MED 8,83 7,92 7,02 6,43 5,53 2,76 0,357 0,02474 WEA 2,60 2,34 2,09 1,93 1,63 0,76 0,097 0,00746

BEST 10pF 15pF 22pF 33pF 47pF 100pF 150pF 1500pF 20nF SSH 269,69 214,50 170,07 133,33 99,21 79,11 SSM 130,21 113,38 96,34 86,81 71,84 SME 94,16 85,03 75,08 66,67 55,93 SMM 53,76 49,46 44,33 41,25 36,15 SSO 28,99 27,32 25,29 23,91 21,73 MED 14,56 13,25 11,81 ?T87 9,02 4,07 0,502 0,03388 WEA 4,53 4,04 3,55 3,17 2,66 1,15 0,137 0,01050




7.2.2 Decision table for pad class A1+

140°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF SSO 31,11 21,50 20,43 15,78 10,76 SSL 13,19 4,11 10,32 9,35 7,64 MED 9,53 7,99 7,72 6,83 5,20 2,55 0,312 0,0246 WEA 2,93 2,42 2,19 2,05 1,64 0,76 0,092 0,00767



85°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF SSO 33,02 24,12 21,46 I139 11,65 SSL 14,31 12,68 11,61 10,59 8,73 MED 10,21 9,06 8,37 7,45 6,04 2,80 0,325 0,0260 WEA 3,09 2,74 2,54 2,27 1,92 0,83 0,098 0,00812

70°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF SSH 33,90 24,68 22,04 16,92 11,90 SSM 14,94 13,19 12,11 10,92 8,93 SME 10,63 9,41 8,71 7,73 6,22 2,88 0,333 0,0268 SMM 3,23 2,86 2,64 2,35 1,97 0,84 0,101 0,00828


-40°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF SSO 41,46 30,14 26,97 20,48 13,76 SSL 19,16 16,95 15,87 13,94 12,04 MED 13,75 12,04 11,40 10,00 7,97 3,45 0,391 0,0310 WEA 4,27 3,78 3,50 3,06 2,48 1,02 0,118 0,00968


Timing and Electromagnetic Emission Decision table for pad class A1+ (continued):

10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF WORST

SSO 28,15 21,85 18,87 15,53 10,86 SSL 12,10 10,89 10,47 9,07 7,59 MED 8,61 7,68 7,96 6,56 5,37 2,46 0,291 0,0238 WEA 2,71 2,42 2,35 1,94 1,61 0,72 0,089 0,00726

10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF BEST SSO 42,74 30,25 27,69 20,94 14,15 SSL 19,82 17,49 16,58 14,28 11,14 MED 14,39 12,57 11,90 10,18 7,86 3,60 0,405 0,0319 WEA 4,41 3,88 3,64 3,15 2,49 1,04 0,123 0,01





7.2.3 Decision table for pad class A1

140°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF MED 8,92 7,88 7,76 6,66 5,50 2,65 0,320 0,02515 WEA 2,96 2,39 2,29 2,04 1,68 0,79 0,104 0,00734




70°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF SME 10,89 9,23 9,00 7,83 6,37 2,95 0,344 0,02740 SMM 3,28 2,75 2,68 2,33 1,97 0,87 0,114 0,00806


-40°C 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF MED 14,12 11,81 11,49 9,96 7,71 3,55 0,408 0,03211 WEA 4,32 3,59 3,47 3,02 2,49 1,07 0,129 0,00936

WORST 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF

MED 8,69 7,71 7,52 6,26 5,45 2,52 0,320 0,02464 WEA 2,57 2,27 2,20 1,91 1,66 0,75 0,094 0,00714

BEST 10pF 15pF 22pF 33pF 47pF 150pF 1500pF 20nF MED 21,87 18,36 17,56 15,19 11,66 5,50 0,385 0,04854 WEA 6,75 3,20 5,36 4,68 3,78 1,63 0,200 0,00966



7.2.4 Decision diagrams for pad class A2

Frequency Limits, Edge=T/6, VDDP=3.13V, Ta=+140°CPad Class A2

1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]

SSHSSMSMESMMSSOMEDWEA

Figure 51: Class A2 driver selection diagram for WORST case TA=140°C; VDDP=3.13V; edges=1/6 period


1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]


Figure 52: Class A2 driver selection diagram for TA=140°C; VDDP=3.30V; edges=1/6 period








1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]


Figure 53: Class A2 driver selection diagram for TA=125°C; VDDP=3.30V; edges=1/6 period Figure 53: Class A2 driver selection diagram for TA=125°C; VDDP=3.30V; edges=1/6 period


1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]



1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]


Figure 54 Class A2 driver selection diagram for TA=110°C; VDDP=3.30V; edges=1/6 period Figure 54 Class A2 driver selection diagram for TA=110°C; VDDP=3.30V; edges=1/6 period


1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]









1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]




1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]



1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz] SSH

SSMSMESMMSSOMEDWEA



1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz] SSH

SSMSMESMMSSOMEDWEA






1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]



Frequency Limits, Edge=T/6, VDDP=3.30V, Ta=-40°CPad Class A2

1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]


Figure 58: Class A2 driver selection diagram for TA=-40°C; VDDP=3.30V; edges=1/6 period







1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]


Figure 59: Class A2 driver selection diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period Figure 59: Class A2 driver selection diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period


1,00

10,00

100,00

1000,00

10 20 30 40 50 60 70 80 90 100

C load [pF]

Freq

uenc

y [M

Hz]





7.2.5 Decision diagrams for pad class A1+

Frequency Limits, Edge=T/6, VDDP=3.13V, Ta=+140°C

Pad Class A1+

1,00

10,00

100,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 60: Class A1+ driver selection diagram for WORST case TA=140°C; VDDP=3.13V; edges=1/6 period

Frequency Limits, Edge=T/6, VDDP=3.30V, Ta=+140°CPad Class A1+

1,00

10,00

100,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 61: Class A1+ driver selection diagram for TA=140°C; VDDP=3.30V; edges=1/6 period








0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 62: Class A1+ driver selection diagram for TA=125°C; VDDP=3.30V; edges=1/6 period Figure 62: Class A1+ driver selection diagram for TA=125°C; VDDP=3.30V; edges=1/6 period


0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA


0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 63 Class A1+ driver selection diagram for TA=110°C; VDDP=3.30V; edges=1/6 period Figure 63 Class A1+ driver selection diagram for TA=110°C; VDDP=3.30V; edges=1/6 period


0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA








0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA



0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA


0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA



0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA






0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 66: Class A1+ driver selection diagram for TA=25°C; VDDP=3.30V; edges=1/6 period

Frequency Limits, Edge=T/6, VDDP=3.30V, Ta=-40°CPad Class A1+

0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 67: Class A1+ driver selection diagram for TA=-40°C; VDDP=3.30V; edges=1/6 period







0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA

Figure 68: Class A1+ driver selection diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period Figure 68: Class A1+ driver selection diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period


0,00

5,00

10,00

15,00

20,00

25,00

30,00

35,00

40,00

45,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

SSOSSLMEDWEA




7.2.6 Decision diagrams for pad class A1

Frequency Limits, Edge=T/6, VDDP=3.13V, Ta=+140°C

Pad Class A1

0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA

Figure 69: Class A1 driver selection diagram for WORST case TA=140°C; VDDP=3.13V; edges=1/6 period


0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA









0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA



0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA


0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA



0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA






0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA



0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA

Figure 76: Class A1 driver selection diagram for TA=-40°C; VDDP=3.30V; edges=1/6 period




0,001,002,003,004,005,006,007,008,009,00

10,0011,0012,0013,0014,0015,00

10 15 20 25 30 35 40 45

C load [pF]

Freq

uenc

y [M

Hz]

MEDWEA

Figure 77: Class A1 driver selection diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period




7.2.7 Decision diagrams for weak driver at high capacitive load

Frequency Limits Weak Driver, Edge=T/6, VDDP=3.13V, Ta=+140°C

Pad Classes A1, A1+, A2

0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]

Class A1Class A1+Class A2

Figure 78: Weak driver load capability diagram for WORST case TA=140°C; VDDP=3.13V; edges=1/6 per.

Frequency Limits Weak Driver, Edge=T/6, VDDP=3.30V, Ta=+140°CPad Classes A1, A1+, A2

0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000C load [pF]

Freq

uenc

y [M

Hz]


Figure 79: Weak driver load capability diagram for TA=140°C; VDDP=3.30V; edges=1/6 period








0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 80: Weak driver load capability diagram for TA=125°C; VDDP=3.30V; edges=1/6 period Figure 80: Weak driver load capability diagram for TA=125°C; VDDP=3.30V; edges=1/6 period


0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]



0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]









0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]



0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]







0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 84: Weak driver load capability diagram for TA=25°C; VDDP=3.30V; edges=1/6 period

Frequency Limits Weak Driver, Edge=T/6, VDDP=3.30V, Ta=-40°CPad Classes A1, A1+, A2

0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 85: Weak driver load capability diagram for TA=-40°C; VDDP=3.30V; edges=1/6 period



Frequency Limits Weak Driver, Edge=T/6, VDDP=3.47V, Ta=-40°C


0,001

0,010

0,100

1,000

10,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 86: Weak driver load capability diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period




7.2.8 Decision diagrams for medium driver at high capacitive load

Frequency Limits Medium Driver, Edge=T/6, VDDP=3.13V, Ta=+140°C


0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 87: Medium driver load capability diagram WORST case TA=140°C; VDDP=3.13V; edges=1/6 per.

Frequency Limits Medium Driver, Edge=T/6, VDDP=3.30V, Ta=+140°CPad Classes A1, A1+, A2

0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000C load [pF]

Freq

uenc

y [M

Hz]


Figure 88: Medium driver load capability diagram for TA=140°C; VDDP=3.30V; edges=1/6 period








0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 89: Medium driver load capability diagram for TA=125°C; VDDP=3.30V; edges=1/6 period Figure 89: Medium driver load capability diagram for TA=125°C; VDDP=3.30V; edges=1/6 period


0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]



0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]









0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]



0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]




0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]







0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 93: Medium driver load capability diagram for TA=25°C; VDDP=3.30V; edges=1/6 period

Frequency Limits Medium Driver, Edge=T/6, VDDP=3.30V, Ta=-40°CPad Classes A1, A1+, A2

0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 94: Medium driver load capability diagram for TA=-40°C; VDDP=3.30V; edges=1/6 period



Frequency Limits Medium Driver, Edge=T/6, VDDP=3.47V, Ta=-40°CPad Classes A1, A1+, A2

0,010

0,100

1,000

10,000

100,000

10 100 1000 10000 100000

C load [pF]

Freq

uenc

y [M

Hz]


Figure 95: Medium driver load capability diagram for BEST case TA=-40°C; VDDP=3.47V; edges=1/6 period



Timing and Electromagnetic Emission 8 Pad Scaling Calculator (PASTOR)

8.1 Scope of the software

For the TC1782 microcontroller, a new software is provided to calculate optimal pad driver settings depending on electrical and environmental constraints. PASTOR displays rising and falling edge including over- and undershoot for driver settings under these system constraints.

What you can do with PASTOR:

- Configure the general settings of your application (capacitive load, pad supply voltage, ambient temperature)

- Choose a pad driver scaling and calculate how the driver behaves

- Choose a data signal performance (either by entering rise and fall time or by entering a data rate plus period-to-edge ratio)

- Calculate the weakest driver setting which fulfils your system requirements

- Display rising edge waveform including overshoot (all timings calculated as 10% to 90% level)

- Display falling edge waveform including undershoot (all timings calculated as 90% to 10% level)

- Save waveforms

8.2 How to use PASTOR

1) Start program

- Launch the Excel file "Pad Scaling Calculator TC1782" and enable Macros or make sure they are enabled.

2) Configure program

- Click the "START" button to enter conditional parameter values.

- Choose one of three input options by clicking on the small check box present in every option part in the left frame:

o Data Rate: enter your maximal expected toggle frequency (in MHz) and change the slope to period ratio with the spinbutton. In this case the rise and fall times are considered to be identical. For further information just click on the help button just beside. Take into consideration that the frequency specification limit is 180 MHz.

o Rise/Fall Times: enter the rise and the fall time (in nanoseconds). Accepted values are limited to a realistic range wrt. the frequency limit of 180 MHz.

o Pad Driver: in this field you can select your desired pad driver among the three existing class A1, A1+ and A2.

- Note: Only one of those could be selected in the same time, and only the last one ticked will be used during the execution.

- After option selection, you have to enter values for the load capacitor (in pF), the ambient temperature (in degrees Celsius), and the pad supply voltage (in Volts).

- The following restrictions apply:

o Valid ambient temperature range is between -40 and +140 degrees Celsius.

o Load capacitance must not exceed the specified maximal load depending on the pad driver setting (50, 100, 20000 pF).

o The pad supply voltage must stay within 3.3V ± 5%.

3) Calculte driver properties

- Click the "EXE" button to start the simulation.




- A new window will appear (if the parameters you entered fit to the specifications):

o It shows an estimated waveform of the rising edge for your driver.

o You may view the falling edge waveform by clicking on "VIEW FALL TIME".

o The values of Over and Undershoots are displayed too.

- The displayed waveform corresponds to the weakest recommended driver matching all previously entered conditions.

- In case you selected a driver before, the displayed waveforms shows this driver's behaviour under the previously entered conditions.

- All the parameters on the left frame are now filled with values, and you can change them easily to run a new execution.

- Note: the slope to period ratio item is always available for value change after the first run. Thus you can change it to see the effect on the resulting data rate

- Note: If a warning appears next to the data rate value, it means that you exceed the frequency limit. You can click on the warning icon to read the warning message.

4) Save waveforms:

- Every time you run an execution, rise and fall time waveforms are saved in a folder named "Graphics":

o This folder is automatically generated in the current directory.

o The filename of these pictures is built with the parameters you entered.

- By clicking the "Restart" button you will erase all these pictures and arrive on the first clean window.

- If you decide to leave the program you can click on one of the small crosses in the window's top right corner, or press "Exit" button which will quit Excel definitely. All waveforms are still available in the "Graphics" directory.

- Every new start of the program will delete all previously waveforms stored in the "Graphics" directory.

8.3 PASTOR screenshots

Figure 96 shows the start-up screen of the PASTOR calculator.

After clicking the “START” button, the PASTOR selection screen (Figure 97) appears; the user may now change the I/O supply voltage. Valid values for capacitive load and ambient temperature must be filled into the respective input fields.

Depending on the kind of investigation, the user has to select either “Data Rate” or “Rise/Fall Times” or “Pad Driver” by checking one of the related boxes, and provide parameter values afterwards.

Figure 98 shows an example for user selection “Data Rate”. The appropriate driver for a 10MHz data rate (slope-to-period ratio = 4, see Chapter 7.2), loaded with 25pF and operated at 3.3V (nominal) and 125°C ambient temperature will be calculated after clicking the “EXE” button. Result: The medium driver provides the required performance and lowest electromagnetic emission to fulfil 10MHz data rate under the specified conditions.

Figure 99 shows an example for user selection “Rise/Fall Times”. The appropriate driver for a clock/data signal of 2.5ns rise and fall time, loaded with 40pF and operated at 3.3V (nominal) and 85°C ambient temperature will be calculated after clicking the “EXE” button. Result: The strong-sharp driver provides the required performance to drive 40pF load at rising and falling edges (10/90%) of 2.5ns under the specified conditions. Please note that this driver provides an even faster rise/fall time of 1.67ns; however, the next weaker driver (strong-sharp-minus) does not fulfil the 2.5ns requirement.

By default, the rising edge including estimated overshoot is displayed. To show the falling edge including undershoot, click on “View Fall Time”; the result for the previous example is shown in Figure 100.

Figure 101 shows an example for user selection “Driver”. This is how the class A1+ strong-slow driver performs under the specified conditions: it can drive 20pF load with ca. 14ns rise/fall time – equivalent to 11.75MHz data rate with a slope-to-period ratio of 6. The slope-to-period ratio can be changed to calculate other data rates. A new ratio of 4 will allow a data rate up to 17.64MHz.







Figure 96: PASTOR start-up screen Figure 96: PASTOR start-up screen

Figure 97: PASTOR selection screen

Figure 97: PASTOR selection screen







Figure 98: Example for user selection “Data Rate” Figure 98: Example for user selection “Data Rate”

Figure 99: Example for user selection “Rise/Fall Times”, displaying the rising edge Figure 99: Example for user selection “Rise/Fall Times”, displaying the rising edge




Figure 100: Example for user selection “Rise/Fall Times”, displaying the falling edge

Figure 101: Example for user selection “Driver”




Annex A: Measured rise/fall waveforms Rise/fall timing diagrams are provided for selected Class A2 driver settings and capacitive loads, as listed in Table 16. These results have been summarized in Chapter 5. This Annex A shows selected measured timing diagrams for signal integrity reference puposes.

Driver strength Physical load capacitor VDDP supply voltages @ ambient temperature Strong-sharp 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp 100 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp-minus 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp-minus 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-sharp-minus 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium-minus 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium-minus 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-medium-minus 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-soft 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-soft 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-soft 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-slow 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-slow 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Strong-slow 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 150 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 1500 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Medium 20000 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 10pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 22 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 47 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 150 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 1500 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C Weak 20000 pF 3.47V@-40°C/3.30V@25°C/3.13V@125°C

Table 16: List of all timing measurement conditions provided in Annex A



Timing and Electromagnetic Emission Each of the Figures 83-107 contains 6 waveforms for a given driver strength, a given VDDP supply voltage (3.47V, 3.30V, 3.13V) and a given ambient temperature (-40°C, 25°C, 125°C). Depending on these settings, certain clock frequencies can be driven or not.

The 6 configurations shown in one figure are distributed as indicated in Figure 82.

Rising edge VDDP=3.47V

Ta=-40°C

Falling edge VDDP=3.47V

Ta=-40°C

Rising edge VDDP=3.30V

Ta=+25°C

Falling edge VDDP=3.30V

Ta=+25°C

Rising edge VDDP=3.13V Ta=+125°C

Falling edge VDDP=3.13V Ta=+125°C

Figure 96: General grouping of waveform configurations




Figure 97: Class A2 driver strong-sharp at 10pF load




Figure 101: Class A2 driver strong-sharp-minus at 10pF load




Figure 104: Class A2 driver strong-medium at 10pF load




Figure 107: Class A2 driver strong-medium-minus at 10pF load




Figure 110: Class A2 driver strong-soft at 10pF load




Figure 113: Class A2 driver medium at 10pF load




Figure 118: Class A2 driver medium at 20nF load




Figure 119: Class A2 driver weak at 10pF load




Figure 124: Class A2 driver weak at 20nF load




Figure 125: Class A1+ driver strong-soft at 10pF load




Figure 128: Class A1+ driver strong-slow at 10pF load




Figure 131: Class A1+ driver medium at 10pF load




Figure 136: Class A1+ driver medium at 20nF load




Figure 137: Class A1+ driver weak at 10pF load




Figure 142: Class A1+ driver weak at 20nF load




Figure 148: Class A1 driver medium at 20nF load




Figure 154: Class A1 driver weak at 20nF load





Annex B: Glossary Cload Load Capacitor Ideal capacitive load connected to an output driver

di/dt Dynamic current over time

EMC Electromagnetic Compatibility The ability of an electrical device to function satisfactorily in its electromagnetic environment (“Immunity”) without having an impermissible effect on its environment (“Emission”).

EME Electromagnetic Emission EMC

EXTCLK System Clock Output Strong output driver for the system clock

GND Ground Ground reference of the power supply

PI Power Integrity Good PI means a clean power supply system which is not polluted by switching noise

SI Signal Integrity Good SI means proper signal waveform to fulfill the required data communication

TA Ambient Temperature Temperature in the direct environment of the IC

tF Fall Time Time of the falling edge of a signal measured between 10% and 90% of the high level

tR Rise Time Time of the rising edge of a signal measured between 10% and 90% of the high level

VDD Power supply voltage in general

VDDI Core supply voltage = 1.20V nominal

VDDP Pad supply voltage = 3.30V nominal, +/- 5%

VSS GND

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