System & Application Software Performance Tuning For Devices Powered by the Intel ® Atom™...
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System & Application SoftwarePerformance Tuning For Devices Powered by the Intel® Atom™ Processor
Wise Chen, IntelSoftware and Services GroupDeveloper Products Division
SF 2009
2
Agenda
• Market Segment and Tools Overview• System Software Development• Application Performance Tuning• Q&A
RTOS
Windows*
Consumer electronic
MobileInternet Devices
Netbooks/Netto
ps
Embedded
Intel® Tools Cover All These Device Categories
Intel® Software Development Tools available
Linux* Moblin/Linux* Moblin/Linux* Moblin/Linux*
Intel® Software Development Products fully support Intel® Atom™ processors running Moblin,
Windows* and RTOS3
Intel® Media processor CE3100
Intel® Atom™ processor Zxx series
Intel® Atom™ processor Nxx series
Intel Atom™ processor Zxx series
Intel® Atom™ processor CE4100
Intel Atom™ processor Zxx seriesNew
Intel® Software Development Tools Coverage
Intel® C++ Compiler for Windows*Intel® Integrated Performance Primitives Library (IPP)Intel® VTune™ Performance AnalyzerIntel® Parallel StudioIntel® Threading Building Blocks
Intel® Embedded Software Development Tool SuiteIntel® Application Software Development Tool Suite
Intel® C++ Compiler Professional Edition for QNX* Neutrino* RTOSRTOS
Windows*
Moblin/Linux*
“Application Suite“• For ISVs and Moblin Community – tune Moblin applications for more
performance and extend battery life of Intel® Atom™ processor powered devices
“Embedded Suite“• For OEM/ODMs (+ their key ISVs) and OSVs – use a complete tools
solution with a sophisticated JTAG debug solution for embedded system and application software design
• http://software.intel.com/software/products/atomtools
4
Intel® Software Development ToolsFor Intel® Atom™ Processors
• Outstanding performance– Increased application software performance can help to extend battery life time
• Intel® architecture customization increases productivity & efficiency– Find and fix issues faster with full GUI driven system-level JTAG and application
debugging tools
• Technology alignment– Latest Intel® Atom™ Processor and chipset support– NDA Tools BETA programs for next generation silicon
• Excellent customer support
5
Moblin Software Development ToolsMoblin Open Source Linux* SW Platform for Mobile & Embedded Devices
including Mobile Internet Devices (MID´s), Netbooks,
Automotive In-Vehicle Infotainment Systems
Intel® Software Development Tool Suite
• Intel® C++ Compiler• Intel® Integrated Performance Primitives
Library• Intel® JTAG Debugger• Intel® Application Debugger • Intel® VTune™ Performance Analyzer
Intel® Embedded Software Development Tool Suite
Intel® Application Software Development Tool Suite
Intel® Tool Suites complement the open source Moblin SDK
The Moblin SDK• Development guides, tutorials, sample
code, API references• Compliance Tools• Project generator• GNU Tools• Moblin Image Creator 2• PowerTop
6
Intel® C++ Software Development Tools
*Other names and brands may be claimed as the property of others
Intel® Tools – a complete solution with more performance, and latest technology
alignment
7
8
Agenda
• Market Segment and Tools Overview• System Software Development• Application Performance Tuning• Q&A
Intel® Tools for System DevelopmentCross Development• Different host and target hardware• Cross compile on host• Download and debug with JTAG
Debugger
Intel® C++ Compiler• Build performance critical OS
components and drivers• Optimize for fast execution and
fast OS switch into low powermode
Intel® JTAG Debugger• Debug and identify issues in
bootloader• Debug and identify issues in OS kernel• Debug and identify issues in device drivers
9
Using Intel® C++ Compiler for OS Kernel Development
• Install Intel® C++ Compiler into build environment– Use protected OS image build environment like Moblin
Image Creator 2
• Modify component makefiles to use ICC instead of GCC for parts that– Are multimedia or data volume, or data stream driven– Have a lot of direct interaction with user interface– Note: OS kernels are highly optimized code. Recompile
using different compiler – “hard work with limited benefit”
• Improve overall OS responsiveness and end-user experience
Use Intel® C++ Compiler for spot optimizations in System Software, e.g. performance critical drivers, codecs, etc.
10
400/533 MHz FSB
Z510/Z530
SystemController Hub
US15W
FWH SIO
DDR2 400/533 (mem down)
SDVO
24bit LVDS
8* USB 2.0 Host Ports
1 IDE Channel
Intel® High Definition Audio
LPC
2 PCIe* x1 Lanes
GPIO
SMBus
SDIO/MMC
Intel® Atom™ ProcessorJTAG interface
Host
USB JTAG
Intel® JTAG Debugger - Target Connection• System Software Development == bare metal programming• JTAG based debugging is the only solution• JTAG connector on the target HW required – to access
• CPU registers• SoC components / peripheral registers
• An intelligent probe - e.g. Intel® XDP3 JTAG I/F probe connects host system with the target
11
RCP Eclipse GUI based JTAG Debugger
12
Intel® JTAG Debugger offers:• Full C++/C/ASM debugging• Full platform support with unique
hardware insight• On-Chip Trace Support• Linux* host support and Linux*
target OS awareness• Flash Memory support
Debug Linux* OS kernel
h• Ensure OS image is on the target• Connect JTAG Debugger to Intel® Atom™ Processor
$ ./xdb.sh
• Load OS image symbol information into debugger• Set HW breakpoint at label “start_kernel“
– some memory locations may not be mapped as valid yet or may be read-only:
XDB> set opt /hard=on
• Run target platform until basic platform initialization through firmware/BIOS is complete
– System stops at “start_kernel”• Step through kernel initialization and single step as you
please• Run to &mwait_idle to debug fully initialized OS
start_kernel
mwait_idle
Firmware/BIOS
Kernel
Boot se
quence
13
Intel® JTAG Debugger is recommended for OEM/OSVs who need to customize, debug and validate OS kernels.
Trace Support
• Hardware feature of Intel® Atom™ Processor• Enables viewing of execution history• Identify the root cause for exceptions
Branch Trace BufferOn chip (Intel® JTAG Debugger)
Memory allocated (Intel® Application Debugger)
Executed
ApplicationKernel or
Application
Source Code
Send Branch
Trace Information
To DebuggerBranch
14
Localize Configuration Issues with Instruction Trace
C/C++ Source Window
Stop at specific OS
signal
Assembler Window
Trace Window
15
Chipset Peripheral Registers
400/533 MHz FSB
Z510/Z530
System
Controller Hub
US15W
FWH SIO
DDR2 400/533 (mem down)
SDVO
24bit LVDS
8* USB 2.0 Host Ports
1 IDE Channel
Intel® High Definition Audio
LPC
2 PCIe* x1 Lanes
GPIO
SMBus
SDIO/MMC
Intel® Atom™ processor
#include <hdaudioregisters.h>
#define HD_AUDIO_REG_BASE = 0x00FF0000;
uint32 * hdaudioregbase = (uint32)HD_AUDIO_REG_BASE;
init()
{
hdaudioregbase[D27FO_IHDACR] = 0x01; …
}
Kernel Module/Audio Driver- Init Code
Intel® System Controller Hub US15W
• ~400 Peripheral Registers
• Validating Peripheral Register Settings Can Be Quite Complex
16
CPU & Chipset Specific Register AccessShow and change the content of all processor & chipset registersConvenient access to architectural registers - analyze register changes after instruction execution
Note: Intel® JTAG Debugger requires the XDP3 JTAG hardware interface from Intel
Bitfield EditorChipsetRegisters
Graphical representation of peripheral registers and bit fields with online documentation
Easy and fully documented access to all processor registers and peripherals.Change register contents on the fly, without re-compilation
17
• Monitor kernel modules and system threads • Access status information• Debugging of Linux* memory images
Linux* OS Awareness – System Debug
* Other names and brands may be claimed as the property of others.
Kernel
Kernel
18
Be aware of all relevant platform software stack interactions
System Software Debugging Receipe• GCC for kernel build, ICC for performance critical code• Compile kernel with debug info• Connect target through JTAG I/F• Set hardware breakpoint @ “start_kernel“• Run target to complete firmware/BIOS init• Debug kernel
– Execution trace to find errors that are hard to detect– Use translation table feature to resolve segmentation faults
• Inspect SoC/chipset peripheral registers to validate low-level drivers
• Use Flash feature to burn image into Flash memory
19
Use Intel® JTAG Debugger for in-depth system software debugging with full Si/SoC/chipset awareness
20
Agenda
• Market Segment and Tools Overview• System Software Development• Application Performance Tuning• Q&A
Performance Optimization Principles
21
VTune
Compiler
IPP
Re-compile• –xSSE3_ATOM (Atom switch / in-order scheduler)• IPO (interprocedural optimization)• PGO (program guided optimization)• OpenMP (works on multicore/HT only) – source modification
Implement library functions• Highly optimized multimedia/math library functions• OpenMP compiled (works on multicore/HT only)• Update application source code & build environment
Modify source code• Identify C and ASM – source spot optimization opportunities• Analyse results – update sources, rebuild, analyze again
Intel® Tool Suites provide a complete spectrum of performance optimization methodologies
Compiler: Intel® C++ Compiler
IPP: Intel® Integrated Performance Primitives
VTune: Intel® VTune™ Performance Analyzer
Less e
ffort
s
Bett
er
resu
lts
Identify Optimization Opportunities
Get the best performance out of an application, by
• Identifying optimization opportunities using the Intel® VTune™ Performance Analyzer
Questions to ask
• Where do I spend most of my execution time?• Where do small optimizations have the biggest impact?• What hardware bottlenecks and dependency stalls can be easily
avoided?22
VTune
IPP
Compiler
Intel VTune Analyzer
.TB5 file
Sampling Collector
Intel® VTune™ Performance Analyzer Identifies hard to find performance bottlenecks
Features• Low overhead sampling• No instrumentation required• Monitor processor events like cache misses etc.• View results in source or assembly
Usage Model• Two components
• Intel® VTune™ PerformanceAnalyzer on host
• Sampling Collector on the target• Collect data on target and analyze it on the host
23
Sampling - How To Find Hotspots
• Pick an event to sample and configure PMU– Cache misses, branch mis-predictions, Dependency/pipeline stalls
• Start SEP sampling routine and application• Performance Management Unit (PMU) periodically interrupts
the processor
24
Event 1
SEP == ISRPMU
Event 2
Event 3
Event 5
<0
<0
<0
<0
IRQ
Cou
nte
r re
gis
ters
Collect• Execution address in memory (CS:IP)• OS process and thread ID• Executable module loaded at that address
Write• Information into *.TB5 file
• Numbers in counters define sampling rate
Event 4 <0
General Purpose Event RegistersDedicated Event Registers
Take Advantage of Sampling Data• The Intel® VTune™ Performance Analyzer tells you which
module, function or routine could use some improvement.
Focus your application optimization efforts where it counts – Intel® VTune™ Performance Analyzer helps to analyze applications without source and
binary instrumentation25
Compiler Features
Benefits
Performance Significantly faster than GCCHigh performing code maps directly into application quality and battery lifetime
In-order scheduler
Compiler optimization switch that re-arranges/optimizes application code to be executed with best performance on Intel’s Low-power Intel® Architecture technologyBetter performance of system- and application software helps to reduce power consumption of a mobile device
Profile Guided Optimization
Multi-stage optimization method with feedback loopImproves application performance by reducing instruction-cache thrashing, reorganizing code layout, shrinking code size, and reducing branch mispredictions
GCC Compatibility Intel Compiler provides GCC language extensions and is source and binary code compatible with GCCSaves efforts in porting/re-using existing code
Intel® C++ Compiler
26
VTune
IPP
Compiler
Need For In-order Scheduler Support- avoid dependency stalls
Representative assembly:
Consider code sequence:
a = b * 7;c = d * 7;
2 imull $7,%eax
3 movl %eax,a
1 movl b,%eax
5 imull $7,%edx
6 movl %edx,c
4 movl d,%edx
Pro
cessor
cycle
s
Memory LoadDependency Stall
Memory LoadDependency Stall
Dependency
Dependency
Representative assembly:
Pro
cessor
cycle
s• In some cases assembly code causes delays and
dependency stalls which decrease the performance of application and performance critical code
27
Need For In-order Scheduler Support- avoid dependency stalls
Representative assembly:
Consider code sequence:
a = b * 7;c = d * 7;
2 imull $7,%eax3 movl %eax,a
1 movl b,%eax
5 imull $7,%edx6 movl %edx,c
4 movl d,%edx
Pro
cessor
cycle
s
Memory LoadDependency Stall
Memory LoadDependency Stall
Dependency
Dependency
Representative assembly:
2 imull $7,%eax
3 movl %eax,a
1 movl b,%eax
5 imull $7,%edx
6 movl %edx,c
4 movl d,%edx
Pro
cessor
cycle
s
in-order
scheduler
-xSSE3_ATOM
compiler switch
Model instruction pipeline and avoid dependency stalls by using the in-order-scheduler feature
• Compiler switch –xSSE3_ATOM enables the in-order scheduler, which may improve application’s performance behavior
28
Est
imate
d R
ela
tive P
erf
orm
an
ceTo
GC
C 4
.5.0
(G
CC
4.5
.0 =
1.0
)
10%faster
23%faster
45%faster
81%faster
IntegerC/C++
Floating pointC/C++
Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, reference www.intel.com/software/products or call (U.S.) 1-800-628-8686 or 1-916-356-3104
Intel does not control or audit the design or implementation of third party benchmarks or Web sites referenced in this document. Intel encourages all of its customers to visit the referenced Web sites or others where similar performance benchmarks are reported and confirm whether the referenced benchmarks are accurate and reflect performance of systems available for purchase.
*Other brands and names are the property of their respective owners
Use Intel® C++ Compiler for higher performance on Intel® Atom™ processors
Estimated by measurement on internal systems based on the following configuration assumptions:• Source: Intel estimates as of September 9, 2009• Basis of comparison: Intel estimates for current version of Intel
and GCC compilers as of September 9, 2009Compilers:• Intel® C++ Compiler 11.1 for Linux* (icc)• GCC 4.5.0Hardware:• Form factor: Mini-ITX / micro-ATX compatible• Integrated Intel® Atom™ Processor 330 (1.6 GHz / 1MB L2 Cache
/ 533 System Bus), v6.12.2• Memory: 2GB, Harddisk: 40GB• Chipset: Intel® 945GC and ICH7 • Audio: Realtek ALC662 audio codec (5.1 channel HD audio)• Video: Intel® Graphics Media Accelerator 950 & S-video output
support• I/O Control: SMSC LPC47M997 based Legacy I/O controller for
serial, parallel, and PS/2 ports• LAN control: 10/100/1000 Mbits/sec LAN subsystem using the
Realtek LAN adapter deviceOperating System:• Linux nsticlxl284 2.6.18-8.el5PAE #1 SMP Fri Jan 26 14:28:43 EST
2007 i686 i686 i386 GNU/LinuxSPECint*_base2000 and SPECfp*_base2000 from SPEC CPU2000 V1.3 • SPEC and SPECint, SPECfp are trademarks of the Standard
Performance Evaluation Corporation. For more information see www.spec.org
• SPEC has retired SPEC CPU2000 and is no longer publishing results on its website
Compiler switches used for estimates:“-o2“• icc/ifort: -O2• GCC: -O2 –m32“Advanced“• icc/ifort: -O3 -ipo -no-prec-div -prof_use –xSSE3_ATOM• GCC: -O3 -ffast-math -funroll-all-loops -m32Note:• 178.galgel: GCC 4.5.0: Assumes use of -fno-strict-aliasing • 252.eon: GCC 4.5.0: Assumes use of src.alt • 255.vortex: GCC 4.5.0: Assumes use of: -mpc64 -ffixed-form -
ffixed-line-length-132 EXTRA_LDFLAGS = -mpc64• Compiler benchmarks based on SPECfp are based on C/C++
applications only (177.mesa, 179.art, 183.equake, 188.ammp)
C/C++ Compiler BenchmarkIntel® C++ Compiler 11.1 for Linux* VS. GCC 4.5.0based on SPEC* CPU2000 estimated results – September 2009
• Highly optimized multimedia functions
– Images & video– Communication & signal
processing– Data processing
• Fully utilizing– Intel® MMX™ technology– SSE2, SSE3– Multi-core / HT technology
• Rapid application development• Cross-platform compatibility &
code re-use• Outstanding performance
Intel® Integrated Performance Primitives (Intel® IPP) Library
Optimized for Intel® Atom™ Processor
* Other names and brands may be claimed as the property of others.
Use Intel® IPP libraries to concentrate on new features rather than optimizing application performance
30
VTune
IPP
Compiler
Intel® IPP Library Example: MP3 Decoder
Requantization,Stereo Processing
SynthesisFilter Bank
Huffman Decoder
BitstreamUnpacking
Bitstreamin
PCMaudioout
ippsReQuantize
ippsMDCTInv
ippsSynthPQMF
ippsHuffmanDecode
ippsUnpackFrameHeader
ippsUnpackSideInfo
ippsUnpackScaleFactors
Intel® Integrated Performance Primitives (Intel® IPP) 31
32
Summary• Intel Software Development Tool Suites for OEMs, OSVs,
(“Embedded Suite“) and ISVs (“Application Suite“) cover the entire cycle of SW development
• Intel® Tool Suites for Intel® Atom™ Processors complement the open source Moblin SDK
• Intel Tool Suites provide a complete spectrum of performance optimization methodologies (compiler switches, IPP multimedia libs, performance bottleneck analysis with VTune)
• Intel® C++ Compiler for spot optimizations in System Software, e.g. performance critical drivers, codecs, and applications in general
• Intel JTAG debugger for in-depth system software debugging with full Si/SoC/chipset awareness
33
Call to Action
• Check the web for more details on both the “Embedded” and “Application” tool suites– www.intel.com/software/products/atomtools
• Download your 30days try-and-buy evaluation version
• Let us know if you need BETA tools for the next generation Intel® Atom™ processor platform code-named “Moorestown“ (CNDA required)– http://software.intel.com/en-us/articles/intel-embedded-tool-suite-beta/
• Contact us, if you have any further questions– [email protected]
Thank you!
Intel Premier Support: https://premier.intel.com
Public Forum: http://software.intel.com/en-us/forums/software-development-toolsuite-atom/
Articles and Documentation:http://software.intel.com/en-us/articles/intel-application-tool-suite-documentation/http://software.intel.com/en-us/articles/intel-embedded-tool-suite-documentation/
Knowledge Base Articles:http://software.intel.com/en-us/articles/software-development-toolsuite-atom-kb/all/1/http://software.intel.com/en-us/articles/installing-compiler-into-kvm-atom/http://software.intel.com/en-us/articles/moblin-integration-software-development-tool-suite-atom/http://software.intel.com/en-us/articles/intel-development-tools-for-mids-faqs
Call to ActionSupport
35
Q&A
36
Legal Disclaimer• INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO
LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL® PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
• Intel may make changes to specifications and product descriptions at any time, without notice.• All products, dates, and figures specified are preliminary based on current expectations, and are
subject to change without notice.• Intel, processors, chipsets, and desktop boards may contain design defects or errors known as
errata, which may cause the product to deviate from published specifications. Current characterized errata are available on request.
• Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance.
• Intel, Vtune and the Intel logo are trademarks of Intel Corporation in the United States and other countries.
• *Other names and brands may be claimed as the property of others.• Copyright © 2009 Intel Corporation.
Risk FactorsThe above statements and any others in this document that refer to plans and expectations for the third quarter, the year and the future are forward-looking statements that involve a number of risks and uncertainties. Many factors could affect Intel’s actual results, and variances from Intel’s current expectations regarding such factors could cause actual results to differ materially from those expressed in these forward-looking statements. Intel presently considers the following to be the important factors that could cause actual results to differ materially from the corporation’s expectations. Ongoing uncertainty in global economic conditions pose a risk to the overall economy as consumers and businesses may defer purchases in response to tighter credit and negative financial news, which could negatively affect product demand and other related matters. Consequently, demand could be different from Intel's expectations due to factors including changes in business and economic conditions, including conditions in the credit market that could affect consumer confidence; customer acceptance of Intel’s and competitors’ products; changes in customer order patterns including order cancellations; and changes in the level of inventory at customers. Intel operates in intensely competitive industries that are characterized by a high percentage of costs that are fixed or difficult to reduce in the short term and product demand that is highly variable and difficult to forecast. Additionally, Intel is in the process of transitioning to its next generation of products on 32nm process technology, and there could be execution issues associated with these changes, including product defects and errata along with lower than anticipated manufacturing yields. Revenue and the gross margin percentage are affected by the timing of new Intel product introductions and the demand for and market acceptance of Intel's products; actions taken by Intel's competitors, including product offerings and introductions, marketing programs and pricing pressures and Intel’s response to such actions; and Intel’s ability to respond quickly to technological developments and to incorporate new features into its products. The gross margin percentage could vary significantly from expectations based on changes in revenue levels; capacity utilization; start-up costs, including costs associated with the new 32nm process technology; variations in inventory valuation, including variations related to the timing of qualifying products for sale; excess or obsolete inventory; product mix and pricing; manufacturing yields; changes in unit costs; impairments of long-lived assets, including manufacturing, assembly/test and intangible assets; and the timing and execution of the manufacturing ramp and associated costs. Expenses, particularly certain marketing and compensation expenses, as well as restructuring and asset impairment charges, vary depending on the level of demand for Intel's products and the level of revenue and profits. The current financial stress affecting the banking system and financial markets and the going concern threats to investment banks and other financial institutions have resulted in a tightening in the credit markets, a reduced level of liquidity in many financial markets, and heightened volatility in fixed income, credit and equity markets. There could be a number of follow-on effects from the credit crisis on Intel’s business, including insolvency of key suppliers resulting in product delays; inability of customers to obtain credit to finance purchases of our products and/or customer insolvencies; counterparty failures negatively impacting our treasury operations; increased expense or inability to obtain short-term financing of Intel’s operations from the issuance of commercial paper; and increased impairments from the inability of investee companies to obtain financing. The majority of our non-marketable equity investment portfolio balance is concentrated in companies in the flash memory market segment, and declines in this market segment or changes in management’s plans with respect to our investments in this market segment could result in significant impairment charges, impacting restructuring charges as well as gains/losses on equity investments and interest and other. Intel's results could be impacted by adverse economic, social, political and physical/infrastructure conditions in countries where Intel, its customers or its suppliers operate, including military conflict and other security risks, natural disasters, infrastructure disruptions, health concerns and fluctuations in currency exchange rates. Intel's results could be affected by adverse effects associated with product defects and errata (deviations from published specifications), and by litigation or regulatory matters involving intellectual property, stockholder, consumer, antitrust and other issues, such as the litigation and regulatory matters described in Intel's SEC reports. A detailed discussion of these and other risk factors that could affect Intel’s results is included in Intel’s SEC filings, including the report on Form 10-Q for the quarter ended June 27, 2009.
Rev. 7/27/09
37
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Additional sources of information on this topic:• Other Sessions
– MOBL001: ”Accelerate Performance-Critical Applications and Code Under Moblin with Intel Software Products”
• Sep 22 (day1) 10:15-12:05– MOBL002: ”Developing for Moblin Hands-On Lab”
• Sep 22 (day1) 15:10-17:10
• Demos in the showcase– Intel Tools @ Moblin Pavilion
• Additional info in the Moblin community– www.moblin.org– www.moblinzone.com
39
Session Presentations - PDFs
The PDF for this Session presentation is available from our IDF Content Catalog at the end of the day at:
intel.com/go/idfsessions
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