The Pennsylvania State University

The Graduate School

SYNTHESIS, PROCESSING, AND ELECTRICAL CHARACTERIZATION OF

GRAPHENE SYNTHESIZED BY CHEMICAL VAPOR DEPOSITION

A Thesis in

Materials Science and Engineering

by

Casey Alan Howsare

© 2021 Casey Alan Howsare

Submitted in Partial Fulfillment

of the Requirements

for the Degree of

Master of Science

May 2021

ii

The thesis of Casey Alan Howsare was reviewed and approved by the following:

Joshua A. Robinson

Associate Professor of Materials Science and Engineering

Thesis Advisor

Suzanne Mohney

Professor of Materials Science and Engineering and Electrical Engineering

Mauricio Terrones

Verne M. Willaman Professor of Physics Distinguished Professor of Physics, Chemistry and Materials Science &

Engineering

John C. Mauro Professor of Materials Science and Engineering

Associate Head for Graduate Education, Materials Science and Engineering

Chair of the Intercollege Graduate Degree Program in Materials Science and Engineering

iii

Abstract

Since its discovery in 2004, graphene has been the subject of an immense amount of

research interest. Its two-dimensional structure gives rise to a multitude of unique electrical

characteristics, which make it a candidate for use in many novel electronics applications. While

initial graphene research was foundational in nature, more recent work has shifted to practical

aspects of realizing functional graphene electronics. This has included an increased interest in

scalable graphene synthesis techniques such as chemical vapor deposition (CVD), as well as the

subsequent fabrication of graphene devices.

This thesis establishes and investigates the procedures for fabricating graphene devices

from beginning to end. It begins with a study of the graphene synthesis process by CVD on

freestanding copper foils. It also evaluates the viability of synthesis on thin copper films on

insulating substrates, for potential integration into scalable device manufacturing processes. Next,

techniques for layer transfer of graphene films to arbitrary substrates are evaluated, including the

processes for copper substrate removal and cleaning of the graphene film to produce high quality

films free of mechanical defects or chemical modification by the layer transfer process.

A full device fabrication flow is established for the transferred graphene films, including

active device isolation, ohmic contact formation, gate dielectric deposition, and gate contact

formation. Special attention is paid to optimization of the ohmic contact formation process, first

by study of various pre-metallization plasma treatments, and subsequently by study of the effect

of progressive contact anneals on observed contact resistance. This work demonstrates specific

contact resitivities as low as 8x10-6 Ω-cm2, with discussion on a path towards meeting state of the

art values.

Finally, this work investigates the electrical transport behavior of CVD graphene when

transferred to a variety of substrate materials. Temperature-dependent Hall mobility

measurements are presented, along with transport modeling to assess the relative contributions of

iv

various scattering mechanisms. These measurements show that charged impurity scattering is the

dominant mechanism across all substrates, with dielectric surface optical phonon scattering also

serving as a minor contributor. Subsequent projections across a wide space of dielectric materials

and graphene properties provide guidance on optimal selection of dielectrics based on the

application.

v

Table of Contents

List of Figures............................................................................................................................ vi

List of Tables ............................................................................................................................. xi

Acknowledgements ................................................................................................................... xii

Chapter 1: Introduction ............................................................................................................... 1

1.1 State of the Electronics Industry ................................................................................... 1

1.2 Role of Novel Materials ............................................................................................... 3 1.3 Goal of this Thesis ....................................................................................................... 4

Chapter 2: Literature Review ...................................................................................................... 6

2.1 History of Graphene .................................................................................................... 6 2.2 Structure and Properties ............................................................................................... 7

2.3 Graphene Synthesis ................................................................................................... 14

2.4 Materials Characterization ......................................................................................... 25

2.5 Materials Integration .................................................................................................. 28

Chapter 3: Experimental Methods ............................................................................................. 35

3.1 Graphene Synthesis ................................................................................................... 35

3.2 Graphene Layer Transfer ........................................................................................... 41 3.3 Materials Characterization ......................................................................................... 43

3.4 Device Fabrication ..................................................................................................... 48

3.5 Device Testing........................................................................................................... 51 3.6 Transport Modeling ................................................................................................... 58

Chapter 4: Graphene Synthesis and Layer Transfer ................................................................... 62

4.1 As-Grown Graphene Characterization ........................................................................ 62

4.2 Diffusion Barrier Studies ........................................................................................... 65 4.3 Transfer Process Optimization ................................................................................... 77

Chapter 5: Device Fabrication and Electrical Characterization ................................................... 84

5.1 Ohmic Contact Development ..................................................................................... 84 5.2 Transport Studies on Various Substrates .................................................................... 94

Chapter 6: Conclusions ........................................................................................................... 102

6.1 Graphene Synthesis ................................................................................................. 102 6.2 Graphene Device Fabrication ................................................................................... 104

6.3 Electrical Characterization of CVD Graphene Devices ............................................. 105

References .............................................................................................................................. 107

Appendix A: Graphene Processing Details .............................................................................. 115 A.1. Backside Graphene Removal During Layer Transfer ................................................ 115

A.2. Details of Lithographic Processing ........................................................................... 115

A.3. Device Fabrication Processes ................................................................................... 117

Appendix B: Electrical Transport Modeling ............................................................................ 119

B.1. Script for fitting experimental data ........................................................................... 119

B.2. Script for projections on various substrates .............................................................. 122

B.3. Temperature function ............................................................................................... 126 B.4. Sheet carrier density function ................................................................................... 128

B.5. Impurity Concentration Function ............................................................................. 130

vi

List of Figures

Figure 1-1: Comparison of normalized energy-delay product for silicon MOSFETs to

InGaAs/InAlAs and InSb/InAlSb quantum well transistors. The quantum well transistors are

demonstrated with performance metrics 1-3 orders of magnitude better than silicon devices at

similar scaling levels. Figure adapted from Reference [15]. ......................................................... 4

Figure 2-1: Graphene as the building block for all graphitic materials, including buckyballs

(left), carbon nanotubes (center), and graphite (right). Figure adapted from Reference [19]. ........ 7

Figure 2-2: Various visual representations of a single graphene sheet. While graphene is

often depicted as a perfectly planar surface (a), it actually exhibits small out-of-plane ripples,

as shown in (b). Figure adapted from Reference [36]. .................................................................. 8

Figure 2-3: E-k relation for different charge carrier behaviors. In conventional

semiconductors, charge carriers behave as Schrodinger fermions and follow a parabolic E-k

relationship near the band edges (a). In graphene, carriers have zero effective mass, instead

behaving as Dirac fermions with a linear band dispersion (b). Figure adapted from Reference

[41]. ............................................................................................................................................ 9

Figure 2-4: Ambipolar electric field effect in a graphene device. Graphene can be tuned

between electron conduction (positive bias) and hole conduction (negative bias), with a

region of high resistivity at zero applied bias corresponding to the Dirac point. Insets show

representative E-k diagrams for the various regimes. Figure adapted from Reference [19]. ........ 11

Figure 2-5: Modeled mobility as a function of sheet carrier density for various substrates,

identifying strong influence of substrate choice. Carrier density dependence is weak for

aluminum nitride and silicon dioxide but much stronger for hafnium oxide and zirconium

dioxide due to the difference in the energies of their surface optical phonon modes. Figure

adapted from Reference [48]. .................................................................................................... 13

Figure 2-6: Graphene flakes of various thicknesses on an oxidized silicon wafer. Varying

contrast as a function of graphene thickness is a result of destructive interference due to the

slight increase in optical path with the addition of atomic layers. Image adapted from

Reference [58]. ......................................................................................................................... 15

Figure 2-7: Hydrogen intercalation of epitaxial graphene on silicon carbide. A defective

buffer layer (a) or monolayer graphene with a buffer layer (b) are converted to quasi-

freestanding mono- or bi-layer graphene, (c) and (d), respectively. Figure adapted from

Reference [61]. ......................................................................................................................... 17

Figure 2-8: Schematic diagram of carbon precipitation from a nickel substrate during

cooling. At high temperatures, the nickel surface serves to catalyze the dissociative

adsorption of a carbon-containing gas, such as methane. Because nickel has a finite carbon

solubility, the carbon atoms proceed to diffuse into the bulk of the substrate. Upon cooling,

these carbon atoms precipitate at the sample surface, leading to the formation of few-layer

graphene. Figure adapted from Reference [79]. ......................................................................... 19

Figure 2-9: Nickel-carbon phase diagram showing carbon solubility of ~2.7 at.% in Ni at

1000 °C. Dotted lines indicate the carbon solubility at a typical graphene synthesis

temperature of 1000 °C. Figure adapted from Reference [82]. ................................................... 20

vii

Figure 2-10: Copper-carbon equilibrium phase diagram showing carbon solubility of less

than 0.04 At. % in Cu at 1000°C. Dotted lines indicate the carbon solubility at a typical

graphene synthesis temperature of 1000 °C. Figure adapted from Reference [83]. ..................... 20

Figure 2-11: Comparison of CVD graphene growth mechanisms on nickel and copper by

carbon isotope mapping. In nickel-mediated growth (a), both isotopes are uniformly

distributed within the graphene film, indicating that the carbon atoms were able to diffuse

into the substrate and precipitate out to form graphene. In copper-mediated growth (b), C-12

and C-13 atoms form concentric circles, typical of a surface-catalyzed nucleation and growth

process. Figure adapted from Reference [84]. ............................................................................ 21

Figure 2-12: Wet transfer process for graphene synthesized on freestanding copper foils.

After coating with PMMA, the copper substrate is etched in aqueous solution, leaving a

floating PMMA/graphene film. The film is transferred to a water bath to remove residual

etchant, after which the target substrate is placed below the film and water is drawn out using

a needle. Once the PMMA/graphene stack is withdrawn onto the target substrate, it is dried

on a hot plate and graphene is stripped with acetone. Figure adapted from Reference [91]. ........ 24

Figure 2-13: Schematic of transfer-free graphene field-effect transistor showing relaxed

graphene region after undercut etching, evaporated SiO2 gate dielectric, and Au/Cr top gate

metal. Figure adapted from Reference [93]. ............................................................................... 25

Figure 2-14: Raman spectra of bulk graphite, showing the D-peak at ~1380 cm-1, G-peak at

~1580 cm-1, and 2D-peak at ~2700 cm-1. Figured adapted from Reference [79]. ........................ 27

Figure 2-15: Comparison of Raman spectra of bulk graphite and monolayer graphene.

Compared to bulk graphite, the Raman signal of graphene shows a substantial increase in the

relative intensity of the 2D-peak, as well as substantial narrowing; in monolayer graphene,

the 2D-peak is symmetric and can be fit by a single Lorentzian. Figure adapted from

Reference [104]. ....................................................................................................................... 28

Figure 2-16: Effects of oxygen plasma pre-treatment and post-metal contact anneals on

specific contact resistance of graphene devices. Increasing etch time initially improves

contact resistance as more resist residue is removed. But at longer etching increasingly

damages the underlying graphene, resulting in an increase in ρc above 90 seconds of plasma

treatment. Figure adapted from Reference [114]. ....................................................................... 30

Figure 2-17: Carrier mobility as a function of dielectric constant. While high-k dielectrics are

extremely effective at screening charged impurities, their increased SOP scattering effectively

negates the potential performance boost. Figure adapted from [48]. ........................................... 32

Figure 2-18: AFM imaging of graphene flakes on oxidized silicon before and after low-

temperature atomic layer deposition of aluminum oxide. Due to graphene’s hydrophobic

nature and lack of dangling bonds, nucleation of Al2O3 only occurs on the edges of the

graphene flakes and on topological defects resulting in little or no coverage across the

majority of the graphene surface. Figure adapted from Reference [118]. .................................... 33

Figure 3-1: Schematic representation of the experimental setup used for graphene synthesis,

showing source gas lines, mass flow controllers, vacuum tube furnace, vacuum gauge,

downstream throttling valve, sorbent trap, and vacuum pump. ................................................... 36

viii

Figure 3-2: Growth profile for graphene synthesis on freestanding copper foils using a

hydrogen/methane source gas. Samples are annealed in hydrogen at 1000 °C for 30 minutes,

followed by the addition of methane for a 10 minute growth period. .......................................... 37

Figure 3-3: Growth profile for graphene synthesis on evaporated copper thin films using a

hydrogen/methane source gas. Samples are annealed for 30 minutes at 700 °C before ramping

to the growth temperature and introduction of methane. ............................................................ 38

Figure 3-4: Growth profile for graphene synthesis on freestanding copper foils using an

argon/hydrogen/methane source gas. ......................................................................................... 39

Figure 3-5: Schematic representation of graphene layer transfer from copper foil to an

arbitrary insulating substrate. Figure adapted from Reference [91]. ............................................ 42

Figure 3-6: Background subtraction from Raman spectra of graphene on copper.

Fluorescence of the copper substrate results in a strong background signal (a). By fitting a

polynomial to all data points except those within the Raman D-, G-, and 2D-peaks (b), the

background signal can be subtracted. This provides the clear Raman signal of the graphene

itself, which can be used for peak intensity calculations and defect density quantification (c). ... 44

Figure 3-7: Schematic representation of Auger electron emission from undoped silicon,

showing a KLL and LVV transition. Figure adapted from Reference [98]. ................................. 47

Figure 3-8: Schematic representation of the graphene device fabrication process. ..................... 49

Figure 3-9: Structure for contact resistance determination by the transfer length method.

Figure adapted from Reference [128]. ....................................................................................... 51

Figure 3-10: Plot of TLM measurements for determination of contact resistance, transfer

length, sheet resistance, and specific contact resistivity.............................................................. 52

Figure 3-11: Optical image of TLM structures tested in this work. ............................................ 53

Figure 3-12: Configuration for measurement of the sheet resistance of an arbitrarily shaped

semiconductor sample using a four-terminal Van der Pauw measurement. Figure adapted

from Reference [128]. ............................................................................................................... 55

Figure 3-13: Schematic representation of Hall effect measurement for a rectangular

semiconductor sample. A direct current Ix is applied to the sample in the presence of a

perpendicular magnetic field, Bz. This results in an electric field perpendicular to both the

applied current and magnetic field, which can be measured as the Hall voltage VH..................... 56

Figure 3-14: Optical micrograph of a 5 µm x 5 µm Van der Pauw cross.................................... 58

Figure 4-1: Raman spectra of graphene synthesized at 850, 925, and 1000 °C using a on

freestanding copper foils. Graphene grown at low temperature shows a higher D/G ratio,

indicating a higher level of defects. ........................................................................................... 63

Figure 4-2: Scanning electron microscope image of foil-grown graphene samples showing

copper step terraces and grain boundaries as well as wrinkles in the graphene film that result

from thermal mismatch. ............................................................................................................ 64

Figure 4-3: Optical microscope images of post-growth graphene samples on thin copper

films (a) and freestanding copper foils (b). ................................................................................ 66

Figure 4-4: Scanning electron microscopy of graphene grown on copper thin films reveals

the presence of unexpected particle formations (a). These formations are identified by AES to

be silicon-and oxygen-rich (b). .................................................................................................. 66

ix

Figure 4-5: TEM image of the copper-SiO2 interface following graphene synthesis indicating

interdiffusion of up to 200 nm and significant ternary phase formation. ..................................... 66

Figure 4-6: The addition of a sacrificial nickel diffusion barrier layer can substantially reduce

copper–silicon interdiffusion during graphene synthesis. Post-growth TEM images of the

copper–substrate interface region for nickel barrier thicknesses of (a) 5 nm, (b) 10 nm, (c) 20

nm and (d) 50 nm showing reduction in thickness of interdiffusion with increasing nickel

thickness. .................................................................................................................................. 68

Figure 4-7: The addition of metallic and insulating barrier layers drastically affects the

quality of synthesized graphene. A comparison of Raman spectral signals of various sample

configurations shows considerable variation in defect level and estimated thickness for

different barrier layers. .............................................................................................................. 69

Figure 4-8: SEM and TEM imaging of post-growth barrier layer samples show poor

morphology and interfacial quality. Post-growth SEM images of (a) tungsten and (b)

chromium barrier layer samples show that the barrier layer strongly influences copper film

morphology, which then affects graphene synthesis. Dielectric layers exhibit poor barrier

behavior, as shown by post-growth TEM images of Cu/dielectric/Si interface region for (c)

Al2O3, (d) HfO2 and (e) SiNx samples. ....................................................................................... 71

Figure 4-9: (a) Post-growth Raman spectrum of Cu/sapphire sample indicative of high

quality, single-layer graphene. (b) Post-growth TEM of copper/sapphire interface region

shows a pristine interface free of interdiffusion or formation of intermetallics. (c) SEM

imaging of Cu/sapphire sample shows typical copper grain structure and absence of Cu-Si-O

particle formation. ..................................................................................................................... 73

Figure 4-10: XRD spectra of copper-graphene-silicon films after various anneals, showing

copper silicide formation on no barrier sample and small-grain graphene sample at 300 and

800 °C, respectively. Large grain single-layer graphene and multi-layer graphene film were

robust against copper silicide formation up to 900 °C. Adapted from reference [139]. ............... 76

Figure 4-11: SEM image of graphene film transferred to SiO2 showing an intact film, free of

cracks, pinholes, or other major defects. .................................................................................... 78

Figure 4-12: Bright-field and dark-field images of graphene transferred to SiO2 using an

ammonium persulfate-based transfer process. Large circular defects are believed to be

residual un-etched copper. ......................................................................................................... 79

Figure 4-13: SEM image of graphene film on SiO2/Si following nitric acid-based layer

transfer process. Large holes formed in the graphene film as a result of the vigorous bubbling

during the reaction between nitric acid and copper substrate. ..................................................... 80

Figure 4-14: Post-transfer Raman spectra of graphene on SiO2/Si substrate showing strong

signal intensity, high crystalline quality, and no appreciable background signal from

contaminants. ............................................................................................................................ 81

Figure 4-15: XPS spectrum from graphene on SiO2 showing significant residual iron

contamination from the layer transfer process. ........................................................................... 82

Figure 4-16: XPS spectrum from graphene on SiO2 with 10% HCl clean during layer

transfer. It should be noted that the fluorine peaks observed were believed to occur due to a

fluorine-based alignment etch performed on this sample. Although they occur in the same

x

energy region as the iron peaks in Figure 4-15, their signature is significantly different; no

iron signal was detected on this sample. .................................................................................... 83

Figure 5-1: Comparison of Raman spectrum of CVD graphene before and after plasma

descum using identical conditions to that of previous work by Robinson et al [114]................... 85

Figure 5-2: Raman spectra as a function of exposure to an O2/He plasma.................................. 87

Figure 5-3: Raman spectra as a function of exposure to a C2F6/He plasma ................................ 88

Figure 5-4: Optical microscope image of sample processed through ohmic metallization

using C2F6 plasma showing severe metal lifting ......................................................................... 88

Figure 5-5: Contact resistance of CVD graphene samples as a function of post-deposition

annealing. ................................................................................................................................. 90

Figure 5-6: Graphene sheet resistance as a function of anneals following ohmic metallization. . 91

Figure 5-7: Specific contact resistivity as a function of post-deposition anneals ........................ 92

Figure 5-8: Measured Hall mobility as a function of temperature for two samples each on

SiO2, Al2O3, and GaN substrates. .............................................................................................. 95

Figure 5-9: Temperature-dependent mobility data with fitted mobility model. .......................... 96

Figure 5-10: Projected carrier mobility versus sheet carrier density for two different impurity

concentrations. ........................................................................................................................ 100

Figure 5-11: Projected mobility versus impurity concentration for two different sheet carrier

densities. ................................................................................................................................. 100

xi

List of Tables

Table 1-1: Increasing oxide field with subsequent VLSI generations, showing a gradual

increase in oxide field over time. Table adapted from Reference [7]. ........................................... 2

Table 3-1: Summary of various sample configurations tested during barrier layer studies. ......... 41

Table 3-2: Relevant parameters used in theoretical transport modeling. Dielectric constant

and SOP energies were taken from References [48] and [131]. SOP fitting parameters for

SiO2, Al2O3, and GaN are the average of experimental values for this work, while values for

SiC and h-BN were taken from Reference [32]. *Values for AlN, HfO2, and ZrO2 are not

currently available in literature, so the average of all other substrates was calculated and used

as an initial estimate. ................................................................................................................. 61

Table 4-1: Post-growth Raman characterization of graphene on freestanding copper foils.

Increased growth temperature resulted in a lower D/G ratio and a stronger, narrower 2D peak,

indicative of higher quality graphene. This is quantified by an increase of ~35% in the defect-

free graphene crystallite size, La. The use of a slightly longer growth with a lower methane

partial pressure resulted in a further increase of ~20% in La [105]. ............................................. 63

Table 4-2: Raman peak intensity ratios for spectra shown in Figure 4-7. .................................. 69

Table 5-1: Extracted parameters from fitted temperature-dependent mobility measurements. .... 96

xii

Acknowledgements

First, I would like to thank my advisor, Dr. Joshua A. Robinson, for his support

throughout both my undergraduate and graduate studies. The path to completion of my master’s

degree has been a long and winding one, and his support and patience have been invaluable to my

ability to ultimately reach my goals. I would not be where I am today without his knowledge,

guidance, and support, and I am forever grateful to him for helping me become a better researcher

and person.

I would also like to extend my sincere thanks to Dr. David Snyder and the Penn State

Electro-Optics Center for giving me the opportunity to begin my research career in the first place.

To my labmates: Mike Bresnehan, Matt Hollander, Zach Hughes, and Max Wetherington

– you guys are my brothers. I could not have asked for a better group of people to work with and

learn from. The time we spent together – in the office, in the fab, out on the town – is time that I

look back on with the fondest of memories. I would also like to give a special thanks to Mike

LaBella and Kathy Trumbull, both for their extensive assistance in this research and for creating

such a great environment to work in. You are two of the most dedicated, hardworking, and caring

people that I have ever met, and you made our lab group like a family.

Finally, I’d like to extend my thanks to the long list of people within the EOC, Materials

Characterization Lab, and Penn State Nanofabrication Facility who provided assistance with a

wide variety of aspects of this work: To Rebecca Marucci and Greg Pastir for assistance with

graphene growth; to Bangzhi Liu, Shane Miller, Guy Lavallee, and Andrzej Mieckowski for

training and help with device fabrication; and to Josh Stapleton and Vince Bojan for their insight

on device characterization.

1

Chapter 1: Introduction

1.1 State of the Electronics Industry

In 1965, Intel co-founder Gordon Moore published the now famous paper, “Cramming

more components onto integrated circuits” [1]. This paper contained Moore’s prediction that the

density of transistors on an integrated circuit (IC) would increase exponentially, doubling

approximately every year. Moore later revised his prediction to call for doubling every two years

[2], one that has remained accurate at describing transistor scaling for the last four decades [3].

This pattern has become known as “Moore’s Law,” and is actively used by the semiconductor

industry as a guideline for future production targets [4].

Continued scaling of silicon MOSFETs is driven by several key performance metrics that

benefit from device scaling. First and most intuitively, is the obvious increase in circuit

complexity that comes with device scaling. If all device dimensions are scaled by a factor α, the

density of devices on a chip scales by a factor α2 [5]. Thus, an IC consisting of scaled devices

would be capable of storing more information or carrying out more operations than an

equivalently-sized IC of a previous generation. As the cost of processing a silicon wafer is

relatively independent of device size, device scaling also decreases the per-device cost of

fabrication [1]. Furthermore, device scaling results in improvements in device switching speed

and power consumption. According to constant-field scaling theory (also known as Dennard

scaling), circuit delay time scales as 1/α, while power dissipation scales by 1/α 2 [5–7].

Early in silicon MOSFET development, limitations on device size were primarily due to

lithography restrictions – that is, the ability to pattern smaller device features [5,7]. Thus, as

lithographic techniques improved, devices scaled in a pattern closely following Dennard scaling.

The 2018 International Roadmap for Devices and Systems (IRDS) describes this period as the

“Geometrical Scaling” era, in which both vertical and horizontal dimensions were scaled together

in close accordance with Dennard scaling [8]. However, due to nonscaling of device threshold

2

voltages and “reluctance to depart from the standardized voltage levels of the previous generation

[7],” device scaling below 1-2 µm features has followed a general trend of increasing oxide field.

This pattern is shown in Table 1-1. Additionally, scaling into the sub-micrometer range has

resulted in a number of deleterious device behaviors that also serve as barriers to further device

scaling. These include increased gate leakage due to tunneling currents through the thin oxide

layer and a variety of “short-channel effects” that result from increased influence of the source

and drain depletion regions on the channel behavior [7].

Table 1-1: Increasing oxide field with subsequent VLSI generations, showing a gradual increase in oxide

field over time. Table adapted from Reference [7].

Feature size

(µm)

Power-supply

voltage (V)

Gate oxide

thickness (Å)

Oxide field

(MV/cm)

2.00 5 350 1.4 1.20 5 250 2.0

0.80 5 180 2.8

0.50 3.3 120 2.8 0.35 3.3 100 3.3

0.25 2.5 70 3.6

0.10 1.5 30 5.0

The semiconductor industry has successfully developed a number of techniques for

suppressing these undesired behaviors to allow continued scaling. These include the adoption of

high-κ gate dielectrics to allow for thicker gate oxides [9], strained silicon-germanium for

increased carrier mobility [7,9], and the use of either silicon-on-insulator [10] or multi-gate

structures [11] to minimize short-channel effects. These techniques have allowed for scaling of

production devices to as small as 6 nm [12], and together form the period described as the

“Equivalent Scaling” era by IRDS [8]. This represents the period of time in which horizontal

device dimensions continue to shrink at a similar pace, but with deviation from historical trends

in vertical scaling and introduction of new materials. Important to note is that IRDS has identified

the end of the Equivalent Scaling era as imminent; within the last several years, memory

applications have already been forced to stack devices vertically (3D integration) in order to

continue to meet device density requirements. Furthermore, a true limit to horizontal scaling of

3

conventional CMOS is expected to be reached sometime in the early 2020s [8]. While a variety of

new technologies are being pursued, one promising path identified by IRDS is the incorporation

of two-dimensional channel materials such as graphene, which could allow for even further

horizontal scaling, as well as providing performance benefits in switching speed and switching

energy over silicon-based CMOS [13].

1.2 Role of Novel Materials

While silicon has been the basis of CMOS technology since its inception, the use of novel

materials may become necessary to continue scaling devices beyond the fundamental limits of

silicon technology [14]. One of the great advantages that germanium, III-V semiconductors, and

novel materials such as graphene have over silicon is improved charge carrier mobility.

According to Taur and Ning, “Relatively speaking, mobility is the most important parameter for

CMOS performance” (authors’ emphasis) [7]. Thus, by replacing silicon with a higher mobility

material, device performance could be improved beyond the current limits of silicon. Evidence of

this performance gain has already been demonstrated for quantum well transistors fabricated from

various III-V semiconductors, although they have only been demonstrated for n-channel devices

to date [15]. The normalized energy-delay product, a common figure of merit for logic devices, as

a function of gate length is compared for III-V quantum well transistors and silicon MOSFETs in

Figure 1-1. Furthermore, at highly scaled device dimensions, graphene also benefits from its high

carrier saturation velocity – demonstrated to be in excess of 5x107 cm/s [16].

4

Figure 1-1: Comparison of normalized energy-delay product for silicon MOSFETs to InGaAs/InAlAs and

InSb/InAlSb quantum well transistors. The quantum well transistors are demonstrated with performance

metrics 1-3 orders of magnitude better than silicon devices at similar scaling levels. Figure adapted from

Reference [15].

In addition to graphene’s outstanding intrinsic carrier mobility, its two-dimensional

nature makes it extremely attractive for highly scaled devices. Modeling shows that a device with

a thin channel region and a thin gate dielectric will be most resistant to short-channel effects [17].

Thus, at only one atom thick, graphene is essentially the limiting case for scalability to extremely

short gate lengths [18]. While intrinsic graphene’s lack of a band gap presents a large barrier to its

integration into modern CMOS production, it does present a possible long-term replacement for

silicon in electronic devices. Additionally, graphene is considered a much nearer-term material

for radiofrequency (RF) applications, as the majority of power consumption in RF circuits is a

consequence of the device amplification rather than static leakage currents. Thus, lack of a band

gap does not preclude the use of intrinsic graphene in RF devices [18].

1.3 Goal of this Thesis

This work has three primary objectives: First, to provide the reader with a thorough

background on graphene and summarize important previous research in graphene synthesis,

5

device fabrication, and electrical performance; second, to describe experimental work on the

synthesis, processing, and characterization of graphene films completed as part of this research;

and third, to utilize theoretical modeling of electrical transport in graphene films to explain the

experimental results and guide recommendations on future development of graphene-based

microelectronics.

6

Chapter 2: Literature Review

This section provides a brief background on the history and properties of graphene, with

a particular focus on electron transport and other properties that are particularly relevant for the

use of graphene in modern microelectronic devices. It also describes several methods that can be

used to synthesize graphene and related materials, such as reduced graphene oxide. Finally, this

section describes recent work in graphene device fabrication and performance, including studies

on ohmic contacts to graphene, integration of dielectrics in graphene field-effect devices, and

theoretical modeling of carrier scattering physics that serve as limiting factors in current devices.

2.1 History of Graphene

While graphene is conventionally understood to have been “discovered” in 2004 [19],

atomically thin carbon films have been studied both theoretically and experimentally for many

decades [20–25]. This includes experimental work on graphite oxide and the derivative graphene

oxide as early as 1961 [22], as well observation of graphene formation on various metal surfaces

several years thereafter [23–25]. However, it was not until 2004 that single-layer graphene was

isolated from bulk graphite by researchers at the University of Manchester, marking the first time

that a truly two-dimensional crystal had been formed without being strongly bonded to a bulk

substrate [26]. Subsequent experiments identifying graphene’s novel electronic properties, such

as the relativistic behavior of its charge carriers [27], high electron mobility [28], and observation

of the quantum Hall effect [29] have made graphene a candidate for a variety of novel electronic

applications.

Subsequent to the demonstration of freestanding graphene, evidence of various other two-

dimensional crystals was also published [30]. By simply rubbing a bulk sample of a particular

layered material against a target substrate, researchers were able to successfully isolate single

sheets of a wide variety of low dimensional materials. This includes hexagonal boron nitride (h-

7

BN), various transition metal dichalcogenides (TMDs) (MoS2, MoSe2, WS2, WSe2, NbSe2), and

the complex oxide Bi2Sr2CaCu2Ox. In the time since graphene was first identified, these other

materials have also garnered a great deal of attention for their potential device applications. For

example, h-BN has received focus as a lattice-matched substrate and/or dielectric for graphene

devices [31,32], while various TMDs – MoS2 in particular – have been widely studied as a

potential channel material in novel devices due to their presence of a band gap [33].

2.2 Structure and Properties

2.2.1 Atomic Structure

Graphene is a single atomic sheet of sp2-bonded carbon atoms – the atomically thin limit

of graphite. The carbon atoms form a honeycomb arrangement, with each carbon atom bonded to

its adjacent carbon atoms with one sigma bond and one third of a pi bond [34]. This arrangement

can be considered as the basis for all graphitic materials, as one can visualize a graphene sheet

being “…wrapped up into 0D buckyballs, rolled into 1D nanotubes or stacked into 3D graphite”

[19]. This is shown graphically in Figure 2-1.

Figure 2-1: Graphene as the building block for all graphitic materials, including buckyballs (left), carbon

nanotubes (center), and graphite (right). Figure adapted from Reference [19].

8

The formal definition of the word “graphene” would restrict its use to apply solely to the

case of a single atomic layer. According to the International Union of Pure and Applied

Chemistry (IUPAC), “The term ‘graphene’ should be used only when the reactions, structural

relations or other properties of individual layers are discussed” [35]. However, as structures

consisting of several atomic layers show properties similar to those of a monolayer and quite

different from bulk graphite, the terms “bi-layer graphene” and “few-layer graphene” have also

gained acceptance. The boundary between what can reasonably be considered graphene is

typically accepted as between five and ten atomic layers, when the properties of the film

transition to match those of bulk graphite [19].

While artists’ renderings often present graphene as a perfectly planar surface (see Figure

2-2a), it has been demonstrated that even a single atomic layer of graphene possesses a three-

dimensional structure. Both experimental measurements and theoretical calculations show the

presence of out-of-plane ripples in the graphene structure, typically on the order of tens of

nanometers [36,37] (Figure 2-2b). The appearance of these ripples can be explained by

anharmonic coupling of the bending and stretching phonon modes, which suppress long-range

fluctuations [37]. Thus, while these ripples result in an increase in strain energy, they provide an

overall reduction in free energy that makes such two-dimensional crystals thermodynamically

stable [19,37].

Figure 2-2: Various visual representations of a single graphene sheet. While graphene is often depicted as a

perfectly planar surface (a), it actually exhibits small out-of-plane ripples, as shown in (b). Figure adapted

from Reference [36].

9

2.2.2 Band Structure

In most conventional semiconductors, the energy-wavenumber (E-k) relationship of

charge carriers is approximately parabolic near the conduction and valence band edges, following

the relation

𝐸 =|ℏ2𝒌2|

2𝑚∗ , ( 2-1 )

where ħ is the reduced Planck constant, k is the electron wavevector, and m* is the effective mass

of the charge carrier [38]. This relation is identical to the solution of Schrödinger’s equation for a

free electron, except that the effective mass is used to reflect the interaction between a charge

carrier and the crystal lattice [39]. Graphene, on the other hand, possesses a linear band

dispersion near the neutrality point, reflecting the massless nature of its charge carriers [38,40].

Thus, their behavior is described by the relativistic Dirac equation

𝐸 = |ℏ𝒌|𝑣𝑓 , ( 2-2 )

with the Fermi velocity vf (~106 m/s) substituted for the speed of light [38]. The three-

dimensional band structure for conventional semiconductors and graphene are shown in Figure

2-3.

Figure 2-3: E-k relation for different charge carrier behaviors. In conventional semiconductors, charge carriers behave as Schrodinger fermions and follow a parabolic E-k relationship near the band edges (a). In

graphene, carriers have zero effective mass, instead behaving as Dirac fermions with a linear band

dispersion (b). Figure adapted from Reference [41].

10

This unique band structure has a number of important implications for graphene devices.

First, graphene possesses no energy gap; the valence and conduction bands meet at the six

equivalent points in the first Brillouin zone, commonly referred to as the Dirac points [40]. Thus,

graphene exhibits an ambipolar electric field effect, switching between electron and hole

conduction as an applied bias is swept through the neutrality point. This effect is shown in Figure

2-4. Interestingly, graphene has also been found to be conductive even at the neutrality point,

where theory predicts it to be completely devoid of charge carriers. Various groups have

measured a minimum sheet conductivity on the order of 4e2/h for graphene devices, which

corresponds to a sheet resistivity of approximately 6.5 kΩ/sq [19,27,42,43]. The physical

explanation of this phenomenon is a matter of some debate, with some proposing that the

quantization of minimum conductivity is an inherent result of the two-dimensional system [27],

while others claim that it is simply evidence of charge inhomogeneity that results from inherent

impurities in the graphene system [43].This presents challenges for practical graphene devices,

particularly in the form of high off-state current and poor gate modulation in graphene transistors

[18].

11

Figure 2-4: Ambipolar electric field effect in a graphene device. Graphene can be tuned between electron

conduction (positive bias) and hole conduction (negative bias), with a region of high resistivity at zero applied bias corresponding to the Dirac point. Insets show representative E-k diagrams for the various

regimes. Figure adapted from Reference [19].

2.2.3 Transport

In addition to its unique band structure, graphene has carrier transport properties unlike

those of any other material. Carrier mobilities of approximately 200,000 cm2 V-1 s-1 have been

measured at cryogenic temperatures, exceeding those of any other known material [28,44,45].

However, it should be noted that these high values are only obtained for suspended graphene that

is measured in vacuum following current annealing to drive off adsorbed molecules. This

illustrates the strong influence of interfaces between graphene and other materials and their

ability to limit or alter the properties of a graphene sheet. Nonetheless, room-temperature

mobilities of 10,000-15,000 cm2 V-1 s-1 are common for high quality graphene on SiO2 substrates

[26,46].

12

Theoretical modeling of carrier transport in graphene has focused on three main

scattering sources: Intrinsic longitudinal acoustic (LA) and longitudinal optical (LO) phonons

from the graphene itself [44,47], charged impurities in the form of adsorbed molecules and

defects in the environment surrounding the graphene [32,43,48–50], and surface optical phonons

in polar dielectric materials used as substrates or dielectric overlayers [32,48,50]. In suspended

graphene of very high quality, extrinsic scattering sources are eliminated, and intrinsic graphene

LA and LO scattering can be observed [44]. However, in supported graphene (non-suspended),

surface optical phonon (SOP) scattering from the substrate can reduce this limit substantially; for

example, the theoretical mobility limit of graphene on SiO2 is only 40,000 cm2 V-1 s-1 at room

temperature, even in the absence of impurity scattering [46]. Theoretical modeling of graphene

transport on various polar dielectric substrates has shown that the influence of these substrate

interactions is pronounced; differences in SOP energies, phonon-electron coupling factor, and

dielectric constant would result in markedly different transport [48]. This effect is shown in

Figure 2-5.

13

Figure 2-5: Modeled mobility as a function of sheet carrier density for various substrates, identifying

strong influence of substrate choice. Carrier density dependence is weak for aluminum nitride and silicon

dioxide but much stronger for hafnium oxide and zirconium dioxide due to the difference in the energies of

their surface optical phonon modes. Figure adapted from Reference [48].

The effect of the dielectric environment on transport in graphene has been of particular

interest, due to a phenomenon known as dielectric screening. As previously mentioned, the

presence of charged impurities tends to dominate carrier scattering in practical devices. But

research has shown that when graphene is surrounded by materials with a high dielectric constant,

scattering from charged impurities can be significantly reduced, resulting in an increase in

mobility. This includes the use of high-κ dielectric substrates [48], high-κ dielectrics for top-

gating [50], and the application of high-κ organic solvents to back-gated FETs as a passivation

layer [51]. In the last case, the use of various solvents with dielectric constants of up to 200

resulted in carrier mobilities as high as 70,000 cm2 V-1 s-1, the highest yet reported for graphene

on an SiO2 substrate [51].

14

2.2.4 Other Properties

In addition to its impressive electrical properties, graphene possesses a multitude of other

unique attributes that make it a candidate for a variety of novel applications. Graphene has been

demonstrated to possess a thermal conductivity of >4800 W m-1 K-1, exceeding even that of

diamond [52]. This could lead to the use of graphene in thermal management applications, such

as a heat sink in high-power electronics applications. Graphene’s structural properties are equally

impressive, with measured Young’s modulus of ~1.0 TPa and an intrinsic strength of ~130 GPa

[53]. Recent work has attempted to take advantage of both the strength and conductivity of

graphene sheets in electrically conductive composite materials [54]. The large specific surface

area of graphene (2630 m2 g-1) has also made it an attractive material for supercapacitor

applications, with demonstrated performance comparable to or exceeding that of current battery

technology [55,56].

2.3 Graphene Synthesis

2.3.1 Mechanical Exfoliation

The first successful isolation of a graphene monolayer was achieved using a process

known as mechanical exfoliation [26]. In this technique, single- and few-layer graphene flakes

are removed from a bulk sample of highly oriented pyrolytic graphite (HOPG) by repeated

peeling with adhesive tape. The flakes are then released from the adhesive tape by dissolving in

acetone and withdrawn from the solution onto a target substrate, most commonly a silicon wafer

with a 300 nm oxide layer. The use of a specific oxide thickness is essential; single-layer

graphene is optically transparent, but the additional optical path due to the graphene layers causes

a slight interference contrast, allowing few-layer graphene flakes to be identified by optical

microscopy under white light [26,30]. Due to the reliance on this interference phenomenon,

variation in the thickness of this oxide layer by as little as 10% can render the graphene

completely invisible [57]. This contrast effect is illustrated in Figure 2-6. An even simpler

15

mechanical exfoliation was later demonstrated, where a bulk crystal is simply rubbed onto the

target substrate in a manner similar to writing with a pencil. This technique produces mostly

flakes of many atomic layers, but a small fraction of monolayer flakes is invariably found

following exfoliation [30].

Figure 2-6: Graphene flakes of various thicknesses on an oxidized silicon wafer. Varying contrast as a

function of graphene thickness is a result of destructive interference due to the slight increase in optical

path with the addition of atomic layers. Image adapted from Reference [58].

Mechanical exfoliation is widely used for physics experiments on graphene, as the

isolated graphene is of high crystalline quality [41]. Only in exfoliated graphene have electron

mobilities of >100,000 cm2 V-1 s-1 been measured, a level at which carrier scattering is on the

micrometer scale [28]. The high intrinsic crystalline quality of exfoliated graphene also allows for

probing of the relativistic nature of graphene charge carriers, giving researchers the first means by

which to conduct experiments within the field of quantum electrodynamics [19]. However,

mechanical exfoliation is a low-throughput and non-scalable technique; the flakes produced by

this method are typically less than 100 microns in diameter and must be manually identified by

peering through an optical microscope. Thus, mechanical exfoliation is not a viable route towards

production-scale graphene devices.

16

2.3.2 Epitaxial Growth on SiC

Another primary technique for graphene synthesis is epitaxial growth on silicon carbide

substrates – a technique that first published shortly after the demonstration of mechanical

exfoliation of graphene [59]. At high temperatures (>1000 °C), silicon atoms preferentially

desorb from the surface of a silicon carbide wafer, leaving behind a carbon-rich surface that

restructures to form graphene. Graphene growth has been demonstrated on both the silicon-

terminated (0001) and carbon-terminated (0001) faces of silicon carbide, though with marked

differences in the growth kinetics and resulting graphene [59–62]. Graphene grown on the silicon

face is typically only a few atomic layers thick, the first of which is partially bound to the SiC

substrate. This layer, often referred to as a buffer layer or “zero-layer graphene”, strongly

influences the properties of the subsequent graphene layers, inducing strong n-type doping and

significant carrier scattering [61,63]. C-face growth, on the other hand, is not self-limiting;

graphene can often be dozens of layers thick, with poor thickness uniformity. Interestingly, C-

face growth typically produces graphene with higher carrier mobilities than Si-face growth. This

is because C-face graphene layers do not stack in the ordered arrangement of graphite. Rather,

they are “rotationally faulted,” which effectively isolates each individual layer [64–66].

Due to the ability to achieve uniform mono- and bi-layer graphene, epitaxial graphene

device research focuses predominantly on Si-face growth, even though it typically exhibits poorer

electronic quality. Recently, a technique of passivating the underlying SiC substrate has been

developed, which effectively decouples the disordered buffer layer of Si-face graphene. This

converts the buffer layer into a “quasi-freestanding” graphene layer – effectively converting as-

grown n-layer graphene into (n+1)-layer graphene, as shown in Figure 2-7 [61]. Decoupling the

covalently-bound buffer layer eliminates the n-type doping present in as-grown epitaxial

graphene, resulting in slightly p-type material due to the spontaneous polarization of the silicon

carbide substrate [67]. This also results in a substantial reduction in carrier scattering, increasing

the carrier mobility by a factor of two or more [63].

17

Figure 2-7: Hydrogen intercalation of epitaxial graphene on silicon carbide. A defective buffer layer (a) or

monolayer graphene with a buffer layer (b) are converted to quasi-freestanding mono- or bi-layer graphene,

(c) and (d), respectively. Figure adapted from Reference [61].

Epitaxial growth is an attractive route for commercial production of graphene-based

electronics due as the ability to synthesize uniform, high-quality graphene on a wafer-scale

[68,69]. The first integrated circuit of graphene-based devices was demonstrated in 2011, where

all circuit components were fabricated on a single silicon carbide wafer, with a graphene field-

effect transistor serving as the active device of the RF mixer [70]. One current barrier to the broad

use of epitaxial graphene electronics is cost – the expensive silicon carbide substrate serves as the

major driver of epitaxial production costs, making epi-graphene considerably more expensive

than comparable silicon electronics on a per-area basis [71].

2.3.3 Chemical Exfoliation

Graphene-like layers can also be isolated by a process known as chemical exfoliation,

although they contain varying amounts of attached functional groups and are often referred to as

“chemically modified graphenes.” In the chemical exfoliation process, bulk graphite is exposed to

strong oxidizing agents, attaching epoxide, hydroxyl, carbonyl, and carboxyl groups to the

graphite sheets [55,72]. This increases the interlayer spacing of the sheets, weakening the Van der

Waals bonds that hold them together; this material is known as graphite oxide. Subsequent

sonication of the graphite oxide in solution breaks the interlayer bonds completely, resulting in a

18

colloidal suspension of single- and few-layer graphene oxide flakes [72]. The graphene oxide

flakes can then be dispersed onto a substrate by spin- or spray-coating.

Graphene oxide, unlike pristine graphene, is an insulator. However, by exposing

graphene oxide to strong reducing agents, such as hydrazine, or by annealing the graphene oxide

in a reducing environment, a significant portion of the oxygen-containing functional groups can

be removed [72,73]. The reduced material, often referred to as “reduced graphene oxide” or rGO,

regains its conductivity and can be used as a transparent conductive electrode [74] or as part of an

electrically conductive composite material [54]. However, it should be noted that the transport

properties of rGO are still drastically different from pristine graphene. Even the most highly

reduced material still contains some attached functional groups that disrupt the sp2 bonding of the

graphene lattice – often as much as 10 At.% [72]. Measured field-effect mobilities of rGO are

typically less than 200 cm2 V-1 s-1, several orders of magnitude lower than typical values for high

quality non-modified graphene [75]. This precludes the use of rGO for electronic device

applications, where carrier mobility is a critical parameter. However, rGO is an attractive material

for use in transparent conductive electrodes in touchscreens or flexible electronics.

2.3.4 Chemical Vapor Deposition

Graphene formation on metals by a chemical vapor deposition (CVD) process was first

observed many decades prior to the groundbreaking experiments by Novoselov and Geim in 2004

[23–26]. However, research on CVD of graphene did not begin in earnest until 2008, when

graphene deposited by CVD was demonstrated on ruthenium [76], iridium [77], and nickel

substrates [78,79]. In CVD graphene growth, the transition metal surface serves as a catalyst for

the thermal decomposition of a carbonaceous source gas, typically methane. Carbon atoms then

diffuse into the substrate and precipitate out when cooled, forming graphene. This mechanism is

shown in Figure 2-8. Through proper controlling of temperature, gas flows, substrate thickness,

and cooling rate, large area (~cm2) graphene films of predominantly single- and bi-layer graphene

19

were successfully produced and transferred to insulating substrates for electrical characterization

[80]. These films were demonstrated to have low sheet resistance (<300 Ω/sq) and high carrier

mobility (up to 3700 cm2 V-1 s-1), indicative of high quality material.

Figure 2-8: Schematic diagram of carbon precipitation from a nickel substrate during cooling. At high

temperatures, the nickel surface serves to catalyze the dissociative adsorption of a carbon-containing gas,

such as methane. Because nickel has a finite carbon solubility, the carbon atoms proceed to diffuse into the

bulk of the substrate. Upon cooling, these carbon atoms precipitate at the sample surface, leading to the

formation of few-layer graphene. Figure adapted from Reference [79].

2.3.4.1 Copper CVD

In late 2009, graphene CVD was also demonstrated on copper substrates by researchers at

the University of Texas at Austin [81]. Growth of graphene on copper is particularly useful

because of the ability to achieve high-quality growth of almost entirely monolayer graphene, in

contrast to the non-uniform graphene that is typical of synthesis on nickel substrates. This

behavior is explained by the difference in carbon solubility between the two metals; while FCC

nickel can tolerate approximately 2.7 at.% carbon at 1000 °C (Figure 2-9), copper has a carbon

solubility of less than 0.01 at.%, even up to its melting point (see Figure 2-10). Thus, copper-

mediated graphene synthesis occurs solely by a surface catalyzed process, rather than by a

diffusion-precipitation mechanism.

20

Figure 2-9: Nickel-carbon phase diagram showing carbon solubility of ~2.7 at.% in Ni at 1000 °C. Dotted

lines indicate the carbon solubility at a typical graphene synthesis temperature of 1000 °C. Figure adapted

from Reference [82].

Figure 2-10: Copper-carbon equilibrium phase diagram showing carbon solubility of less than 0.04 At. %

in Cu at 1000°C. Dotted lines indicate the carbon solubility at a typical graphene synthesis temperature of

1000 °C. Figure adapted from Reference [83].

21

The difference in growth mechanism was later demonstrated conclusively by introducing

alternating pulses of 12CH4 and 13CH4 during graphene CVD on both nickel and copper substrates

and spatially mapping the distribution of carbon-12 and carbon-13 using Raman spectroscopy

[84]. Post-growth Raman mapping of the G-peak position for growth on nickel showed a uniform

distribution of both carbon-12 and carbon-13, indicating that the carbon atoms had diffused into

the bulk of the nickel substrate and subsequently precipitated out to form the graphene film.

Growth on copper, on the other hand, showed alternating concentric rings of carbon-12 and

carbon-13, indicating that growth on copper is solely a surface-mediated nucleation and growth

process. A comparison of the two growth mechanisms is shown in Figure 2-11.

Figure 2-11: Comparison of CVD graphene growth mechanisms on nickel and copper by carbon isotope

mapping. In nickel-mediated growth (a), both isotopes are uniformly distributed within the graphene film,

indicating that the carbon atoms were able to diffuse into the substrate and precipitate out to form graphene.

In copper-mediated growth (b), C-12 and C-13 atoms form concentric circles, typical of a surface-catalyzed

nucleation and growth process. Figure adapted from Reference [84].

Graphene CVD on copper is considered an attractive route towards graphene

microelectronics production, as it has been demonstrated to produce large-area graphene with

22

crystalline quality comparable to or exceeding that of epitaxial graphene on silicon carbide.

Continuing optimization of the CVD growth process has led to graphene with measured carrier

mobilities as high as 16,000 cm2 V-1 s-1 – a number exceeded only by those of pristine exfoliated

graphene flakes [85]. Thirty-inch graphene films have been synthesized and transferred to

substrates for use as transparent conductive electrodes, demonstrating the ability to synthesize

continuous graphene sheets on a very large scale [86].

Various reports have been published that evaluate thermodynamic and kinetic factors in

graphene growth on copper substrates, including the role of temperature [85], total system

pressure [87], methane and hydrogen partial pressures [85,88,89], and grain orientation of the

polycrystalline copper substrate [90]. It has been shown that higher growth temperatures result in

higher quality graphene, as is typical of CVD processes. However, rapid evaporation of the

copper substrate near its melting point limits the practical range of growth temperature to

1000-1050 °C [85]. Research has also shown the importance of low partial pressures of both

hydrogen and methane; while some hydrogen is necessary for reduction of any oxygen impurities,

high hydrogen partial pressure can inhibit graphene formation and increase defectiveness of

synthesized material [88,89]. Lower methane partial pressure has also been shown to increase

graphene quality, as it lowers the density of graphene nucleation. This results in larger graphene

crystallites, reduced scattering from domain boundaries, and increased carrier mobility [85,87].

Interestingly, research has shown that graphene CVD on copper is not always self-limiting,

depending on the orientation of the copper substrate. While growth on the (111) face is typically

rapid and self-limiting, growth on higher-index faces is slower but produces defective, multilayer

graphene. This effect can be mitigated by long pre-growth annealing, which favors the formation

of the low-energy (111) orientation across the majority of the copper substrate [90].

23

2.3.4.2 Transfer-free Synthesis

While early demonstrations of CVD graphene growth on copper used freestanding copper

foils as the substrate, the wet transfer process used to transfer the graphene films to insulating

substrates is non-ideal for large-scale device production. In the wet transfer method, the graphene

is coated with a polymer support, such as poly methyl methacrylate (PMMA), and the copper foil

is removed using a wet etchant. The remaining PMMA/graphene film is left floating freely in the

etchant bath and can be withdrawn onto any target substrate, such as oxidized silicon or glass, as

shown in Figure 2-12 [78,81,91]. While this method has the benefit of providing a means for

graphene on essentially any substrate, the wet transfer process can incorporate impurities or

damage the graphene sheets; microcracks or tears in the fragile graphene films are common,

which would be prohibitive for the use of such a process in large-scale graphene device

production [71,92,93].

24

Figure 2-12: Wet transfer process for graphene synthesized on freestanding copper foils. After coating with

PMMA, the copper substrate is etched in aqueous solution, leaving a floating PMMA/graphene film. The

film is transferred to a water bath to remove residual etchant, after which the target substrate is placed

below the film and water is drawn out using a needle. Once the PMMA/graphene stack is withdrawn onto

the target substrate, it is dried on a hot plate and graphene is stripped with acetone. Figure adapted from

Reference [91].

One potential solution was demonstrated in late 2009 by researchers at Cornell University

[93]. Rather than using freestanding copper foils, their work utilized a 495-nm evaporated copper

film (with 5 nm nickel adhesion layer) on oxidized silicon as their substrate for graphene

synthesis. Following graphene growth, they isolated graphene regions for transistors by

patterning the wafer using conventional lithography and using a wet etchant to undercut the active

device regions. A schematic representation of a transistor fabricated using this transfer-free

process is shown in Figure 2-13. Following device processing, Raman spectroscopy of the

graphene regions showed no structural degradation, and approximately 97% of graphene devices

were continuous. Thus, this work demonstrated that a transfer-free process may be viable for

wide scale graphene device production.

25

Figure 2-13: Schematic of transfer-free graphene field-effect transistor showing relaxed graphene region

after undercut etching, evaporated SiO2 gate dielectric, and Au/Cr top gate metal. Figure adapted from

Reference [93].

The demonstration of transfer-free graphene devices was an important step towards

production scale use of CVD graphene for microelectronics. However, several aspects of this

research have yet to be investigated in-depth, including the thermal stability of the Cu/SiO2/Si

material system. Limited previous research indicates that a copper-silicon dioxide interface is

stable at temperatures <800 °C [94], while other research has demonstrated structural degradation

of thermal silicon dioxide during annealing at higher temperatures [95]. While graphene synthesis

has been demonstrated at lower temperatures (400-800 °C) using ethylene [96] and various liquid

and solid precursors [97], these films do not exhibit the same large-area uniformity and high

crystalline quality. On the other hand, graphene synthesis from a methane precursor at

temperatures of 1000 °C or greater has been shown to produce the highest quality CVD material

[85], where the behavior of the Cu/SiO2/Si material system is not well understood. Thus, it is

advantageous to investigate the Cu/SiO2 interface during methane-based graphene synthesis.

2.4 Materials Characterization

2.4.1 Raman Spectroscopy

Raman spectroscopy is a versatile characterization technique that is used with a variety of

materials, including single crystals, powders, thin films, and solutions [98]. In this technique, a

high-intensity laser is focused on the target sample, most of which is simply reflected at the same

wavelength as the incident beam. But a small fraction of the incoming photons gain or lose

26

energy due to interaction with the phonon modes of the sample, producing peaks in the Raman

spectrum. By measuring the intensity, position, width, and shape of these peaks, information

about the crystal structure, strain, and electronic state of materials can be determined [98]. Raman

spectroscopy has been used for decades as a characterization tool for carbon materials. The

nondestructive nature of Raman combined with the strong Raman interaction with carbon

materials has led to the use of Raman spectroscopy as a primary characterization technique for

graphite [99], amorphous and disordered carbon [100], glassy carbon [101], diamond [102],

carbon nanotubes [103], and most recently, graphene [104].

The Raman signature of graphitic materials contains three peaks of interest, shown in

Figure 2-14. The Raman G-peak, or “graphite peak”, is located at ~1580 relative cm-1 and occurs

due to interaction with the doubly degenerate E2g phonons from in-plane vibrations of carbon-

carbon sp2 bonds [104]. Thus, it is present in all graphitic materials. The D-peak at ~1360 cm-1,

on the other hand, occurs due to zone-boundary phonons, which do not obey the fundamental

Raman selection rule. Thus, the D-peak normally only appears when scanning near grain

boundaries or in defective material [104]. The ratio of the D-peak intensity to G-peak intensity,

known as the D/G ratio or ID/IG, is frequently used as a quantitative means for describing the

defectiveness of graphene, and has been empirically related to the mean graphene crystallite size,

La, by the relation

𝐿𝑎(nm) =560

𝐸𝑙4 (

𝐼𝐷

𝐼𝐺)−1

, ( 2-3 )

where El is the laser excitation energy in eV [105]. La can also be thought of as a mean inter-

defect distance, allowing for its use in quantitatively comparing the crystalline quality of

synthesized graphene [106].

27

Figure 2-14: Raman spectra of bulk graphite, showing the D-peak at ~1380 cm-1, G-peak at ~1580 cm-1,

and 2D-peak at ~2700 cm-1. Figured adapted from Reference [79].

The final peak of interest is the Raman 2D-peak, located at ~2700 cm-1. This peak was

also historically referred to as the G’-peak [99]. But rather than the doubly degenerate E2g

phonons, this peak occurs due to a double resonance of zone boundary phonons. This has led to

most modern discussion referring to this peak as 2D to more accurately reflect its underlying

mechanism [104]. The 2D-peak is of particular significance when characterizing graphene films

because its width, intensity, and shape is highly dependent on the number of graphene layers

present. In bulk graphite, the 2D-peak is typically only approximately half the intensity of the G-

peak and is made up of several components. But as the number of layers decreases and the

electronic structure simplifies, the 2D-peak narrows to a strong, symmetrical peak that is several

times the intensity of the G-peak. This is accompanied by a downward shift in peak position of

approximately 50 wavenumbers for exfoliated graphene.

28

Figure 2-15: Comparison of Raman spectra of bulk graphite and monolayer graphene. Compared to bulk

graphite, the Raman signal of graphene shows a substantial increase in the relative intensity of the 2D-peak,

as well as substantial narrowing; in monolayer graphene, the 2D-peak is symmetric and can be fit by a

single Lorentzian. Figure adapted from Reference [104].

The combination of defect quantification and thickness estimation in a single

characterization technique has led to Raman spectroscopy becoming one of the most frequently

used tools in current graphene research [62,81,93]. Furthermore, Raman has been demonstrated to

provide quantitative information on graphene doping [106] and strain [107,108], further

increasing its utility in characterizing graphene films.

2.5 Materials Integration

In addition to research on graphene itself, a large amount of work has focused on the

ability to integrate graphene with other materials, with the obvious end-goal of demonstrating

useful graphene devices. Two of the primary research areas for graphene transistor production are

the formation of ohmic contacts and the integration of high-quality dielectric materials.

29

2.5.1 Ohmic Contacts to Graphene

The formation of low resistance ohmic contacts is of paramount importance in the

fabrication of any practical transistor. In conventional semiconductor production, low contact

resistance is produced by a combination of several well-studied factors: Proper selection of

contact metal or silicide, sufficient doping levels of the underlying semiconductor, and optimized

processing to minimize surface states due to impurities, dangling bonds, and interfacial layers

[39]. But conventional theory is not easily applied to graphene due to its unique band structure

and lack of reliable doping methods, making the formation of low resistance ohmic contacts a

subject of considerable current research focus.

Metal-graphene interaction has been studied both theoretically and experimentally, with

mixed results. Density functional theory (DFT) studies have varied dramatically on the predicted

strength of binding between graphene and various metals and the subsequent doping and

influence on graphene band structure as a result of work function differences [109–112].

Furthermore, theoretical studies of graphene-metal do not account for the polycrystalline nature

of the metal in practical devices, nor do they take into consideration the influence of impurity

atoms trapped on the graphene surface. Experimental study of graphene-metal interfaces has

shown wide variation in the interaction distance, even for single-crystal metals meant to provide a

simplified case study [113]. Recent study of Al, Cu, Ni, Pd, and Ti contacts to graphene has

shown no clear relationship between metal work function and contact resistance, demonstrating

that the process used to deposit the contacts may be of much greater influence on contact

resistance than the metallization itself [114].

In addition to study of contact metallizations, various groups have investigated means by

which to minimize impurities at the metal-graphene interface, such as residual photoresist. In

traditional semiconductor fabrication, an oxygen plasma treatment is used to remove residual

photoresist after developing. However, oxygen plasmas can also damage the underlying graphene

films, complicating their use in removing resist residues [115]. Nonetheless, previous work has

30

shown that by careful control of the plasma time, specific contact resistance ρc can be reduced by

three orders of magnitude (from ~3x10-4 to ~4x10-7 Ω-cm2) over devices with no plasma

treatment [114]. By adding a brief contact anneal following metal deposition, specific contact

resistance was further reduced to ~7.5x10-8 Ω-cm2, illustrating the strong influence of processing

conditions on ohmic contact resistance in graphene devices. This improvement is shown in

Figure 2-16.

Figure 2-16: Effects of oxygen plasma pre-treatment and post-metal contact anneals on specific contact resistance of graphene devices. Increasing etch time initially improves contact resistance as more resist

residue is removed. But at longer etching increasingly damages the underlying graphene, resulting in an

increase in ρc above 90 seconds of plasma treatment. Figure adapted from Reference [114].

2.5.2 Dielectric Integration

Another main area of focus for graphene research is the integration of dielectric materials

for field-effect devices. Because of graphene’s unique structure and sensitivity to the surrounding

environment, proper selection of substrate and gate dielectric materials is critical for development

of high performance graphene transistors. Research on dielectric integration can be categorized

into three main groups: Theoretical work on scattering from various dielectrics, experimental

31

work on deposition of high-k dielectrics on graphene, and development of hexagonal boron

nitride (h-BN) as a lattice matched substrate and/or dielectric for graphene.

Most early graphene research (and a large majority to date) utilized a silicon wafer with a

thin (~300 nm) SiO2 layer as the substrate [26,27,29,46,104]. Oxidized silicon is inexpensive and

readily available, allows for identification of few-layer graphene flakes by optical microscopy

[57], and allows for back-gating of graphene devices, eliminating the need for a top-gate or

allowing for double-gated devices [116]. A thin (<50 nm) evaporated layer of SiO2 can also be

used as a top-gate dielectric, resulting in a graphene channel layer sandwiched between two SiO2

regions of different thicknesses [116,117]. While devices on SiO2 remain common for physics

studies, work in high-frequency devices has already moved towards high-k materials, similar to

silicon microelectronics [18].

Theoretical work on the influence of dielectric materials, described in detail in Section

2.2.3, has identified two different mechanisms by which polar dielectrics can influence graphene

transport – screening of impurities at the graphene interfaces (which serves to increase mobility),

and scattering due to surface optical phonon (SOP) modes (which serve to degrade mobility).

These studies identified that high-k dielectrics such as HfO2 can more effectively screen charged

impurities, providing a performance boost over SiO2 [48]. However, high-k dielectrics also tend

to have lower energy SOP modes, which results in greater SOP scattering than SiO2. This effect

becomes more pronounced at high carrier concentrations, which is problematic for the operation

of devices at a high doping level in order to achieve high drive current. This effect is shown in

Figure 2-17. According to Konar et al., “The ideal dielectrics would be those that possess both

high static dielectric constants and high phonon energies that are not activated in low-field

transport [48].”

32

Figure 2-17: Carrier mobility as a function of dielectric constant. While high-k dielectrics are extremely

effective at screening charged impurities, their increased SOP scattering effectively negates the potential

performance boost. Figure adapted from [48].

Efforts to incorporate high-k dielectrics with graphene devices have largely focused on

the difficulty of forming a high-quality oxide without significantly damaging the underlying

graphene. This difficulty is a result of the incompatibility of atomic layer deposition (ALD) – a

common technique for depositing high-quality oxides in conventional semiconductor fabrication

– with graphene due to its hydrophobic nature and lack of dangling bonds [118]. ALD relies on

the deposition of reactive precursor species either by physisorption or by rapid dissociative

chemisorption, neither which occur readily on the surface of a pristine graphene film. Figure

2-18 illustrates the poor coverage that occurs when attempting to deposit a high-k dielectric by

ALD directly on the graphene surface. Several methods have been demonstrated to allow for the

use of ALD with graphene, including functionalization of the graphene by acids or organics

[118], spin-coating of an organic polymer “buffer layer” prior to oxide deposition [119], or

33

evaporation of an ultrathin (1-2 nm) metal or oxide seed layer, immediately followed by ALD of

the high-k dielectric [50,120]. The use of a homogeneous stack (e.g. evaporated HfO2 followed

by ALD HfO2) has been shown to be particularly promising, with no measurable degradation of

the underlying graphene and considerable increase in carrier mobility and device performance as

a result of the increased dielectric screening of the HfO2 [50].

Figure 2-18: AFM imaging of graphene flakes on oxidized silicon before and after low-temperature atomic

layer deposition of aluminum oxide. Due to graphene’s hydrophobic nature and lack of dangling bonds,

nucleation of Al2O3 only occurs on the edges of the graphene flakes and on topological defects resulting in

little or no coverage across the majority of the graphene surface. Figure adapted from Reference [118].

The final area of materials integration research focuses on the use of hexagonal boron

nitride as both the substrate and dielectric overlayer in graphene devices. Because h-BN is a two-

dimensional material and has no dangling bonds, it is predicted to provide a higher quality

interface with graphene than traditional three-dimensional materials [31]. Furthermore, DFT

calculations predict that a lattice-matched graphene/h-BN stack would open a band gap of 53

meV in the graphene film, substantially improving the on-off ratio and saturation behavior of

graphene transistors [121]. Boron nitride also possesses high energy SOP modes, which would

introduce minimal scattering compared to other candidate dielectrics. Initial demonstrations of

34

graphene/h-BN integration relied on one or more layer transfer processes similar to what has been

used for integration of graphene with arbitrary substrates, but later work successfully integrated

the two materials by CVD of polycrystalline h-BN on epitaxial graphene [32] as well as direct

epitaxy of graphene on h-BN by way of plasma-enhanced CVD [122]. Subsequent device

characterization has shown promising device behavior, including minimal degradation of

mobility and increased cutoff frequency when compared to devices with HfO2 as the gate

dielectric, bolstering the case for h-BN as a promising dielectric for use with graphene devices.

35

Chapter 3: Experimental Methods

This section describes the various methods used to synthesize and characterize graphene,

transfer graphene sheets to insulating substrates, and fabricate electrical devices for testing. It also

describes the various electrical testing methods used for evaluation of the properties of the

graphene devices and the theoretical modeling used to explain observed transport behavior.

3.1 Graphene Synthesis

Several different graphene synthesis processes were used throughout this work. Early

experiments utilized a hydrogen/methane source gas similar to previous work by the author [123],

while later experiments included the addition of argon to the source gas as a result of continued

optimization and other work published in the literature. These processes are described in detail in

sections 3.1.2 and 3.1.3, respectively.

3.1.1 Equipment

All graphene synthesis was conducted using an MTI Corporation OTF-1200X split-hinge

vacuum tube furnace and flows of ultrahigh purity (99.999%) argon, hydrogen, and methane.

System vacuum was produced by an oil-sealed rotary vane pump, with pressure measured by a

capacitance manometer and regulated by a downstream throttling valve. The experimental setup

is shown schematically in Figure 3-1.

36

Figure 3-1: Schematic representation of the experimental setup used for graphene synthesis, showing

source gas lines, mass flow controllers, vacuum tube furnace, vacuum gauge, downstream throttling valve,

sorbent trap, and vacuum pump.

3.1.2 Early Growth Process

Early experiments on freestanding copper foils utilized a growth process identical to

previous work by the author and similar to other previous publications, with a source gas

composed solely of hydrogen and methane [81,123]. As illustrated in Figure 3-2, samples were

annealed at 1000 °C for 30 minutes under a hydrogen flow of 30 standard cm3 per minute (sccm)

to remove copper oxide and allow for copper grain growth. Following annealing, 150 sccm of

methane was introduced for 10 minutes for graphene synthesis. To terminate graphene growth,

the samples were rapidly cooled by withdrawing them from the hot zone of the furnace. The

system was then allowed to cool to room temperature under hydrogen/methane flow before

venting to atmosphere and unloading of samples. System pressure was maintained at 1 Torr for

the duration of the growth process.

37

Figure 3-2: Growth profile for graphene synthesis on freestanding copper foils using a hydrogen/methane

source gas. Samples are annealed in hydrogen at 1000 °C for 30 minutes, followed by the addition of

methane for a 10 minute growth period.

In addition to freestanding copper foils, graphene synthesis was carried out on evaporated

copper thin films on various substrates (described in Section 3.1.4.2). Growth on thin copper

films utilized a similar process to growth on freestanding foils. However, pre-growth annealing to

achieve copper grain growth was carried out at a lower temperature – typically 700 °C – to

minimize copper evaporation that occurs at high temperature. Excessive exposure to high

temperatures can result in formation of voids in the copper film and decomposition of the film

into islands. This effect has been utilized in an attempt to achieve direct deposition of graphene

on insulating substrates [124], but has not been demonstrated to be useful for producing

continuous, high-quality graphene for device fabrication. Thus, time spent at the growth

temperature was kept to a minimum, as shown in Figure 3-3. Following annealing, the

temperature was then ramped to 1000 °C and allowed to equilibrate for 5 minutes before the

addition of the methane flow for graphene growth. All other aspects of the growth process,

including gas flows, total system pressure, and cool-down procedure, were identical to those

described in Section 3.1.2.

38

Figure 3-3: Growth profile for graphene synthesis on evaporated copper thin films using a

hydrogen/methane source gas. Samples are annealed for 30 minutes at 700 °C before ramping to the growth

temperature and introduction of methane.

3.1.3 Modified Growth Process

For later graphene device experiments, the graphene synthesis process was modified to

reflect recently published research on improving the quality of synthesized graphene [85,87,89].

This included the addition of argon to the source gas to allow for a reduction in the partial

pressures of both hydrogen and methane, as well as a lengthening of the growth time from 10

minutes to 15 minutes. In this growth process, freestanding copper foils were annealed at 1000 °C

for 30 minutes under a gas flow of 180 sccm argon and 20 sccm hydrogen, followed by a 15-

minute growth under flow of 120 sccm argon, 20 sccm hydrogen, and 60 sccm methane. The

growth process is shown in Figure 3-4. This growth process was utilized for all samples

discussed in Sections 4.3-5.1.3.

39

Figure 3-4: Growth profile for graphene synthesis on freestanding copper foils using an

argon/hydrogen/methane source gas.

3.1.4 Substrate Preparation

3.1.4.1 Freestanding Copper Foils

Commercially available copper (Cu) foils (Alfa Aesar, part 13382) were subjected to a

simple organic solvent clean, consisting of a 15-minute soak in heated acetone, followed by

rinsing in isopropyl alcohol (IPA) and deionized water. The foils were then immersed in a heated

solution of 10% acetic acid for 10 minutes to remove copper oxide on the sample surface [93],

followed by another deionized water rinse. The samples were blown dry with nitrogen and

immediately loaded into the vacuum chamber for growth.

3.1.4.2 Copper Thin Films on Rigid Substrates

Graphene synthesis was also carried out on copper thin films deposited onto rigid

substrates in order to evaluate their thermal stability and the effect on the quality of synthesized

graphene. The baseline configuration for growth on thin copper films was a 500 nm Cu film

deposited on oxidized silicon by electron beam evaporation at room temperature and 10-6 Torr. In

addition, two thin film diffusion barrier configurations were evaluated in this study – one utilizing

40

a metallic diffusion barrier layer added between the copper film and the SiO2 (i.e. Cu/metal

barrier/SiO2/Si) and one utilizing an insulating barrier layer in place of the SiO2 (i.e.

Cu/insulating barrier/Si). The latter configuration was chosen for two reasons: 1) It represents a

limiting case for diffusion and 2) It would provide improved electrostatic coupling between the

graphene and silicon back gate for device testing.

Metal barrier layers (Ni, Cr, W) were deposited onto an oxidized silicon wafer by

electron beam evaporation at room temperature and 10-6 Torr, immediately followed by a 500 nm

layer of copper. Insulating barrier layers were deposited directly onto silicon wafers by

techniques as appropriate for the given material; silicon nitride (SiNx) was deposited by plasma-

enhanced chemical vapor deposition at 300 °C from an SiH4/NH3/N2 mixture, and aluminum

oxide (Al2O3) and hafnium oxide (HfO2) were deposited by atomic layer deposition as described

elsewhere [50,120], each immediately followed by e-beam evaporation of the 500 nm Cu film.

Nickel barrier layers of 5, 10, 20, and 50 nm were evaluated, while all other barrier layers were

tested at a thickness of 50 nm. For comparison of another material system, the use of a copper

film deposited directly on a single-crystal sapphire wafer was also investigated. Table 3-1

provides a summary of all sample configurations evaluated in this work.

41

Table 3-1: Summary of various sample configurations tested during barrier layer studies.

Sample configuration Copper thickness

Barrier layer deposition technique

Barrier layer thickness (nm)

Freestanding copper foil 25 µm N/A N/A

Cu/Ni/SiO2/Si 500 nm E-beam evaporation 5

Cu/Ni/SiO2/Si 500 nm E-beam evaporation 10

Cu/Ni/SiO2/Si 500 nm E-beam evaporation 20

Cu/Ni/SiO2/Si 500 nm E-beam evaporation 50

Cu/Cr/SiO2/Si 500 nm E-beam evaporation 50

Cu/W/SiO2/Si 500 nm E-beam evaporation 50

Cu/Si3N4/Si 500 nm Plasma-enhanced CVD 50

Cu/Al2O3/Si 500 nm Atomic layer deposition 50

Cu/HfO2/Si 500 nm Atomic layer deposition 50

Cu/sapphire 500 nm N/A N/A

3.2 Graphene Layer Transfer

After synthesis on freestanding copper foils, graphene films were transferred to insulating

substrates using a wet transfer process similar to that described in literature [91,92]. First,

samples were spin coated with poly-methyl methacrylate (PMMA) (MicroChem 950,000

molecular weight, 3% in anisole) to provide mechanical support and protect the graphene film

during transfer. Next, the back side of the copper foil was exposed to a brief oxygen plasma to

remove any graphene that may have formed there during synthesis. This step is critical for ease of

etching the copper substrate, as any backside graphene will protect the copper foil and drastically

increase the time required to fully etch the copper away [81]. Details of this plasma treatment are

provided in Appendix A.1. Finally, the PMMA/graphene/copper samples were placed in a ferric

chloride etchant solution (Transene Copper Etchant Type 100) for 15 minutes to completely

remove the underlying copper, resulting in a freely floating PMMA/graphene film. For

comparison, samples were also etched using dilute nitric acid and ammonium persulfate, as have

been used in other work on CVD graphene [86,125,126]. The results of this comparison are

discussed in Section 4.3.1.

After etching of the underlying copper, the PMMA/graphene films were transferred to a

deionized water bath for fifteen minutes to remove residual ferric chloride from the sample. Next,

42

the films were transferred to a 10% hydrochloric acid solution to more aggressively remove any

residual iron atoms, similar to cleaning processes reported in literature [127]. The films were then

transferred to another deionized water bath for fifteen minutes before being withdrawn onto the

desired target substrate – oxidized silicon, single crystal sapphire, or epitaxially grown gallium

nitride on sapphire. The graphene-on-insulator samples were then baked on a contact hot plate for

30 minutes at 50 °C to drive off water trapped at the graphene/substrate interface, followed by a 5

minute bake at 120 °C to further drive off water and improve adhesion. Finally, samples were

soaked in heated acetone for 30 minutes to strip the PMMA layer, rinsed with IPA, and blown dry

with nitrogen. The full graphene transfer process is shown schematically in Figure 3-5.

Figure 3-5: Schematic representation of graphene layer transfer from copper foil to an arbitrary insulating

substrate. Figure adapted from Reference [91].

Following graphene layer transfer, the graphene-on-insulator samples were annealed in a

hydrogen atmosphere for 2 hours at 500 °C to remove any residual PMMA from the sample

surface. This step has been previously shown to be critical for removal of all PMMA residues, as

43

acetone is considered a weak resist stripping agent [91]. After annealing, samples were

characterized and processed into test structures for electrical measurements.

3.3 Materials Characterization

Materials characterization formed an important portion of this work, allowing for the

evaluation of various processing techniques and providing information to help explain observed

device behavior. Raman spectroscopy served as the primary technique for evaluating the

structural quality of graphene films, providing quantitative information on defect density and

number of graphene layers. Scanning electron microscopy (SEM) and transmission electron

microscopy (TEM) were utilized to provide high-resolution of surfaces and interfaces, both of as-

grown graphene and post-processed devices. TEM imaging was also coupled with energy-

dispersive x-ray spectroscopy (EDS) to allow for spatially resolved elemental analysis during

imaging. Additionally, Auger electron spectroscopy (AES) and x-ray photoelectron spectroscopy

(XPS) were used to evaluate the surface chemistry of as-grown and processed graphene films to

identify and quantify the presence of impurities and contaminants.

3.3.1 Raman Spectroscopy

Raman spectroscopy was used to evaluate graphene crystalline quality and layer

thickness, both following growth and during processing. All Raman spectra were taken using a

Witec CRM-200 confocal Raman microscope paired with a 488-nm argon ion laser, providing a

lateral resolution of 490 nm when using a 40x objective and 325 nm when using a 100x objective.

All spectra were taken using a laser power of 50 mW, which was sufficiently low to avoid

thermally induced damage to the graphene films.

When characterizing as-grown graphene on copper substrates, fluorescence of the

underlying copper results in a broad background signal that prevents direct observation and

comparison of the graphene peaks. The Witec Project software provides a built-in tool for

44

background subtraction, which fits up to a 9th-order polynomial to Raman signal and subtracts

that polynomial from the overall signal. By masking the regions containing the graphene peaks

from the fitting algorithm, the polynomial can be fit to the background signal, allowing for the

isolation of the graphene signal. This process is shown in Figure 3-6. Following background

subtraction, Raman data were exported to Excel for quantitative analysis.

Figure 3-6: Background subtraction from Raman spectra of graphene on copper. Fluorescence of the

copper substrate results in a strong background signal (a). By fitting a polynomial to all data points except

those within the Raman D-, G-, and 2D-peaks (b), the background signal can be subtracted. This provides

the clear Raman signal of the graphene itself, which can be used for peak intensity calculations and defect

density quantification (c).

45

3.3.2 Scanning Electron Microscopy

Scanning electron microscopy (SEM) is a high-resolution imaging technique that

provides complementary information to conventional optical microscopy. In SEM imaging, a

concentrated electron beam is rastered across a sample surface, and the electrons emitted from the

sample surface are collected and counted. For topological imaging, collection is limited to

secondary electrons – low-energy electrons that are ejected from the sample when the incident

electrons are inelastically scattered [98]. All images were taken at high vacuum (<10-5 Torr) using

a Leo 1530 Field-Emission Scanning Electron Microscope.

3.3.3 Transmission Electron Microscopy

Transmission electron microscopy (TEM) is another imaging technique that relies on a

high-energy electron beam as the means of sample interrogation. In this technique, the high-

energy electron beam is focused on a sample typically less than a few hundred nanometers in

thickness. This allows for the formation of an image from transmitted electrons, rather than

reflected or emitted electrons as are used with SEM. This provides TEM with unrivaled spatial

resolution, with many TEM systems capable of imaging features at an atomic scale. By

combining various imaging modes – bright-field (BF), high-angle annular dark-field (HAADF),

diffraction, scanning TEM (STEM) – with spectroscopic techniques such EDS, TEM can provide

information on crystallinity, microstructure, chemical composition, and interface quality [98].

Samples for TEM imaging were prepared by mounting two samples face-to-face, dicing

with a diamond saw, and mounting to a copper TEM grid. Samples were then mechanically

polished to ~25 μm thick, center dimpled to ~10 μm, and ion milled to electron transparency. All

TEM images were taken with a JEOL EM-2010F Field-Emission TEM/STEM, which has a

Scherzer resolution limit of 1.9 Å [98].

46

3.3.4 Auger Electron Spectroscopy

Auger electron spectroscopy (AES) is an elemental characterization technique that is

useful for its combination of both surface sensitivity and lateral resolution. AES, like SEM, uses a

concentrated electron beam to stimulate the emission of electrons from the sample surface.

However, instead of collecting the secondary electrons that are ejected by inelastic scattering

from the incident electrons, AES captures electrons emitted due to the Auger effect. These

electrons are released during internal relaxation events, where an electron from an outer shell

relaxes into a core shell, releasing energy by ejecting another outer shell electron (Figure 3-7). A

plot of emitted electron count as a function of their kinetic energy forms the Auger spectrum for a

given sample, providing elemental composition as well as some bonding information. Because

the emitted electrons have very low kinetic energy, only those electrons emitted from very near

the sample surface can escape, giving AES a surface sensitivity of less than 10 nm [98]. When

coupled with ion milling, this technique can also be used to provide depth profiling, though that

capability was not utilized in this work.

47

Figure 3-7: Schematic representation of Auger electron emission from undoped silicon, showing a KLL

and LVV transition. Figure adapted from Reference [98].

3.3.5 X-ray Photoelectron Spectroscopy

X-ray photoelectron spectroscopy (XPS) is another surface characterization technique

used for the identification of chemical composition and bonding state. XPS uses a concentrated

beam of monochromatic x-rays to eject electrons from the sample atoms by the photoelectric

effect [98]. By measuring the kinetic energy of emitted electrons with a high resolution

spectrometer and calculating their binding energy, the elemental composition and bonding state

of the sample can be determined. Because these electrons possess low kinetic energy and have a

short escape length, XPS provides similar surface sensitivity to AES – approximately 1-10 nm,

depending on the sample [98]. Unlike AES, however, XPS is not typically used in situations

where lateral resolution is required; the spot size of typical x-ray sources ranges from ~5-50 µm,

making XPS a technique more commonly used for general surface chemical analysis, rather than

spot analysis or composition mapping.

48

All XPS spectra were collected at ultrahigh vacuum (<10-9 Torr) using a Kratos Analytic

Axis Ultra XPS system with an aluminum k-α x-ray source. This corresponds to an x-ray energy

of ~1.49 keV and provides a lateral resolution of approximately 15 µm. XPS was used to identify

impurity atoms following graphene layer transfer and evaluate the various chemical etchants and

cleaning techniques during the transfer process.

3.4 Device Fabrication

Following graphene layer transfer, test structures and field-effect devices were fabricated

using standard semiconductor processing techniques, including photolithography, reactive ion

etching, metal deposition and liftoff, and atomic layer deposition. The device fabrication process

is shown schematically in Figure 3-8 and detailed in Sections 3.4.1-3.4.5. All lithography was

performed using a GCA 8000 i-line stepper and a bilayer photoresist stack, developed in

Microposit MF CD-26 developer. The bilayer resist stack was used primarily for ease of metal

liftoff during contact deposition steps, but the use of the same resist stack throughout processing

was chosen for repeatability. Details of lithographic processing are contained in Appendix A.2.

49

Figure 3-8: Schematic representation of the graphene device fabrication process.

3.4.1 Isolation Etch

The first processing step was the isolation of graphene active regions. After lithographic

patterning, a brief oxygen plasma was used to remove graphene in exposed areas. The isolation

etch was performed using a Plasma-Therm 720 SLR Reactive Ion Etch tool, operated at 75 W for

2 minutes. System pressure was maintained at 20 mTorr under a gas flow of 90 sccm O2 and 10

sccm Ar. Following the isolation etch, samples were stripped of resist by a 15-minute soak in J.T.

Baker PRS-3000 at 90 °C and a 2-minute soak in IPA, then blown dry with N2.

3.4.2 Source/drain Contact Deposition

Following graphene isolation, source and drain contacts were deposited by electron-beam

physical vapor deposition (EBPVD). After lithographic patterning, samples were exposed to a

low-power O2 descum to remove photoresist residues that remained after resist developing.

Because graphene is susceptible to damage by oxygen plasma, optimization of the pre-deposition

plasma is critical for achieving low contact resistance. The pre-deposition descum was performed

50

using a TePla M4L RF Plasma System for times ranging from 15-120 seconds. Several system

pressures between 400 and 1000 mTorr were tested under flows of 150 sccm O2 + 50 sccm He.

After the plasma descum, samples were loaded into a Kurt J. Lesker Lab 18 PVD system

for metal deposition. After ensuring that the deposition chamber was evacuated to less than 10-6

Torr, a 10 nm layer of titanium was deposited, immediately followed by a 100 nm layer of gold.

After sample unloading, resist stripping/metal liftoff was achieved by soaking in heated PRS-

3000 and gentle spraying. Liftoff was followed by an IPA rinse and N2 blow dry.

3.4.3 Dielectric Deposition

After source/drain contact deposition, a 20 nm layer of HfO2 was deposited over the

entirety of the samples by a combination of EBPVD and atomic layer deposition (ALD) [50].

Because ALD does not nucleate uniformly on graphene, a seed layer is necessary to achieve a

dielectric layer free of pinholes. A 2 nm seed layer was first deposited by EBPVD in a Kurt J.

Lesker Lab 18 PVD system from a solid HfO2 seed. Samples were then immediately loaded into a

Cambridge Savannah 200 ALD system for further deposition. An additional 18 nm of HfO2 (for a

total of 20 nm) was deposited by alternating pulses of tetrakis (dimethylamino) hafnium and

water vapor with the sample stage held at a temperature of 250 °C.

3.4.4 Pad Open Etch

Because the dielectric covers the entire sample, windows must be etched in the HfO2

overlayer to allow contact to the metal source/drain pads. After developing the pad open resist

mask, samples were subjected to a CF4/CHF3 plasma in an Applied Materials P5000 Magnetically

Enhanced Reactive Ion Etch (MERIE) tool. Samples were etched for 6 minutes under a plasma

power of 69 W and gas flows of 30 sccm CF4 and 45 sccm sccm CHF3. Following etching,

samples were stripped by heated PRS-3000, rinsed with IPA, and blown dry with N2.

51

3.4.5 Gate Deposition

After dielectric deposition and pad open etch, gate contacts were deposited by the same

process as source and drain contacts. After developing of the photoresist mask, samples were

exposed to a 60 second plasma descum before e-beam deposition of 10 nm titanium and 100 nm

gold. Samples were then unloaded and cleaned in heated PRS-3000 for resist stripping and metal

liftoff, rinsed in IPA, and blown dry using N2.

3.5 Device Testing

3.5.1 Contact Resistance Measurements

Determination of contact resistance and specific contact resistivity was achieved by way

of the transfer length method (TLM). In TLM measurements, semiconductor resistors of varying

lengths are fabricated (Figure 3-9), and the total resistance (Rtot) between adjacent contacts is

measured and plotted as a function of metal pad spacing (d). By plotting Rtot versus d and

applying a linear fit to the measured resistances, TLM measurements can be used to extract the

sheet resistance (Rsh), contact resistance (Rc), transfer length (LT), and specific contact resistivity

(ρc) (Figure 3-10).

Figure 3-9: Structure for contact resistance determination by the transfer length method. Figure adapted

from Reference [128].

52

Figure 3-10: Plot of TLM measurements for determination of contact resistance, transfer length, sheet

resistance, and specific contact resistivity.

Direct current (DC) measurements were performed using a Keithley SCS-4200

Semiconductor Characterization System paired with a Karl Suss PM8 manual probe station.

Graphene resistors ranging in length from 2-15 µm (Figure 3-11) were measured using a four-

point, two-terminal Kelvin probe setup, which eliminates the need to account for the resistance of

electrical test leads. The total resistance Rtot can then be described by the relation

𝑅𝑡𝑜𝑡 = 𝑅𝑠ℎ ∗𝑑

𝑊+ 2𝑅𝑐 , ( 3-1 )

where Rsh is the graphene sheet resistance in ohms/square, d is the graphene resistor length, W is

the graphene resistor width, and Rc is the contact resistance in ohms [128]. Because Rtot varies

linearly with resistor spacing, plotting Rtot as a function of d and applying a linear fit allows for

simple derivation of key resistance parameters. The slope of a linear fit is equal to Rsh/W, while

the y-intercept is equal to twice the contact resistance. Furthermore, extrapolation of the linear fit

to Rtot = 0 yields a negative resistor length that is equal to twice the transfer length (LT). The

transfer length is defined as the distance at which the voltage difference across the metal-

semiconductor interface (ΔV) drops to 1/e times the voltage difference at the contact edge (ΔV0),

53

according to the relation

∆𝑉(𝑥) = ∆𝑉0 exp (−𝑥

𝐿𝑇) ( 3-2 )

This value represents the area through which the majority of the current flows and is used for

calculation of the specific contact resistivity (ρc) according to the relation

𝜌𝑐 = 𝑅𝑠ℎ(𝐿𝑇)2 . ( 3-3 )

Figure 3-11: Optical image of TLM structures tested in this work.

Because specific contact resistivity is extremely sensitive to the condition of the metal-

semiconductor interface, it serves as an ideal metric for evaluation of the quality of ohmic

contacts to graphene. It should be noted, however, that the previous analysis relies on several

important conditions. First, the transfer length method is valid only when the semiconductor sheet

resistance under the metal contact is the same as the area between contacts. This is of particular

concern when a plasma pretreatment is used to remove photoresist residue prior to contact

deposition (see Section 3.4.2), because the graphene underneath the metal contacts is more

defective than the pristine device regions. Thus, if the plasma pre-treatment increases the

graphene sheet resistance under the contact, TLM measurements will overestimate the transfer

54

length and specific contact resistivity. Additionally, Equation Error! Reference source not

found. is a valid approximation only in the case of electrically “long” contacts, where L ≥ 2LT.

For this work, calculated transfer lengths are on the order of 1-2 µm while the contact length is 10

µm, making the long contact approximation valid with an error of less than 0.1% [128].

3.5.2 Sheet Resistivity and Hall Testing

Substrate effects on charge carrier density and mobility were achieved by a combination

of resistivity and Hall effect measurements, described below.

3.5.2.1 Van der Pauw Method

The Van der Pauw method provides a robust formulation for the measurement of the

sheet resistance of a semiconductor sample of arbitrary shape with four electrical contacts formed

along the sample periphery (Figure 3-12). By sourcing a current between contacts 1 and 2 (I12)

and measuring the voltage across contacts 3 and 4 (V34), a “Van der Pauw” resistance R12,34 can be

defined by the relation

𝑅12,34 =𝑉34

𝐼12 . ( 3-4 )

The sheet resistance of the sample can then be defined as

𝑅𝑠ℎ =𝜋

ln(2)(𝑅12,34+𝑅23,41

2)𝐹 , ( 3-5 )

where R23,41 is measured in the same manner and F is a correction factor that is a function only of

the ratio Rr = R12,34/R23,41. For symmetrical square, cloverleaf, or cross samples in which Rr ≈ 1,

the correction factor also reduces to 1. In order to correct for non-uniformity of the metal-

semiconductor contacts and thermoelectric voltages, the resistance is measured in all possible

orientations and polarities, then averaged:

𝑅𝑠ℎ =𝜋

ln(2)(𝑅12,34+𝑅23,41+𝑅34,12+𝑅41,23+𝑅43,21+𝑅32,14+𝑅21,43+𝑅14,32

8) ( 3-6 )

55

Figure 3-12: Configuration for measurement of the sheet resistance of an arbitrarily shaped semiconductor

sample using a four-terminal Van der Pauw measurement. Figure adapted from Reference [128].

3.5.2.2 Hall Effect

Following sheet resistance measurements, sheet carrier density and Hall mobility were

determined by use of Hall effect measurements, a common technique in semiconductor

characterization [39]. In Hall effect measurements, a direct current (Ix) is passed through a

semiconductor sample in the presence of a perpendicular magnetic field (Bz) (Figure 3-13). The

Lorentz force on charge carriers passing through the semiconductor sample results in the

accumulation of charge along one edge of the sample. By measuring the resulting Hall voltage

(VH), the majority carrier type, sheet carrier density, and Hall mobility can be calculated from

known device dimensions and measurement parameters.

56

Figure 3-13: Schematic representation of Hall effect measurement for a rectangular semiconductor sample.

A direct current Ix is applied to the sample in the presence of a perpendicular magnetic field, Bz. This results

in an electric field perpendicular to both the applied current and magnetic field, which can be measured as

the Hall voltage VH.

Because no current can flow in the y-direction, the Lorentz force must be exactly

balanced by the induced electric field force. For a p-type sample (and assuming p>>n), the Hall

voltage can be defined by the relation

𝑉𝐻 =𝐼𝑥𝐵𝑧

𝑒𝑝𝑑 , ( 3-7 )

where Ix is the applied current, Bz is the applied magnetic field, e is the fundamental charge

(1.602x10-19 C), p is the volumetric carrier concentration, and d is the sample thickness. This

equation can easily be rearranged to solve for the sheet carrier density psh:

𝑝𝑠ℎ =𝐼𝑥𝐵𝑧

𝑒𝑉𝐻 ( 3-8 )

Similarly, this analysis can be applied to n-type material, in which the measured Hall voltage will

be negative:

𝑛𝑠ℎ = −𝐼𝑥𝐵𝑧

𝑒𝑉𝐻 ( 3-9 )

Following the calculation of sheet carrier density, the majority carrier mobility can be calculated

by rewriting the relations for hole and electron drift current:

57

𝜇𝑝 =1

𝑒𝑝𝑠ℎ𝑅𝑠ℎ ( 3-10 )

𝜇𝑛 =1

𝑒𝑛𝑠ℎ𝑅𝑠ℎ ( 3-11 )

It should also be noted that Hall mobility and conductivity mobility are not one and the

same; the previously derived equations rely on the assumption of energy-independent scattering,

which is rarely achieved in Hall effect measurements. The Hall mobility is thus related to the

conductivity mobility by the relation 𝜇𝐻𝑎𝑙𝑙 = 𝑟 ∗ 𝜇𝑐𝑜𝑛𝑑 , where r is the Hall scattering factor.

This scattering factor is a function of the dominant scattering mechanism and ranges from r=1 for

neutral impurity scattering to r=1.93 for charged impurity scattering [128].

3.5.2.3 Measurement Procedure

All resistivity and Hall measurements in this work were performed using a 5 µm x 5 µm

Van der Pauw cross structure, shown in Figure 3-14. The sheet resistance was first determined by

the Van der Pauw method for devices on all three substrates (SiO2, Al2O3, and GaN). Sheet

carrier density and Hall mobility were then determined by Hall effect measurements, allowing for

direct comparison of doping effects and scattering as a function of substrate. Testing was also

carried out from 5-400K to evaluate temperature-dependent phenomena.

58

Figure 3-14: Optical micrograph of a 5 µm x 5 µm Van der Pauw cross.

All resistivity and Hall effect measurements were performed at high vacuum using a

Lakeshore CPX-VF Cryogenic Probe Station, which is capable of variable magnetic field

operation of up to 25 kG (2.5 T). Prior to measurement, samples were annealed at 400K for one

hour to drive off adsorbates from the sample surface and eliminate extrinsic doping of the

graphene device regions. All sheet resistivity and Hall effect measurements were executed using a

10 µA direct current source. Hall effect measurements were performed at magnetic fields of +10

kG and -10 kG, then averaged together for final calculations of sheet carrier density and Hall

mobility.

3.6 Transport Modeling

In addition to experimental measurements, theoretical modeling was employed to explain

observed transport behavior. Theoretical formulations for scattering rates due to graphene

longitudinal acoustic (LA) and longitudinal optical (LO) phonons, charged impurities, and

surface optical phonons of adjacent dielectric layers were adapted from relevant literature and fit

to measured mobility data. Modeling was then used to provide projections of charge carrier

59

mobility in graphene as a function of temperature, sheet carrier density, and charged impurity

density for a variety of substrates. Complete MATLAB scripts used in this work are provided in

Appendix B.

3.6.1 Graphene LA and LO Phonon Scattering

The primary scattering mechanisms intrinsic to graphene result from the LA and LO

phonon modes. These scattering mechanisms are particularly relevant during high-field transport,

but also have a finite contribution to scattering during low-field transport near room temperature

[47]. The scattering rate from LA phonons (Sac) is described by the relation

𝑆𝑎𝑐 =1

𝜏𝑎𝑐(𝑘)=

𝐷𝑎𝑐2 𝑘𝐵𝑇

2ℏ3𝑣𝐹2𝜎𝑚𝑣𝑝

2 × 𝐸𝑘 , ( 3-12 )

where Dac is the graphene acoustic deformation potential, kB is the Boltzmann constant (1.38x10-

23 J/K), T is the temperature, ℏ is the reduced Planck constant (1.055x10-34 J-s), vF is the Fermi

velocity (106 cm/s), σm is the two-dimensional mass density of graphene (7.6x10-8 g/cm2), vp is the

acoustic phonon velocity (2x106 cm/s), and Ek is the charge carrier kinetic energy. The scattering

rate from LO phonons (Sop) is defined as

𝑆𝑜𝑝 =1

𝜏𝑜𝑝(𝑘)=

𝐷𝑜2(𝑁𝑜𝑝+

1

2∓1

2)

2ℏ2𝑣𝐹2𝜎𝑚𝜔0

× [𝐸𝑘 ± ℏ𝜔0] , ( 3-13 )

where D0 is the optical deformation potential of graphene, Nop is the optical phonon number, and

ℏω0 is the phonon energy; double operators (∓ and ±) represent phonon absorption and emission

[47]. Because these scattering mechanisms are intrinsic to the graphene itself, they are

independent of the underlying substrate except in the case that the substrate causes a shift in sheet

carrier density (and thus Ek).

3.6.2 Extrinsic Scattering Mechanisms

Extrinsic scattering comes primarily from two sources: Long-range scattering from

ionized impurities, and scattering from surface optical phonons of polar dielectric substrates or

60

overlayers. These effects typically dwarf intrinsic scattering, except in the case of suspended

graphene [28,44]. Charged impurities can be the result of dangling bonds in adjacent materials,

impurity atoms trapped at the graphene-substrate interface, or even adsorbed molecules such as

water vapor. While an ionized impurity does not need to be directly in contact with the graphene

to scatter a charge carrier, modeling of impurity scattering typically treats impurities as uniformly

distributed at the graphene interface at an effective impurity concentration, nimp. Ionized impurity

scattering is described by the relation

𝑆𝑖𝑚𝑝 =1

𝜏𝑖𝑚𝑝(𝑘)=

𝑛𝑖𝑚𝑝

𝜋ℏ(

𝑒2

2𝜖0𝜅𝑎𝑣𝑔)2𝐹𝑅𝑃𝐴

𝐸𝑘 , ( 3-14 )

where nimp is the effective sheet concentration of charged impurities, FRPA is the dielectric

screening function for graphene (described below), ϵ0 is the permittivity of free space (8.854x10-

12 F/m), and κavg is the effective dielectric constant of the environment surrounding the graphene

layer [48]. The random phase approximation of the graphene dielectric screening function is

given by

𝐹𝑅𝑃𝐴 = ∫𝑚2√1−𝑚2

(𝑚+𝑟𝑠)2 𝑑𝑚

1

0 , ( 3-15 )

where rs is the effective fine structure constant for graphene, defined as 𝑟𝑠 = 𝑒2/2𝜋ℏ𝑣𝐹𝜖0𝜅𝑎𝑣𝑔

[48,49].

The primary cause for temperature dependence of mobility in graphene is surface optical

phonon (SOP) scattering from adjacent dielectric materials, rather than the LA and LO phonons

of the graphene itself. In polar dielectric materials, surface phonons modulate the local

polarizability of the crystal, producing an electric field that can couple to graphene charge

carriers. SOP scattering is described by

𝑆𝑠𝑜𝑝 =1

𝜏𝑠𝑜𝑝(𝑘)=

𝑒2𝐹𝑣2𝑁𝑠𝑜√𝑛𝑠ℎ

𝛽ℏexp(𝑘0𝑧0)×

1

𝐸𝑘 , ( 3-16 )

where Fv is the Frolich coupling parameter, Nso is the surface optical phonon occupation number,

61

nsh is the sheet carrier density, β is a dimensionless fitting parameter, and z0 is the Van der Waals

distance between the graphene and dielectric layer [129].

3.6.3 Fitting Model and Theoretical Projections

After calculation of scattering rates for each individual mechanism, a total scattering rate

(Stot) was calculated by a simple sum of the individual scattering rates, providing a means to

calculate mobility using the relation

𝜇 =𝑒𝑣𝐹

2

𝐸𝐹𝑆𝑡𝑜𝑡 , ( 3-17 )

from reference [130]. Calculated mobility curves were fit to experimental mobility versus

temperature data for each sample by least-squares optimization of the effective impurity

concentration (nimp) and the dimensionless SOP fitting parameter (β). These values were then

used to estimate carrier mobility for arbitrary values of temperature, sheet carrier density, and

charged impurity concentration. Similar projections were performed for five substrates not

included in the experimental section of this work: aluminum nitride, hafnium oxide, zirconium

oxide, silicon carbide, and hexagonal boron nitride. All relevant parameters used in theoretical

projections are contained in Table 3-2.

Table 3-2: Relevant parameters used in theoretical transport modeling. Dielectric constant and SOP

energies were taken from References [48] and [131]. SOP fitting parameters for SiO2, Al2O3, and GaN are

the average of experimental values for this work, while values for SiC and h-BN were taken from

Reference [32]. *Values for AlN, HfO2, and ZrO2 are not currently available in literature, so the average of

all other substrates was calculated and used as an initial estimate.

Substrate SiO2 Al2O3 AlN HfO2 ZrO2 SiC GaN h-BN

κ0 3.90 12.35 9.14 22.00 24.00 9.70 10.40 4.00

κi 3.05 7.27 7.35 6.58 7.75 8.10 7.88 3.77

κ∞ 2.50 3.20 4.80 5.03 4.00 6.50 5.35 3.50

ℏωso,1 (meV) 59.98 55.01 83.6 19.42 25.02 116.0 88.5 120.0

ℏωso,2 146.51 94.29 104.96 52.87 70.80 167.58 110.0 142.1

β 5.95 25.5 10.1* 10.1* 10.1* 4.23 5.73 10.3

62

Chapter 4: Graphene Synthesis and Layer Transfer

4.1 As-Grown Graphene Characterization

Post-growth characterization of foil-grown samples yields similar results to current

literature [81,85,86,93]. Raman spectroscopy data are presented in Figure 4-1 for growths at 850,

925, and 1000 °C using the original growth process described in Section 3.1.2, and growth at

1000 °C using the modified growth process described in Section 3.1.3. Evidenced in Table 4-1,

the relative intensity of the Raman D-peak increases with respect to the G-peak as growth

temperature decreases. This represents an increase in defectiveness at lower growth temperature,

which corresponds to a decrease in the mean graphene crystallite size, La. Using the relation

established by Cançado et al. [105], we estimate La to be 162 and 100 nm for growth at 1000

(modified process) and 850 °C, respectively. As graphene domain boundaries serve as scattering

centers and reduce carrier mobility, this demonstrates the necessity for high growth temperatures

to ensure high quality graphene for device applications, which agrees with other work [85].

Scanning electron microscopy (Figure 4-2) indicates typical copper terracing and grain

boundaries, and the characteristic graphene wrinkles that arise from thermal expansion mismatch

between the graphene and copper [71].

63

Figure 4-1: Raman spectra of graphene synthesized at 850, 925, and 1000 °C using a on freestanding

copper foils. Graphene grown at low temperature shows a higher D/G ratio, indicating a higher level of

defects.

Table 4-1: Post-growth Raman characterization of graphene on freestanding copper foils. Increased growth

temperature resulted in a lower D/G ratio and a stronger, narrower 2D peak, indicative of higher quality graphene. This is quantified by an increase of ~35% in the defect-free graphene crystallite size, La. The use

of a slightly longer growth with a lower methane partial pressure resulted in a further increase of ~20% in

La [105].

Growth D/G

ratio

La

(nm)

2D/G

ratio

2D peak width

(rel. cm-1

)

850 °C 0.137 99.6 1.78 41.9

925 °C 0.121 112 2.13 40.4

1000 °C 0.101 135 2.84 35.8

1000 °C, modified growth 0.084 162 3.39 35.2

64

Figure 4-2: Scanning electron microscope image of foil-grown graphene samples showing copper step

terraces and grain boundaries as well as wrinkles in the graphene film that result from thermal mismatch.

The observed improvements in crystalline quality at elevated temperatures and with the

more dilute precursor mix are readily explained by typical CVD kinetics. As growth temperature

increases, the surface mobility of an adsorbed carbon atom increases. This increases the

likelihood of that atom diffusing laterally until it meets an existing crystallite, resulting in

crystallite growth as opposed to formation of new crystallites. Similarly, a reduction in the

methane partial pressure as used in the modified growth process would reduce the rate at which

new carbon atoms are adsorbed on the surface of the copper foil, reducing the likelihood of

multiple adatoms forming a new crystallite instead of growing existing crystallites [87,132].

Thus, an ideal growth process would combine a sufficiently high growth temperature with

relatively low carbon-containing precursor concentration for formation of few crystallites that

grow together to form the continuous graphene film. It should also be noted that the calculation of

crystallite size using Equation 4-1 likely underestimates the actual crystallite size of these

samples, as the D-peak intensity is near the noise floor of the Raman characterization system.

65

4.2 Diffusion Barrier Studies

4.2.1 Growth on Copper Thin Films

Utilization of thin Cu films on SiO2/Si substrates following graphene growth reveals

marked differences from foil-grown material. Evident from Figure 4-3, average copper grain size

in thin films ranges from 5-50 μm, compared to 100 μm to several millimeters in freestanding

copper foils. Additionally, scanning electron micrographs of graphene grown on Cu/SiO2/Si

samples (Figure 4-4a) show the presence of unexpected surface particle formation. These

particles were identified by Auger electron spectroscopy (AES) to be silicon- and oxygen-rich

with estimated concentrations of 11 and 13 at%, respectively (Figure 4-4b), providing the first

direct evidence that the Cu/SiO2 material system may be highly unstable at typical graphene

synthesis conditions. Furthermore, the lack of Cu-Si-O surface particles on foil-grown graphene

(Figure 4-2) indicates that the formation of these particulates is directly related to the presence of

the SiO2/Si substrate, rather than growth system contamination. Transmission electron

microscopy (TEM) imaging of post-growth samples indicates considerable interdiffusion and

ternary phase formation at the Cu-SiO2 interface (Figure 4-5), confirming that the Cu/SiO2/Si

material system is not stable under typical conditions for graphene synthesis from a methane

precursor. As a result, there is a need to evaluate alternate material systems for graphene

synthesis.

66

Figure 4-3: Optical microscope images of post-growth graphene samples on thin copper films (a) and

freestanding copper foils (b).

Figure 4-4: Scanning electron microscopy of graphene grown on copper thin films reveals the presence of

unexpected particle formations (a). These formations are identified by AES to be silicon-and oxygen-rich

(b).

Figure 4-5: TEM image of the copper-SiO2 interface following graphene synthesis indicating interdiffusion

of up to 200 nm and significant ternary phase formation.

67

4.2.2 Addition of Metal and Insulating Diffusion Barriers

Early barrier layer investigations centered on the addition of a thin nickel layer between

the copper film and SiO2 substrate, similar to Levendorf et al [93]. Post-growth TEM images for

various nickel layer thicknesses are shown in (Figure 4-6). Investigation of nickel interlayer

thickness from 5nm to 50 nm indicates that introduction of Ni significantly reduces Cu-SiO2

interdiffusion, but it does not eliminate it. Energy dispersive spectroscopy (EDS) indicates a lack

of Ni at the Cu/SiO2 interface for 5nm films, suggesting the nickel has diffused into the copper

layer during growth - a result of the miscibility of copper and nickel [133]. Additionally, rough

intermetallic Cu-Ni-Si-O and Cu-Si-O interfacial layers are present in each sample. Thus, even if

the Ni interlayer minimizes the interdiffusion of Cu and SiO2, the presence of a rough

intermetallic layer will result in: 1) residual intermetallic compounds in contact with graphene,

and 2) significant substrate surface roughness following transfer-free metal etching. While further

increasing the nickel layer thickness may provide additional reduction in interdiffusion and

improved interfacial roughness, it will likely not completely remove intermetallic formation, and

significant alloying of the copper film will increase carbon solubility, resulting in multilayer

graphene typical of synthesis on nickel [78]. Therefore, it is advantageous to explore other,

potentially more robust diffusion barrier materials for minimizing interdiffusion at the Cu/SiO2

interface.

68

Figure 4-6: The addition of a sacrificial nickel diffusion barrier layer can substantially reduce copper–

silicon interdiffusion during graphene synthesis. Post-growth TEM images of the copper–substrate

interface region for nickel barrier thicknesses of (a) 5 nm, (b) 10 nm, (c) 20 nm and (d) 50 nm showing

reduction in thickness of interdiffusion with increasing nickel thickness.

In addition to changing the interface behavior during growth, the utilization of traditional

and non-traditional diffusion barrier layers significantly impacts the quality of synthesized

graphene. Figure 4-7 shows a comparison of the post-growth Raman spectral signatures of the

various Cu/X/SiO2/Si and Cu/Y/Si sample configurations (X=Ni, Cr, or W; Y=SiNx, Al2O3, or

HfO2). Evident from Raman, a fraction of configurations produce structurally similar graphene to

that of the baseline Cu/SiO2/Si sample, while others exhibit markedly different signatures. This

indicates that not only the copper surface, but also the underlying substrate plays an important

role in the chemical vapor deposition of graphene. It is also clear from Raman that samples

without a diffusion barrier at the Cu/SiO2 interface provide a means to grow high quality

graphene, consisting predominantly of monolayer graphene (narrow, symmetric 2D peak and

I2D/IG ≈ 1.4) with low defect density (ID/IG ≈ 0.1, La ≈ 138 nm) – comparable to foil-grown

69

material discussed in Section 4.1. Similar results are found with the Ni and HfO2 barrier layers.

However, evaluation of other metal barrier layers provides evidence that this is not always the

case. Raman characterization indicates that tungsten and chromium barrier samples produce more

defective graphene (ID/IG > 0.2, La < 65 nm). Additionally, the Al2O3 and SiNx barrier samples

yield highly defective graphene (ID/IG > 0.3, La < 45 nm, weak 2D peak), precluding their use in

device applications. Table 4-2 provides a summary of ID/IG and I2D/IG for these spectra.

Figure 4-7: The addition of metallic and insulating barrier layers drastically affects the quality of

synthesized graphene. A comparison of Raman spectral signals of various sample configurations shows

considerable variation in defect level and estimated thickness for different barrier layers.

Table 4-2: Raman peak intensity ratios for spectra shown in Figure 4-7.

ID/IG I2D/IG

Cu foil 0.053 2.72 No barrier 0.096 1.39

Ni 0.110 1.77

Cr 0.199 0.99

W 0.226 2.09 Si3N4 0.362 0.42

Al2O3 0.248 0.57

HfO2 0.225 2.53

70

The source of defect and thickness variation is evident when characterizing the material

systems using SEM and TEM. Utilization of W and Cr barrier layers results in poor Cu film

morphology (Figure 4-8a and b), small Cu grain size, and significant Cu-Si-O surface particulate

formation - which impacts graphene nucleation and growth. Significant variation in the Raman

ID/IG and I2D/IG in metal-barrier samples is likely due to high levels of defects and impurity atoms

at the Cu surface that serve as non-uniform nucleation sites. Furthermore, TEM investigations of

the insulating barrier samples indicate poor barrier behavior, resulting in Cu/Si interdiffusion and

the formation of copper-silicon intermetallics. While the Al2O3 barrier sample (Figure 4-8c)

shows sharp Cu-Al2O3 and Al2O3-Si interfaces without the formation of additional phases, copper

is identified by EDS in the Al2O3 barrier layer and silicon substrate. Thus, even though the Al2O3

layer remains intact, high levels of Cu atoms (3-5 at%) are able to diffuse through it into other

regions of the sample. HfO2 and SiNx barrier samples (Figure 4-8d and e), also show the

presence of copper-silicon intermetallic precipitates at the copper-dielectric and dielectric-

substrate interfaces, again showing their inability to prevent interdiffusion between the copper

film and underlying substrate.

71

Figure 4-8: SEM and TEM imaging of post-growth barrier layer samples show poor morphology and

interfacial quality. Post-growth SEM images of (a) tungsten and (b) chromium barrier layer samples show

that the barrier layer strongly influences copper film morphology, which then affects graphene synthesis.

Dielectric layers exhibit poor barrier behavior, as shown by post-growth TEM images of Cu/dielectric/Si

interface region for (c) Al2O3, (d) HfO2 and (e) SiNx samples.

The poor barrier performance of ALD dielectrics can easily be explained by examining

the crystallinity of the films following growth. While films deposited by atomic layer deposition

are typically amorphous, electron diffraction patterns obtained during TEM imaging of the Al2O3

and HfO2 layers indicate that these films undergo crystallization during the graphene growth

process. Instead of being strong diffusion barriers, the polycrystalline oxides exhibit a high

density of grain boundaries along which diffusion can take place. Thus, even though lattice

diffusion may be negligible in these materials, their polycrystalline nature provides low barrier

paths for Cu-Si interdiffusion. A barrier layer with a different crystal structure, such as an

epitaxially grown film, may suppress diffusion more effectively than the films evaluated in this

72

study. While electron diffraction suggests that the SiNx layer remains amorphous through the

growth process, previous research suggests that defects resulting from Si-H and N-H bonds create

paths along which copper atoms can readily diffuse [134]. In addition to poor diffusion barrier

performance, SiNx barrier samples exhibit voiding and copper delamination following growth.

This behavior is likely due to evolution of hydrogen gas from the film at elevated temperatures,

which can result in a significant volume change in the film as well as localized voids. Void

formation disrupts graphene synthesis and results in discontinuous graphene, making this material

system unsuitable for device manufacturing.

4.2.3 Graphene on Sapphire

Eliminating the presence of silicon by replacing the substrate with single crystal Al2O3

(sapphire, c-plane) provides a robust material system for graphene synthesis on thin film copper.

The structural quality of graphene grown on Cu/Sapphire, as measured by Raman spectroscopy,

is comparable to the highest quality grown on bulk Cu foils (Figure 4-9a), with ID/IG ≤ 0.1 and a

narrow, symmetric 2D peak approximately 3x the intensity of the G peak. Furthermore, TEM

investigation of the interface (Figure 4-9b) indicates an abrupt interface with no evidence of

interdiffusion, which is confirmed by EDS. Finally, SEM imaging of the sample surface (Figure

4-9c) indicates a pristine surface, free of Cu-Si-O formations found in SiO2/Si substrate samples.

Thus, the copper on sapphire system is both thermally stable and adequate for synthesis of high-

quality graphene. Furthermore, the use of sapphire substrates in the LED market has led to heavy

focus on the scaling of that material system – sapphire substrates are now commercially available

in wafer diameters of up to 200 mm, which is highly attractive for volume manufacturing.

73

Figure 4-9: (a) Post-growth Raman spectrum of Cu/sapphire sample indicative of high quality, single-layer

graphene. (b) Post-growth TEM of copper/sapphire interface region shows a pristine interface free of

interdiffusion or formation of intermetallics. (c) SEM imaging of Cu/sapphire sample shows typical copper

grain structure and absence of Cu-Si-O particle formation.

4.2.4 Broader Impact of Diffusion Barriers and Graphene

Since the time that this work was performed, there has been an increased level of interest

in the area of diffusion barriers related to graphene. Interestingly, there have been two somewhat

opposite foci of research – one focusing on diffusion barriers for improving synthesis of graphene

and other two-dimensional materials on a transition metal-coated silicon substrate (as was

examined here), and one focusing on the use of the graphene itself as a diffusion barrier in other

aspects of microelectronics fabrication.

In the context of diffusion barriers for 2D material synthesis on transition metals, most

recent work has fallen along similar lines to this work. That is, it has sought to avoid metal-

silicon interdiffusion by one of the same two methods investigated here: 1) Adding a diffusion

barrier between the metal film and silicon substrate, or 2) by using alternative substrates such as

quartz or sapphire. One particularly interesting paper investigated the use of such a diffusion

barrier in the growth of single-crystal hexagonal boron nitride (h-BN) on a rhodium-coated

74

silicon substrate [135]. But rather than the mostly polycrystalline films investigated here, Hemmi

et al. utilized a yttria-stabilized zirconia (YSZ) buffer layer between the Si(111) wafer and the

crystalline rhodium film. The success of the YSZ barrier at preventing inter-diffusion of the

rhodium film and silicon substrate reflects the importance of the crystalline structure of the

diffusion barrier. That is, a polycrystalline film is often less effective as a diffusion barrier than

single-crystal or amorphous films, due to the easier paths for diffusion provided by the grain

boundaries.

Another paper of note focused almost entirely on graphene growth on an epitaxial

Cu(111)/Al2O3(0001) substrate [136]. Part of the motivation for this substrate choice was again to

avoid the pitfalls of copper-silicon interdiffusion during graphene synthesis. But this paper was

somewhat unique in that it utilized a single-crystal copper film that was epitaxially aligned to the

sapphire substrate, rather than the polycrystalline films of most other work. The high quality films

produced by these methods speak to the potential for the copper-sapphire system in volume

graphene synthesis, as the materials and techniques used here would all be considered standard

processes within modern semiconductor manufacturing. If combined with a transfer-free

graphene fabrication technique, the copper-sapphire system may be an extremely promising path

towards industrial fabrication of graphene devices [93,124,137].

On the opposite side of the coin, graphene has itself been recently shown to be an

effective diffusion barrier for certain key microelectronics applications [138]. It is perhaps not a

coincidence that the same material system that proved problematic for graphene growth (copper-

silicon) is also one in which graphene has shown great promise as the actual diffusion barrier

[139]. The copper-silicon system is an extremely important application of diffusion barriers;

virtually all modern VLSI applications utilize copper as the main interconnect metal, and copper

is a known poison to silicon devices. Since the first introduction of copper interconnects in the

late 1990s, the silicon industry has used sputtered titanium, tantalum, or their respective nitrides

(TiN, TaN) as diffusion barriers below the plated copper interconnects. But continued device

75

scaling necessitates reducing the diffusion barrier down to only a few nanometers thick, at which

point these films both lose their effectiveness as diffusion barriers and contribute an undesirable

amount of interfacial resistance due to the relatively high fraction of grain boundaries [139].

The fact that graphene is by definition at most a few atomic monolayers inherently makes

it an attractive candidate for ultrathin diffusion barrier applications. Recent work by Zhao et al.

demonstrated that the “critical thickness” of graphene – for which copper diffusion through it – is

roughly 5x thinner than the critical thickness for a typical TaN barrier [140]. But similar to what

is observed in traditional three-dimensional materials, the crystalline quality of the graphene film

plays an important role in its utility as a diffusion barrier. Hong et al. demonstrated that even a

single monolayer of graphene was robust at preventing copper silicide formation during annealing

at temperatures up to 900 °C, but only when the graphene domain size was considered “large”

(>6 um) [139]. For films with graphene crystallite sizes of 1-3 um, copper silicide XRD peaks

were observed beginning at 800 °C (see Figure 4-10). It should be noted that this is still a

tremendous improvement over the system without a diffusion barrier, where copper silicide forms

as low as 300 °C. But it reinforces the importance of grain size and crystalline quality to the

performance of a diffusion barrier, even when it is a low-dimensional material like graphene.

76

Figure 4-10: XRD spectra of copper-graphene-silicon films after various anneals, showing copper silicide

formation on no barrier sample and small-grain graphene sample at 300 and 800 °C, respectively. Large

grain single-layer graphene and multi-layer graphene film were robust against copper silicide formation up

to 900 °C. Adapted from reference [139].

While a majority of research into graphene as a diffusion barrier has focused on the

copper-silicon system, graphene diffusion barriers have also been evaluated for several other

applications, including ohmic contacts for a variety of devices [138,141,142]. In these

applications, the diffusion barrier serves to prevent undesirable reactions amongst often 4- and 5-

metal systems, rather than the simple copper-silicon reaction described above. In one interesting

77

example, a liquid conductor composed of gallium, indium, and tin – colloquially termed

“galinstan” – is described as a potential replacement for mercury in applications where a

spreadable conductor is desired. But this complex alloy readily attacks many common metals,

including nickel, aluminum, and even gold. Ahlberg et al. demonstrated that a single layer

graphene film can completely suppress many of these undesirable reactions, allowing for use of

galinstan along with conventional metals in circuits requiring the formation of a liquid electrical

contact [142].

4.3 Transfer Process Optimization

4.3.1 Copper etchant study

Most early work on copper-mediated CVD graphene utilized iron-based etchants (FeCl3,

Fe(NO3)3) during the graphene layer transfer process [81,125]. However, later work also

demonstrated graphene layer transfer using ammonium persulfate [86] and nitric acid [126]. This

work sought to compare these etchants and their viability in a repeatable graphene transfer

process.

The baseline transfer process, utilizing a ferric chloride-based etchant, produced

continuous graphene films free of major defects, as shown in Figure 4-11. This etchant was

found to be sufficiently aggressive to etch the 25 µm-thick copper foils in ~30 minutes, yet gentle

enough to avoid physically or chemically damaging the graphene films. Thus, the ferric chloride-

based solution formed the baseline method for layer transfer against which alternative methods

could be compared for cleanliness and ease of processing.

78

Figure 4-11: SEM image of graphene film transferred to SiO2 showing an intact film, free of cracks,

pinholes, or other major defects.

Etching using ammonium persulfate, on the other hand, was quickly found to be

insufficient for high-quality graphene layer transfer. Post-transfer optical imaging showed a high

density of circular defects, believed to be regions of residual un-etched copper (Figure 4-12).

One potential explanation for these defects is that they are the result of gas bubbles formed during

the etch process. Because the reaction between ammonium persulfate and copper produces

hydrogen gas, small H2 bubbles form and are trapped beneath the graphene film in the etchant

bath. In the absence of an agitated bath (which would risk damaging the delicate graphene), these

bubbles remain at the interface between the sample and etchant solution, potentially blocking the

etch process from completion.

Multi-layer domains

Graphene wrinkles

79

Figure 4-12: Bright-field and dark-field images of graphene transferred to SiO2 using an ammonium

persulfate-based transfer process. Large circular defects are believed to be residual un-etched copper.

As with ammonium persulfate, etching with nitric acid was also found to result in

significant formation of bubbles during copper etching. However, the bubbling action using nitric

acid as the etchant was far more aggressive – etchant solutions of 5% nitric acid or greater

resulted in macro-scale damage to the graphene films from vigorous bubble formation (Figure

4-13). While a lower concentration etchant was found to reduce the formation of bubbles,

concentrations of less than 5% HNO3 were found to take several days to fully etch a 25 µm-thick

copper foil. Those films were found to be much more likely to crack during transfer to subsequent

rinse baths, indicating the PMMA films were likely being embrittled by the lengthy nitric acid

exposure.

80

Figure 4-13: SEM image of graphene film on SiO2/Si following nitric acid-based layer transfer process.

Large holes formed in the graphene film as a result of the vigorous bubbling during the reaction between

nitric acid and copper substrate.

Ultimately, it was determined that a ferric chloride-based transfer process was the best

solution for repeatable, high-quality graphene layer transfers. This was the only solution tested

that was able to quickly etch the copper substrates without introducing major defects into the

graphene films. Post-transfer Raman spectroscopy of transferred films (Figure 4-14) showed high

signal intensity with low ID/IG, indicating that the films remain high quality following the layer

transfer.

81

Figure 4-14: Post-transfer Raman spectra of graphene on SiO2/Si substrate showing strong signal intensity,

high crystalline quality, and no appreciable background signal from contaminants.

4.3.2 Removal of Residual Iron Contamination

One drawback to the use of a ferric chloride-based copper etchant is the formation of iron

contamination at the graphene-substrate interface [127]. Post-transfer XPS characterization of

graphene films on SiO2/Si substrates (Figure 4-15) confirms the presence of a small fraction of

residual iron atoms, at a concentration of <1 at.%. These impurities would likely introduce

significant charge scattering in graphene devices; thus, this contamination must be eliminated for

optimal device performance.

D

G

2D

82

Figure 4-15: XPS spectrum from graphene on SiO2 showing significant residual iron contamination from

the layer transfer process.

Previous work showed that a modified version of the RCA (Radio Corporation of

America) clean, was effective at removing this metal contamination prior to deposition of the

graphene film onto a final substrate [127]. This clean consisted of dilute (20:1:1) room

temperature baths of H2O/HCl/H2O2 and H2O/NH4OH/H2O2; by comparison, the standard RCA

clean consists of more concentrated baths (typically 5:1:1) held at ~80 °C.

In this work, an even simpler clean was evaluated and adopted – following removal of a

PMMA/graphene film from the etchant solution, it was first placed into a deionized water rinse

bath for 15 minutes, then transferred to a 10% HCl bath for 15 minutes to remove metal

contamination. The sample was then transferred to a second DI water rinse bath for an additional

15 minutes before finally being withdrawn onto the target substrate for drying and removal of the

PMMA support layer. As shown in Figure 4-16, XPS characterization of the films following

layer transfer did not identify the presence of any metal contaminants, indicating that the HCl

bath was effective at removing the residual iron from the sample.

83

Figure 4-16: XPS spectrum from graphene on SiO2 with 10% HCl clean during layer transfer. It should be

noted that the fluorine peaks observed were believed to occur due to a fluorine-based alignment etch

performed on this sample. Although they occur in the same energy region as the iron peaks in Figure 4-15,

their signature is significantly different; no iron signal was detected on this sample.

84

Chapter 5: Device Fabrication and Electrical Characterization

5.1 Ohmic Contact Development

Similar to previous work on epitaxial graphene [114], this work sought to evaluate the

influence of pre-metallization oxygen plasma treatment and post-metallization anneals on ohmic

contact formation to graphene. However, to limit sample fabrication needs for this work, the

effects of pre-ohmic plasma treatment were evaluated solely using Raman spectroscopy, while

the effects of post-metallization anneals were evaluated by use of contact resistance

measurements (Section 3.5.1). The ohmic metal stack described in Section 3.4.2 (10 nm Ti, 100

nm Au) was used for all samples described in this section.

5.1.1 Effects of Pre-ohmic Plasma

Oxygen plasma treatments prior to metallization are commonplace in semiconductor

manufacturing, being critical for removal of photoresist residues and other organics [143]. In

previous work, Robinson et al. demonstrated the benefits of oxygen plasma descum on the ohmic

contact resistance to epitaxial graphene, as well as establishing an approximate optimum

condition in which contact resistance would be minimized [114]. This work similarly sought to

minimize ohmic contact resistance by optimizing the conditions of the pre-metallization oxygen

plasma descum. For the sake of simplicity of the experiment, the efficacy of various descum

processes was assessed on the basis of Raman spectroscopy alone, rather than by fully fabricating

devices and performing electrical contact resistance measurements with each experimental

condition. This work evaluated a broad array of plasma treatments, including some that ultimately

showed no appreciable ability to remove organic material from the open areas. Thus, it was not

practical to characterize all experimental conditions by electrical methods.

The first set of descum experiments began by attempting to replicate the results of

previous work on epitaxial graphene [114]. That is, samples were fabricated using an identical

85

combination of plasma descum, metallization, and anneal, then electrically probed to assess

ohmic contact resistance. Interestingly, the first samples tested with this processing showed

extremely variable results, with many devices appearing to be virtually an open circuit. On closer

examination, it appears that the same plasma treatment was effectively more aggressive on CVD

graphene than for epitaxial graphene. This can be seen in the comparison in Figure 5-1, with the

post-descum spectrum showing significant reduction in the overall signal strength, increase in

D/G ratio, and near complete elimination of the 2D peak. This spectrum reflects an extremely

disordered film, to the extent that it may not even be fully continuous and can only loosely be

described as graphene. Thus, it is not surprising that the resulting ohmic contacts were of

extremely poor quality.

Figure 5-1: Comparison of Raman spectrum of CVD graphene before and after plasma descum using

identical conditions to that of previous work by Robinson et al [114].

Given the previous result, it was then decided to evaluate two main approaches of plasma

descum – one that attempted to find a more suitable combination of process conditions while

using the same basic gas chemistry (O2+He), and another that used a completely different

D G

2D

D+G

Initial Post-Descum

86

chemistry. While a fairly wide variety of gases can be used as reactants for plasma descum

processes, only C2F6 was available on the same tool as previously used (in addition to the

aforementioned O2 and He). Thus, a C2F6+He plasma was chosen as the main alternate option, in

order to allow for a direct comparison against the baseline oxygen-based chemistry.

A very basic plasma stability study was performed first, as a means of identifying a

suitable process window for evaluation. The criteria for this study were extremely limited – the

goal was to identify a suitable gas chemistry with which a plasma could be struck and maintained

for at least 1 minute using an RF power of 100W and pressures of both 400 mTorr and 1000

mTorr. These pressures were chosen as reasonable upper and lower bounds for the particular

plasma tool, allowing for some modulation of the relative degree of ion bombardment while still

staying within the normal operating ranges for gas flow and pressure control of the hardware. The

baseline oxygen chemistry of 75% O2 and 25% He was found to be suitable across that window

and was maintained for subsequent studies. In the case of the C2F6 study, it was found that that

reactant gas required a significantly greater amount of helium dilution in order to ignite and

remain stable, to the extent that the helium actually formed a majority of the gas flow. The final

chemistry chosen for this part of the study was 40% C2F6 and 60% He.

Raman spectra for a variety of oxygen-based plasma treatments are shown below.

Samples were characterized prior and subsequent to repeated plasma treatments at either 400 or

1000 mTorr. In both cases, the graphene quality decreases with successive treatments, as

evidenced first by a sizeable increase in the relative D-peak intensity, and second by the

broadening and eventual disappearance of the 2D peak. This transition occurs much more slowly

in the case of the 1000 mTorr process, with the 30-second sample roughly equivalent to the 15-

second sample at 400 mTorr. This is not a particularly surprising result; for the typical RF plasma

system, the degrees of plasma ionization and gas dissociation (and thus the density of free

radicals available to participate in reactions) decline with increased pressure due to the reduced

mean free path of gas molecules and reduced recombination time. Thus, the relative fluxes of

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both oxygen ions and free radicals are lower at the higher pressure, reducing the rate of the

reaction.

Figure 5-2: Raman spectra as a function of exposure to an O2/He plasma

A similar study was performed using the previously described C2F6 plasma, with the

Raman spectra shown below. In stark contrast to the oxygen-based plasma, these treatments

showed little to no change in the Raman spectra, indicating that this plasma was negligibly

attacking the graphene. Even when extending the process time to 60 seconds (compared to a

maximum time of 45 seconds in the oxygen study), there was no discernible change in the Raman

spectrum of the graphene film. This was a very promising result, as it suggested the possibility of

a recipe that allowed for some degree of selectivity in removal of organic residues from the

graphene surface without appreciably degrading the graphene itself. However, attempts to

fabricate real devices using this descum process were wholly unsuccessful. All samples that

received only a C2F6 plasma prior to metallization showed severe lifting of the ohmic

metallization after liftoff (see image below), which is the same signature as is observed in the

30s

15s

Initial

45s

400 mTorr 1000 mTorr

88

absence of any descum process prior to evaporation. This suggests that the C2F6 process is not

consuming organic surface contaminants to any significant extent, precluding its use as a pre-

ohmic descum chemistry.

Figure 5-3: Raman spectra as a function of exposure to a C2F6/He plasma

Figure 5-4: Optical microscope image of sample processed through ohmic metallization using C2F6 plasma

showing severe metal lifting

30s

15s

Initial

60s

400 mTorr 1000 mTorr

89

Given the above results, it was decided to use the 1000 mTorr oxygen-based descum

recipe with a duration of 30 seconds as the pre-ohmic plasma treatment for all subsequent device

fabrication. This recipe produced a Raman signature that very closely matched the optimum

condition identified in previous work on epitaxial graphene, had a reasonably short process time,

and stayed within the normal operating parameters of the tool in question. It should be noted that

the study performed here was only a small fraction of a much wider variety of descum treatments

that could be evaluated given the right equipment and gas availability. For example, modern

semiconductor manufacturing facilities often employ the use of gases such as hydrogen, nitrogen,

or even water vapor as reactants in ash and descum applications, allowing them to tailor the

plasma chemistry to selectively target removal of residues and surface contamination while

avoiding attack of their devices. Similarly, the equipment in these facilities often have unique

configurations for generation, confinement, and transport of only neutral reactive species to the

wafer surface without any ion bombardment; one such configuration is referred to as a

“downstream microwave” plasma source. This type of configuration might allow for generation

of significant etch selectivity between the undesired photoresist residues and the graphene device

material, even though they are both organic in nature. While these techniques were not available

for testing as part of this work, they may be useful for improved ohmic contact performance and

manufacturability in future integration of graphene into production devices.

5.1.2 Effects of Contact Anneals

In addition to pre-deposition plasma treatments, previous work also emphasized the

importance of post-deposition annealing on the realized ohmic contact resistance of graphene

devices [114]. Using the down-selected descum process described in Section 5.1.1, samples were

fabricated through Ti/Au metal deposition and liftoff, then tested before and after a series of

anneals of increasing temperature. Figure 5-5 shows the extracted contact resistance, Rc, as a

function of anneal temperature. Interestingly, the data shows an apparent increase in Rc upon

90

initial anneal, rising from ~2.0 Ω-mm in the as-deposited state to 2.6 Ω-mm after a 250 °C

anneal. Contact resistance then decreased monotonically with subsequent anneal steps, reaching a

mean value of ~1.2 Ω-mm at the highest anneal temperature. This behavior is quite unexpected,

as other previous studies of graphene ohmic contacts do not describe an increase in contact

resistance from the as-deposited state after annealing, irrespective of condition [114,144].

Figure 5-5: Contact resistance of CVD graphene samples as a function of post-deposition annealing.

One potential explanation for the observed contact resistance behavior becomes evident

upon examining the effect of annealing on the graphene itself. The contact resistance Rc is not a

metric of the metal-graphene interface alone – that is, it is a function of both the junction and the

semiconductor material beneath the junction, as the transfer length of the junction will vary

according to the sheet resistivity of the underlying semiconductor. As can be seen in Figure 5-6,

the graphene sheet resistivity Rsh does change appreciably as a result of the annealing treatments.

As-deposited values of Rsh range from 400-800 Ω/sq, increasing by approximately 60% after the

initial anneal at 250 °C. The mean value of Rsh peaks at 920 Ω/sq following the 300 °C anneal,

before dropping down to 670 Ω/sq after the highest temperature anneals.

91

Figure 5-6: Graphene sheet resistance as a function of anneals following ohmic metallization.

It should be emphasized that the trend in graphene sheet resistance shown above

describes the condition of the graphene between contact pads, not the graphene beneath the

contacts. Nonetheless, this trend does show that significant changes in graphene sheet resistance

can occur as a result of ohmic contact anneals, which could explain the observed increase in

contact resistance if similar shifts are observed in the graphene beneath the metal contacts.

Unfortunately, the graphene sheet resistance beneath the contact pads cannot be determined

directly from the transfer length method. However, more complex contact structures and

measurement techniques could be employed in the future to independently extract the sheet

resistance beneath the contacts and account for differences from behavior in the region between

contact pads.

In addition to the contact resistance Rc, the transfer length method allows for the

calculation of the specific contact resistance, ρc, which serves as a metric of the contact interface

itself. The trend in ρc as a function of annealing is shown in Figure 5-7. This behavior is much

more aligned with expectations – contact resistance decreases progressively with each anneal,

92

dropping by close to an order of magnitude from the as-deposited condition. The best devices

annealed at 400 °C reached a value of ~7x10-6 Ω-cm. Interestingly, the spread in contact

resistance actually increased as a function of annealing. This is not necessarily surprising – the

layer transfer process involved in CVD graphene fabrication contains a component of variability

that is not present in epitaxial device fabrication, and it is entirely possible that residual

contaminants and/or damage to the graphene layer vary in ways that interact directly with the

mechanisms of contact annealing.

Figure 5-7: Specific contact resistivity as a function of post-deposition anneals

5.1.3 Contact Resistance in Context

On the whole, the ohmic contact results described above are not exemplary; performance

is 1-2 orders of magnitude worse than the best that was achieved previously on epitaxial graphene

(7.5x10-8 Ω-cm2) [114]. However, this study was conducted over a lower temperature range than

previous work, and was unable to continue to higher temperatures due to sample degradation

from repeated probing. It is reasonable to expect further decrease in contact resistance with

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anneals of 450-500 °C that would bring these results closer to the best reported results for

epitaxial graphene.

Interestingly, the amount of new ohmic contact work on graphene over the last several

years has been limited. This is not necessarily surprising, given the diminishing return on

investment for further research as better results are achieved. But another factor is equally at play

– the pivot away from graphene and towards other low-dimensional materials among many

academic research groups. These low dimensional materials are predominantly transition metal

dichalcogenides (TMDs) such as MoS2, MoSe2, and WS2, which are structurally similar to

graphene, but possess a band gap and are more attractive than graphene for a number of device

applications [144]. As research in these materials has increased, additional lessons have been

learned that can also serve to inform ohmic contacts to graphene as well.

One of the most straightforward results for ohmic contacts to TMDs was published by

English et al. in 2016 [145]. This paper demonstrated a significant reduction in ohmic contact

resistance (approximately a factor of 3) by maintaining ultrahigh vacuum (~10-9 Torr) during the

ohmic metal evaporation, rather than the ~10-6 Torr that is the typical operating range for most

electron beam evaporators. These results are particularly significant because they demonstrated

specific contact resitivities in the 10-7 Ω-cm2 range without relying on doping effects or work

function engineering. Those techniques have been extensively studied both for graphene and

TMDs, but often present difficulties when devices are aggressively scaled, as lateral doping

effects into the channel region can induce threshold voltage shifts or otherwise impact the

transport behavior of the device outside of the ohmic contacts themselves [144]. This presents a

fairly positive outlook for the “ideal” ohmic contact to graphene – that a properly optimized pre-

ohmic plasma treatment combined with an ultrahigh vacuum deposition of the ohmic

metallization would produce as clean an interface as possible. When combined with an optimized

post-deposition anneal, contact resistances even below current state of the art could be achieved,

which would be suitable for even very aggressively scaled device performance.

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5.2 Transport Studies on Various Substrates

The final component of this work was a study of the transport behavior of graphene films

when integrated with various dielectric materials. An exhaustive study would evaluate a broad

array of both substrate materials and gate dielectrics, as both would be expected to influence

scattering in a graphene device. However, the scope of this work was limited to evaluation of a

select set of substrate materials only. This allowed for characterization of the influence on

transport behavior with a limited process flow that only required processing up through ohmic

contact formation. This also avoided the added influence of a top dielectric film on the scattering

behavior in the graphene, allowing for more straightforward analysis of the influence of the

substrate materials. Processing was identical for all samples with the exception of the target

substrate during the layer transfer (see Section 3.4 for details). Two samples each were

transferred to oxidized silicon, single-crystal sapphire, and epitaxial GaN-on-sapphire substrates.

After ohmic contact formation, all samples were loaded into a vacuum Hall mobility

measurement system and outgassed under vacuum at 400K for one hour prior to execution of

temperature-dependent Hall measurements.

Figure 5-8 shows the raw mobility data as a function of temperature for each sample. At

low temperatures, mobilities ranged from ~1200-2100 cm2 V-1 s-1, with the two GaN samples

considerably higher than the SiO2 and Al2O3 samples. Mobility is relatively flat versus

temperature up to ~200K, after which it begins to fall off. The falloff is considerably more

pronounced for the GaN samples than the other two substrates – the best GaN sample

experienced a >20% drop in mobility over this temperature range, whereas the SiO2 samples

dropped only ~11%. The temperature-dependence of mobility is relatively weak compared to a

majority published literature. For example, simulations from Konar et al. show approximately a

50% reduction in mobility from 5-300K for graphene in contact with an Al2O3 gate dielectric

[48]. However, it should be noted that these simulations also project much higher mobilities

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overall; as subsequent modeling will show, this is likely due to the considerably higher level of

charged impurities in the transferred CVD graphene in this work than is typically simulated in

literature for exfoliated graphene. The overall mobility and temperature-dependence trend in this

work are fairly comparable to recent work on epitaxial graphene, however, indicating that the

observed data are reasonable and in line with defectivity levels observed for other large-area

synthesis methods [32,146].

Figure 5-8: Measured Hall mobility as a function of temperature for two samples each on SiO2, Al2O3, and

GaN substrates.

As described in Section 3.6, the temperature-dependent mobility behavior can be

understood as the combination of four separate scattering mechanisms: Intrinsic graphene

longitudinal optical (LO) phonons, intrinsic longitudinal acoustic (LA) phonons, scattering from

charged impurities (also called “Coulombic scattering”), and surface optical phonons (SOP) from

adjacent dielectric materials. In most practical graphene devices, the intrinsic graphene scattering

modes contribute an extremely small fraction of overall scattering. In fact, subsequent modeling

in this work will show that those modes comprise less than 0.1% of observed scattering. As those

two modes are intrinsic to the graphene itself, their contribution also does not have to be fit to the

Temperature (K)

Mo

bilit

y (

x1

03 c

m2 V

-1 s

-1)

4 5 6 7 8 10 20 30 40 50 70 100 200 300 5001

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

2.1

2.2

SiO2

SiO2

Al2O3

Al2O3

GaNGaN

96

substrate-specific data. Thus, the contributions of the charged impurity scattering and dielectric

SOP scattering can be easily fit to the temperature-dependent mobility and carrier density

measurements by least squares optimization only two parameters – the effective carrier

concentration, nimp, and a dimensionless SOP fitting parameter, β. The fitted temperature-

dependent mobility measurements and a summary of extracted parameters can be seen in Figure

5-9 and Table 5-1, respectively.

Figure 5-9: Temperature-dependent mobility data with fitted mobility model.

Table 5-1: Extracted parameters from fitted temperature-dependent mobility measurements.

Substrate Sample μh at 5K (cm2

V-1 s-1) Effective nimp (x1012 cm-2)

μh at 300K (cm2 V-1 s-1)

Fitting Parameter β

SiO2 1 1360 3.32 1303 5.4

SiO2 2 1326 3.42 1276 6.5

Al2O3 1 1225 7.65 1158 24.0

Al2O3 2 1380 6.70 1326 27.0

GaN 1 1823 4.46 1758 6.0

GaN 2 2079 3.93 1973 5.4

Temperature (K)

Mo

bil

ity

(c

m2 V

-1 s

-1)

5 6 7 8 10 20 30 40 50 6070 100 200 300 5001000

1200

1400

1600

1800

2000

2200

SiO2_1SiO2_2Al2O3_1Al2O3_2GaN_1GaN_2

97

The simulated impurity concentrations in Table 5-1 are considerably higher than is

typically observed in measurements of exfoliated graphene. For reference, most work on

exfoliated graphene has values for nimp in the range of 5x1011 cm-2, compared to values of 3-8x1012

cm-2 for this work. This may seem surprising, given that most work on exfoliated graphene also

makes use of oxidized silicon substrates, as were included here. However, it should be noted that

the parameter nimp is an effective impurity concentration from all potential sources – not just the

substrate. For example, the metal based substrates and wet etchants used in the graphene growth

and layer transfer provide additional opportunities for incorporation of charged impurities

adjacent to the graphene layer, as well as any damage to the graphene itself during the layer

transfer process. It should also be noted that some work on epitaxial graphene integrated with h-

BN dielectrics has shown impurity concentrations in excess of 1013 cm-2; thus, the impurity

concentrations shown here are within a reasonable range [32].

A natural question to be asked is what underlies the observed differences in apparent

impurity concentration between the different substrates. As shown in Table 5-1, the impurity

concentration appears to follow a trend between the three substrates, with sapphire the highest,

SiO2 the lowest, and GaN in the middle. This could be the result of inherent differences in defects

in the substrates themselves, or the result of different interaction with the layer transfer process.

For example, the different substrates may have different bond termination on their surfaces,

which could be more or less prone to attraction of ionic contaminants from the liquid baths during

withdrawal of the graphene samples. Unfortunately, it is difficult to draw any clear conclusions

due to the small sample size. While the differences in impurity concentration are appreciable (a

factor of ~2 between SiO2 and Al2O3), one would need a larger population of samples including

multiple substrates processed in the same batch in order to conclusively identify if the observed

difference is actually inherent to the substrate or simply the result of sample variability.

As previously described, the high levels of charged impurities in these samples produce

relatively weak temperature-dependent mobility trends. Nonetheless, the behavior was adequate

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to allow for fitting of the surface optical phonon (SOP) scattering from the substrates in order to

assess differences between the various materials. As previously described, this fitting is done by

least squares optimization of the value for the dimensionless fitting parameter, β. The physical

meaning of this parameter is discussed in greater detail below, but it essentially represents a

proportional reduction in the SOP scattering rate from the theoretical prediction. I.e. a β value of

6 would represent that the observed SOP scattering is only 1/6th of what would be expected given

all of the other inputs to the model. Of note is that the value β shows minimal variability across

the two samples of each substrate, while the variation between substrates is quite large. In

particular, the samples on sapphire substrates showed a β value of roughly 25, compared to 5-6

for the SiO2 and GaN samples. This implies that the observed scattering is notably weaker than

expected for sapphire as compared to the other substrates.

The physical origin of the SOP fitting parameter has been discussed at length in previous

work, though a conclusive answer has not been reached [46–48,147]. This is partly due to the fact

that there are multiple potential sources for deviation from ideal behavior, more than one of

which may be present at once. For example, the interaction distance z0 is typically approximated

as the graphene atomic thickness, 3.4Å. However, it is extremely unlikely that the separation

between the graphene layer and the underlying substrate (or top dielectric) would be a constant

value. In fact, actual graphene devices very rarely have an epitaxial alignment with the adjacent

dielectric layers, meaning the physical separation is on average likely to be larger than the

idealized distance, in addition to being variable over typical device sizes. Thus, the interaction

distance would be at best an average value and not expected to be equal to the graphene layer

thickness. Similarly, with differences in the interaction distance, the expected phonon coupling

strength would be significantly different. Work by Lin and Liu calculated that differences in

assumed interaction distance could account for nearly all of the variation in calculated coupling

strength between their work on arbitrary substrates and previous work on SiO2 by Chen et al.

[46,147]. Another possible explanation is inaccuracy of the theoretical acoustic deformation

99

potential, leading to an underestimation of the contribution of elastic scattering from intrinsic

graphene acoustic phonons. Interestingly, Lin and Liu found that they could achieve a satisfactory

fit of their experimental data with either a modification of interaction distance and Frolich

coupling parameter, or a modification to the graphene acoustic deformation potential [147]. This

would indicate that the current dataset is not adequate to separately parse out the accuracy of all

of the potential scattering mechanisms.

Based on the discussion above, it could reasonably be concluded that the observed

differences between substrates in this work may actually be explained by interaction distance

differences between the substrates, rather than a difference in fundamental physics of the phonon

coupling between the substrate and graphene. Unfortunately, this is nearly impossible to

conclusively prove or disprove from the data at hand, as the temperature-dependence of mobility

is not strong enough to fit multiple separate parameters in the SOP scattering equation with any

reasonable accuracy. Nonetheless, the fact that the fitted values for β are consistent between

samples and in line with prior work suggests that these results can reasonably be used for

extrapolation over a wider range of substrates and device operating conditions to understand

broader trends.

Shown in Figure 5-10 is the projection of carrier mobility as a function of sheet carrier

density for two separate impurity concentrations and a family of 8 separate substrate materials.

Similarly, Figure 5-11 plots mobility as a function of impurity concentration for two separate

sheet carrier densities, and for the same set of substrate materials. These projections are similar to

those seen in previous work, but are unique in that they look at both carrier density and impurity

concentration together rather than only projecting over one variable with the other a fixed value

[48,147].

100

Figure 5-10: Projected carrier mobility versus sheet carrier density for two different impurity

concentrations.

Figure 5-11: Projected mobility versus impurity concentration for two different sheet carrier densities.

Two conclusions are easily extracted from these plots – first, charged impurity

concentration is by far the most important driver of device performance. This is not a surprising

result, given the very weak contribution of intrinsic graphene phonon scattering and modest

observed influence from dielectric SOP scattering. This also agrees well with previous work on

epitaxial graphene, showing that reduction in the effective impurity concentration by hydrogen

intercalation of the substrate and reducing defectivity in dielectric overlayers leads to pronounced

benefits in measured mobility and FET characteristics [32,63]. Second, these projections roughly

nimp = 5x1011 cm-2 nimp = 5x1012 cm-2

nsh = 5x1011 cm-2 nsh = 5x1012 cm-2

101

define two different regions of device operation that would lead to two very different selections

of dielectric materials. In instances where impurity concentration can be kept below ~5x1011 cm-2,

the use of high-K dielectrics is often detrimental rather than beneficial due to their

correspondingly low energy SOP modes. Thus, for the highest performing device possible, it is

advisable to control Coulombic scattering simply by producing the cleanest device environment

possible through synthesis and processing conditions, and choosing a substrate and top dielectric

with high energy SOP modes, such as SiC or AlN.

In the opposite case of high impurity concentration, SOP scattering can essentially be

ignored altogether, as it is entirely dwarfed by Coulombic scattering. An example application

might be one in which highly defective graphene is a natural consequence of the processing, such

as the use of low-temperature CVD graphene deposition or reduced graphene oxide (rGO) on

flexible substrates. In this case, the use of high-K dielectric materials would be critical. In the

case of graphene with effective impurity concentrations of >1013 cm-2, the use of ZrO2 or HfO2

could be expected to boost carrier mobility by more than a factor of 4 over conventional low-K

dielectrics like SiO2.

102

Chapter 6: Conclusions

As the first truly two-dimensional material to be experimentally isolated, graphene has

attracted an immense amount of research attention over the last 15 years. As a result of its unique

physical structure, graphene possesses a host of impressive properties that make it a candidate for

next-generation electronics. These include record electron mobility and saturation velocity,

ambipolar electron transport, and robustness against short-channel effects at aggressively scaled

dimensions. This has led to research into use of graphene in a wide variety of applications,

including next-generation logic/memory devices, radiofrequency devices, transparent conductive

electrodes, and printed electronics on flexible substrates.

This thesis examined the full fabrication flow of chemical vapor deposition (CVD)

graphene using copper substrates, including the graphene synthesis, layer transfer and device

fabrication, and electrical characterization of fabricated devices. This began by first optimizing

the window for synthesis of high quality, monolayer graphene on freestanding copper foils,

followed by an extensive study of synthesis on thin copper films on insulating substrates. Second,

a full fabrication flow was established for CVD graphene devices, including layer transfer to

arbitrary substrates, active device isolation, ohmic contact formation, gate dielectric integration,

and gate contact formation. Finally, electrical transport behavior of graphene films on various

substrates was examined in order to better understand scattering mechanisms in graphene. This

work hopes to serve as a blueprint for future work on CVD graphene and other similar low-

dimensional materials, including transition metal dichalcogenides such as MoS2.

6.1 Graphene Synthesis

The synthesis of graphene films on copper substrates by chemical vapor deposition

consists of several stages: 1) Substrate heating and pre-annealing, 2) Graphene crystallite

nucleation, and 3) Crystallite growth to form a continuous graphene film. This thesis evaluated

103

and optimized growth processes for use of both freestanding copper foils and thin copper films on

insulating substrates as the basis for graphene synthesis.

Optimization of graphene synthesis on freestanding copper foils separately evaluated the

influence of growth temperature and the composition of the precursor gas on the quality of

synthesized graphene. Growth temperature was varied from 850-1000 °C, with the resulting

Raman spectra demonstrating a clear reduction in defect density with increasing temperature.

Subsequently, growth quality was compared between the baseline methane-rich precursor gas and

a more dilute precursor mix with the addition of argon, with a further improvement in crystalline

quality shown with the modified process. This aligns with contemporary literature indicating that

the highest quality CVD graphene is produced with a high-temperature, slow growth using a

dilute hydrocarbon precursor in a reducing environment.

Study of synthesis of graphene on thin copper films on insulating substrates focused on

solving a different problem – the propensity for interreaction between the copper film and an

underlying silicon substrate at elevated growth temperatures. This study evaluated the efficacy of

a variety of metal (Ni, Cr, W) and dielectric (SiNx, Al2O3, HfO2) diffusion barriers at suppressing

copper-silicon interdiffusion. Most of these diffusion barriers showed some ability to reduce the

extent of this reaction, but none of them were able to suppress it entirely. This was likely due to

the crystallinity of the films in question, as the evaporated metal films are by nature

polycrystalline, and the dielectric layers – while amorphous in the as-deposited state – all showed

evidence of crystallization during graphene growth. Thus, all samples contained plentiful grain

boundaries along which copper and silicon atoms were able to diffuse. By comparison, the use of

a single-crystal sapphire substrate showed great promise for high quality graphene growth, with

no sign of any undesirable reactions and comparable as-grown Raman spectra to the best quality

graphene on freestanding foils.

104

6.2 Graphene Device Fabrication

This thesis established a full fabrication flow for CVD graphene devices on arbitrary

substrates, beginning first with the transfer of the graphene films from copper foils onto

insulating substrates such as oxidized silicon or sapphire. A study of copper wet etchants was

performed, comparing the baseline ferric chloride etchant to nonmetallic etchants such as

ammonium persulfate and nitric acid. Ultimately, the ferric chloride based etchant was found to

be more conducive to high-quality graphene layer transfer, as it was the only solution that did not

produce hydrogen bubbles during etching that could mechanically damage the graphene.

However, an additional HCl clean step was needed following etching with ferric chloride in order

to eliminate residual iron contamination. The final graphene transfer process was shown to retain

the high crystalline quality of the as-grown graphene and present a suitable film for subsequent

device processing.

Following graphene layer transfer, fabrication processes for active device isolation,

ohmic contact formation, gate dielectric deposition, and gate contact formation were established

based on a combination of best known methods from literature and experiment. Many processing

steps were leveraged from previous work on epitaxial graphene, but with key nuances specific to

CVD graphene. In particular, the formation of high quality ohmic contacts to CVD graphene

required a re-examination of the pre-ohmic plasma treatment and subsequent high temperature

anneals. Ultimately, the best ohmic contact results from this work were still short of the best

known results for epitaxial graphene – approximately 8x10-6 Ω-cm2, as compared to ~1x10-7 Ω-

cm2 for epitaxial graphene. However, this may have largely been the consequence of sample

limitations that prevented a full evaluation of the available annealing window. Thus, the results of

this thesis still represent a promising foundation for graphene transistors based on CVD material

synthesized on copper foils.

105

6.3 Electrical Characterization of CVD Graphene Devices

The final component of this thesis was a study of electrical transport of graphene

transferred to three different substrate materials: Oxidized silicon, single crystal sapphire, and

MOCVD-grown GaN on sapphire. Temperature-dependent Hall mobility measurements were

performed from 5-400K. Experimental measurements were coupled with theoretical modeling to

assess the relative importance of different scattering mechanisms and provide broader

understanding of the optimal choice of substrate and dielectric overlayers for graphene devices in

various applications.

In general, measured Hall mobilities (1100-2100 cm2 V-1 s-1) were considerably lower

than is typical for exfoliated graphene, but in line with literature values for epitaxial and CVD

graphene. Temperature-dependence of mobility was weak, with only a 10-20% drop in mobility

from 5-400K, indicating that charged impurities were the dominant scattering mechanism

irrespective of substrate material. The influence of dielectric surface optical phonon (SOP)

scattering, while small, was able to be fit by the use of a single dimensionless fitting parameter, β.

Interestingly, this parameter was notably higher for the sapphire substrates, indicating that the

observed SOP scattering was lower on a relative basis than the SiO2 and GaN substrates. The

physical origins of that difference are not able to be conclusively determined from this dataset,

but existing literature posits that the most likely sources of variability are either a difference in the

interaction distance between the graphene and dielectric or the magnitude of the Frolich coupling

parameter.

Calculated trends for mobility as a function of sheet carrier density and impurity

concentration identify clear conclusions for future device applications. In situations where

impurity concentration can be driven lower, optimal dielectrics will have only high energy

phonon modes. Examples of such dielectrics include SiC and AlN. In the opposite scenario where

impurity concentration is known to be high, the use of high-K dielectrics such as HfO2 or ZrO2 is

106

critical, in order to take advantage of the “dielectric screening” effect of those films to improve

mobility.

107

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115

Appendix A: Graphene Processing Details

A.1. Backside Graphene Removal During Layer Transfer

Processing tool TePla M4L Plasma Asher

Plasma power 100 W

Plasma time 60 seconds

System pressure 600 mTorr

Oxygen flow rate 150 sccm

Helium flow rate 50 sccm

A.2. Details of Lithographic Processing

A.2.1. Layer 1

Layer description Graphene isolation etch

Resist layer 1 MicroChem LOR 2A

Layer 1 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 1 bake parameters Hot plate, 190 °C, 5 min

Resist layer 2 Shipley SPR 3012

Layer 2 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 2 bake parameters Hot plate, 95 °C, 1 min

Exposure dose 87.5 mJ/cm2

Developer Shipley MF CD-26 (2.45% tetramethyl ammonium hydroxide)

Develop time 1 min

A.2.2. Layer 2

Layer description Source/drain contact deposition and lift-off

Resist layer 1 MicroChem LOR 2A

Layer 1 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 1 bake parameters Hot plate, 190 °C, 5 min

Resist layer 2 Shipley SPR 3012

Layer 2 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

116

Layer 2 bake parameters Hot plate, 95 °C, 1 min

Exposure dose 62.5 mJ/cm2

Developer Shipley MF CD-26 (2.45% tetramethyl ammonium hydroxide)

Develop time 56 s

A.2.3. Layer 3

Layer description Dielectric etch

Resist layer 1 MicroChem LOR 2A

Layer 1 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 1 bake parameters Hot plate, 190 °C, 5 min

Resist layer 2 Shipley SPR 3012

Layer 2 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 2 bake parameters Hot plate, 95 °C, 1 min

Exposure dose 87.5 mJ/cm2

Developer Shipley MF CD-26 (2.45% tetramethyl ammonium hydroxide)

Develop time 1 min

A.2.4. Layer 4

Layer description Gate contact deposition and lift-off

Resist layer 1 MicroChem LOR 2A

Layer 1 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 1 bake parameters Hot plate, 190 °C, 5 min

Resist layer 2 Shipley SPR 3012

Layer 2 coating parameters Static dispense, terminal spin speed 5000 rpm, 45s

Layer 2 bake parameters Hot plate, 95 °C, 1 min

Exposure dose 62.5 mJ/cm2

Developer Shipley MF CD-26 (2.45% tetramethyl ammonium hydroxide)

Develop time 56 s

117

A.3. Device Fabrication Processes

A.3.1. Graphene Isolation Etch

Processing tool Plasma-Therm 720 SLR Reactive Ion Etch Tool

Plasma power 75 W

Plasma time 2 minutes

System pressure 20 mTorr

Oxygen flow rate 10 sccm

Argon flow rate 90 sccm

A.3.2. Source/drain Contact Deposition

Pre-ohmic plasma tool TePla M4L Plasma Asher

Plasma power 100 W

Plasma time 15-45 seconds

System pressure 400-1000 mTorr

Oxygen flow rate 150 sccm

Helium flow rate 50 sccm

Metal deposition tool Kurt J. Lesker Lab 18 PVD System

System vacuum <10-6 Torr

Metal layer 1 10 nm titanium

Metal layer 2 100 nm gold

A.3.3. Pad Open Etch

Processing tool AMAT P5000 Magnetically-Enhanced Reactive Ion Etch Tool

Plasma power 69 W

Plasma time 6 minutes

System pressure 20 mTorr

CHF3 flow rate 30 sccm

CF4 flow rate 45 sccm

A.3.4. Gate contact deposition

Pre-ohmic plasma tool TePla M4L Plasma Asher

118

Plasma power 100 W

Plasma time 30 seconds

System pressure 600 mTorr

Oxygen flow rate 150 sccm

Helium flow rate 50 sccm

Metal deposition tool Kurt J. Lesker Lab 18 PVD System

System vacuum <10-6 Torr

Metal layer 1 10 nm titanium

Metal layer 2 100 nm gold

119

Appendix B: Electrical Transport Modeling

This section provides the raw MATLAB code used for electrical transport modeling

contained in this work. Two main scripts were used – one for fitting experimental data, shown in

Section B.1., and another for theoretical projections on various substrates and at various values of

temperature, sheet carrier density, and impurity concentration, shown in Section B.2. Sections

B.3., B.4., and B.5. provide the three functions called by the main scripts. Those functions

calculate carrier mobility as a function of temperature, sheet carrier density, and charged impurity

concentration, respectively.

B.1. Script for fitting experimental data %% Fitting mobility simulations

% This program is used for fitting temperature-dependent hall mobility

% measurements with theoretical modeling of carrier transport. This program

% calls three functions (mob_calc_T, mob_calc_Nsh, and mob_calc_Nimp) and

% displays plots of mobility versus temperature, mobility versus sheet

% carrier density, and mobility versus impurity concentration.

% Updated 2012-10-01

% clear variables/fig

clc; clf;

clear all;

%Relevant SOP mode energies in meV

hw_sio21=59.98;

hw_sio22=146.51;

hw_al2o31=55.01;

hw_al2o32=94.29;

hw_gan1=88.5;

hw_gan2=88.5;

%Load data sets

load('s1.mat')

load('s2.mat')

load('a1.mat')

load('a2.mat')

load('g1.mat')

load('g2.mat')

%Specify dielectric constants

ksio2_1=3.9;

ksio2_2=2.5;

ksio2_i=3.05;

kal2o3_2=3.2;

120

kal2o3_1=12.35;

kal2o3_i=7.27;

kgan_1=10.4;

kgan_2=5.35;

kgan_i=(kgan_1+kgan_2)/2;

%Specify graphene interaction distance

z0=3.5e-10; %meters

%% Mobility v. Temperature

%function mob =

mob_calc_all(input,nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%best fit to find impurity conc. and sop mode

s1_fit=[3.34e16,6];

s2_fit=[3.43e16,8];

a1_fit=[7.65e16,25];

a2_fit=[6.8e16,30];

g1_fit=[4.44e16,7];

g2_fit=[3.9e16,6.8];

s1_T=mob_calc_T(s1(7,3),s1_fit(1),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.

5,s1_fit(2),z0,2);

s2_T=mob_calc_T(s2(7,3),s2_fit(1),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.

5,s2_fit(2),z0,2);

a1_T=mob_calc_T(a1(7,3),a1_fit(1),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o3

2,10.5,a1_fit(2),z0,2);

a2_T=mob_calc_T(a2(7,3),a2_fit(1),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o3

2,10.5,a2_fit(2),z0,2);

g1_T=mob_calc_T(g1(7,3),g1_fit(1),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g1_

fit(2),z0,1);

g2_T=mob_calc_T(g2(7,3),g2_fit(1),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g2_

fit(2),z0,1);

t=logspace(0,3,1000);

mobtemp=[t',s1_T(:,1),s2_T(:,1),a1_T(:,1),a2_T(:,1),g1_T(:,1),g2_T(:,1)];

%Plot the measured and simulated data as a function of Temp

%%

semilogx(t,s1_T(:,1)); hold on

semilogx(t,s2_T(:,1),'r');

semilogx(t,a1_T(:,1),'g');

semilogx(t,a2_T(:,1),'c');

semilogx(t,g1_T(:,1),'m');

semilogx(t,g2_T(:,1),'k');

semilogx(s1(:,1),s1(:,2),'x');

semilogx(s2(:,1),s2(:,2),'xr');

semilogx(a1(:,1),a1(:,2),'xg');

semilogx(a2(:,1),a2(:,2),'xc');

semilogx(g1(:,1),g1(:,2),'xm');

semilogx(g2(:,1),g2(:,2),'xk');

%

%

plot(t,s1_T(:,1)); hold on

plot(t,s2_T(:,1),'r');

plot(t,a1_T(:,1),'g');

121

plot(t,a2_T(:,1),'c');

plot(t,g1_T(:,1),'m');

plot(t,g2_T(:,1),'k');

plot(s1(:,1),s1(:,2),'x');

plot(s2(:,1),s2(:,2),'xr');

plot(a1(:,1),a1(:,2),'xg');

plot(a2(:,1),a2(:,2),'xc');

plot(g1(:,1),g1(:,2),'xm');

plot(g2(:,1),g2(:,2),'xk');

%

axis([5 400 1e3 2.2e3]);

xlabel('Temperature [K]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

hold off

pause();

%% Mobility v. Nsh

%function mob = mob_calc_Nsh(nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%Cacluate as function of Nsh

s1_N=mob_calc_Nsh(s1_fit(1),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,s1_f

it(2),z0,2);

s2_N=mob_calc_Nsh(s2_fit(1),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,s2_f

it(2),z0,2);

a1_N=mob_calc_Nsh(a1_fit(1),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,a1_fit(2),z0,2);

a2_N=mob_calc_Nsh(a2_fit(1),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,a2_fit(2),z0,2);

g1_N=mob_calc_Nsh(g1_fit(1),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g1_fit(2)

,z0,1);

g2_N=mob_calc_Nsh(g2_fit(1),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g2_fit(2)

,z0,1);

n=logspace(10,14,1e3);

mobNsh=[n',s1_N(:,1),s2_N(:,1),a1_N(:,1),a2_N(:,1),g1_N(:,1),g2_N(:,1)];

%Plot the measured and simulated data as a function of Nsh

loglog(n,s1_N(:,1),'b'); hold on

loglog(n,s2_N(:,1),'r');

loglog(n,a1_N(:,1),'g');

loglog(n,a2_N(:,1),'c');

loglog(n,g1_N(:,1),'m');

loglog(n,g2_N(:,1),'k');

loglog(s1(7,3)/1e4,s1(7,2),'xb');

loglog(s2(7,3)/1e4,s2(7,2),'xr');

loglog(a1(7,3)/1e4,a1(7,2),'xg');

loglog(a2(7,3)/1e4,a2(7,2),'xc');

loglog(g1(7,3)/1e4,g1(7,2),'xm');

loglog(g2(7,3)/1e4,g2(7,2),'xk');

axis([1.4e12 1e14 5e2 4e3]);

xlabel('N_s_h [cm^-2]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

hold off

pause();

122

%% Mobility v. Nimp

%function mob = mob_calc_Nimp(nsh,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%Calculate as function of Nimp

s1_Ni=mob_calc_Nimp(s1(7,3),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,s1_f

it(2),z0,2);

s2_Ni=mob_calc_Nimp(s2(7,3),ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,s1_f

it(2),z0,2);

a1_Ni=mob_calc_Nimp(a1(7,3),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,a1_fit(2),z0,2);

a2_Ni=mob_calc_Nimp(a2(7,3),kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,a1_fit(2),z0,2);

g1_Ni=mob_calc_Nimp(g1(7,3),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g1_fit(2)

,z0,1);

g2_Ni=mob_calc_Nimp(g2(7,3),kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,g1_fit(2)

,z0,1);

n=logspace(10,14,1e3);

mobNimp=[n',s1_Ni(:,1),s2_Ni(:,1),a1_Ni(:,1),a2_Ni(:,1),g1_Ni(:,1),g2_Ni(:,1)];

%Plot the measured and simulated data as a function of Nimp

loglog(n,s1_Ni(:,1),'b'); hold on;

loglog(n,s2_Ni(:,1),'r');

loglog(n,a1_Ni(:,1),'g');

loglog(n,a2_Ni(:,1),'c');

loglog(n,g1_Ni(:,1),'m');

loglog(n,g2_Ni(:,1),'k');

loglog(s1_fit(1)/1e4,s1(7,2),'xb');

loglog(s2_fit(1)/1e4,s2(7,2),'xr');

loglog(a1_fit(1)/1e4,a1(7,2),'xg');

loglog(a2_fit(1)/1e4,a2(7,2),'xc');

loglog(g1_fit(1)/1e4,g1(7,2),'xm');

loglog(g2_fit(1)/1e4,g2(7,2),'xk');

axis([1e10 4.5e13 5e2 9e4]);

xlabel('N_imp [cm^-2]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

hold off

B.2. Script for projections on various substrates %% Projected mobility simulations

% This script calculates mobility as a function of temperature, sheet

% carrier density, and impurity concentration for a variety of substrates.

% This script calls three functions (mob_calc_T, mob_calc_Nsh, and

% mob_calc_Nimp) and produces graphical output for each relation.

% Updated 2012-10-01

%clear variables/fig

clc; clf;

clear all;

%Relevant SOP mode energies in meV

hw_sio21=59.98;

123

hw_sio22=146.51;

hw_al2o31=55.01;

hw_al2o32=94.29;

hw_hfo21=19.42;

hw_hfo22=52.87;

hw_zro21=25.02;

hw_zro22=70.80;

hw_aln1=83.6;

hw_aln2=104.96;

hw_gan1=88.5;

hw_gan2=110; %Estimated value, not included if modes==1

hw_sic1=116;

hw_sic2=167.58;

hw_bn1=120;

hw_bn2=140; %Estimated value, not included if modes==1

%Specify dielectric constants

ksio2_1=3.9;

ksio2_2=2.5;

ksio2_i=3.05;

kal2o3_2=3.2;

kal2o3_1=12.35;

kal2o3_i=7.27;

kaln_1=9.14;

kaln_2=4.8;

kaln_i=7.35;

khfo2_1=22.0;

khfo2_2=5.03;

khfo2_i=6.58;

kzro2_1=24.0;

kzro2_2=4.00;

kzro2_i=7.75;

kgan_1=10.4;

kgan_2=5.35;

kgan_i=(kgan_1+kgan_2)/2;

ksic_1=9.7;

ksic_2=6.5;

ksic_i=(ksic_1+ksic_2)/2;

kbn_1=4;

kbn_2=3.5;

kbn_i=(kbn_1+kbn_2)/2;

%Specify relevant parameters

z0=3.5e-10; %Interaction distance, meters

nsh=1e4*1e12; %Sheet carrier density, m^-2

nimp=1e4*5e11; %Impurity concentration, m^-2

124

%SOP fitting parameters

b_sio2=9;

b_al2o3=25;

b_aln=10;

b_hfo2=10;

b_zro2=10;

b_gan=7.5;

b_sic=10;

b_bn=10;

%% Mobility v. Temperature

%function mob = mob_calc_T(nsh,nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

sio2_t=mob_calc_T(nsh,nimp,ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,b_sio

2,z0,2);

al2o3_t=mob_calc_T(nsh,nimp,kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,b_al2o3,z0,2);

aln_t=mob_calc_T(nsh,nimp,kaln_1,kaln_2,kaln_i,hw_aln1,hw_aln2,10.5,b_aln,z0,2)

;

hfo2_t=mob_calc_T(nsh,nimp,khfo2_1,khfo2_2,khfo2_i,hw_hfo21,hw_hfo22,10.5,b_hfo

2,z0,2);

zro2_t=mob_calc_T(nsh,nimp,kzro2_1,kzro2_2,kzro2_i,hw_zro21,hw_zro22,10.5,b_zro

2,z0,2);

gan_t=mob_calc_T(nsh,nimp,kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,b_gan,z0,1)

;

sic_t=mob_calc_T(nsh,nimp,ksic_1,ksic_2,ksic_i,hw_sic1,hw_sic2,10.5,b_sic,z0,2)

;

bn_t=mob_calc_T(nsh,nimp,kbn_1,kbn_2,kbn_i,hw_bn1,hw_bn2,10.5,b_bn,z0,1);

t=logspace(0,3,1000);

mobtemp=[t',sio2_t(:,1),al2o3_t(:,1),aln_t(:,1),hfo2_t(:,1),zro2_t(:,1),...

gan_t(:,1),sic_t(:,1),bn_t(:,1)];

%Plot the measured and simulated data as a function of Temp

%

semilogx(t,sio2_t(:,1),'r','linewidth',1.5); hold on

semilogx(t,al2o3_t(:,1),'k','linewidth',1.5)

semilogx(t,aln_t(:,1),'b','linewidth',1.5)

semilogx(t,hfo2_t(:,1),'g','linewidth',1.5)

semilogx(t,zro2_t(:,1),'c','linewidth',1.5)

semilogx(t,gan_t(:,1),'y','linewidth',1.5)

semilogx(t,sic_t(:,1),'m','linewidth',1.5)

semilogx(t,bn_t(:,1),'k:','linewidth',1.5)

%

%Linear plot

plot(t,sio2_t(:,1),'r','linewidth',1.5); hold on

plot(t,al2o3_t(:,1),'k','linewidth',1.5)

plot(t,aln_t(:,1),'b','linewidth',1.5)

plot(t,hfo2_t(:,1),'g','linewidth',1.5)

plot(t,zro2_t(:,1),'c','linewidth',1.5)

plot(t,gan_t(:,1),'y','linewidth',1.5)

plot(t,sic_t(:,1),'m','linewidth',1.5)

plot(t,bn_t(:,1),'k:','linewidth',1.5)

axis([1 300 8e3 4e4]);

xlabel('Temperature [K]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

legend('SiO_2','Al_2O_3','AlN','HfO_2','ZrO_2','GaN','SiC','BN')

pause();

125

hold off

%% Mobility v. Nsh

%function mob = mob_calc_Nsh(nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%Cacluate as function of Nsh

sio2_nsh=mob_calc_Nsh(nimp,ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,b_sio

2,z0,2);

al2o3_nsh=mob_calc_Nsh(nimp,kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5

,b_al2o3,z0,2);

aln_nsh=mob_calc_Nsh(nimp,kaln_1,kaln_2,kaln_i,hw_aln1,hw_aln2,10.5,b_aln,z0,2)

;

hfo2_nsh=mob_calc_Nsh(nimp,khfo2_1,khfo2_2,khfo2_i,hw_hfo21,hw_hfo22,10.5,b_hfo

2,z0,2);

zro2_nsh=mob_calc_Nsh(nimp,kzro2_1,kzro2_2,kzro2_i,hw_zro21,hw_zro22,10.5,b_zro

2,z0,2);

gan_nsh=mob_calc_Nsh(nimp,kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,b_gan,z0,1)

;

sic_nsh=mob_calc_Nsh(nimp,ksic_1,ksic_2,ksic_i,hw_sic1,hw_sic2,10.5,b_sic,z0,2)

;

bn_nsh=mob_calc_Nsh(nimp,kbn_1,kbn_2,kbn_i,hw_bn1,hw_bn2,10.5,b_bn,z0,1);

n=logspace(10,14,1e3);

mobnsh=[n',sio2_nsh(:,1),al2o3_nsh(:,1),aln_nsh(:,1),hfo2_nsh(:,1),...

zro2_nsh(:,1),gan_nsh(:,1),sic_nsh(:,1),bn_nsh(:,1)];

%Plot the measured and simulated data as a function of Nsh

%

loglog(n,sio2_nsh(:,1),'r'); hold on;

loglog(n,al2o3_nsh(:,1),'k')

loglog(n,aln_nsh(:,1),'b')

loglog(n,hfo2_nsh(:,1),'g')

loglog(n,zro2_nsh(:,1),'c')

loglog(n,gan_nsh(:,1),'y')

loglog(n,sic_nsh(:,1),'m')

loglog(n,bn_nsh(:,1),'k:')

%

semilogy(n,sio2_nsh(:,1),'r','linewidth',1.5); hold on;

semilogy(n,al2o3_nsh(:,1),'k','linewidth',1.5)

semilogy(n,aln_nsh(:,1),'b','linewidth',1.5)

semilogy(n,hfo2_nsh(:,1),'g','linewidth',1.5)

semilogy(n,zro2_nsh(:,1),'c','linewidth',1.5)

semilogy(n,gan_nsh(:,1),'y','linewidth',1.5)

semilogy(n,sic_nsh(:,1),'m','linewidth',1.5)

semilogy(n,bn_nsh(:,1),'k:','linewidth',1.5)

axis([0.5e12 3e12 7e3 2.5e4]);

xlabel('N_s_h [cm^-^2]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

legend('SiO_2','Al_2O_3','AlN','HfO_2','ZrO_2','GaN','SiC','BN')

pause();

hold off

%% Mobility v. Nimp

%function mob = mob_calc_Nimp(nsh,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%Calculate as function of Nimp

sio2_ni=mob_calc_Nimp(nsh,ksio2_1,ksio2_2,ksio2_i,hw_sio21,hw_sio22,10.5,b_sio2

,z0,2);

126

al2o3_ni=mob_calc_Nimp(nsh,kal2o3_1,kal2o3_2,kal2o3_i,hw_al2o31,hw_al2o32,10.5,

b_al2o3,z0,2);

aln_ni=mob_calc_Nimp(nsh,kaln_1,kaln_2,kaln_i,hw_aln1,hw_aln2,10.5,b_aln,z0,2);

hfo2_ni=mob_calc_Nimp(nsh,khfo2_1,khfo2_2,khfo2_i,hw_hfo21,hw_hfo22,10.5,b_hfo2

,z0,2);

zro2_ni=mob_calc_Nimp(nsh,kzro2_1,kzro2_2,kzro2_i,hw_zro21,hw_zro22,10.5,b_zro2

,z0,2);

gan_ni=mob_calc_Nimp(nsh,kgan_1,kgan_2,kgan_i,hw_gan1,hw_gan2,10.5,b_gan,z0,1);

sic_ni=mob_calc_Nimp(nsh,ksic_1,ksic_2,ksic_i,hw_sic1,hw_sic2,10.5,b_sic,z0,2);

bn_ni=mob_calc_Nimp(nsh,kbn_1,kbn_2,kbn_i,hw_bn1,hw_bn2,10.5,b_bn,z0,1);

ni=logspace(10,14,1e3);

mobni=[ni',sio2_ni(:,1),al2o3_ni(:,1),aln_ni(:,1),hfo2_ni(:,1),...

zro2_ni(:,1),gan_ni(:,1),sic_ni(:,1),bn_ni(:,1)];

%Plot the measured and simulated data as a function of Nimp

loglog(ni,sio2_ni(:,1),'r','linewidth',1.5); hold on

loglog(ni,al2o3_ni(:,1),'k','linewidth',1.5)

loglog(ni,aln_ni(:,1),'b','linewidth',1.5)

loglog(ni,hfo2_ni(:,1),'g','linewidth',1.5)

loglog(ni,zro2_ni(:,1),'c','linewidth',1.5)

loglog(ni,gan_ni(:,1),'y','linewidth',1.5)

loglog(ni,sic_ni(:,1),'m','linewidth',1.5)

loglog(ni,bn_ni(:,1),'k:','linewidth',1.5)

axis([1e11 3e13 5e2 5e4]);

xlabel('N_i_m_p [cm^-^2]')

ylabel('Mobility [cm^2 V^-1 s^-1]')

legend('SiO_2','Al_2O_3','AlN','HfO_2','ZrO_2','GaN','SiC','BN')

hold off

B.3. Temperature function %% Graphene mobility v. temp calculation

% CAH 2012-07-09

%

%--------------------------------------------------------------------------

%--------------------------------------------------------------------------

function mob = mob_calc_T(nsh,nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

% "nsh" is sheet carrier density, cm-2

% "nimp" is effective impurity concentration, cm-2

% "k1" is low frequency dielectric constant

% "k2" is high frequency dielectric constant

% "ki" is intermediate frequency dielectric constant

% "hwSO1" is energy of first SOP mode in meV

% "hwSO2" is energy of second SOP mode in meV

% "alpha" is first SOP fitting parameter

% "beta" is second SOP fitting parameter

% "z0" is interaction distance in meters

% "modes" is number of SO mode energies available

%--------------------------------------------------------------------------

%define constants

h=6.626e-34; %Planck constant, J-s

hbar=h/2/pi; %Reduced Planck constant, J-s

q=1.602e-19; %Fundamental charge, C

127

eps0=8.854e-12; %Vacuum permittivity, F/m

sigma_m=7.6e-8*1e-3/1e-4; %Graphene area density, kg/m2

vf=1e6; %Graphene Fermi velocity, m/s

vp=20e3; %Graphene acoustic phonon velocity, m/s

Dac=4.8*q; %Graphene acoustic deformation potential, J

D0=25.6e10*q; % eV/A -> J/m 25.6 eV/A,

hw0=140e-3*q; % meV -> J

w0=hw0/hbar;

%--------------------------------------------------------------------------

%instantiate temperature and Nsh vector

t=logspace(0,3,1000).';

n=t;

for j=1:length(t)

n(j)=nsh;

end

ni=t;

for j=1:length(t)

ni(j)=nimp;

end

%--------------------------------------------------------------------------

%calculate Ek of carriers and density of states? and energy with Temp

Ek=hbar*vf.*sqrt(pi.*n);

kF=sqrt(pi.*n); %%% 1/m

DEf=2.*Ek./(pi*(hbar*vf)^2);

kT=0.0259.*q.*(t./300);

%--------------------------------------------------------------------------

%%%% Acoustic Phonon scattering rate Jena (high field)%%%%

Sac=Dac^2.*kT.*Ek./(2*hbar^3*vf^2*sigma_m*vp^2);

%%%% Optical Phonon scattering rate Jena (high field)%%%%

Nop=1./(exp(hw0./kT)-1);

if Ek<=hw0

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop=Sop_abs;

elseif Ek>hw0

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=D0^2.*(Nop+1).*(Ek-hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=0;

Sop=Sop_ems+Sop_abs;

end

%%%%% Coulomb interaction Konar Paper(Effect of Highk) %%%%

kappa=(k1+1)/2;

rs=q^2/(2*pi*eps0*hbar*vf*kappa);

F=quadl(@(m) m.^2.*sqrt(1-m.^2)./(m+rs).^2,0,1);

Scol=ni/pi/hbar.*(q^2/(2*eps0*kappa)).^2*F./Ek;

%%%%% SO scattering Avouris (Current saturation paper) %%%%

if(modes==2)

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

128

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(ki+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO1=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

mobSO2=beta*hbar^2*vf/q^2*q*vf/Fv2^2*exp(k02*z0)./(Nso2.*sqrt(n));

mobSO=(1./mobSO1+1./mobSO2).^-1;

Sso=q*vf^2./Ek./mobSO;

else

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(k2+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

Sso=q*vf^2./Ek./mobSO;

end

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%% Add up all the scattering and convert to mob %%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

mobac=q*vf^2.*(1./Sac)./Ek.*1e4;

mobop=q*vf^2.*(1./Sop)./Ek.*1e4;

mobcol=q*vf^2.*(1./Scol)./Ek.*1e4;

mobso=mobSO.*1e4;

Stot=Sop+Sac+Scol+Sso;

tau=1./Stot;

mob=q*vf^2.*tau./Ek.*1e4;

mob=[mob mobac mobop mobcol mobso];

B.4. Sheet carrier density function %% Graphene mobility v. Nsh calculation

% This function is called by other scripts to calculate mobility as a

% function of sheet carrier density.

% Updated 2012-08-28

%

%--------------------------------------------------------------------------

%--------------------------------------------------------------------------

function mob = mob_calc_Nsh(nimp,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%--------------------------------------------------------------------------

%define constants

hbar=6.626e-34/2/pi;

q=1.6e-19;%Coloumbs

eps0=8.85e-12;%F/m

Dac=6.8*q;%4.5, 6.8

sigma_m=7.6e-8*1e-3/1e-4;%kg/m2

129

vf=1e6;%m/s

vp=20e3;%m/s

D0=25.6e10*q; %%eV/A -> J/m 25.6 eV/A,

hw0=140e-3*q; %%meV -> J

w0=hw0/hbar;

%--------------------------------------------------------------------------

%instantiate Nsh and temperature vector

n=1e4.*logspace(10,14,1e3).';

t=n;

for j=1:length(n)

t(j)=300;

end

%--------------------------------------------------------------------------

%calculate Ek of carriers and density of states? and energy with Temp

Ek=hbar*vf.*sqrt(pi.*n);

kF=sqrt(pi.*n);%%% 1/m

DEf=2.*Ek./(pi*(hbar*vf)^2);

kT=0.0259.*q.*(t./300);

%--------------------------------------------------------------------------

%%%% Acoustic Phonon scattering rate Jena (high field)%%%%

Sac=Dac^2.*kT.*Ek./(2*hbar^3*vf^2*sigma_m*vp^2);

%%%% Optical Phonon scattering rate Jena (high field)%%%%

Nop=1./(exp(hw0./kT)-1);

if Ek<=hw0

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop=Sop_abs;

else

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=D0^2.*(Nop+1).*(Ek-hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=0;

Sop=Sop_ems+Sop_abs;

end

%%%%% Coulomb interaction Konar Paper(Effect of Highk) %%%%

kappa=(k1+1)/2;

rs=q^2/(2*pi*eps0*hbar*vf*kappa);

F=quad(@(m) m.^2.*sqrt(1-m.^2)./(m+rs).^2,0,1);

Scol=nimp/pi/hbar.*(q^2/(2*eps0*kappa)).^2*F./Ek;

%%%%% SO scattering Avouris (Current saturation paper) %%%%

if(modes==2)

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(ki+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO1=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

mobSO2=beta*hbar^2*vf/q^2*q*vf/Fv2^2*exp(k02*z0)./(Nso2.*sqrt(n));

130

mobSO=(1./mobSO1+1./mobSO2).^-1;

Sso=q*vf^2./Ek./mobSO;

else

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(k2+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

Sso=q*vf^2./Ek./mobSO;

end

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%% Add up all the scattering and convert to mob %%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

mobac=q*vf^2.*(1./Sac)./Ek.*1e4;

mobop=q*vf^2.*(1./Sop)./Ek.*1e4;

mobcol=q*vf^2.*(1./Scol)./Ek.*1e4;

mobso=mobSO.*1e4;

Stot=Sop+Sac+Scol+Sso;

tau=1./Stot;

mob=q*vf^2.*tau./Ek.*1e4;

mob=[mob mobac mobop mobcol mobso];

B.5. Impurity Concentration Function %% Graphene mobility v. Nimp calculation

% This function is called by other scripts to calculate mobility as a

% function of charged impurity concentration.

% Updated 2012-08-28

%

%--------------------------------------------------------------------------

%--------------------------------------------------------------------------

function mob = mob_calc_Nimp(nsh,k1,k2,ki,hwSO1,hwSO2,alpha,beta,z0,modes)

%--------------------------------------------------------------------------

%define constants

hbar=6.626e-34/2/pi; %J-s

q=1.602e-19; %Coloumbs

eps0=8.854e-12; %F/m

Dac=6.8*q;%4.5, 6.8

sigma_m=7.6e-8*1e-3/1e-4; %Mass/area in kg/m2

vf=1e6; %Fermi velocity in m/s

vp=20e3; %Something in m/s

D0=25.6e10*q; %%eV/A -> J/m 25.6 eV/A,

hw0=140e-3*q; %%meV -> J

w0=hw0/hbar;

%--------------------------------------------------------------------------

%instantiate Nimp, Nsh, and temperature vector

131

nimp=1e4.*logspace(10,14,1e3).';

t=nimp;

for j=1:length(nimp)

t(j)=300;

end

n=t;

for j=1:length(nimp)

n=nsh;

end

%--------------------------------------------------------------------------

%calculate Ek of carriers and density of states? and energy with Temp

Ek=hbar*vf.*sqrt(pi.*n);

kF=sqrt(pi.*n);%%% 1/m

DEf=2.*Ek./(pi*(hbar*vf)^2);

kT=0.0259.*q.*(t./300);

%--------------------------------------------------------------------------

%%%% Acoustic Phonon scattering rate Jena (high field)%%%%

Sac=Dac^2.*kT.*Ek./(2*hbar^3*vf^2*sigma_m*vp^2);

%%%% Optical Phonon scattering rate Jena (high field)%%%%

Nop=1./(exp(hw0./kT)-1);

if Ek<=hw0

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop=Sop_abs;

else

Sop_abs=D0^2.*(Nop).*(Ek+hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=D0^2.*(Nop+1).*(Ek-hw0)./(2*hbar^2*vf^2*sigma_m*w0);

Sop_ems=0;

Sop=Sop_ems+Sop_abs;

end

%%%%% Coulomb interaction Konar Paper(Effect of Highk) %%%%

kappa=(k1+1)/2;

rs=q^2/(2*pi*eps0*hbar*vf*kappa);

F=quad(@(m) m.^2.*sqrt(1-m.^2)./(m+rs).^2,0,1);

Scol=nimp/pi/hbar.*(q^2/(2*eps0*kappa)).^2*F./Ek;

%%%%% SO scattering Avouris (Current saturation paper) %%%%

if(modes==2)

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(ki+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO1=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

mobSO2=beta*hbar^2*vf/q^2*q*vf/Fv2^2*exp(k02*z0)./(Nso2.*sqrt(n));

mobSO=(1./mobSO1+1./mobSO2).^-1;

Sso=q*vf^2./Ek./mobSO;

else

hwSO1=hwSO1*1e-3*q;

hwSO2=hwSO2*1e-3*q;

wSO1=hwSO1/hbar;

wSO2=hwSO2/hbar;

132

alpha=abs(alpha);

k01=sqrt((2*wSO1/vf)^2+alpha.*n);

k02=sqrt((2*wSO2/vf)^2+alpha.*n);

Nso1=1./(exp(hwSO1./kT)-1);

Nso2=1./(exp(hwSO2./kT)-1);

Fv1=hwSO1/2/pi*(1/(k2+1)-1/(k1+1));

Fv2=hwSO2/2/pi*(1/(k2+1)-1/(ki+1));

beta=abs(beta);

mobSO=beta*hbar^2*vf/q^2*q*vf/Fv1^2*exp(k01*z0)./(Nso1.*sqrt(n));

Sso=q*vf^2./Ek./mobSO;

end

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%% Add up all the scattering and convert to mob %%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

mobac=q*vf^2.*(1./Sac)./Ek.*1e4;

mobop=q*vf^2.*(1./Sop)./Ek.*1e4;

mobcol=q*vf^2.*(1./Scol)./Ek.*1e4;

mobso=mobSO.*1e4;

Stot=Sop+Sac+Scol+Sso;

tau=1./Stot;

mob=q*vf^2.*tau./Ek.*1e4;

mob=[mob mobac mobop mobcol mobso];