synchronous state machine design
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Synchronous State Machine Design
Subject :- Digital Electronics (2131004)
:: Presented by ::Mr. Adarsh Patel (36)Mr. Mahesh Bhuva (06)Mr. Krishna Mishra (30)Mr. Praful Rathod (45)
:: Guided faculty ::Prof. Jaydeep Gheewala
Prof. Arohi Vora
Sarvajanik College of Engineering & Technology
CO-(eve) 2nd year
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The State Machine:
A state machine or finite state machine (FSM) is an abstract model describing the synchronous sequential machine.
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Models of representing sequential circuits
• The synchronous or clocked sequential circuits are represented by two models.
• 1. Moore circuit: In this model, the output depends only on the present state of the flip-flops.
• 2. Mealy circuit : In this model, the output depends on both the present state of the flip-flop(s) and the input(s).
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State Diagram• The state diagram or state graph is a pictorial representation of the
relationships between the present state, the input, the next state, and the output of a sequential circuit, i.e. the state diagram is a pictorial representation of the behaviour of a sequential circuit.
State diagram and state table using mealy machine
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State Table• Even though the behaviour of a sequential circuit can be
conveniently described using a state diagram, for its implementation the information contained in the state diagram is to be translated into a state table. The state table is a tabular representation of the state diagram.
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State Reduction
• The state reduction technique basically avoids the introduction of redundant states.
• It reduces no. of FFs and logic gates.
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Memory Elements• D flip flop
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• T flip flop
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• S R flip flop
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• J K flip flop
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Serial binary adder
• Step 1. Word statement of the problem• Step 2. State diagram • Step 3. State table.
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• Step 6. & 7. Choose type of flip-flops and form the excitation table and solve the K-maps and minimal
expressions 2
• Step 4. Reduced standard form state table.• Step 5. State assignment and transition and output table:
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• Step 8. Implementation
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The Sequence Detector
• Mealy type model
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PARITY-BIT GENERATORodd Parity-bit generator
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3 Bit Gray Code Counter
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