SVT INFN LNF - 28 Marzo 2007Alberto Annovi1 STARS: Supercomputers for Trigger Analysis and Real-time...
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Transcript of SVT INFN LNF - 28 Marzo 2007Alberto Annovi1 STARS: Supercomputers for Trigger Analysis and Real-time...
INFN LNF - 28 Marzo 2007 Alberto Annovi 1
SVT
STARS: Supercomputers for Trigger Analysis and Real-time
Selections
Alberto AnnoviIstituto Nazionale di Fisica Nucleare
Laboratori Nazionali di Frascati
Proposal for Ideas - FP VII
INFN LNF - 28 Marzo 2007 Alberto Annovi 2
SVTOutline
• STARS
• Trigger: we always need more power!
• CDF trigger problems/upgrades/solutions
• More for the next future?
• SVT & AM could survive after CDF at both
level 1 (CMS @SLHC? SLIM5) and level 2 (ATLAS?)
other applications?
INFN LNF - 28 Marzo 2007 Alberto Annovi 3
SVTSTARS
STARS: Supercomputers for Trigger Analysis and Real-time SelectionsCurrent and future (HEP) experiments look for
extremely rare processes hidden by severe background conditions.
The trigger dramatically affects our ability to extract these tiny signals from the huge backgrounds.
export the successful parallel CDF trigger approaches to new experiments Challenging: competition with Farm approach
New experiments need powerful exclusive, high resolution triggers! The trigger cannot be “inclusive, low resolution” any more! very large comupting power needed time is critical
INFN LNF - 28 Marzo 2007 Alberto Annovi 4
SVTLooking for very rare phenomena
Hans Bethe: “Young man, if the cross section is so low, increase the luminosity !”
@hadronic collider not only the luminosity has to be increased, but also the bandwidth, the purity … From collision point all the way to PRL editors Trigger is a critical part of this process: errors cause not-recoverable losses!
INFN LNF - 28 Marzo 2007 Alberto Annovi 5
SVTCDFTrigger power: (1) TTT: the displaced
TrkTriggerbut also Terrific Tracking (@ L1/L2 )
• Run I collected O(1) Bs--> Ds(all Ds modes)• Run II collected ~2000 Bs--> Ds(Ds--> -->K+K-])• Compare with only 10x integrated luminosity!• The trigger had a much bigger impact than Tevatron
upgrade!!!Without SVT
With SVT
RUN I
RUN II
The SVT advantage:3 orders of magnitude
B0 had + had Trigger
Ks D0
S. Donati, M. Morello, G. Punzi, D. Tonelli, G.
Volpi
Mhh (GeV)
L3 plot 2001SVT TDR 1995
INFN LNF - 28 Marzo 2007 Alberto Annovi 7
SVTSVT: many different boards 2 years for upgrade PULSAR
x12 wedges
Hit Finder
AM Sequencer AM Board
Detector Data
Hits
SuperStrip
Matching
PatternsRoads
L2 CPU
AM++
Hit Buffer
Tracks + Corresponding
Hits
Roads + Correspondin
g Hits
Track Fitter
AMSRW
HB++TF++Powerful flexible
PULSARSJust add Firmware GF++
P. Catastini et al.
INFN LNF - 28 Marzo 2007 Alberto Annovi 8
SVT
On the opposite side: FPGA for the same AMchip
P. Giannetti et al. “A Programmable Associative Memory for Track Finding”, Nucl. Intsr. and
Meth., vol. A413/2-3, pp.367-373, (1998).
AM chips from 1992 to 2005• (90’s) Full custom VLSI chip - 0.7m (INFN-Pisa)
• 128 patterns, 6x12bit words each
• 32k roads / wedgeF. Morsani et al., “The AMchip: a Full-custom MOS VLSI
Associative memory for Pattern Recognition”, IEEE Trans. on Nucl. Sci., vol. 39, pp. 795-797, (1992).
In the middle: Standard Cell 0.18 m(INFN Ferrara, Pisa) 5000 pattern/chip AMchip
L. Sartori, A. Annovi et al., “A VLSI Processor for Fast Track Finding Based on Content Addressable Memories”, IEEE Transactions on Nuclear Science, Volume 53, Issue 4, Part 2, Aug. 2006 Page(s):2428 - 2433
NEXT:NEW
VERSIONFor both L1 & L2
INFN LNF - 28 Marzo 2007 Alberto Annovi 9
SVT
Muon acceptance
Inclusive =31%
Exclusive =63%
Electron acceptance
Exclusive =64%
Inclusive =36%Release lepton quality cuts --> gain acceptance x2Control rate with jet/MET requirements --> exclusive triggersNeed high-quality jet/MET trigger --> under upgrade!
CDFTrigger power: (2) also Terrific Calorimeter selection (@L2 )
WH--> lvbb
triggers
INFN LNF - 28 Marzo 2007 Alberto Annovi 10
SVTExample: New exclusive
WH-> evbb triggerM. Casarsa et al. (in progress)
A real >80% efficient triggerwith low rate @ peak lumi Using L2 clustering upgrade
Tools
L1_ETTOW>10 GeV
L1_MET >15 GeV
L2_MET > 20 GeV
L2_Ete > 8 GeV
L2_2Jet> 12 GeV
INFN LNF - 28 Marzo 2007 Alberto Annovi 11
SVTCDF LVL2 Calo upgradeNeed a cone algorithm!
MET>15 GeV
Better Resolution &EfficiencyTurn onfor MET 20 32 L3MET
Better jetResolution
15<ET<18
L2cone
Pacman
Same PulsarsSame
mezzanines
INFN LNF - 28 Marzo 2007 Alberto Annovi 12
SVTCPU & STARS
LHC HLT strategy: we “JUST” buy CPUs and write software…CPUs are flexible but missing time can freeze the flexibility!
SVT approach: (1st STARS prototype born for a tough JOB)split the algorithmamong different technologiesVLSIs (AM chip), FPGAs (Pulsars+mezzanines), CPUsUse the appropriate tooli.e. no time waste!
Proton-antiprotoncollision point
B decay vertex
Impact parameter (d)
Transverse view
~ 1 mm
We will also buy STARS blocks(Pulsars & AM chips) & write firmware + software
INFN LNF - 28 Marzo 2007 Alberto Annovi 13
SVT
SVT
Fast Track (FTK) Gr V for L2 @ LHC
SLIM5 Gr V for L1
Next challenge is silicon tracking at both Level 1 & Level 2
LHC
What next ?
Ideas fromP. GiannettiM. Dell’Orso
L. Ristori G. PunziA. Annovi
INFN LNF - 28 Marzo 2007 Alberto Annovi 14
SVT
CMS: 30 minimum bias events + H->ZZ->4
Tracks with Pt>2 GeV
Help!
30 minimum bias events + H->ZZ->4
Tracks with Pt>2 (or Pt>1) GeV for b/-tagging @ level 2; Pt>5 GeV for leptons @ level 1
Where is the Higgs?
FTK
A powerfultool
Where is the Higgs?
Online tracking: a tough problem
INFN LNF - 28 Marzo 2007 Alberto Annovi 15
SVTWhere could we insert FTK?
PIPELINE
LVL1LVL1
CALO MUON TRACKERCALO MUON TRACKER
BufferMemory
ROD
BufferMemory
FEFE
Raw dataROBs
2nd output
1st output
Fast Track + few(Road Finder) CPUs Fast Track + few(Road Finder) CPUs
Track dataROB
Track dataROB
high-qualitytracks:Pt>1 GeV
Ev/sec = 50~100 kHz
Very low impact on DAQ
No changeto LVL2
Fast network connectionFast network connection
CPU FARM (LVL2 Algorithms)CPU FARM (LVL2 Algorithms)
INFN LNF - 28 Marzo 2007 Alberto Annovi 16
SVTB-tagging @ ATLAS (w/o & w/ FTK)
LVL2
EF offline
ATLAS T&P march 2007
LVL2 vs offline10 times less rejection
EF vs offline difference being investigated
with Fast-TracK offlineb-tag performances @LVL2
With FTK use offline-qualitytracks for all triggers, e.g.
sophisticated triggers
INFN LNF - 28 Marzo 2007 Alberto Annovi 17
SVTFTKsim versus iPatRec - Resolution
Curvature Impact Parameter
Cot()
1/GeV cm rad
M. Dell’Orso, F. Crescioli, G. Punzi, G. Volpi, P. Giannetti et al. (Pisa-Chicago)
On going Real Time Tracking & b//Bs tagging performance study
INFN LNF - 28 Marzo 2007 Alberto Annovi 18
SVT
Trigger xsec (nb)
(MSSM Higgs)
Selected triggers with tracks/jets
•Di Muon trigger (J/Psi, Bs-> )•L1 two muons Pt>1.5•L2 Pt>2 && Dynamical Prescale
• will use SVT in the future•Z -> bb trigger (bjet calibration, top mass)
•L1 jet5, trk5.5, trk2.5•L2 two trk ip>160 m, ~ same z vertex
two jet5
Rate Bs-> with SVT
•Hadronic di tau•L1 2jet5, 2trk6•L2 2jet10, 2trk10
High Pt electron (W, Z, W+H, top)
•L1 EM8, trk8•L2 EM16, trk8
Luminosity (xE30 cm-2s-1)
INFN LNF - 28 Marzo 2007 Alberto Annovi 19
SVT
Note limited rejection power (slope) without tracker informationCMS-DAQ TDR
F. Palla Proposal (LECC06 workshop)
26 cm
34 cm
42 cm
50 cm
SLHC:• 100-400 Minimum Bias events/bx (12.5 ns - 50ns)• occupancy degrades performance of trigger algorithms
• Implies raising ET thresholds or use tracks• ~2000 tracks/bx in ||<1.5
•But only a few ‰ have pT>5 GeV/c
•This plan match with AMchip features!!!
4 pixel layer
CMS Muon Rate at L =1034 cm-2 s-1
Current CMS pixels have links for L1
INFN LNF - 28 Marzo 2007 Alberto Annovi 20
SVT
AMchip receives up to 6 parallel busesfor 6 layers at frequency:AMchip now: 50 MHz (Level 2)Next generation: 100 MHz or more Goal: use SAME CHIP for Level 2 & 1
1 AM for each enough-small space-time Patterns
Hits: position+time stampAll patterns inside a single chipN chips for N overlapping eventsidentified by the time stamp
Main problem: AM input Bandwidth,even if powerful: >10 Gbits/sec divide the detector in thin sectors. Each AM searches in a small
Same blocks --> different applications
x80 wedges
Similar use (L1 tracking) for
CMS (F.Palla proposal)
SLIM5 SuperB? (F. Forti, M. Giorgi et al.)
INFN LNF - 28 Marzo 2007 Alberto Annovi 21
SVTThe trigger harmonizes the experiment
exclusive selections
The power of a detector can cover the weakness of another
1. Weak coverage?
use only tracking & calorimeter to release muon identification
CDF: topmuons
2. Trigger power: no need for trigger dedicated detectors.The trigger MUST not constrain the detector design!
An alternative CMS L1 track triggerDouble layersmore materialto simplify thethe trigger.Is this a good idea?
INFN LNF - 28 Marzo 2007 Alberto Annovi 22
SVT
AM Board?
Detector Data
towers
Matching
Patterns
Recover Full resolution
data
L1?L2 CPU
Full resolution jet/electrons ?
AM++?
Hit Buffer
Same blocks --> different applications
SVT for Calo?MEG proven SVT Track Fitter algorithm could do offline gamma reconstruction with 800 phototubes.
Can we use “STARS” for offline-quality calorimeter reconstruction?Same structureSimilar HardwareTo be studied…@ LVL1 ?!?
GigaFitter
INFN LNF - 28 Marzo 2007 Alberto Annovi 23
SVTSame blocks --> different applications
AM: massive parallelism in data correlation searchescoincidence/anticoincidence of up to 12 measurements!
For example: Muon: T1&T2&T3¬(Ecal)¬(Hcal)&M1&M2&M3&M4&M5
LHCB CDF
INFN LNF - 28 Marzo 2007 Alberto Annovi 24
SVT
Creare un gruppo di esperti (ampio campo di conoscenze per algoritmi, trigger, fisica, diverse tecnologie e loro interconnessioni: FPGA, standard cell, CPUs, links) che possa in parte realizzare (CDF-FTK) in parte favorire la crescita delle idee esposte con:
1. massa critica sufficiente2. finestra temporale sufficientemente ampia
Cosa vogliamo fare con i fondi Ideas??
INFN LNF - 28 Marzo 2007 Alberto Annovi 25
SVT
1. Complete CDF: Hardware/Trigger studies/Analysis
2. FTK @ ATLAS (ongoing upgrade proposal Pisa/Chicago +….): Physics case/Hardware/Analysis (to be approved)
3. New AM chip for level1 – level2
Favor other project development for upgrades & other
CMS – SuperB ….. sharing:
1. Hardware (in particular new AM chip)
2. software tools (simulation/diagnostic-control-config.)
3. Trigger ideas
STARS could generate new Ideas projects:
Brain study – Routers – security(Cooperation)
STARS
CMS?
SuperBL1?
Brain Study
Routers-Security?
LHCB?
Cosa vogliamo fare con i fondi Ideas??
Add your idea here!!!
INFN LNF - 28 Marzo 2007 Alberto Annovi 26
SVTCHI SIAMO e Richieste VII FP
1. FRASCATI: A. Annovi (art. 36-PI, SVT upgrade ex-project leader), S. Torre (Ass. Ric., SVT operations manager)
2. PISA: P. Giannetti (Dir. Ric.), M. Dell’Orso (Prof. Ass.), L. Sartori (M. Curie OIF, AM chip designer, L2 cal. upgrade technical coordinator)
3. FERRARA: storica collab. Ape-CDF per AM standard cell. F.Schifano (RU), R. Tripiccione (Prof. Ord.) – Invitato a partecipare il gruppo Babar – speriamo che accetti
IDEAS tot 400 keuro/year (5 years):1. Man Power for 5 year: Frascati PI + 2 art. 23
– Pisa 1+1/2 art. 23 – Ferrara 1+1/2 art. 23 = 56 + 44 * 5 = 275 + 55 (20% over.) = 330 keuro
2. 70 keuro/year AM chip subcontractors. Prototype using MPW with very challenging technology (~350 keuro tot)
3. Missioni/conferenze/… = 0 euro
INFN LNF - 28 Marzo 2007 Alberto Annovi 27
SVT
BACKUP SLIDES
INFN LNF - 28 Marzo 2007 Alberto Annovi 28
SVTTracking processing time
With Associative Memoryprocessing time proportional to occupancy
10x luminosity --> 10x AM hardware
With CPUsprocessing time proportional to combinatorialharder to predict!Hardware needs increase exponentially with luminosity!10x luminosity --> e10 times CPUs….
INFN LNF - 28 Marzo 2007 Alberto Annovi 29
SVT
Layer 0: ~25 fibers bringing ~40 Hits/12 ns... ...
AM EV0
AM EV1
AM EV40
...
1 Hit/10 ns
1 Hit/10 ns
1 Hit/10 ns
1 FIFO/fiber
From otherlayers
From otherlayers
From otherlayers
Distribute hits into different sets of
registers depending on Event #
FPGA
The switch board
1 switch / layer
layer 0
AM latency =passthrough time (10bx?)+ # hits * clock period
AM clock (>100MHz)Here is were # of hits
and its fluctuations matter
INFN LNF - 28 Marzo 2007 Alberto Annovi 30
SVTVIRTEX 5: 65 nm- 550 MHz devices
XC5VSX95T: 160 x 46 CLB Array (Row x Col)
Each Slice:1. 4 6-input
Luts or RAM or SR
2. 4 FFs3. Wide MUXs4. Carry logic
160
46
244 39kbits BlockRams or Fifos+ 640 DSP Slices (organized in columns) ~1200 euro
INFN LNF - 28 Marzo 2007 Alberto Annovi 31
SVTB-tagging @ ATLAS (w/o & w/ FTK)
LVL2
EF offline
ATLAS T&P march 2007
LVL2 vs offline difference10 times less rejection
EF vs offline difference being investigated
with Fast-TracK offline b-tag performances @LVL2
ATLAS TP 31/3/2000
0.6
100
10
1000
b
Ru
INFN LNF - 28 Marzo 2007 Alberto Annovi 32
SVT
L=2x1033 cm-2 sec-1
HLT selection @ CMS H(200,500 GeV) 1,3h± + X
0.4
0.5
0.6
0.7
0.8
0.9
1.
0 0.02 0.06 0.1 0.14
(QCD 50-170 GeV) (H(200,500 GeV)
1,3h+X)
mH=500
mH=200
TRK tau on first calo jets
Pix tau on first calo jet
Staged-Pix tau on first calo jet
TRK tau on both calo jets
Calo tau on first jet
0.0070.004
Efficiency & jet rejection could be enhanced by using tracks before
calorimeters.
INFN LNF - 28 Marzo 2007 Alberto Annovi 33
SVTbbH/A bbbbATLAS-TDR-15 (1999)
MA (GeV)
tan
200
Analysis:4 b-jets |j|<2.5 PT
j > 70, 50, 30, 30 GeV efficiency 10%
Effect of trigger thresholds(before deferrals)
ATLAS + FTK triggers
13%3b leading3J + SE200
8%3 b-tagsMU6+ 2J
Effic.LVL2LVL1 As efficient as offline selection:full Higgs sensitivity A
TL-COM-DAQ-2002-022
INFN LNF - 28 Marzo 2007 Alberto Annovi 34
SVT
**** di-muon triggers for rare decays
LVL1: 2 RoI pT () > 6GeV (~500 Hz @ L=1033cm-2s-
1)
LVL2: Confirm each RoI from LVL1
In precision muon chambers Combine with Inner Detector
track Mass cut 4 GeV < M()<
6 GeVEF: Refit ID tracks in Level-2 RoI
Decay vertex reconstruction
Transverse Decay length cut:
Lxy > 200m
Efficiency estimation L2/EF:bb+- for both pT>6 GeV– 70% of B +-
– (60% of B K* + -)
Online reconstruction of di- mass, (MeV)
B K* +
-
B+ -Not normalized
BEAUTY 2006 talk
INFN LNF - 28 Marzo 2007 Alberto Annovi 35
SVT
3cm15cm150cm
Outerdriftchamber
Silicon stripdetector
Siliconclose-up
Impact parameter
Beam spot
1mm
Zoom-inInput (every Level 1 accept):• XFT trajectories• silicon pulse height for each channel
Output (about 20 microseconds later):• trajectories that use silicon points • r- tracks• impact parameter: (d)=35 m
SVT @ CDF Level 2 -> next generation SVT @ Level 1
AMalgo
INFN LNF - 28 Marzo 2007 Alberto Annovi 36
SVTLepton triggers @ level 1
match between a muon stub orcalorimeter signal with XFT track
80 140 200 Luminosity (xE30 cm-2s-1)
Level 1 rate (Hz)
600Hz
Level 1 mu Pt>4 GeV
INFN LNF - 28 Marzo 2007 Alberto Annovi 37
SVT
The Event
Pattern matching in CDF (M. Dell’Orso, L.Ristori 1985 -..)
...The Pattern
Bank
The pattern bank is flexibleset of pre-calculated patterns:• can account for misalignment• changing detector conditions• beam movement • …
INFN LNF - 28 Marzo 2007 Alberto Annovi 38
SVT
•Dedicated device: maximum parallelism•Each pattern with private comparator•Track search during detector readout
• If you can read it out you can track it!
AM: Associative Memory
Bingo scorecard
AM = BINGO PLAYERS
HIT # 1447
PATTERN NPATTERN 1PATTERN 2
PATTERN 3
PATTERN 5
PATTERN 4
INFN LNF - 28 Marzo 2007 Alberto Annovi 39
SVT Associative Memory (AM) for
pattern matchingM. Dell'Orso and L. Ristori, “VLSI structures for track finding”,
Nucl. Instr. and Meth., vol. A278,
pp. 436-440, (1989).1 register1 comparator1 match FF/ layer/ pattern
INFN LNF - 28 Marzo 2007 Alberto Annovi 40
SVT
5 CLB (come Block RAM): 32 into each column x 20 columns
DSP SliCEs
INFN LNF - 28 Marzo 2007 Alberto Annovi 41
SVT
SVT FiFo35 MHz
II FiFo70 MHz
Lay0-Ram or SR
Lay1- Ram or SR
Lay2- Ram or SR
Lay3-Ram or SR
Lay4-Ram or SR
XFT-Ram or SR
Comb - FiFo
7 Mult+7
6 Mult+6
6 Mult+6
6 Mult+6
6 Mult+6
6 Mult+6
37 DSP slices/Equation.For 6 equations37x6= 222 DSP slicesChoose best chi**2
Each equation is calculated 6 times (all layers and 1 SI-missing)
6 input LUTInside Slices
BLock RAMs
6 fit in parallelo/Wedge
Choose the best
chi**2
INFN LNF - 28 Marzo 2007 Alberto Annovi 42
SVT
FPGA40 JTAG 4 wedge connectors on
each mezzanine possible up to 6x4=24 fits in parallel
3 mezzanines = 12 wedges4th mezzanine large memory for non-linearity corrections
INFN LNF - 28 Marzo 2007 Alberto Annovi 43
SVT
ILAY OADDOR
CLB
READOUT
LOGIC
SELEXTOROLAY
IHIT
OHIT
PATTERN
QUARTET
INIT EVENT
QUARTET Priority Encoder
HREG0
H R E G 1
HREG2
LayREG
1995: 0.35 FPGA same AM than 0.7 full custom
Very regular layout and routing. 95% used logicSame timing performances of the full custom chip!
Since then Cam has been introduced into FPGA.
We use FPGA AM in the Road warrior to delete SVT ghosts (two candidate tracks differing only for empty layers
Pattern
INFN LNF - 28 Marzo 2007 Alberto Annovi 44
SVTAM projectsSVT: Silicon Vertex Trigger @ CDF (L. Ristori et al.)• first AM application• extremely successful Bs mixing, ACP B->hh’, Z->bb, bbH->4b• proven to be easy to upgrade (1-2 years turn around time)
FTK: FastTracK @ ATLAS (preparing a proposal: P.Giannetti-Pisa, M. Shochet, YK Kim- Chicago, T. Liss - Illinois et al.)
• Full tracker reconstruction @ L2 @ full L1 out rate 100kHz• Offline quality (see next slide) and efficiency
???: L1 tracking @ CMS (F.Palla proposal)• tracking at 80MHz• momentum measurement with a few (4?) “pixel” layers
SLIM5: L1 tracking @ SuperB (F. Forti, M. Giorgi et al.)• R&D to develop MAPS sensor integrated with AM trigger
INFN LNF - 28 Marzo 2007 Alberto Annovi 45
SVTAM synergy
Several AM based projects --> great advanteges:• share hardware: develop a single new AMchip
• we are applying for CE funds for a prototype
• share expertise: many people are/have been involved in SVT or FTK
• share tools: e.g. trigger simulation• share mantainance (spares/diagnostics...)• makes the project easier and cheaper
We can help providing training and tools.To start this very “rewarding” business: you will need a smaller motivated group in charge of the project!
INFN LNF - 28 Marzo 2007 Alberto Annovi 46
SVTHow to process all data @ bx rate?1. Take advantage of AM input bandwidth
• Currently 50 MHz (hits/sec/layer)• Hits for different layers are loaded in
parallel • Next version > 100MHz (90nm tech. &
pipelining)2. Parallelize by sectors
1. ~80 detector sectors are processed in parallel
2. implies a minimum Pt threshold (e.g. >5 GeV)• Parallelize different events
• for each sector 40 AMchips process 40 events in parall.
• need switch boards1. housing ~40 AMchips 2. with FPGAs used as data switch for
AMchips
Caveat: need to take care of # of hits fluctuations
INFN LNF - 28 Marzo 2007 Alberto Annovi 47
SVTswitch board numbersAll info here TBC with simulation and R&D!
•80 switch boards• 1 / -sector
• 80 fibers / board• assume 5Gbps each
• 40 AMchip / board• now we can fit 32 AMchips in one 4th of a 9U VME board
• 4 FPGA switches (1/layer)•Each receiving ~20 fibers, i.e. ~100Gbps•40 outputs: one per Amchip•Possible with today’s FPGAs
32 AMchips
INFN LNF - 28 Marzo 2007 Alberto Annovi 48
SVTThe CDF Tracker
TIME OF FLIGHT
B field = 1.4 T
Longitudinal viewTransverse view
INFN LNF - 28 Marzo 2007 Alberto Annovi 49
SVTCDF Trigger Architecture
Drift chamber trackingLepton reco/track matching
…
Silicon trackingSecondary vertex
selection…
CPU farmFull event reconstruction
with speed optimized offline code
Level 1 pipeline: 42 clock cycles
Level 1Trigger
L1Accept
Level 2Trigger
Level 2 buffer: 4 events
L2Accept
DAQ buffers
L3 Farm
Level 1•7.6 MHz Synchromous Pipeline•5.5 s Latency•30 kHz accept rate
Level 2•Asynchromous 2 Stage Pipeline•20 s Latency•1000 Hz accept rate
Mass Storage (~100 Hz)
Raw data, 7.6 MHz Crossing rate
SVX read out after L1
SVT here
XFT here
INFN LNF - 28 Marzo 2007 Alberto Annovi 50
SVTHadronic B decays
L1
Two XFT tracks
Pt > 2 GeV; Pt1 + Pt2 > 5.5 GeV
< 135°
Two body decays Many body decays
L2
Validation of L1 cuts with >20°
100 m<d0<1mm for both tracks
Lxy > 200 m
d0(B)<140 m
Validation of L1 cuts with >2°
120 m<d0<1mm for both tracks
Lxy > 200 m
d0(B)<140 m
B -> h h’ Bs mixing
Two trigger paths
Essential for Bs mixing measurement!
INFN LNF - 28 Marzo 2007 Alberto Annovi 51
SVT
Roads1. Find low resolution track candidates called “roads”. Solve most of the pattern recognition
2. Then fit tracks inside roads.Thanks to 1st step it is much easier
Super Bin (SB)
Too much large AMTracking in 2 steps
OTHER functions are needed inside SVT: Hit Buffer + Track fitter + Hit Finder
INFN LNF - 28 Marzo 2007 Alberto Annovi 52
SVTSVT Performance
-500 -250 0 250 500
(m)
35m 33mresol beam = 48m SVT
Impact parameter
90% efficient given a fiducial offline track with SVX hits in 4 layers
INFN LNF - 28 Marzo 2007 Alberto Annovi 53
SVTPromise is promise
What we promised…. From SVT TDR (’96) using offline silicon hits and offline CTC tracks
~ 45 m
INFN LNF - 28 Marzo 2007 Alberto Annovi 54
SVTSVX only
Good tracks from just 4 closely spaced silicon layers
I.p. as expected due to the lack of curvature information
impact parameter distribution
~ 87 m
Silicon onlyno XFT
INFN LNF - 28 Marzo 2007 Alberto Annovi 55
SVTSVT Upgrade (done, fall 2005)
0 20 60 100 140 180 Luminosity (xE30)
original system
upgradedsystem
Timing (s
)
L1 bandwidth 18kHz -> 30kHzNow stable w.r.t luminosity
•Need to process more complex events in less time•Same architecture as original system•Better pattern recognition resolution
•New AM chip32K512K patterns•fewer combinations/road
•Faster components•Use custom but general purpose Pulsar boardshttp://hep.uchicago.edu/~thliu/projects/Pulsar/•Short development time
•Parassitic test & validation of boards
Take good data @ high lumi & more data @ low lumi
NSS2005 Conf. Rec. Vol.1, 603
INFN LNF - 28 Marzo 2007 Alberto Annovi 56
SVTSVT flexibility for new ideas
SVT designed to be flexibleprogrammable patternsLook Up Tables & FPGAsmodular system
Pulsar programmable board with SVT connectorsimplement new functions in ~ a few months
Design system for easy testing
Extensive on-crate monitoring during beam
INFN LNF - 28 Marzo 2007 Alberto Annovi 57
SVT
Track dataROB
Track dataROB
Raw dataROBs
~Offline quality Track parameters
~75 9U VME boards – 4 types
SUPER BINSDATA
ORGANIZERROADS
ROADS + HITS
EVENT # N
PIPELINED AM
HITS
DO-board
EVENT # 1
AM-board
2nd step: track fitting
Inside Fast-TrackPixels & SCT
DataFormatter
(DF)
50~100 KHzevent rate
RODsRODs
cluster findingsplit by layer
overlap regions
RW
Few CPUs
NEW
S-links
INFN LNF - 28 Marzo 2007 Alberto Annovi 58
SVT
Curvature Impact Parameter
Cot()
Z Particle Type
FTKsim versus iPatRec – Efficiency
M. Dell’Orso, F. Crescioli, G. Punzi, G. Volpi, G. Usai
INFN LNF - 28 Marzo 2007 Alberto Annovi 59
SVT
xi
Non-linear geometrical constraint for a circle:
F(x1 , x2 , x3 ,
…) = 0
But for sufficiently small displacements:
F(x1 , x2 , x3 , …) ~ a0 + a1x1 + a2x2 + a3x3 + … = 0with constant ai
(first order expansion of F)
From non-linear to linear constraints
INFN LNF - 28 Marzo 2007 Alberto Annovi 60
SVTConstraint surface
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SVTOnline beamline fit & correction
d
phi
d
Subtracted
Raw <d> = Ybeamcos – Xbeamsin
Measure beam width as well --> input to Accelerator Division
x
y
d
Transverse view
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SVTAM++
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SVTPulsar in SVT++
Implement new boards with Pulsars:•Fast enough to handle the new amount of data•SVT interface built in•Developers can concentrate on firmware (= board functionalities)
The Pulsar board is a programmable board: 3 powerful FPGAsembedded RAM
all CDF connectors modular mezzanines
S-link I/ORAM extension
Pulsar @ CDF --> FPGAs @ board devel.
RAM mezzanine 4Mx48bits
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SVT
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SVT
ATLAS TDR 016
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SVTWhy SVT succeeded
– Performance: • Parallel/pipelined architecture• Custom VLSI pattern recognition• Linear track fit in fast FPGAs
– Reliability:• Easy to sink/source test data (many boards can self-test)• Modular design; universal, well-tested data link & fan-in/out
• Extensive on-crate monitoring during beam running• Detailed CAD simulation before prototyping
– Flexibility:• System can operate with some (or all) inputs disabled• Building-block design: can add/replace processing steps• Modern FPGAs permit unforeseen algorithm changes
– Key: design system for easy testing/commissioning
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SVTSector segmentation
• Subdivide the (pixel) detector in many sectors – Keep data volume limited in each sector
• Combine information from at least 3 layers out of 4 in each sector – Momentum resolution of ~ few (<10)% at
10 GeV/c – Granularity driven by the minimum
measurable pT for triggering purposes, without loosing efficiency• ~80 sectors at the innermost radius
~ 4.5° matches to a module of 2 cm width – Well covering the bending of a track of 5
GeV pT and above
• Larger sectors with increasing radii – Match the sensors widths
• This plan match with AMchip features!!!
26 cm
34 cm
42 cm
50 cm
F. Palla (LECC06 workshop)
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SVTConceptual design
AM EV0
AM EV1
AM EV40
...
Layer 0: ~25 fibers bringing ~40 Hits/12 ns
1 Hit/10 ns
1 Hit/10 ns
1 Hit/10 ns
From otherlayers
From otherlayers
From otherlayers
Distribute hits into different sets of
storage units depending on EVent #
Parallel INSerial OUT
...Parallel INSerial OUT
Parallel INSerial OUT
1 FPGA
From Detector
F. Palla (LECC06 workshop)
INFN LNF - 28 Marzo 2007 Alberto Annovi 69
SVTOccupancy studies
• GEANT4 simulation of pixelized tracking layers– Simulated 3500 minimum bias using latest Pythia settings
events and group into chunks of 100 events per bunch crossing and 250 t-tbar events
– Use current CMS layout (material budget) but different sensors granularity
Layer Layer No.No.
Radius (cm)
Hit/module/bxa
No. detectors in
Hits/sector/bxª
Data rate*/module (Gbps)
Data rate*/sector (Gbps)
No. data links†/layer
11 26 3.1 82 43 5 69 110022 34 8.7 36 78 14 125 90033 42 5.8 44 49 8 78 70044 50 3.7 52 34 6 55 600
ª average number on minimum bias events, t-t will contribute on average<<1 hit/det*20 bits/hit† for a data link speed of 5 Gbps
Current links in CMS TIB Silicon Strip: 2000 @ 26 cm - 2600 @ 34 cm
F. Palla (LECC06 workshop)