Summer 2000 Yield Management Solutions 39

The 0.13 µm semiconductor manufacturing generation, shipping as early as 2001, will have transistor gate structures assmall as 100 nm, creating a demand for sub-10 nm gate linewidth control. Linewidth variation consists of cross-chip,cross-wafer, cross-lot, and run-to-run components. In this work, we explore spatial dependencies across the lithographic fielddue to reticle error and across the wafer due to wafer and chuck nanotopography. Both sources of spatial variation can causecollapse of the lithographic focus window near the limits of resolution, resulting in CD excursions for gate structures inhigh-performance microprocessors. Our work supports the contention that photolithography-induced defects may become theprimary source of yield loss for the 0.13 µm generation and beyond.

LithographyS P E C I A L F O C U S

Collapse of the Deep-UV and 193 nmLithographic Focus Window

Yield Impact of Cross-Field and Cross-Wafer CD Spatial Uniformity

Kevin Monahan, Pat Lord, Waiman Ng, Hubert Altendorfer, George Kren, and Scott AshkenazKLA-Tencor Corporation

© 1999 IEEE. Reprinted, with permission, from the Proceedings of the 1999 IEEE Symposium on Semiconductor Manufacturing; 1999; pgs 115-118.

As an extension of previous work on temporalvariation1, we are currently exploring spatialdependencies across the lithographic fielddue to reticle and lens error and across thewafer due to wafer nanotopography andchuck flatness. The new study uses data froma comprehensive set of measurement tech-nologies, including reticle and wafer CDSEM metrology, phase-shift focus metrology,cross-wafer interferometry, differential inter-ference contrast metrology, and macro defectinspection. We have found that, as in the caseof temporal variation, spatial variation cancause collapse of the common CD-defocuswindow near the limits of lithographic res-olution, particularly for the gate and contactstructures in high-performance devices.

There are many sources of spatial variationthat contribute to process window collapse.

These include overlay error, reticle error, lens error, andfocus errors. To predict yield, we treat each of them asdefects with a specific “kill potential”. One example isthe recent use of logistic regression to correlate overlayerror with the probability of device failure2. In such aunified defect scenario, yield may be expressed as aproduct of survival probabilities given by

where lambda is the defect kill potential for defects oftype i, n is the number of defects per die of type i, andN is the total number of defect types. In the case ofparametric defects, the kill potentials may be functionsof measured parameters such as overlay and criticaldimension (CD) or unknown parameters, such as expo-sure variation and local defocus, which are observedindirectly in the form of CD excursions. Generally, we

Y = ∏(1 – λi) ni

i=1

N

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improve the accuracy of the lithographic yield modelby identifying those defects with the highest killpotential, or even those that pose a quantifiable eco-nomic risk by affecting bin yield3.

Lithographic defocus is likely to be an indirect sourceof CD defects with high kill potential, particularly asexposure wavelengths decrease from 248 nm to 193 nm,157 nm, and even 13 nm. This is primarily due to thereduction of the Raleigh focus window with shorterwavelength. CD and defocus are highly interactive, asshown in the example of Figure 2. Reticle CD errors oroverlay errors that force reduction of the overall CDerror budget will have a negative effect on the allow-able range of defocus.

Results and discussionA comprehensive “systems approach” was used to ana-lyze complex spatial uniformity data from reticles andwafers. At least five state-of-the-art methodologieswere applied to the problem:

• Lithographic reticle and optical characterizationusing reticle and wafer CD SEM metrology

• Phase-shift focus measurement using optical overlaymetrology and model-based analysis

• Wafer thickness metrology using wafer-scale trans-mission interferometry

• Wafer surface nanotopography using differentialinterference contrast metrology

• Cost-effective screening using darkfield and bright-field macro inspection technology

Our results show that the sources of CD error due tolithographic defocus can be de-confounded using thiscomprehensive approach. Reticle CD error, for example,can be stripped out using CD SEM measurements.

Confounded lens, wafer, and chuck components can beseparated using a phase-shift focus monitor, combinedwith double-sided, wafer-scale interferometry and single-sided, differential interference contrast metrology.

Reticle and Wafer CD SEM MetrologyFocus errors create spatial CD non-uniformity. Thesecan be due to the reticle, the projection optics, and thewafer/chuck surface upon which the pattern is printed.CD SEMs can be used to map cross-field and cross-wafererrors, creating model-based CD uniformity maps andgenerating feedback to the stepper/track systems forcorrection of systematic spatial variation. Examples ofcross-field CD error, measured using a specially adapted

2480

50

100

150

200

250

300

350

193 157 EUV

Rale

igh

Dof

(nm

)

Exposure Wavelength (nm)

Figure 1. Collapse of the 0.5λ/(NA)2 Raleigh focus window as litho-

graphic exposure wavelength is decreased. Values for the numerical

apertures are assumed to be 0.7, 0.7, 0.7, and 0.25, respectively.

The EUV wavelength is 13 nm.

-30

20

40

60

80

100

120

140

160

180

200

-2 -1 0

Gate

CD

(nm

)

Defocus Units

% Dose

1 2 3

6070

80

90100110120

130

140150

Figure 2. CD-defocus response surface (equation below) for isolated

lines in negative resist (raw data not shown). Underexposure was used

to get 130 nm gate structures (90 percent exposure dose, E) at the

expense of low focus latitude and high sensitivity to exposure variation

under conditions of defocus (D). The outer and inner boxes show the

collapse of the focus window as the CD tolerance is tightened by

50 percent.

y(E,D) = (b0 = b1D + b2D2) + —(b3 + b4D + b5D2)

S P E C I A L F O C U S

1E

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CD SEM, are shown in Figure 3 (reticle) and Figure 4(wafer). In this case, the total CD variation on the waferis due to reticle error, lens error, and nanotopographyof the chucked wafer. Since the reticle and wafer CDsare measured in the same SEM, the reticle error isremoved from the wafer data without heterogeneoustool matching.

Registration-Based Phase-Shift Focus MetrologyData from a phase-shift focus monitor characterizesfocal plane deviations within the field and from field tofield across the wafer. A monitor reticle with asymmet-rically phase-shifted overlay targets is used in conjunc-

tion with a high-speed overlay tool to generate artificialregistration errors that are a linear function of litho-graphic defocus. Fitting the data to a model enablesthe quantitative assessment of lens tilt, field curvature,astigmatism, scan errors, wafer/chuck flatness, lensheating, barometric effects, and other lithographicfocus anomalies. The cross-field mapping capability ofthe phase-shift focus monitor is shown in Figure 5.Figure 6 shows the same capability across a wafer. Thetotal range is ±200 nm, including top surface nanoto-pography, wafer thickness variation, and chuck non-uniformity.

Figure 3. Cross-field CD SEM data on a reticle, showing radial

dependence of the CD values in nanometers.

Figure 4. Cross-field CD SEM data on a wafer showing apparent

“tilt” in the DUV optics. Reticle CD error has been removed. Scale is

in nanometers.

Figure 5. Cross-field response surface generated with data from a

phase-shift focus monitor. The root-cause of CD error is often traced to

cross-field defocus effects arising from wafer/chuck nanotopography.

Figure 6. Cross-wafer phase-shift focus data includes top surface

nanotopography, wafer thickness variation, and chuck non-uniformity.

Range is ±200 nm.

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Spring 2000 Yield Management Solutions42

Cross-Wafer Transmission InterferometryCross-wafer interferometry can be used to separatethickness variation and surface nanotopography fromchuck-induced deformation. In this case, monochro-matic light is projected through the wafer and interfer-ence from the top and bottom surfaces of the wafer isused to determine thickness. Data for a 300 mm waferpolished on both sides is shown in Figure 7. The totalrange is ±200 nm. Measured in this way, the thicknessdata is confounded with top surface nanotopography.

In general, nanotopography with spatial periods below5 mm (the slit-width of a scanner) and amplitudes inthe hundred-nanometer range can create significantfocusing errors in scanning lithography. A 193 nmscanner with 0.7-N.A. optics will have a theoreticaldepth-of-focus of about ±200 nm for dense lines, andless for isolated features.

Nanotopography at high spatial frequencies can exceedthe dynamic range of a scanner’s in-situ focusing sub-systems. If the focus errors are large, the resulting CDvariations can create severe device yield and speed bin-ning excursions, particularly in high-performancemicroprocessors.

Differential Interference-Contrast (DIC)MetrologyDifferential interference-contrast metrology uses thephase response of light reflected from the top surface ofthe wafer. Along with micro-tilt sensing, it can be usedto separate top surface nanotopography from waferthickness variation. In our case, the DIC metrology is

implemented on a high-speed, unpatterned-filminspection tool. A high-resolution profilometer is usedfor height calibration. As shown in Figure 8, DICmetrology responds to the higher spatial frequenciesthat could be missed by cross-wafer transmission inter-ferometry. The total range of the top surface nanotopog-raphy is ±30 nm, much of which is due to “polishingchatter” arising from a process excursion that couldhave gone unnoticed without the DIC monitor. Insome cases, we have observed top surface nanotopogra-phy with ranges below ±3 nm. This level of wafer sur-face quality is costly, but it may become critical forchemical-mechanical planarization (CMP) used inadvanced shallow-trench isolation (STI) technologies.

Whole-Wafer Macro-Defect InspectionGross defocus on patterned wafers is generally visibleas a “hot spot” during macro-defect inspection. Hotspots can sometimes be seen in brightfield illumina-tion, but they are much more visible in darkfield illu-mination due to scattering from pattern defects. Hotspots often result from extreme nanotopography causedby particles on the backside of a wafer, a problem thatcould become worse as the industry makes the transi-tion to double-sided polishing on 300 mm wafers.These gross focus excursions can be detected usinghigh-speed, macro-defect inspection tools as monitors.

Figure 7. Cross-wafer interferometry isolates top surface nanotopography

and thickness variation from chuck non-uniformity. Range is ±200 nm

on 300 mm wafer.

Figure 8. Dif ferential interference metrology isolates top surface

nanotopography. Range is ±30 nm.

S P E C I A L F O C U S

Summer 2000 Yield Management Solutions 43

Since backside particles produce pattern defects overrelatively large areas, the 50-micrometer sensitivity of amacro inspector is more than sufficient to detect thisform of wafer contamination. A typical darkfield imageof a hot spot is shown in Figure 9.

SummaryWavelength reductions and increases in numericalaperture have extended the life of optical lithography,but the improvements in resolution come at the cost of reduced depth-of-focus, as shown by the Raleighequation below:

DOF = 0.5

where λ is the exposure wavelength and NA is thenumerical aperture of the optics.

The wavelength reduction strategy for extending opti-cal lithography will have the following consequences:

• Reticle error will become a larger part of the CDerror budget, forcing narrower lithographic processwindows for focus and exposure.

• Focus windows will dwindle as the CD error bud-gets shrink and theoretical depth-of-focus drops inproportion to exposure wavelength.

• The need for monitors may increase as spatial CDvariation and nanotopography effects detract fromthe focus window and impact yield.

• The kill potential of both direct (CD) and indirect(defocus) parametric defects will need to be quanti-fied more accurately using robust statistical methods4.

AcknowledgementsWe are in debt to Ken Schroeder, Robert Lee, Jan Waluk, andmany others at KLA-Tencor for their encouragement and contributions to this work.

References1. K. M. Monahan and P. Lord, “Lithographic focus stabi-

lization for model-based gate CD control systems”, Proc.ISSM, Tokyo, October 7-9, 1998, pp. 347-350.

2. M. E. Preil, J. McCormak, “A new approach to correlat-ing overlay and yield”, Proc. SPIE, Vol. 3677, 1999.

3. K. M. Monahan, P. Lord, C. Hayzelden, and W. Ng, “Anapplication of model-based, lithographic process controlfor cost-effective IC manufacturing at 0.13 micron and be-yond”, Proc. SPIE, Vol. 3677, p. 435 (1999).

4. R. Martin, X. Chen, and I. Goldberger, “Measuring faboverlay programs”, Proc. SPIE, Vol. 3677, p. 64 (1999).

Figure 9. Whole-wafer, darkfield macro inspection data showing

focus “hot spot” in the upper left quadrant.

λNA2

S P E C I A L F O C U S