Substrate Coupling

8/13/2019 Substrate Coupling

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WHITE PAPER

SUBSTRATE COUPLING ANALYSIS FOR RF CIRCUITS


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TABLE OF CONTENTS

Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SCA flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Extraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Data flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

User interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

SIPP process description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Comments and units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Substrate layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Well/buried layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Diva rules for SCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Substrate layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

SCA flow properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Advanced Diva use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Textual interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Port data description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Command-line interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

A simple test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Comparison to measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Low noise amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18


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TABLE OF FIGURES

Figure 1: Core modeling and extraction data flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Figure 2: Verification flow for substrate coupling analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3: SCA user interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 4: A substrate profile example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 5: Substrate model including well and buried layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 6: A simple layout test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7: SCA test and calibration structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 8: LNA extracted view from SCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 9: Substrate effects on the gain of the LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

LIST OF TABLES

Table 1: SCA results compared to measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16


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Substrate coupling analysis for RF circuits

Cadence Design Systems

San Jose, California

Abstract

Substrate Coupling Analysis (SCA) of version 4.4.6 has a substantial capacity and functionality

increase over previous versions. IES3 is used as its internal field solver engine. Physical verification flow

use model of SCA, as well as the command-line interface, provides the seamless and flexible application

of SCA. This article describes the internal flow and application examples of SCA in RF circuits to help

the customer use SCA more effectively.

1 Introduction

Substrate coupling analysis has recently become both an intensive research topic and emerging commer-

cial EDA demand in mixed-signal and RF applications[3]. The traditionally assumed insulation between

devices, because of high resistivity and carefully designed junctions, is disappearing to a point where

coupling between devices should be carefully analyzed. Degradation of noise characteristics in RF cir-

cuits due to such coupling and susceptibility of analog circuits to wide-range swings of digital signals

are the main concerns.The features of this release of Cadence SCA can be summerized as follows:

1. A brand-new efficient field solver

SCA uses a core Poissons equation field solver called IES3 that uses efficient multilayer Greens

functions and matrix compression and solving engine. This field solver gives sufficient extraction

accuracy and speed[2, 1].

2. Complete and flexible substrate model

SCA extracts both resistive and capacitive couplings inside the substrate. SCA also provides the

flexibility for the user to use customized junction models in buried layers and wells. For example,

the user may worry about the lateral diffusion and thus they use their own model to represent thewell junctions.

3. Seamless Cadence flow

1We acknowledge the help and testing from Philips Semicondutor, Sunnyvale, USA and for their work on the evaluation

circuit.

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SIPP substrate

profile

Greens function

database

Discretization

(rectangles,

triangles)

Method of Moments

system matrix procedure

Matrix

Compression

Iterative Solving

Final model

(including junction and

well models)

Figure 1: Core modeling and extraction data flow

SCA uses Virtuoso as the layout editor tool (and dfII database), Diva as the verification tool to

extract the shapes. The final model is generated specifically for Spectre/SpectreRF. No conversion

between databases and between simulators minimizes the errors introduced in those conversions.

SCA also provides a textual interface with which the user can adopt SCA into different flows.

4. Standard process description (SIPP)

SCA uses the standard process description file format, SIPP (Standard Interconnect Performance

Parameter). SIPP format, championed by Si2 (http://www.si2.org), aims to standardize the process

description for parasitic and substrate extraction purpose.

2 SCA flow

SCA software is comprised of three integral components: core modeling engine, front-end, and back-

end. In the front-end, one applies Diva rules to extract the geometry shapes and connectivities, which

are then fed to the core modeling engine that generates the corresponding substrate model. In the back-

end, the substrate model is referred in the extracted view that is suitable for special netlisting code that

assembles the substrate model into the final netlist for simulation.

2.1 Extraction

SCA uses IES3 as the core solving engine that solves the underlying Poissons equation. Figure 1 shows

the data flow of the modeling.

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Substrate coupling analysis for RF circuits 2.2 Data flow

The substrate profile describes the physical layer structure and the parameters. This profile is used to

generate the Greens functions that capture the electrical interactions between layers.

Each port is discretized into panels. Each port is assumed to be of constant electric potential; the

currents injecting into or received from substrate at each panel are different. For ports of rectangular

shape, the panels are also rectangles. For ports of general polygon shapes, a built-in triangularization

procedure discretizes the port into many triangular panels.

The efficiency of IES3 lies in the matrix compression technique that reduces the matrix solving to

where

is the total number of panels. The solving results are then used to construct the final

model that may include customized junction models.

2.2 Data flow

Figure 2 shows the verification flow for the substrate coupling analysis. The smaller dashed window

depicts the core modeling engine whose only inputs are the process information and port information.

The core engine is independent of the flow and thus can be used to adapt to other similar flows. Thelarger dashed window describes the entire Cadence SCA flow that includes the front-end and back-end.

Interactive probing is not part of the delivered flow yet. The user may write his own SKILL scripts

to aid the probing.

2.3 User interface

One generally applies SCA-ready Diva rules (as explained later) on the layout view, and then invoke the

SCA on the extracted view. The form in Figure 3 will come up.

The Run directory specifies the directory at which SCA runs the extraction engine. Temporary files

will be created under that directory. Process file specifies the SIPP substrate description file. Relative

file path of the process file is with regard to the run directory. Model name specifies the name used

to represent the substrate. This parameter is used to distinguish substrate models that may exist in one

circuit. The working frequency specifies the working frequency which is to determine the substrate

capacitance.

There are three levels of accurracy.

low. The main characteristics are: no substrate capacitance; uses float(4 bytes) as data storage and

solving; each port discretized to 9 panels; SVD compression and GMRES solving at 1e-2; in final

model, elements smaller than 1e-2 of the diagonal value pruned;

Fast prototyping use for processes without substrate capacitances;

medium. Main characteristics: substrate capacitance included; uses complex(16 bytes) as data

storage and solving; each port discretized to 9 panels; SVD compression and GMRES solving at

1e-3; in final model, elements smaller than 1e-3 of the diagonal value pruned;

sufficient for most applications;

high. Characteristics same as in medium except: each port discretized to 25 panels; no pruning in

final model.

good for local scrutiny extraction of a a few ports.

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Substrate coupling analysis for RF circuits 2.3 User interface

Indentify substrate ports

in design

Add DIVA rules to

create substrate ports

Layout in

Virtuoso

DIVA

Geometry manipulation

discretization

Solving Engine

Modeling

Process information

Reduced substrate

parasitic model file

Extracted view/layout

Original schematic

SimulateInteractive probing

(user defined)

SCA

engine

LVS

port data

file

SCA

flow

Figure 2: Verification flow for substrate coupling analysis

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Figure 3: SCA user interface

If the background extraction button is pressed, then the extraction is performed in background; oth-

erwise, the user can continue only after the extraction is finished.

If the extraction is successful, a pcell representing the whole substrate model will be shown; other-

wise, an error dialog box will notify the user of the extraction failure.

3 SIPP process description

SCA uses the portion of the SIPP file format to describe the substrate profile. SIPP format describes the

layered structure that contains interconnect above the device and substrate under the device. SCA only

parses the portion that defines the substrate structure.

3.1 comments and units

Any character from the pound sign to the end of line is treated as comment and will be ignored in the

parsing.

The units statement is to specify the units of measure. The syntax is as follows:

units = {

distance = m|cm|mm|um|nm|pm

resistivity = ohm|mohm|uohm|nohm|pohm, m|cm|mm|um|nm|pm

}

3.2 substrate layers

Each layer in the substrate is defined using the type substrate. For example, in Figure 4, L1 is the BP

layer, and L2 is the P bulk. There can be as many layers as required with arbitrary user-specified names.

The layers are assumed to be stacked top down from the substrate surface (which is considered the ground

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Substrate coupling analysis for RF circuits 3.3 Well/Buried Layers

L1

L2

w1 pwell w2 nwell

bl BP

P bulk

Figure 4: An substrate profile example

for interconnect capacitance extraction). Material type describes the layer as being either an oxide layer

or a semiconductor layer. In the latter case, material type refers to the doping type.

Type = substrateMaterial Type = p/n/oxide

Name =

thickness = starting from bottom of layer layer

k = dielectric constant of this layer

resistivity = resistivity of this layer

3.3 Well/Buried Layers

Each well in the substrate is defined using the typewell. For example, w1=pwell, w2=nwell.

Junction depletion capacitance parameter only uses Cj, the zero-bias junction capacitance. We recog-

nize that most processes have their customized model for junctions and hence we provide a link between

the process file and the Diva rule setup that allows to use a customized model rather than the simple

capacitance model internally used.

Each buried layer is defined using the type buried.

Type = Well/Buried

Material Type = p/n/oxide

Name =

thickness = starting from the capacitance ground plane for wells

depth = starting from the capacitance ground plane to top of buried layer

k = dielectric constant of this layer

resistivity = resistivity of this layer

cj = zero-bias junction capacitance

3.4 Example

The following is a sample SIPP file for SCA. It has a p channel stop layer of thickness 3um, epi layer

of 7um, and bulk P substrate of 300um. The process also contains a P well of thickness of 5 um, and a

buried layer of 2um thick.

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Substrate coupling analysis for RF circuits 3.4 Example

# This is the sample process file for the substrate coupling analysis.

# pound sign is for comment.

# Define units

units = {

distance = um

resistivity = ohm, cm

}

# P layer above the bulk substrate

type = substrate

material_type = p

name = bp

thickness = 3

k = 1 1resistivity = 2

# Bulk substrate

type = substrate

material_type = p

name = p_bulk

thickness = 300

k = 1 1

resistivity = 20

type = wellmaterial_type = n

name = nwell

thickness = 3

k = 1 1

cj = 1e-9

type = buried

material_type = n

name = BL

thickness = 2

depth = 1

k = 1 1

cj = 1e-12

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4 Diva rules for SCA

SCA runs on the extracted view created by the Diva extraction. This extracted view must have special

properties specified for layers special for SCA purpose. In order to extend SCA capability into normalDiva extraction, Diva extraction must generate an extracted view that has:

special layers for substrate analysis only; each layer has shapes representing substrate ports and

these shapes must have nets attached. These nets are usually shared with the nets at the bulk nodes

of devices.

special properties specifying the above layers and other properties.

This section explains these two items and then suggests some advanced Diva rules writing techniques.

4.1 Substrate layers

A substrate port is a geometric definition of an active area (device, well, or substrate contact) from

which and to which substrate coupling is considered important. Because a majority of current flow in the

substrate occurs between ohmic substrate ties, a substrate port must be defined for every ohmic substrate

tie (substrate contact or guard ring) in the design. An ohmic contact implies that the contact makes

an ohmic, rather than capacitive, connection with the substrate (namely, p+ diffusion in a p-substrate

or n+ diffusion in a n-substrate). Substrate ports must also be defined for every device that potentially

injects current into the substrate or is sensitive to fluctuations in the substrate potential. In other words,

every device that is either an injector or a receiver of substrate coupling current must have an equivalent

substrate port defined.

Each port must have a net attached, although the net name can be shared with other ports. To assign

the name in the Diva extraction, create a connected layer to represent the substrate ports for each device

type. Typically, the substrate port is defined as an area that covers the boundary of the device.To simplify the rules deck, derive all the recognition layers for the ports on the same depth and

then place them into a single substrate layer scaBulkusing geomOr. You can then connect this layer to

geomEmptylayers in thegeomConnectstatement and use these layers as the BULKlayer in theextract-

Devicecommands, as shown below:

; Merge the derived recognition layers together

(scaBulk = (geomOr

scaWell scaCap scaTaps scaDiode scaRes

scaPmos scaNmos

scaNpn scaPnp))

; Create dummy connection layers

(scaVia = (geomEmpty)

(scaCond = (geomEmpty)

; Each port is assigned a net

(geomConnect (via scaVia scaCond scaBulk))

; Save the scaBulk layer

(saveInterconnect (scaBulk "scab"))

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Substrate coupling analysis for RF circuits 4.2 SCA flow properties

Sometimes, such as when you are adding depth to a port or creating ports for wells and buried layers,

it is not possible to use only one substrate port layer. You can use as many layers as you wish to specify

the ports, but each such layer should have the appropriate properties attached to it.

Before you start SCA, the connections with substrate ports must be floating. After SCA is finished,

the port nodes are then electrically connected to the substrate model generated during SCA.

Some features are worth being mentioned:

Ports are allowed to have same nets. For example, you may create several guard rings that use the

same net, ground.

Prefer rectangular shapes to generic polygon shapes. The reason is that internal extraction en-

gine discretizes rectangular shapes to smaller rectangular shapes while generic polygon shapes are

discretized to triangles. Rectangular discretization is considered more efficient.

For more detailed Diva rules for various devices, please refer to the users manual.

4.2 SCA flow properties

In order for SCA to run in the Diva flow, the cellview named scasubckt in analogLibmust be

accessible. Add the analogLib into the cds.lib.

SCA also requires one property, subLayers, in the extracted view. Add this property to the ex-

tracted view with Diva rules by using the ivCallProc command. subLayers is a list of items that

specify port properties used in the modeling. Each list item may be of one of the following forms:

(list layername)

shapes onlayername treated as substrate ports of interest, and depth assumed to be zero;

(list layername depth)

shapes on layernametreated as substrate ports of interest, depth(numeric value) specifying

the depth of those ports;

(list layername modelname)

Iflayername is found in the process profile as a well layer, then shapes on this layer will be

treated as wells that use the junction model named modelname; iflayernameis found in the

process profile as a buried layer, then shapes on this layer will be treated as buried layers that use

the junction model named modelname. The difference between well and buried layer is that ports

that fall in the wells will use the well as the reference.

Figure 5 shows the model that includes regular substrate ports, well, and buried layer. Each well isconsidered a port with regard to the bulk substrate, but for ports inside each well, the well is the reference

node.

A typical way of setting up the properties is like the following Diva code:

x=(lambda (ids2)

(if ids2->extracted

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Substrate coupling analysis for RF circuits 4.3 Advanced Diva use

portportwellburied layer

bulk node

Figure 5: Substrate model including well and buried layer

(dbReplaceProp ids2->extracted "subLayers" "ilList"

(list

(list "scaport")

(list "scadeep" 3.5)

(list "nwell" "nwell")

(list "BL" "buried")))))

(ivCallProc x)

In this example, scaport andscadeep are regular substrate layers with the former having depth

of 0 while the latter having depth of 3.5u. Layer nwell is probably an N-well layer and its junctions withp-substrate is modeled bynwell. Layer BL is probably an buried layer and its junctions are modeled

byburied. Note that these layers must be available for Diva writing.

4.3 Advanced Diva use

The flexibility of Diva rule can be used to write more efficient rules for easy use. Here we give two

examples.

4.3.1 Selection layer mechanism

In the Diva setup, one can apply the selection layer technique to select and localize areas that are of

interest for SCA purpose. This can be achieved by using an LSW layer namedscaport which beforeSCA running is a selection layer but after SCA running is reused as the substrate layer.

By drawing a shape on the scaport layer, the user specifies that only substrate ports covered by the

shape will be generated in extracted view and later be processed in the SCA extraction. This mechanism

can reduce the model and speed up both extraction and simulation by eliminating areas that do not need

SCA.

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Substrate coupling analysis for RF circuits 4.3 Advanced Diva use

Normally this can be achieved by the following steps: first ignore scaport and derive the scaBulk

that defines all the substrate ports, and then use geomInside to derive the ports of interest:

sca1 = (geomInside scaBulk scaport)

then sca1 contains substrate ports on layer scaBulk and within the scope defined by shapes on

scaport. After connectivities are created, we need to save the substrate layers such as:

(saveInterconnect (sca1 "scaport"))

All the shapes onsca1 will be saved on the scaport layer in the extracted view.

4.3.2 SCA switch

Most users incorporate SCA capabilities by modifying existing Diva rules. There is also a need to have

a switch that turns on or off the SCA Diva rules. We introduce an example on how to reduce the impact

on the device recognition code.

First,subConn is a derived layer for 4-terminal device extraction such as:

(extractDevice pGate poly("G") nsd("S" "D") subConn("B") "nmos ivpcell")

Then the trick is to use switch and geomStamp to create a different subConn layer. A simple

example is given as follows.

1 psub = (geomBkgnd)

2 (ivIf (switch "SCA?") then

3 psub = (geomAndNot psub scaport)

4 psub = (geomOr (geomInside scaBulk scaport) psub)

5 subConn = (geomStamp psub pwell)

6 else

7 subConn = (geomStamp psub pwell))

8 (extractDevice pGate poly("G") nsd("S" "D") subConn("B") "nmos ivpcell")

9 (ivIf (switch "SCA?") then

10 scaBulks = (geomInside subConn scaport)

11 (saveInterconnect (scaBulks "scaport")))

Major additions are in lines 2-6 and 9-11. Without SCA switch, subConn (see line 7), is the

substrate layer, with the net name stamped from the P-well shapes, that provides as the bulk node for the

NMOS transistor extraction. With the SCA switch, lines 2-6 break thesubConninto two parts: those

insidescaport for SCA purpose and the rest with net name stamped from the p-well. Note that in line5, substrate ports will automatically be assigned a unique name if these ports do not overlap with pwell

shapes. Lines 9-11 save the portion ofsubConn insidescaport with its already assigned net names.

It can be seen that this mechanism shields the device extraction from the hassle of having to deal

with SCA differently and reduces the work needed in modifying the original Diva rules.

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5 Textual interface

The command-line interface to invoking the SCA extraction engine only uses two files: the process file

and the port data file. The Diva rules and user interface transparently generate the port data file, invokethe engine and put the results back to the extracted view. By using the command-line interface directly,

the user has the flexibility of using SCA engine without going through the whole verification flow. The

user will also be able to adapt the engine into his own other flow.

5.1 Port data description

The port data file is a simple file that describes:

the unit for the shape description;

possible customized model for particular layers;

substrate port with its associated net name, port name, shape, and depth.

A typical port file is as follows:

userUnits "micron"

userModels "Pwell_a" "pwell"

userModels "BL" "buried"

net=2 layer=scaport depth=2 rect ((971.95 238.75) (981.95 370.65))

net=1 layer=scaport depth=2 poly ((742.1 239.3) (775.55 344.2) (840 239.3))

The userUnits section specifies the unit for the shape description. Only micron and meter are

supported. The default value is micron.The UserModels sections specify the customized model for shapes that are on the first parameter

using the model name specified on the second parameter. For example, in the above port data file, shapes

on layer Pwell a will use model name of pwell, and shapes on layer BL will use model name

of buried. Any shapes that are not on the layers specified inuserModels sections will be treated

as regular substrate port.

The rest of the port data file specifies the substrate ports. Each port starts with the net name followed

by the layer name. Layer names should correspond to the substrate/well/buried layer names specified in

the process file. The following depth specifies the port depth that sometimes gives significantly different

results. rect and poly specify the shape of the port, rectangular and polygonal respectively. A

parenthesized data structure then follows to define the actual shape. For rectangular shape, two points

define the left-lower corner and the upper-right corners respectively. For polygon shapes, each pointbecomes the polygon point in either clockwise or counter-clockwise direction.

5.2 Command-line interface

The command line is as follows:

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subx options

where each option comprises of the switch and its value. The switches are:

-procfile procfile_name

-portfile portfile_name

-modelfile modelfile_name

-modelname modelname

-acculevel {low|medium|high}

-freq frequency

-procfilespecifies the SIPP file that describes the substrate layer structure; -portfile spec-

ifies the port data file that describes the substrate ports; -modelfilespecifies the file to be created

that contains the subckt model for the entire substrate; -modelname specifies the name of the sub-

ckt; -acculevelspecifies the accuracy level: low, medium and high; -freq specifies the working

frequency, which defaults to 1e9 Hz. Here is an example invocation:

subx -procfile sample.proc -portfile port.data -modelfile substrate.scs \\

-modelname substrate -acculevel medium

6 Examples

We give one simple example to demonstrate the data file format and results. We then present some real

applications.

6.1 A simple test structureFigure 6 is a simple test structure to demonstrate many concepts. There are three layers: well layer

Pwell a, regular port layer L0, and buried layer BL. Diva extraction assigns nets to all the shapes. The

SCA run will place the scasubcktpcell into the extracted view. As is shown in Figure 6, terminals

of the pcell are electrically connected to the ports. The internally created net on the well, although not

shown explicitly in the figure, is still correctly connected to the pcell in the netlist.

The process file uses the example in Section 3.4 except that the well name is changed to Pwell a.

The Diva rule file is as follows:

; This is the test Diva file.

; sca:

(drcExtractRules

lo = geomOr( "LO" )

bl = geomOr( "BL" )

pwell = geomOr( "Pwell_a" )

sav = geomEmpty()

(ivIf (switch "sca") then

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Substrate coupling analysis for RF circuits 6.1 A simple test structure

6

A1

B1 B2

A2

BL1Pwell_a

BL

L0

Figure 6: A simple layout test

(geomConnect

(via sav pwell pwell) ; net added on pwell

(via sav lo lo) ; net added on lo

(via sav bl bl) ; net added on bl

)

x=(lambda (ids2)

(if ids2->extracted

(dbReplaceProp ids2->extracted "subLayers" "ilList"(list

(list "Poly1") ; port

(list "Pwell_a" "pwell") ; well layer

(list "BL" "buried"))))) ; buried layer

(ivCallProc x)

saveInterconnect((lo "Poly1" ) (bl "BL") (pwell "Pwell_a"))

)

)

In the run directory, SCA creates an intermediary file, port.data, that describes the entire port

distribution. Theport.data file is shown as follows:

userUnits "micron"

userModels "Pwell_a" "pwell"

userModels "BL" "buried"

net=b2 layer=Poly1 depth=0 rect ((80.0 50.0) (100.0 60.0))

net=a2 layer=Poly1 depth=0 rect ((80.0 70.0) (100.0 80.0))

net=b1 layer=Poly1 depth=0 rect ((50.0 50.0) (70.0 60.0))

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Substrate coupling analysis for RF circuits 6.2 Comparison to measurement

net=a1 layer=Poly1 depth=0 rect ((50.0 70.0) (70.0 80.0))

net=6 layer=Pwell_a depth=0 rect ((43.9 41.5) (74.0 86.9))

net=bl1 layer=BL depth=0 rect ((115.0 41.7) (130.3 87.7))

Note that although the depth of the bl1 port is specified as 0 in the port data file, since the layer

name matches the buried layer name specified in the process file, the actual depth is obtained from the

process file. The substrate model is generated as follows:

// This file is generated by the subX tool.

subckt substrate (b2 a2 b1 a1 6 bl1 ref)

// model inside well of net 6 on layer Pwell_a

// Junction models for wells

c0_well_6 (int_6 6) pwell area=1.366540e-09 perimeter=1.056000e-04

r1_b1_a1 (b1 a1) resistor r=2.103082e+03

r2_b1_int_6 (b1 int_6) resistor r=8.077988e+02

r3_a1_int_6 (a1 int_6) resistor r=8.077045e+02// model of net bl1 on layer BL

c4_buried_bl1 (int_bl1 bl1) buried area=7.038000e-10 perimeter=7.660000e-05

// Models at the top level

r5_b2_a2 (b2 a2) resistor r=2.509657e+03

r6_b2_6 (b2 6) resistor r=1.943236e+03

r7_b2_int_bl1 (b2 int_bl1) resistor r=3.953767e+03

r8_b2_ref (b2 ref) resistor r=1.371588e+03

r9_a2_6 (a2 6) resistor r=2.066437e+03

r10_a2_int_bl1 (a2 int_bl1) resistor r=3.895700e+03

r11_a2_ref (a2 ref) resistor r=1.338032e+03

r12_6_int_bl1 (6 int_bl1) resistor r=4.478318e+04

r13_6_ref (6 ref) resistor r=3.044599e+02

r14_int_bl1_ref (int_bl1 ref) resistor r=3.982237e+02ends substrate

Note that the substrate model corresponds to the structure shown in Figure 5.

6.2 Comparison to measurement

SCA assumes that each substrate layer is of homogeneous electrical properties. In reality, however, such

is not the case. For example, the doping profile is actually a very complicated function of depth. Nev-

ertheless, we can still use measurement to calibrate the substrate profile and obtain reasonable average

values.

Figure 7 is a test structure made specifically for such calibration and comparison. Note that in this

example, we implement a selection layer mechanism: only ports within the selection box are processed.Figure 7 shows a selection box that encloses three ports.

We have achieved reasonable match between the measurement and extraction results, shown in Ta-

ble 1. More important, these results demonstrate the consistency of SCA extraction. For a large class of

port configurations, the results are within 4%.

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Selection box

Figure 7: SCA test and calibration structure

Coupling pads Extraction (

) Measurement(

)

11-13 141 146

15-16 262 250

19-21 299 294

6-8 333 339

Table 1: SCA results compared to measurement

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Capacitor

ResistorCapacitor

NPN transistorSCA pcell

Resistor

Figure 8: LNA extracted view from SCA

0 0.5 1 1.5 2 2.5 3

x 109

40

30

20

10

0

10

20

30

frequency

S21(dB)

without SCA

with SCA

Figure 9: Substrate effects on the gain of the LNA

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Substrate coupling analysis for RF circuits 6.3 Low noise amplifier

6.3 Low noise amplifier

SCA can be used to both investigate the coupling noise and the guard ring effects. The RF circuits are

very sensitive to substrate effects through the device bulk terminal. Figure 8 is a low noise ampliferthat has nominal gain of 20dB at the operating frequency. Running SCA on this circuit generates quite

different results for the gain of the amplifer, shown in Figure 9. Careful investigation reveals that the

gain of the amplifer is very sensitive to the voltage of the bulk node of the main transistor. One way of

reducing these effects is through biasing close to the main device. SCA tool helps to extract the substrate

parasitics and debug the problematic circuits.

7 Summary

SCA provides a seamless substrate extraction and analysis capability within the Cadence custom RF IC

design and verification flow of Virtuoso/Composer/Artist/SpectreRF. It uses an efficient Greens function

database and field solver to solve the complicated field interactions inside the substrate. It supports Spec-tre and SpectreRF socket and direct netlisting and regular Diva functions. We have strived to provide a

smooth Diva/SCA verification flow as well as the flexibility of textual interface. SCA has been calibrated

in real production process and used in production circuit verification.

New features in the plan include:

Higher capacity to work in large-scale mixed-signal design and verification environment;

Interactive probing to help design pinpoint the substrate problems.

Integration with Assura product family.

References

[1] J. Zhao, W. Dai, S. Kapur, and D. Long. Efficient three-dimensional extraction based on static

and full-wave layered greens functions. InDesign and Automation Conference, pages 2249, San

Francisco, June 1998. New York, NY, USA: IEEE.

[2] S. Kapur and D. Long. IES

: A fast integral equation solver for efficient 3-dimensional extractions.

In37th International Conference on Computer Aided Design, Nov 1997.

[3] X. Aragones, J.L. Gonzalez, and A. Rubio. Analysis and solutions for switching noise coupling in

mixed-signal ICs. Kluwer Academic Publishers : Boston, 1999.

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