Spectral Characterization of Functional Vectors for Gate-level Fault Coverage Tests

Aug 11, 2006 Yogi/Agrawal: Spectral Functional ATPG 1

Spectral Characterization of Functional Vectors for

Gate-level Fault Coverage Tests

Nitin Yogi and Vishwani D. AgrawalAuburn University

Department of ECE, Auburn, AL 36849, [email protected], [email protected]

mailto:[email protected]

mailto:[email protected]


Outline

• Verification and Testing• Problem and Approach• Spectral analysis and generation of test

sequences• Test sequence compaction• Experimental Results• Conclusion• References


Verification and Testing• Verification vectors

– are mandatory and required; to check for functional correctness of a digital system

– are generated based on the behavior of the system– have been found useful in detection of manufacture

defects like timing faults– have low stuck-at fault coverage (poor defect level), but

no yield loss

• Manufacturing tests– may be non-functional; cannot be used for verification– have high test generation complexity– have high stuck-at fault coverage


Problem and Approach

• The problem:– To develop manufacturing tests from verification

vectors.

• Our approach: – Implementation-independent characterization:

• Functional vectors obtained either from design verification phase or by exercising various functions of the circuit.

• Characterization of verification vectors for spectral components and the noise level for each PI of the circuit.

– Test generation for gate-level implementation:• Generation of spectral vectors• Fault simulation and vector compaction


Verification vectors

A

B

FC

GD

E

1 / 0

1 / 00 / 0

0 / 0

1 / 0

X / 00 / 0

X / 1

X / 0

State Diagram (b02 ckt.)

4 bit multiplier

A B

4 b

its

4 b

its

8 b

its

Behavioral Description (s344 ckt.)

Cases to verify:

Y

A B

Non-zero Non-zero

0 Non-zero

Non-zero 0

0 0

Max no. Max no.

Other cases …

Cases to verify : all state transitions

Input / output


Walsh Functions and Hadamard Spectrum

1 1 1 1 1 1 1 11 -1 1 -1 1 -1 1 -11 1 -1 -1 1 1 -1 -11 -1 -1 1 1 -1 -1 11 1 1 1 -1 -1 -1 -11 -1 1 -1 -1 1 -1 11 1 -1 -1 -1 -1 1 11 -1 -1 1 -1 1 1 -1

H8 =

w0

w1

w2

w3

w4

w5

w6

w7

Wal

sh f

unct

ions

(or

der

8)

• Walsh functions form an orthogonal and complete set of basis functions that can represent any arbitrary bit-stream.

• Walsh functions are the rows of the Hadamard matrix.

• Example of Hadamard matrix of order 8:


Characterizing a Bit-Stream

• A bit-stream is correlated with each row of Hadamard matrix.• Highly correlated basis Walsh functions are retained as essential

components and others are regarded as noise.

Bit stream to analyze

Correlating with Walsh functions by multiplying with Hadamard matrix.

Essential component (others noise)

Hadamard Matrix

Bit stream

Spectral coeffs.


Test Vector Generation• Spectrum for new bit-streams consists of the essential components

and added random noise.• Essential component plus noise spectra are converted into bit-

streams by multiplying with Hadamard matrix.• Any number of bit-streams can be generated; all contain the same

essential components but differ in their noise spectrum.

Perturbation

Generation of test vectors by multiplying with Hadamard matrix

Spectral components

Essential component

retainedNew test vector


Spectral Testing Approach (Circuit Characterization)

• Verification vector generation:– Verification vectors are generated to exercise various functions

of the circuit including its corner cases.

• Spectral analysis:– Verification sequences for each input are analyzed using

Hadamard matrix.– Essential components are determined by comparing their power

Hi2 with the average power per component M2.

– Condition to pick-out essential components:

where K is a constant

– The process starts with the highest magnitude component and is repeated till the criteria is not satisfied.

KM

Ηi2

2


s298 Spectral Coeffs.

-70

-60

-50

-40

-30

-20

-10

0

10

1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49 52 55 58 61 64

Coefficients

Ma

gn

itu

de

Input 1

Input 2

Input 3

Circuit s298: Coefficient Analysis

Examples of essential

components

Examples of noise

components


Functional Verification Vectors for Spectral ATPG

• Start with functional verification vectors.• Characterize verification vectors for Walsh

spectrum and noise level.• Generate new sequences by adding random

noise to the Walsh spectrum.• Use fault simulator (Flextest) and integer linear

program (ILP) to compact sequences.


Selecting Minimal Vector Sequences Using ILP

• A set of perturbation vector sequences {V1, V2, .. , VM} is generated, fault simulated and faults detected by each is obtained.

• Compaction problem: Find minimum set of vector sequences that cover all detected faults.

• Minimize Count{V1, … ,VM} to obtain compressed seq. {V1,… ,VC} where {V1, … ,VC} {V1, … , VM} Count{V1, … ,VC} ≤ Count{V1, … ,VM} Fault Coverage{V1, … ,VC} = Fault Coverage{V1, … ,VM}

• Compaction problem is formulated as an Integer Linear Program (ILP) [1].

[1] P. Drineas and Y. Makris, “Independent Test Sequence Compaction through Integer Programming," Proc. ICCD’03, pp. 380-386.


ILP formulation• Each vector sequence in {V1, V2, .. , VM} is fault simulated

with the circuit in unknown state• Faults detected by each sequence is obtained• Variable xi defined for each vector seq. Vi

such that xi = 0 : vec. seq. Vi not selected = 1 : vec. seq. Vi selected

• Constraint equation formulated for each detected fault fk. • For example, if fault f3 is detected by vec. sequences V3, V4

and V11, then the constraint equation is

x3 + x4 + x11 ≥ 1• Solve for objective function:

Minimize

Mi

iix

1


Experimental Circuits• Spectral ATPG technique applied to the following benchmarks:

– three ISCAS’89 circuits.– one ITC’99 high level RTL circuit– Parwan microprocessor

• Characteristics of benchmark circuits:

• Fault simulation performed using commercial sequential ATPG tool Mentor Graphics FlexTest.

• Results obtained on Sun Ultra 5 machines with 256MB RAM.

Circuit Benchmark PIs POs FFs Function

s298 ISCAS’89 3 6 14 Traffic light controller

s344 ISCAS’89 9 11 15 4 x 4 add-shift multiplier

s349 ISCAS’89 9 11 15 4 x 4 add-shift multiplier

b02 ITC’99 2 1 4 Finite-state machine


ATPG Results

CircuitNo. of gate

faults

Functional Vectors

Spectral ATPG Gate-level ATPG

No. of vecs.

Fault Cov. (%)

No. of vecs.

Fault Cov. (%)

CPU (s)

No. of vecs.

Fault Cov. (%)

CPU (s)

s298 698 75 81.23 192 84.74 21 152 85.89 45

s344 1020 57 87.45 256 91.08 51 150 90.78 23

s349 1030 57 87.09 256 90.68 51 150 90.39 26

b02 148 13 85.47 128 93.92 10 38 94.26 1


Functional Spectral ATPG: s298

Spectral ATPG

Gate-level ATPG

Functional vectors

Random vectors


Functional Spectral ATPG: ITC’99 Benchmark b02 (FSM)


Parwan Microprocessor

Reference: Z. Navabi, Analysis and Modeling of Digital Systems, NY: McGraw-Hill, 1993.


Parwan: Spectral ATPG


Conclusion• Spectral ATPG technique for verification vectors

is applied to three ISCAS’89 and one ITC’99 benchmark circuits.

• Coverage of functional vectors can be effectively improved to match that of a gate-level ATPG by the proposed method.

• Test generation using Spectral ATPG brings with it all the benefits of high level testing

• Techniques that will enhance Spectral ATPG are:– Accurate determination and use of noise components– Better compaction algorithms


References

• N. Yogi and V. D. Agrawal, “High-Level Test Generation for Gate-Level Fault Coverage,” Proc. 15th IEEE North Atlantic Test Workshop, May 2006, pp. 65-74.

• N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Gate-Level Stuck-at Faults,” Proc. 19th IEEE Asian Test Symp., November 2006.

• N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Microprocessors,” submitted.

Spectral Characterization of Functional Vectors for Gate-level Fault Coverage Tests

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