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Transcript of Sophomore Physics Laboratory Physics 5 and 105 …vsanni/ph5/pdf/Ph5.ExpNotes.pdfDRAFT Contents 1...
DRAFT
PHYSICS MATHEMATICS AND ASTRONOMY DIVISION
CALIFORNIA INSTITUTE OF TECHNOLOGY
Sophomore Physics Laboratory
Physics 5 and 105 CourseLaboratory Notes
Academic Year 2012-2013( Partial Revision December 2012)
Copyright©Virgínio de Oliveira Sanníbale
Caltech Physics Deparment, MS 103-331200 E. California Blvd.
91125 Pasadena,CAhttp://www.ligo.caltech.edu/~vsanni/ph5/
DRAFT
Contents
1 Alternating Current Network Theory 11
1.1 Symbolic Representation of a Sinusoidal Signals, Phasors . . 121.1.1 Derivative of a Phasor . . . . . . . . . . . . . . . . . . 131.1.2 Integral of a Phasor . . . . . . . . . . . . . . . . . . . . 13
1.2 Network Definitions . . . . . . . . . . . . . . . . . . . . . . . 141.2.1 Series and Parallel . . . . . . . . . . . . . . . . . . . . 151.2.2 Active and Passive Components . . . . . . . . . . . . 15
1.3 Kirchhoff’s Laws . . . . . . . . . . . . . . . . . . . . . . . . . 161.4 Passive Ideal Components with Phasors . . . . . . . . . . . . 16
1.4.1 The Resistor . . . . . . . . . . . . . . . . . . . . . . . . 161.4.2 The Capacitor . . . . . . . . . . . . . . . . . . . . . . . 171.4.3 The Inductor . . . . . . . . . . . . . . . . . . . . . . . 18
1.5 The Impedance and Admittance Concept . . . . . . . . . . . 181.5.1 Impedance in Parallel and Series . . . . . . . . . . . . 191.5.2 Ohm’s Law for Sinusoidal Regime . . . . . . . . . . . 20
1.6 Two-Port Networks . . . . . . . . . . . . . . . . . . . . . . . . 201.6.1 Bode Diagrams . . . . . . . . . . . . . . . . . . . . . . 211.6.2 The RC Low-Pass Filter . . . . . . . . . . . . . . . . . 221.6.3 The RC High-Pass Filter . . . . . . . . . . . . . . . . . 24
1.7 Ideal Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251.7.1 Ideal Voltage Source . . . . . . . . . . . . . . . . . . . 251.7.2 Ideal Current Source . . . . . . . . . . . . . . . . . . . 26
1.8 Equivalent Networks . . . . . . . . . . . . . . . . . . . . . . . 271.8.1 Voltage Divider . . . . . . . . . . . . . . . . . . . . . . 271.8.2 Thévenin Theorem . . . . . . . . . . . . . . . . . . . . 281.8.3 Norton Theorem . . . . . . . . . . . . . . . . . . . . . 30
1.9 First Laboratory Week . . . . . . . . . . . . . . . . . . . . . . 31
3
DRAFT
4 CONTENTS
1.9.1 Pre-laboratory Problems . . . . . . . . . . . . . . . . . 311.9.2 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 33
2 Resonant Circuits 372.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 372.2 The LCR Series Resonant Circuit . . . . . . . . . . . . . . . . 38
2.2.1 Frequency Response with Capacitor Voltage Differ-ence as Circuit Output . . . . . . . . . . . . . . . . . . 38
2.2.2 Frequency Response with Inductor Voltage Differ-ence as Circuit Output . . . . . . . . . . . . . . . . . . 40
2.2.3 Frequency Response with the Resistor Voltage Dif-ference as Circuit Output . . . . . . . . . . . . . . . . 41
2.2.4 Transient Response . . . . . . . . . . . . . . . . . . . . 432.3 The Tank Circuit or LCR Parallel Circuit. . . . . . . . . . . . . 45
2.3.1 LCR Circuit Frequency Response . . . . . . . . . . . . 462.3.2 Transfer Function . . . . . . . . . . . . . . . . . . . . . 482.3.3 Simplest Case . . . . . . . . . . . . . . . . . . . . . . . 492.3.4 High Frequency Approximation . . . . . . . . . . . . 492.3.5 LCR Parallel Circuit Transient Response . . . . . . . . 50
2.4 Laboratory Experiment . . . . . . . . . . . . . . . . . . . . . . 522.4.1 Pre-laboratory Exercises . . . . . . . . . . . . . . . . . 522.4.2 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 53
3 The Operational Amplifier 573.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 573.2 The Ideal Operational Amplifier . . . . . . . . . . . . . . . . 58
3.2.1 Ideal Op-Amp Fundamental Equation (Golden Rules) 593.2.2 Op-Amp Input Output “Logic” . . . . . . . . . . . . . 593.2.3 Op-Amp with a Feedback Network . . . . . . . . . . 603.2.4 The Virtual Ground . . . . . . . . . . . . . . . . . . . . 60
3.3 Commonly Used Op-Amp Circuits . . . . . . . . . . . . . . . 603.3.1 Non-Inverting Amplifier . . . . . . . . . . . . . . . . . 613.3.2 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . 623.3.3 Differential Input Stage . . . . . . . . . . . . . . . . . 623.3.4 Voltage Follower (Unity Gain “Buffer”) . . . . . . . . 633.3.5 Integrator Amplifier . . . . . . . . . . . . . . . . . . . 643.3.6 Differentiator Amplifier . . . . . . . . . . . . . . . . . 65
3.4 Negative Feedback Amplifiers . . . . . . . . . . . . . . . . . 66
DRAFT
CONTENTS 5
3.4.1 Input Impedance Feedback Amplifier . . . . . . . . . 683.4.2 Output Impedance Feedback Amplifier . . . . . . . . 683.4.3 Simple Feedback Network . . . . . . . . . . . . . . . . 69
3.4.3.1 Non-Inverting Configuration . . . . . . . . . 693.4.3.2 Inverting Configuration . . . . . . . . . . . . 69
3.5 The Real Op-Amp . . . . . . . . . . . . . . . . . . . . . . . . . 703.5.1 Bias Currents and Voltage and Current Offsets . . . . 703.5.2 Compensated Op-Amp Transfer Function . . . . . . . 71
3.5.2.1 Compensated Op-Amp with Constant Fre-quency Response Feedback . . . . . . . . . . 73
3.5.2.2 Compensated Op-Amp in the Differentia-tor Configuration . . . . . . . . . . . . . . . 73
3.5.3 The Common Mode Rejection Ratio (CMRR) . . . . . 743.5.4 The Gain Bandwidth Product (GBWP) . . . . . . . . . 753.5.5 The Slew Rate (SR) . . . . . . . . . . . . . . . . . . . . 763.5.6 Ideal versus Real and Practical Considerations . . . . 77
3.6 Problems Preparatory to the Laboratory . . . . . . . . . . . . 793.7 Laboratory Procedure . . . . . . . . . . . . . . . . . . . . . . . 79
4 Diodes and Transistors 85
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 854.2 The Semiconductor Junction (Diode) . . . . . . . . . . . . . . 85
4.2.1 Zener Diodes . . . . . . . . . . . . . . . . . . . . . . . 874.2.2 Schottky Diodes . . . . . . . . . . . . . . . . . . . . . . 88
4.3 Diode Dynamic Impedance . . . . . . . . . . . . . . . . . . . 884.4 Practical Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.4.1 Rectifiers, AC to DC Conversion . . . . . . . . . . . . 894.4.1.1 Half-Wave Rectifier . . . . . . . . . . . . . . 894.4.1.2 Full-Wave Rectifier Bridge . . . . . . . . . . 91
4.4.2 Voltage Limiter (Diode Clamp) . . . . . . . . . . . . . 914.5 The Bipolar Junction Transistor (BJT) . . . . . . . . . . . . . . 92
4.5.1 The Collector Emitter Characteristic . . . . . . . . . . 944.5.2 The BJT as a Current-Controlled Current Source (CCCS)
954.5.3 BJT Simplified DC Model . . . . . . . . . . . . . . . . 964.5.4 The BJT as an Amplifier . . . . . . . . . . . . . . . . . 97
4.5.4.1 BJT Amplifier Bias . . . . . . . . . . . . . . . 98
DRAFT
6 CONTENTS
4.5.4.2 BJT Amplifier Gain, Input and Output Impedance(Low Frequency Model) . . . . . . . . . . . 99
4.5.5 BJT as Switch . . . . . . . . . . . . . . . . . . . . . . . 1004.5.6 BJT as Diode . . . . . . . . . . . . . . . . . . . . . . . . 1014.5.7 Current Mirror . . . . . . . . . . . . . . . . . . . . . . 101
5 Basic Op-Amp Applications 1075.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
5.1.1 Inverting Summing Stage . . . . . . . . . . . . . . . . 1075.1.2 Basic Instrumentation Amplifier . . . . . . . . . . . . 1085.1.3 Voltage to Current Converter (Transconductance Am-
plifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1095.1.4 Current to Voltage Converter (Transresistance Am-
plifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1105.2 Logarithmic Circuits . . . . . . . . . . . . . . . . . . . . . . . 111
5.2.1 Logarithmic Amplifier . . . . . . . . . . . . . . . . . . 1125.2.2 Anti-Logarithmic Amplifier . . . . . . . . . . . . . . . 1125.2.3 Analog Multiplier . . . . . . . . . . . . . . . . . . . . 1145.2.4 Analog Divider . . . . . . . . . . . . . . . . . . . . . . 114
5.3 Multiple-Feedback Band-Pass Filter . . . . . . . . . . . . . . 1145.4 Peak and Peak-to-Peak Detectors . . . . . . . . . . . . . . . . 1165.5 Zero Crossing Detector . . . . . . . . . . . . . . . . . . . . . . 1165.6 Analog Comparator . . . . . . . . . . . . . . . . . . . . . . . . 1175.7 Regenerative Comparator (The Schmitt Trigger) . . . . . . . 1185.8 Phase Shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1195.9 Generalized Impedance Converter (GIC) . . . . . . . . . . . 121
5.9.1 Capacitor to Inductor Converter . . . . . . . . . . . . 1225.10 Problems Preparatory to the Laboratory . . . . . . . . . . . . 123
6 Active Filters 1276.1 Classification of Ideal Filters . . . . . . . . . . . . . . . . . . . 1286.2 Filters as Rational Functions . . . . . . . . . . . . . . . . . . . 129
6.2.1 Second Order Low-Pass Filter . . . . . . . . . . . . . 1316.2.2 Second Order High-Pass Filter . . . . . . . . . . . . . 1326.2.3 Band-Pass Filter . . . . . . . . . . . . . . . . . . . . . 133
6.3 Common Circuit Filters Topologies . . . . . . . . . . . . . . . 1346.4 Infinite Gain Multiple Feedback Configuration (IGMF) . . . 135
6.4.1 Low-pass Filter . . . . . . . . . . . . . . . . . . . . . . 136
DRAFT
CONTENTS 7
6.4.2 High-pass Filter . . . . . . . . . . . . . . . . . . . . . . 1376.4.3 Band-pass Filter . . . . . . . . . . . . . . . . . . . . . . 138
6.5 Generalized Sallen-Key Filter Topology (GSK) . . . . . . . . 1396.5.1 GSK Second Order Low-pass Filter . . . . . . . . . . . 1406.5.2 Simple Case . . . . . . . . . . . . . . . . . . . . . . . . 1416.5.3 GSK Second Order High-pass Filter . . . . . . . . . . 1416.5.4 Simple Case . . . . . . . . . . . . . . . . . . . . . . . . 1426.5.5 GSK Band-pass Filter . . . . . . . . . . . . . . . . . . . 1426.5.6 Simple Case . . . . . . . . . . . . . . . . . . . . . . . . 143
6.6 State Variable Filter Topology (SV) . . . . . . . . . . . . . . . 1446.7 Practical Considerations . . . . . . . . . . . . . . . . . . . . . 144
6.7.1 Component Values . . . . . . . . . . . . . . . . . . . . 1446.7.2 Components technology . . . . . . . . . . . . . . . . . 145
7 Basics on Oscillators 1497.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1497.2 Barkhausen Criterion . . . . . . . . . . . . . . . . . . . . . . . 149
7.2.1 Gain Stability . . . . . . . . . . . . . . . . . . . . . . . 1517.2.2 Automatic Gain Control (AGC) . . . . . . . . . . . . . 1517.2.3 Oscillation Kick-start . . . . . . . . . . . . . . . . . . . 1517.2.4 Frequency Stability . . . . . . . . . . . . . . . . . . . . 152
7.3 Phase Shift Oscillator . . . . . . . . . . . . . . . . . . . . . . . 1527.4 The Wien-Bridge Oscillator . . . . . . . . . . . . . . . . . . . 1537.5 LC Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1557.6 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . 1577.7 Relaxation Oscillators . . . . . . . . . . . . . . . . . . . . . . . 160
7.7.1 Square Wave Generator . . . . . . . . . . . . . . . . . 1607.7.2 Triangular Wave Generator . . . . . . . . . . . . . . . 161
8 Phase Locked Loop (PLL) 1678.1 Phase Locked Loop Basic Analysis . . . . . . . . . . . . . . . 1688.2 Phase Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
8.2.1 Analog Mixer Phase Detector . . . . . . . . . . . . . . 1698.2.2 Logic Gate Phase Detector . . . . . . . . . . . . . . . . 169
8.3 Voltage Controlled Oscillator (VCO) . . . . . . . . . . . . . . 1708.4 Varactors or Varycap . . . . . . . . . . . . . . . . . . . . . . . 1718.5 CMOS 4046 PLL Circuit . . . . . . . . . . . . . . . . . . . . . 1728.6 Pre-lab Problems . . . . . . . . . . . . . . . . . . . . . . . . . 172
DRAFT
8 CONTENTS
9 Final Project, Some Useful Circuits 177
9.1 Solderless Breadboard . . . . . . . . . . . . . . . . . . . . . . 1779.2 Decoupling/Bypassing Capacitor . . . . . . . . . . . . . . . . 1789.3 Variable Resistors . . . . . . . . . . . . . . . . . . . . . . . . . 1799.4 Surface Mount Devices . . . . . . . . . . . . . . . . . . . . . . 1799.5 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1809.6 Voice Coil Loud-speakers Driver . . . . . . . . . . . . . . . . 181
9.6.1 Off the shelf Audio Amplifiers . . . . . . . . . . . . . 1829.7 Microphones . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1829.8 Phototransistors . . . . . . . . . . . . . . . . . . . . . . . . . . 1849.9 Photodiodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
9.9.1 Photovoltaic Mode . . . . . . . . . . . . . . . . . . . . 1879.9.2 Photocurrent Mode . . . . . . . . . . . . . . . . . . . 188
9.10 Ultrasonic Transceivers . . . . . . . . . . . . . . . . . . . . . . 1889.11 Velocity Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . 1889.12 Position Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . 189
A Decibels 193
A.1 Definition of Bel and Decibel . . . . . . . . . . . . . . . . . . 193A.2 Generalization of the Use of Decibel . . . . . . . . . . . . . . 194A.3 Useful Table and Properties . . . . . . . . . . . . . . . . . . . 194A.4 Standard Power References . . . . . . . . . . . . . . . . . . . 195
B Resistor Color Code 197
C The Cathode Ray Tube Oscilloscope 199
C.1 The Cathode Ray Tube Oscilloscope . . . . . . . . . . . . . . 199C.1.1 The Cathode Ray Tube . . . . . . . . . . . . . . . . . . 200C.1.2 The Horizontal and Vertical Inputs . . . . . . . . . . 200C.1.3 The Time base Generator . . . . . . . . . . . . . . . . 200C.1.4 The Trigger . . . . . . . . . . . . . . . . . . . . . . . . 202
C.2 Oscilloscope Input Impedance . . . . . . . . . . . . . . . . . . 203C.3 Oscilloscope Probe . . . . . . . . . . . . . . . . . . . . . . . . 204
C.3.1 Probe Frequency Compensation . . . . . . . . . . . . 205C.4 Beam Trajectory . . . . . . . . . . . . . . . . . . . . . . . . . . 208
C.4.1 CRT Frequency Limit . . . . . . . . . . . . . . . . . . . 209
DRAFT
CONTENTS 9
D Electromagnetic Field Noise 211D.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211D.2 The Faraday Cage . . . . . . . . . . . . . . . . . . . . . . . . . 211D.3 Practical Considerations . . . . . . . . . . . . . . . . . . . . . 212
E Common Emitter BJT Amplifier 213E.1 Amplifier Design . . . . . . . . . . . . . . . . . . . . . . . . . 214E.2 Resume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215E.3 Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215E.4 Amplifier Gain and Sign . . . . . . . . . . . . . . . . . . . . . 216E.5 Input and Output Impedance . . . . . . . . . . . . . . . . . . 216E.6 I/O Coupling Capacitors . . . . . . . . . . . . . . . . . . . . . 217E.7 Emitter Bypass Capacitor . . . . . . . . . . . . . . . . . . . . 218
F Push-Pull BJT Amplifier 219F.1 Push-Pull BJT Configuration . . . . . . . . . . . . . . . . . . . 220F.2 Dissipation and Efficiency . . . . . . . . . . . . . . . . . . . . 221F.3 Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
DRAFT
Chapter 1
Alternating Current NetworkTheory
In this chapter we will study the properties of electronic networks prop-agating sinusoidal voltages and currents (alternate current/AC regime).In other words, voltage or current sources connected to the networks pro-duce electromagnetic waves whose frequency can be ideally changed from0 to ∞.
Considering an electromagnetic wave whose frequency f is 1MHz, (typical maximum frequency f used in this course of analog electronics)and the electromagnetic field propagates at a speed c = 3 · 108m/s (1’/ns),the wavelength λ = c/ f will be usually much greater than several hun-dred feet, hundreds to thousands of times greater than the physical sizesof our electronic circuits. Consequently, each individual circuit componentwill have at any instant, to a high degree of accuracy, zero net total currentflowing in or out of all its connections and components. Such componentsare known as a lumped elements.
When fields wavelength becomes comparable to the size of the circuitcomponents, fields and currents can vary across the element, making ita distributed element. Examples of distributed elements include antennas,microwave waveguides, and the electrical power distribution grid.
For two-terminal lumped elements, we can conclude that at any in-stant, the current flowing out of one terminal must equal the current flow-ing into the other, so we can simply refer to the current flowing through theelement and the potential difference (voltage difference or voltage drop)between the two terminals.
11
DRAFT
12 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
In general, if we have a sinusoidal signal (sinusoidal voltages, or cur-rents) applied to a circuit having at least one input and one output, we willexpect a change in the amplitude and phase at the output. The determi-nation of these quantities for quite simple circuits can be very complex. Itis indeed important to develop a convenient representation of sinusoidalsignals to simplify the analysis of circuits in this AC regime.
The AC analysis of such circuits is valid once the network is at thesteady state, i.e. when the transient behavior (such as those ones producedby closing or opening switches) is extinguished.
1.1 Symbolic Representation of a Sinusoidal Sig-
nals, Phasors
A sinusoidal quantity (a sinusoidal current or voltage for example) ,
A(t) = A0 sin(ωt + ϕ),
is univocally characterized by the amplitude A0, the angular frequency ω,and the initial phase ϕ. The phase ϕ corresponds to a given time shift t∗ ofthe sinusoid (ωt∗ = ϕ ⇒ t∗ = ϕ/ω).
We can indeed associate to A(t) an applied vector ~A in the complexplane with modulus |A| = A0 ≥ 0, rotating counter-clockwise around theorigin O with angular frequency ω and initial angle ϕ (see figure 1.1). Suchvectors are called phasors.
The complex representation of the phasor is1
~A = A0ej(ωt+ϕ), j =√−1,
or~A = x + jy,
x = A0 cos(ωt + ϕ)y = A0 sin(ωt + ϕ)
Extracting the real and the imaginary part of the phasor, we can easilycompute its amplitude A0 and phase ϕ, i.e.
|A| =√
ℜ[~A]2 +ℑ[~A]2 ϕ = arg [A] = arctan
(
ℑ[~A]
ℜ[~A]
)
(t = 0),
1To avoid confusion with the electric current symbol i, it is convenient to use the sym-bol j for the imaginary unit.
DRAFT
1.1. SYMBOLIC REPRESENTATION OF A SINUSOIDAL SIGNALS, PHASORS13
0A
t0
t =
T= 2π/ω
ϕ/ω*
0 x
ϕ
ϕ+ωA(t)
A(0)
jy
A
tA(t)
Figure 1.1: Sinusoidal quantityA(t) and its phasor representation ~A at theinitial time t = 0 and at time t.
and reconstruct the real sinusoidal quantity. It is worth noting that in gen-eral, amplitude A0 and phase ϕ are functions of the frequency.
The convenience of this representation will be evident, once we con-sider the operation of derivation and integration of a phasor.
1.1.1 Derivative of a Phasor
Computing the derivative of a phasor ~A, we get
d~A
dt= jωA0ej(ωt+ϕ) = jω ~A,
i.e. the derivative of a phasor is equal to the phasor times jω.
1.1.2 Integral of a Phasor
The integral of a phasor ~A is
∫ t
t0
~Adt′ =1
jω
[
A0ej(ωt+ϕ) − A0ej(ωt0+ϕ)]
=1
jω~A + const.,
i.e. the integral of a phasor is equal to the phasor divided by jω plus aconstant. For the AC regime we can assume the constant to be equal tozero without loss of generality.
DRAFT
14 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
Figure 1.2: Generic representation of a network
1.2 Network Definitions
To make easier the understanding of network basic theorems, some moreor less intuitive definitions must be stated.
An electronic network or circuit is a set of electronic components/devicesconnected together to modify and transmit/transfer energy/information.This information is generally called an electric signal or simply a signal.
To graphically represent a network, we use a set of coded symbols withterminals for the network lumped elements and lines for connections. Theselines propagate the signal among the elements without changing it. Theelements change the propagation of the electric signals.
A network node is a point where more than two network lines connect.A network loop, or mesh, is any closed network line. To determine a mesh
it is sufficient to start from any point of the circuit and come back runningtrough the network to the same point without passing through the samepoint.
Quantities defining signal propagation are voltages V across the ele-ments and currents I flowing through them.
Solving an electronic network means determining the currents or thevoltages of each point of it.
Figure 1.2 shows a generic portion of a network with 4 visible nodes,and 3 visible meshes. The empty boxes are the electronic elements of the
DRAFT
1.2. NETWORK DEFINITIONS 15
network and their size is just for convenience and don’t correspond to anyphysical dimensions. These are the points in the network where voltagesand currents are modified.
1.2.1 Series and Parallel
Let’s consider the two different connection topologies shown in figure 1.3,the parallel and the series connections.
A set of components is said to be in series if the current flowing throughthem and anywhere in the circuit is the same .
A set of components is said to be in parallel if the voltage differencebetween them is the same.
B
A
A B
Figure 1.3: Considering the points A, and B, the components of the left circuitare in parallel, and those in the right circuit are in series.
1.2.2 Active and Passive Components
Circuit components can be divided into two categories: active and passivecomponents. Active components are those devices that feed energy intothe network. Voltage and current sources are active components. Ampli-fiers are also active components.
Passive components are those components, that do not feed energy tothe network. Resistors, capacitors, inductors are typical passive compo-nents.
In general, both active and passive components dissipate energy.
DRAFT
16 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
1.3 Kirchhoff’s Laws
Kirchhoff’s laws, are fundamental for the solution of an electronic circuit.They can be derived from Maxwell’s equations in the approximation ofslowly varying field.Kirchhoff’s Voltage Law (KVL): The algebraic sum of the voltage differ-ence vk at the time t around a loop must be equal to zero at all times, i.e.
∑k
vk(t) = 0
Kirchhoff’s Current Law(KCL): The algebraic sum of the currents ik at thetime t entering and leaving a node must be equal to zero at all times, i.e.
∑k
ik(t) = 0.
These laws hold for phasors as well.
1.4 Passive Ideal Components with Phasors
Let’s rewrite the I-V characteristic for the passive ideal components usingthe phasor notation. For sake of simplicity, we remove the arrow above thephasor symbol. To avoid ambiguity, we will use upper case letters to indi-cate phasors, and lower case letters to indicate a generic time dependentsignal.
1.4.1 The Resistor
For time dependent signals, Ohm’s law for a resistor with resistance R is
v(t) = Ri(t).
V VI
t=0
jω
I R
DRAFT
1.4. PASSIVE IDEAL COMPONENTS WITH PHASORS 17
Introducing the phasor I = I0ejωt (see figure above), we get
v(t) = RI0ejωt,
and in the phasor notationV = R I.
The frequency and time dependence are implicitly contained in thephasor current I.
1.4.2 The Capacitor
The variation of the voltage difference dv across a capacitor with capaci-tance C due to the amount of charge dQ, is
dv =dQ
C.
If the variation happens in a time dt and
i(t) =dQ
dt,
we will have
dv(t)
dt=
1C
i(t), ⇒ v(t) =1C
∫ t
0i(t′)dt′ + v(0).
C V
V
I
t=0jω
I
For sinusoidal time dependence , we introduce the phasor I = I0ejωt
(see figure above), and get
DRAFT
18 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
v(t) =1C
∫ t
0I0ejωt′dt′ + v(0),
Using the phasor notation and supposing that for t = 0 the capacitor isdischarged, we finally get
V =1
jωCI, , v(0) = 0.
1.4.3 The Inductor
The induced voltage v(t) of an inductor with inductance L, is
v(t) = Ldi(t)
dt.
VLI
Vt=0
jω
I
Introducing the phasor I = I0ejωt (see figure above), we get
v(t) = Ld
dtI0ejωt,
and in the phasor notation
V = jωL I.
1.5 The Impedance and Admittance Concept
Let’s consider a generic circuit with a port, whose voltage difference andcurrent are respectively the phasors V = V0ej(ωt+ϕ), and I = I0ej(ωt+ψ).The ratio Z between the voltage difference and the current
Z(ω) =V
I=
V0
I0ej(ϕ−ψ).
DRAFT
1.5. THE IMPEDANCE AND ADMITTANCE CONCEPT 19
is said to be the impedance of the circuit.The inverse
Y(ω) =1
Z(ω)
is called the admittance of the circuit.For example, considering the results of the previous subsection, the
impedance of a resistor, a capacitor, and an inductor are respectively
ZR = R, ZC(ω) =1
jωC, ZL(ω) = jωL,
and the admittances are
YR =1R
, YC(ω) = jωC, YL(ω) =1
jωL.
In general, the impedance or admittance of a circuit port is a complexfunction, which depends on the angular frequency ω. Quite often, theyare graphically represented by plotting the magnitude|Z(ω)|or |Y(ω)|in adouble logarithmic scale and the phase arg [Z(ω)]or arg [Y(ω)] in a loga-rithmic scale.
For completeness, letŽs introduce some other definitions:
• The real part R of the impedance Z(ω) is called resistance.
• The imaginary part X of the impedance Z(ω) is called reactance. IfX > 0, then X is an inductive reactance (from the fact that the reactanceof an inductor is ωL ≥ 0). If X < 0 then X is a capacitive reactance (the reactance of an capacitor is −1/ωC ≤ 0).
• The real part G of the admittance Y(ω) is called conductance.
• The imaginary B part of the admittance Y(ω) is called susceptance. IfB < 0, then is B an inductive susceptance. If B > 0 then B is a capacitivesusceptance.
1.5.1 Impedance in Parallel and Series
It can be easily demonstrated that the same laws for the total resistance ofa series or a parallel of resistors hold for the impedance
Ztot = Z1 + Z2 + ... + ZN , (impedances in series)
DRAFT
20 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
1Ztot
=1
Z1+
1Z1
+ ... +1
ZN, (impedances in parallel)
It is left as exercise to derive the homologue laws for the admittance.
1.5.2 Ohm’s Law for Sinusoidal Regime
Thanks to the impedance concept, we can generalize Ohm’s law and writethe fundamental equation (Ohm’s law for sinusoidal regime)
V(ω) = Z(ω)I(ω).
1.6 Two-Port Networks
ωH( )Vi Vo
Ii
Ii
Io
Io−
+A
B
Port 1
−
+C
D
Port 2
Figure 1.4: Two-port network circuit representation. The voltage differ-ence signs and current directions follow standard conventions.
A terminal port is a terminal pair of a linear circuit whose input currentequals the output current. A linear circuit with one pair of input termi-nals A, B and one pair output terminals C, D is called two-port network (seefigure 1.4). The electronic circuits we will consider here, are two-port net-work with terminals B and C connected together[2]. In this case, to char-acterize the behavior of a two-port network, we can study the responseof the output Vo as a function of the angular frequency ω of a sinusoidalinput Vi.
In general, we can write
Vo(ω) = H(ω)Vi(ω), or H(ω) =Vo(ω)
Vi(ω),
DRAFT
1.6. TWO-PORT NETWORKS 21
where the complex function H(ω) is called the transfer function or frequencyresponse of the two-port network. The transfer function contains the informa-tion of how the amplitude and the phase of the input changes when itreaches the output. Knowing the transfer function of this particular two-port network, we characterize the circuit2. The definition of H(ω) suggestsa way of measuring the transfer function. In fact, exciting the input witha sinusoidal wave, we can measure at the output the amplitude and thephase lead or lag respect to the input signal.
1.6.1 Bode Diagrams
To graphically represent H(ω), it is common practice to plot the magni-tude |H(ω)| (gain) in a double logarithmic scale, and the phase arg [H(ω)]using a logarithmic scale for the angular frequency. These plots are calledBode diagrams. Units for ω are normally rad/s or Hz. The magnitude isquite often expressed in decibels dB (see appendix A)
XdB = 20 log10 X
For example 20dB = 10, 40dB=100, etc... Practically, plotting a quantityin dB (which is not a units symbol such as m,s,kg, Ω ) corresponds to plotthe quantity on a logarithmic scale.
The phase can be expressed in radians (rad) or in degrees (deg).Logarithmic scales have the advantage of emphasizing asymptotic trends
and the disadvantage of flattening small variations. In other words, varia-tions much smaller that the range of the plotted values become quite oftenindistinguishable in a logarithmic scale. To find out such kind of behavior,it is a good practice to look at magnitudes in both linear and logarithmicplots.
The Asymptotic Bode diagram [1], a simplification of the frequencyresponse of a system is a convenient approximation of the characteristicsof H(ω).
2A thorough understanding of the transfer function of a circuit requires the conceptof the Fourier transform and the Laplace transform and the convolution theorem. See [2]appendix C
DRAFT
22 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
R
CIVin Vout
I
Figure 1.5: RC low-pass filter circuit.
1.6.2 The RC Low-Pass Filter
Figure 1.5 shows the RC low-pass filter circuit. The input and output voltagedifferences are respectively3
Vin = Zin I =
(
R +1
jωC
)
I,
Vout = Zout I =1
jωCI,
and the transfer function is indeed
H(ω) =Vout
Vin=
11 + jτω
, τ = RC.
or
H(ω) =1
1 + jω/ω0, ω0 =
1RC
.
Computing the magnitude and phase of H(ω), we obtain
|H(ω)| =1√
1 + τ2ω2
arg(H(ω)) = − arctan(
ω
ω0
)
Figure 1.6 shows the magnitude and phase of H(ω). The parameter τand ω0 are called respectively the time constant and angular cut-off frequency
3Vout as function of Vin can be directly calculated using the voltage divider equation.
DRAFT
1.6. TWO-PORT NETWORKS 23
Frequency (rad/sec)
Pha
se (
deg)
Mag
nitu
de (
abs)
10−1
100
108
109
1010
−90
−45
0
Figure 1.6: RC low-pass filter circuit transfer function.
of the circuit. The cut-off frequency is the frequency where the output Vout
is attenuated by a factor 1/√
2.
It is worthwhile to analyze the qualitative behavior of the capacitorvoltage difference Vout at very low frequency and at very high frequency.
For very low frequency the capacitor is an open circuit and Vout is es-sentially equal to Vin. For high frequency the capacitor acts like a shortcircuit and Vout goes to zero.
The capacitor produces also a delay as shown in the phase plot. Atvery low frequency the Vout follows Vin (they have the same phase). Theoutput Vout loses phase (ωt = ϕ ⇒ t = ϕ/ω) when the frequency in-creases. The output Vout starts lagging due to the negative phase ϕ, andthen approaches a maximum delay at a phase shift of −π/2.
DRAFT
24 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
IVin VoutRC
I
Figure 1.7: RC high-pass filter circuit
1.6.3 The RC High-Pass Filter
Figure 1.7 shows the RC high-pass filter circuit. The input and the outputvoltage differences are respectively
Vin = Zin I =
(
R +1
jωC
)
I,
Vout = Zout I = RI,
and indeed the transfer function is
H(ω) =Vout
Vin=
jωτ
1 + jτω, τ = RC.
or
H(ω) =jω/ω0
1 + jω/ω0, ω0 =
1RC
.
Computing the magnitude and phase of H(ω), we obtain
|H(ω)| =τω√
1 + τ2ω2,
arg(H(ω)) = arctan(ω0
ω
)
Figure 1.8 shows the magnitude and phase of H(ω). The definitions inthe previous subsection, for τ and ω0, hold for the RC high-pass filter.
DRAFT
1.7. IDEAL SOURCES 25
Frequency (rad/sec)
Pha
se (
deg)
Mag
nitu
de (
abs)
100
100
101
102
0
45
90
Figure 1.8: RC high-pass filter circuit transfer function.
1.7 Ideal Sources
1.7.1 Ideal Voltage Source
An ideal voltage source is a source able to deliver a given voltage differ-ence Vs between its leads independent of the load R attached to it (seefigure 1.9). It follows from Ohm’s law that a voltage source is able to pro-duce the current I necessary to keep constant the voltage difference Vs
across the load R. The symbol for the ideal voltage source is shown infigure 1.9.
Quite often, a real voltage source exhibits a linear dependence on theresistive load R. It can be represented using an ideal voltage source Vs inseries with a resistor Rs called input resistance of the source. ApplyingOhm’s law, it can be easily shown that the voltage and current throughthe load R are
V =R
R + RsVs, I =
Vs
R + Rs.
DRAFT
26 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
If we assume
R ≫ Rs, ⇒ V ≃ Vs, I ≃ Vs
R.
Under the previous condition, the real voltage source approximates theideal case.
sV sV
+
−
VRI
V
I
Figure 1.9: Ideal voltage source.
1.7.2 Ideal Current Source
An ideal current source is a source able to deliver a given current Is thatdoes not depend on the load R attached to it (see figure 1.10). It followsfrom Ohm’s law that an ideal current source is able to produce the voltagedifference V across the load R needed to keep Is constant. The symbol forthe ideal current source is shown in figure 1.10.
A real current source exhibits a dependence on the resistive load R,which can be represented using an ideal current source Is in parallel witha resistor Rs. Applying Ohm’s law and the KCL, it can be easily shownthat the voltage and current through the load R are
I =Rs
R + RsIs, V =
RsR
Rs + RIs.
If we suppose
Rs ≫ R, ⇒ I ≃ Is, V ≃ RIs ≫ 0
Under the previous condition, the real current source approximates theideal case.
DRAFT
1.8. EQUIVALENT NETWORKS 27
sVIs
Is
VRI
V
I
Figure 1.10: Ideal current source.
1.8 Equivalent Networks
Quite often, the analysis of a network becomes easier by replacing partof it with an equivalent and simpler network or dividing it into simplersub-networks.
For example, the voltage divider is an equation easy to remember thatallows to divide a complex circuit in two parts simplifying the search ofthe solution.
Thévenin and Norton theorems give us two methods to calculate equiv-alent circuits which behave like the original circuit, as seen from two pointsof it. The techniques briefly explained in this section, will be then exten-sively used in the next chapters .
1.8.1 Voltage Divider
The voltage divider equation is applicable every time we have a circuitwhich can be re-conducted to a series of two simple or complex compo-nents. Considering the circuit branch of figure 1.11 and applying Ohm’slaw, we have
VTot = (Z1 + Z2)I
V2 = Z2 I
and indeed
V2 =Z2
Z1 + Z2VTot,
which is the voltage divider equation.
DRAFT
28 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
V2
VTot
Z1
Z2
I
Figure 1.11: Voltage divider circuit.
1.8.2 Thévenin Theorem
Thévenin theorem allows us to find an equivalent circuit for a networkseen from two points A and B using an ideal voltage source VTh in serieswith an impedance ZTh.
ZTh
VThBlack Box
+
−
ZLZL
Figure 1.12: Thévenin equivalent circuit illustration.
The equivalence means that if we place a load ZL between A and Bin the original circuit (see figure 1.12) and measure the voltage VL and thecurrent IL across the load, we will obtain exactly the same VL and IL if ZLisplaced in the equivalent circuit. This must be true for any load we connectbetween the points A and B .
The previous statement and the linearity of the circuit can be used tofind VTh and ZTh. In fact, if we consider ZL = ∞ (open circuit, OC), wewill have
VTh = VOC .
DRAFT
1.8. EQUIVALENT NETWORKS 29
The Voltage VTh is just the voltage difference between the two leads Aand B.
For ZL = 0 (short circuit, SC) we must have
ISC =VTh
ZTh=
VOC
ZTh.
and thereforeZTh =
VOC
ISC.
The last expression says that the Thévenin impedance is the impedanceseen from the points A and B of the original circuit.
If the circuit is known, the Thévenin parameter can be calculated inthe case for the terminals A and B open. In fact, VTh is just the voltageacross A and B of a known circuit. Replacing the ideal voltage sourceswith short circuits (their resistance is zero) and ideal current sources withopen circuits ( their resistance is infinite), we can calculate the impedanceZTh seen from terminals A and B.
Considering the previous results, we can finally state Thévenin theo-rem as follows:
Any circuit seen from two points can be replaced by an ideal voltage source ofvoltage VTh in series with impedance ZTh. VTh is the voltage difference betweenthe two point of the original circuit. ZTh is the impedance seen from these twopoints, short-circuiting all the ideal voltage generators and open-circuiting all theideal current generators.
Example:
We want to find the Thévenin circuit of the network enclosed in the grayrectangle of figure 1.13. To find RTh, and VTh we have to disconnect thecircuit in the points A and B. In this case, the voltage difference betweenthese two points, thanks to the voltage divider equation, is
VTh =R1
R1 + R2Vs.
Short circuiting Vs we will have R1 in parallel with R2. The Théveninresistance RTh will be indeed
RTh =R1R2
R1 + R2.
DRAFT
30 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
Vs+
−V0
R1
RTh
VTh
R2
R0R0
V0
+
−
A
B
A
B
+
−+
−
Figure 1.13: Thévenin equivalent circuit example
I NoBlack Box Z Z
NoL LZ
Figure 1.14: Norton equivalent circuit illustration.
1.8.3 Norton Theorem
Any kind of active network seen from two points A and B can by replaced by anideal current generator INo in parallel with a impedance ZNo. The current INo
corresponds to the short-circuit current of the two points A and B. The ResistanceZNo is the Thévenin resistance ZNo = ZTh .
The proof of this theorem is left as exercise.
DRAFT
1.9. FIRST LABORATORY WEEK 31
1.9 First Laboratory Week
This first laboratory class is essentially intended to help the student to be-come acquainted with the laboratory instrumentation (function generator,digital multimeter, circuit bread board, connectors), and with the use ofpassive components and their mathematical descriptions.
1.9.1 Pre-laboratory Problems
To complete the preparatory problems, it is recommended to read sections1.1 to 1.6, and appendix C for the laboratory procedure.
1. Considering the figure below (a “snapshot” of an oscilloscope dis-play), determine the peak to peak amplitude, the DC offset, the fre-quency of the two sinusoidal curves, and the phase shift betweenthe two curves (channels horizontal axis position is indicated by anarrow and the channel name on the right of the figure).
Horizontal Sensitivity [1 ms/div], 1div= distance between thick lines
Ver
tical
Sen
sitiv
ity [
50 m
V/d
iv],
1di
v =
dis
tanc
e be
twee
n th
ick
lines
CH1
CH2
CH1
CH2
DRAFT
32 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
1. Sketch in a graph the magnitude and phase of the RC series cir-cuit input impedance Zi. Determine the two asymptotic behaviorof |Zi| ,i.e. where the resistive and the capacitive behavior dominate.
2. Assuming that R2 ≫ R1, repeat the previous problem for the follow-ing circuit
Vo
I
RC RVi 2
1
Hint: in this case there are three dominant behaviors, two resistiveand one capacitive, and two frequencies which separate the threedominant behaviors.
3. The circuit below includes the impedance of the input channel of theCRT oscilloscope, and Vs is indeed the real voltage measured by theinstrument.
Oscilloscope InputStage
I
Cs sRVin Vs
R
C VC
Find the voltage Vs(ω) , and the angular cut-off frequency ω0 of thetransfer function Vs/Vin( i.e. the value of ω for which |Vs/Vin| =
1/√
2).Show that for ω = 0 the Vs(ω) formula simplifies and becomes theresistive voltage divider equation.Demonstrate that the conditions to neglect the input impedance ofthe oscilloscope are the following :
C ≫ Cs, R ≪ Rs
(Hint: use the voltage divider equation to write VC.)
DRAFT
1.9. FIRST LABORATORY WEEK 33
4. Considering the previous circuit, calculate the value of R neededto obtain Vin ≃ Vs with a fractional systematic error of 1%, if ω =0rad/s and Rs = 1MΩ.
5. Determine the values of R, and C needed to get a RC series circuitcut-off frequency of 20kHz. Choose values which make the oscillo-scope impedance negligible (Rs = 1MΩ, Cs = 25pF).
1.9.2 Procedure
Whenever you work with electronic circuits as a beginner (all students areconsidered beginners; it doesn’t matter which personal skills they alreadyhave), some extra precautions must be taken to avoid injuries. These arethe main ones:
• NEVER CONNECT INSTRUMENT PROBES OR LEADS TO AN OUTLET
OR MORE IN GENERAL TO THE POWER LINE.
• DO NOT TRY TO FIX/IMPROVE AN INSTRUMENT BY YOURSELF.
• DO NOT POWER AN INSTRUMENT WHICH IS NOT WORKING OR DIS-ASSEMBLED.
• DO NOT TOUCH A DISASSEMBLED OR PARTIALLY DISASSEMBLED IN-STRUMENT, EVEN IF IT IS NOT POWERED.
• WEAR PROTECTIVE GOGGLES EVERY TIME YOU USE A SOLDERING
IRON.
• TO AVOID EXPLOSIONS, NEVER USE A SOLDERING IRON ON A POW-ERED CIRCUIT AND BATTERIES.
• PLACE A FAN TO DISPERSE SOLDER VAPORS DURING SOLDERING
WORK.
Read carefully the text before starting the laboratory measurements.BNC cables and wires terminated with banana connectors are available
to connect the circuit under measurement to the instruments.
DRAFT
34 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY
BNC4 cables, a diffused type of radio frequency (RF) coaxial shieldedcable, have an intrinsic and quite well defined capacitance due to theirgeometry as shown in the figure below
C0
A
B
C
D
A C
DB
They have typical linear density capacitance ∆C/∆l ≃= 98pF/m. Wiresterminated with banana connectors have smaller capacitance than BNCcables but not as constant as BNC cables (Why?).
1. Build a RC low-pass or a RC high-pass filter with a cut-off frequencybetween 10kHz to 100kHz. Choose components values which makethe perturbation of the input impedance of the oscilloscope negligi-ble. Then, do the following
(a) Verify the circuit transfer function, and in particular for frequen-cies ν ≪ ν0 and ν ≫ ν0
(b) Find the cut-off frequency νo knowing the expected magnitudeand phase values, and compare with the theoretical values
(c) Change the capacitor value to be comparable to the oscilloscopeinput capacitance or the BNC cable capacitance and experimen-tally find the new cut-off frequency ν1. Compare with the theo-retical value.
(d) Drive the circuit input with a square wave and verify the tran-sient response of the circuit.
2. Measure the output impedance of the function generator for a givenfixed sinusoidal frequency. Place at least three different loads to per-form the measurement.
4“BNC” seems to stand for Bayonet Neill Concelman (named after Amphenol engi-neer Carl Concelman). Other sources claims that the acronym means British Navy Con-nector. What is certain is that the BNC connector was developed in the late 1940’s as aminiature version of the type C connector (what does the “C” stand for ?)
DRAFT
Bibliography
[1] Ref for Maxwell equations versus Kirchhoff’s laws.
[2] Microelectronics, Jacob Millman, and Arvin Grabel , Mac-Graw Hill
35
DRAFT
Chapter 2
Resonant Circuits
2.1 Introduction
Resonators, one of the most useful and used device, are essentially phys-ical systems that present a more or less pronounced peak in their transferfunction.
In general, their performance is measured by a dimensionless param-eter named quality factor Q, which characterizes the sharpness of the res-onant peak. The higher the quality factor the sharper is the peak and thebetter is the resonator.
Quite often, the major issues of building a resonator are to obtain veryhigh quality factors and good stability. For example, mechanical oscil-lators made of fused silica fibers under load, can achieve quality factorsabove 108 in the acoustic band[?]. Very high quality factors in electronicscan be achieved using the mechanical resonances of piezoelectric materialssuch as quartz. Lasers and resonant cavities made of mirrors can be usedto build resonators in the optical frequency range. The same principle canbe applied in the microwave range. Thermal stabilization is always a keyingredient to obtain high stability.
Resonators made with electronic passive components, reaching qualityfactors values up to 10-100 or more, are quite easy to realize. In the nextsections we will study two typical resonant circuits, the LCR series andLCR parallel circuits.
37
DRAFT
38 CHAPTER 2. RESONANT CIRCUITS
VL
VR
VCC
Vi
R
L
Figure 2.1: LCR series circuit.
2.2 The LCR Series Resonant Circuit
Figure 2.1 shows the so called LCR series resonant circuit. Depending onvoltage difference, we are considering as the circuit output ( the capacitor,the resistor, or the inductor), this circuit shows a different behavior. Let’sstudy in the frequency and in the time domain the response of this passivecircuit for each one of the possible outputs.
2.2.1 Frequency Response with Capacitor Voltage Differ-
ence as Circuit Output
Considering the voltage difference VC across the capacitor to be the circuitoutput, we will have
Vin =
(
R + jωL +1
jωC
)
I,
VC =1
jωCI ,
and the transfer function will be
HC(ω) =1
jωRC − ω2LC + 1.
DRAFT
2.2. THE LCR SERIES RESONANT CIRCUIT 39
For sake of simplicity, it is convenient to define the two following quan-tities
ω20 =
1LC
, Q =1R
√
L
C= ω0
L
R
The parameter Q is the quality factor of the circuit, and the angularfrequency ω0 is the resonant frequency of the circuit if R = 0.
Considering the previous definitions, and after some algebra, HC(ω)becomes
HC(ω) =ω2
0
ω20 − ω2 + jω ω0
Q
. (2.1)
Computing the magnitude and phase of HC(ω), we obtain
|HC(ω)| =ω2
0√
(
ω20 − ω2
)2+(
ω ω0Q
)2,
arg [HC(ω)] = − arctan
(
1Q
ω0ω
ω20 − ω2
)
.
The magnitude has maximum for
ω2C = ω2
0
(
1 − 12Q2
)
,
and the maximum is
|HC(ωC)| =Q
√
1 − 14Q2
.
If Q ≫ 1 then ωC ≃ ω0, and |HC(ωC)| ≃ Q.Far from resonance ωC, the approximate behavior of |HC(ω)| is
ω ≪ ωC ⇒ |HC(ω)| ≃ 1 ,
ω ≫ ωC ⇒ |HC(ω)| ≃ ω20
ω2 .
Figure 2.2 shows the magnitude and phase of HC(ω). In this case, thecircuit is a low pass filter of the second order because of the asymptoticslope 1/ω2.
DRAFT
40 CHAPTER 2. RESONANT CIRCUITS
Bode Diagram
Frequency (rad/sec)
Pha
se (
deg)
Mag
nitu
de (
dB)
−40
−30
−20
−10
0
10
20
104
105
106
−180
−135
−90
−45
0
Figure 2.2: Transfer function HC(ω) of the LCR series resonant circuit witha resonant angular frequency ωC ≃ 10.7krad/s.
2.2.2 Frequency Response with Inductor Voltage Difference
as Circuit Output
Let’s considering now the voltage difference VL across the inductor as thecircuit output. In this case, we have
HL(ω) = − ω2LC
jωRC − ω2LC + 1.
Using the definition of Q, and ω0 and after some algebra, HL(ω) be-comes
HL(ω) =−ω2
ω20 − ω2 + jω ω0
Q
(2.2)
DRAFT
2.2. THE LCR SERIES RESONANT CIRCUIT 41
Computing the magnitude and phase of HL(ω), we obtain
|HL(ω)| =ω2
√
(
ω20 − ω2
)2+(
ω ω0Q
)2
arg [HL(ω)] = arctan
(
1Q
ωω0
ω20 − ω2
)
The magnitude has a maximum for
ω2L = ω2
01
1 − 12Q2
,
and the maximum is
|HL(ωL)| =Q
√
1 − 14Q2
.
Again, if Q ≫ 1 then ωL ≃ ω0, and |HL(ωL)| ≃ Q.Far from resonance ωL, the approximate behavior of |HL(ω)| is
ω ≪ ωL ⇒ |HL(ω)| ≃ ω2
ω20
ω ≫ ωL ⇒ |HL(ω)| ≃ 1
Figure 2.3 shows the magnitude and phase of HL(ω). In this case thecircuit is a second order high pass filter.
2.2.3 Frequency Response with the Resistor Voltage Dif-
ference as Circuit Output
Considering the voltage difference across the resistor as the circuit output,we will have
HR(ω) =jωRC
1 − ω2LC + jωRC.
Using the definition of Q and ω0, and after some algebra, HR(ω) be-comes
DRAFT
42 CHAPTER 2. RESONANT CIRCUITS
Bode Diagram
Frequency (rad/sec)
Pha
se (
deg)
Mag
nitu
de (
dB)
−60
−40
−20
0
20
40
104
105
106
0
45
90
135
180
Figure 2.3: Transfer function HL(ω) of the LCR series resonant circuit witha resonant angular frequency ωL ≃ 10.7krad/s.
HR(ω) =jω ω0
Q
ω20 − ω2 + jω ω0
Q
. (2.3)
Computing the magnitude and phase of HR(ω), we obtain
|HR(ω)| =
ω0Q ω
√
(
ω20 − ω2
)2+(
ω ω0Q
)2
arg [HR(ω)] = arctan
(
Qω2
0 − ω2
ωω0
)
DRAFT
2.2. THE LCR SERIES RESONANT CIRCUIT 43
The magnitude has maximum for
ω2R = ω2
0,
and the maximum is
|HR(ωR)| = 1 .
Far from the resonance ωR, the approximate behavior of |HR(ω)| is
ω ≪ ωR ⇒ |HR(ω)| ≃ 1Q
ω
ω0
ω ≫ ωR ⇒ |HR(ω)| ≃ ω0
ω
Figure 2.4 shows the magnitude and phase of HR(ω). In this case thecircuit is a first order band pass filter.
2.2.4 Transient Response
The equation that describes the LCR series circuit response in the timedomain is
vi = Ri + Ldi
dt+
1C
∫ t
0i(t′)dt′ , (2.4)
where i(t) is the current flowing through the circuit and vi(t) is the inputvoltage.
Supposing that
vi(t) =
v0, t > 00, t ≤ 0
,
and differentiating both side of eq. 2.4, we obtain the linear differentialequation
Rdi
dt+ L
d2i
dt2 +1C
i = 0, t > 0
or, considering the definition of ω0, and Q,
d2i
dt2 +ω0
Q
di
dt+ ω2
0 i = 0.
DRAFT
44 CHAPTER 2. RESONANT CIRCUITS
Bode Diagram
Frequency (rad/sec)
Pha
se (
deg)
Mag
nitu
de (
dB)
104
105
106
−90
−45
0
45
90
−50
−40
−30
−20
−10
0
Figure 2.4: Transfer function HR(ω) of the LCR series resonant circuit withresonant angular frequency ωR ≃ 10.7krad/s.
The solutions of the characteristic polynomial equation associated withthe differential equation are
λ1,2 = −12
ω0
Q
(
1 ±√
1 − 4Q2)
.
As usual, we will have three different solutions depending on the dis-criminant value
∆ = 1 − 4Q2 .
Under-damped Case: discriminant less than zero (Q > 1/2)
In this case we have two complex conjugate roots and the differential equa-tion solution is the typical exponential ring down
DRAFT
2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 45
i(t) = i0e−ω02Q t sin (ωCt + ϕ0) , ω2
C = ω20
(
1 − 12Q2
)
.
Critically Damped Case: Discriminant equal to zero(Q = 1/2)
In this case we have a critically damped current and no oscillation
i(t) = i0e−ω02Q t
Over-damped Case: Discriminant greater than zero (Q < 1/2)
This is the case of two coincident solutions . We will have indeed, anexponential decay (no oscillations)
i(t) = i0e−ω02Q t (Ae−ωCt + Be+ωCt
)
, ω2C = ω2
0
(
1 − 12Q2
)
,
Voltages across each single element can be easily computed consider-ing the relation between v(t) and i(t).
Let’s just write the voltage across the capacitor for the under-dampedcase. Considering that the integration operation in this case changes justthe phase and creates an offset, the voltage across the capacitor, neglectingthis offset, will be
vC(t) = v0e−ω02Q t sin (ωCt + ψ) .
2.3 The Tank Circuit or LCR Parallel Circuit.
Figure 2.5 shows the so called LCR parallel resonant circuit or tank circuit,where the source depicted with an arrow inside a circle is an ideal cur-rent source. The resistor of resistance r accounts for inductor resistance.Let’s study the frequency and the transient response using the Théveninrepresentation shown in figure 2.6.
DRAFT
46 CHAPTER 2. RESONANT CIRCUITS
IsVoCR
L
r
Figure 2.5: The tank circuit.
2.3.1 LCR Circuit Frequency Response
Using Thévenin theorem for the current source and R, the LCR parallelcircuit considering the equivalent circuit as shown in figure 2.6 where thecurrent source and the resistor R have been replaced with the Thévenincircuit.
Considering that the current I of the current source can be written as
I =Vi
R,
I = Y Vo =
(
1R+
1r + jωL
+ jωC
)
Vo,
we haveVi
R=
(
1R+
1r + jωL
+ jωC
)
Vo (2.5)
Defining the following complex quantity as
1r∗(ω)
+1
jωL∗(ω)=
1r + jωL
, (2.6)
andR∗ = R || r∗,
eq. 2.5 becomesVi
R=
(
1R∗ +
1jωL∗ + jωC
)
Vo
DRAFT
2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 47
Vo
−sV
r
L
C
R
+
Figure 2.6: The tank circuit with the current source and the resistance Rreplaced with the Thévenin equivalent circuit.
After some algebra, we will have
Vo
Vi=
jωL∗
R∗ − ω2CL∗R∗ + jωL∗R∗
R. (2.7)
Generalizing the definition of ω0, and Q
ω∗0 =
1√
L∗(ω)C, Q∗ = R∗(ω)
√
C
L∗(ω),
and substituting in eq. 2.7 we finally obtain
H(ω) =jωω∗
0 /Q∗
(ω∗0)
2 − ω2 + jωω∗0 /Q∗
R∗
R
Let’s find the implicitly defined functions r∗, L∗. Using the term con-taining the inductance L in eq. 2.6, we obtain
1r + jωL
=1
r[
1 +(
ωLr
)2] +
1
jωL[
1 +(
rωL
)2] .
and finally
r∗(ω) = r
[
1 +(
ωL
r
)2]
, L∗(ω) = L
[
1 +( r
ωL
)2]
DRAFT
48 CHAPTER 2. RESONANT CIRCUITS
−100
−80
−60
−40
−20
0
Mag
nitu
de (
dB)
101
102
103
104
105
106
107
−90
−45
0
45
90
Pha
se (
deg)
Bode Diagram
Frequency (rad/sec)
Figure 2.7: Typical bode plot of a LCR parallel circuit with resonant angu-lar frequency near the acoustic band. As expected , if r is not zero, thenthe magnitude doesn’t go to zero for ω = 0.
2.3.2 Transfer Function
From the solution of the LCR parallel circuit we have
|H(ω)| =
ωω∗0
Q∗√
[
(
ω∗0
)2 − ω2]2
+(
ωω∗0
Q∗
)2
|R∗|R
arg(H(ω)) = arctan
Q∗ ω20 − ω2
ωω0
,
whose bode plots are shown in figure 2.7.
DRAFT
2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 49
2.3.3 Simplest Case
If r = 0, then we will have much simpler expressions for the thank circuitformulas, i.e.
ω0 =1√LC
, Q = R
√
C
L,
and
H(ω) =jωω0/Q
ω20 − ω2 + jωω0/Q
.
The magnitude and the phase will be
|H(ω)| =
ωω0Q
√
(
ω20 − ω2
)2+(
ωω0Q
)2,
arg(H(ω)) = arctan
Qω2
0 − ω2
ωω0
.
2.3.4 High Frequency Approximation
For high frequency ω ≫ r/L, we have
r∗(ω) ≃ r
(
ωL
r
)2
, ⇒ L∗ ≃ L
and ω0 becomes
ω0 ≃ 1√LC
.
Evaluating the several defined quantities at ω0, we will have
r∗(ω0) ≃ L
rC,
R∗(ω0) ≃ LR
RCr + L
Q∗(ω0) ≃ LR
RCr + L
√
C
L
DRAFT
50 CHAPTER 2. RESONANT CIRCUITS
0 0.2 0.4 0.6 0.8 1 1.2
x 10−3
−0.03
−0.02
−0.01
0
0.01
0.02
0.03
0.04
Step Response
Time (sec)
Am
plitu
de
Figure 2.8: Typical step response of a LCR parallel circuit near the acousticband.
2.3.5 LCR Parallel Circuit Transient Response
Let’s briefly analyze the response to a step of the LCR parallel circuit forthe under-damped case.
If we define the following quantity
γ =1
2Q,
called damping coefficient, and if 0 < γ < 1, then we will have at thecircuit output
v(t) = v02γ
γ − 1e−ω0γt cos
(
√
1 − γ2 ω0t + ϕ0
)
+ v1 .
DRAFT
2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 51
The voltage output v(t) is a damped sinusoid with angular frequency√
1 − γ2 ω0 and time constant τ = 1/ω0γ. The DC offset v1 depends onthe inductor resistance r and the initial step.
Figure 2.8, a typical step response of the LCR circuit shows a ring-downwith a DC offset.
DRAFT
52 CHAPTER 2. RESONANT CIRCUITS
2.4 Laboratory Experiment
Real inductors have not negligible resistance. To build a LCR series circuitwith a highest quality factor it is indeed necessary to minimize the resis-tance of the circuit by mounting in series the inductor and the capacitoronly. Typical effective resistance of the inductors used in the laboratory isabout 10Ω to 80Ω at resonance .
Because of the internal resistance of the function generator (the bestscenario gives ∼ 50Ω) is then comparable at some frequencies to LCRload, we will expect that the approximation of ideal generator will be nolonger valid.
Moreover, harmonic distortion of the function generator will be quiteevident in the LCR series circuit because of the dependence of the load onthe frequency.
An estimation of a ring-down time constant τ can be obtained as fol-lows. From the ring-down equation we have that after a time t = τ theamplitude is reduced by a factor 1/3 (e ≃ 1/2.718). This means that wecan easily estimate τ by just measuring the time needed to reduce the am-plitude down to about 1/3 of its initial value. A similar but quite coarseway is to count how many periods n∗ the amplitude takes to decrease to1/3 of its initial value. Then the estimation will be
τ ≃ Tn∗ =n∗
νres,
where T, and νres are respectively the period and the frequency of the os-cillation. Considering that Q = πνresτ then
Q ≃ πn∗ .
The quality factor can also be estimated from the frequency responseconsidering that
Q =νres
∆ν,
where ∆ν is the Full Width at Half Maximum (FWHM) of the peak reso-nance.
2.4.1 Pre-laboratory Exercises
It is suggested to read the appendix about the electromagentic noise tocomplete the pre-lab problems and the laboratory procedure.
DRAFT
2.4. LABORATORY EXPERIMENT 53
1. Determine the capacitance C of a LCR series circuit necessary to havea resonant frequency νC = 20kHz if L = 10mH, and R = 10Ω. Then,calculate Q, τ, ν0, (ω = 2πν) of the circuit.
2. Find the LCR series input impedance Zi and plot its magnitude in alogarithmic scale. Determine at what frequency is the minimum of|Zi| .
3. Supposing that the internal resistance of the function generator isRs = 50Ω, and using the previous values for L, C, and R, calculatethe circuit input voltage attenuation at the frequency of |Zi| mini-mum and at twice that frequency.
4. Determine the capacitance C of a tank circuit necessary to have aresonant frequency νC = 20 kHz if L = 10mH, R = 10kΩ, andr = 10Ω. Use the high frequency approximation. Then, calculate Q,τ, ν0, of the circuit.
5. Estimate the time constant τ of the ring-down in figure 2.8. Suppos-ing that R = 10kΩ, estimate r from figure 2.7.
6. Calculate the maximum frequency of the EM field isolated by a Fara-day cage with a dimension d = 10mm (hint: consult the proper ap-pendix).
2.4.2 Procedure
1. Build a LCR series circuit with a resonant frequency of around 20kHz,using inductance, capacitance, and resistance values calculated inthe pre-lab problems. Then, do the following steps:
(a) Using the oscilloscope and knowing the expected magnitudeand phase values at the resonant frequency νC, find νC and com-pare it with the theoretical value computed using the compo-nents measured values.
(b) Verify the circuit transfer function HC (ν) using the data acqui-sition system and the proper software.
(c) Estimate the quality factor Q of the circuit from the transferfunction measurement and compare it with the theoretical value.
DRAFT
54 CHAPTER 2. RESONANT CIRCUITS
(d) Explain why the input voltage Vi changes in amplitude if wechange frequency.
(e) Considering the harmonic distortion of the function generator,explain why the frequency spectrum of the input signal changesquite drastically when we approach the resonance νC.
(f) Download the simulation file from the ph5/105 website for theLCR series circuit, input the proper components values, run theAC response simulation, and find the discrepancies beteweenyour measurement and the simulation.
(g) Modify the simulated circuit to qualitatively account for theeventual notch measured between 100 kHz and 1 MHz (hint:use the inductor model specified in the appendix consideringthe extra capacitor only).
2. Build a LCR parallel circuit with a resonant frequency around 20kHz,using inductance, capacitance, and resistance values calculated inthe pre-lab problems. Then, do the following steps:
(a) Using the oscilloscope and knowing the expected magnitudeand phase values at the resonant frequency νC, find νC and com-pare it with the theoretical value computed using the compo-nents measured values.
(b) Verify the circuit transfer function HC (ν) using the data acqui-sition system and the proper software.
(c) Estimate the quality factor Q of the circuit from the step re-sponse.
(d) Download the simulation file from the ph5/105 website for theLCR parallel circuit, input the proper components values, runthe AC response simulation, and find the discrepancies bete-ween your measurement and the simulation.
(e) Modify the simulated circuit to qualitatively account for theeventual notch measured between 100 kHz and 1MHz (hint:use the capacitor model specified in the appendix consideringthe extra inductors only).
DRAFT
2.4. LABORATORY EXPERIMENT 55
3. Check the effect of the Faraday cage ( a metallic coffee can) using 10xprobe connected to the oscilloscope. Add a 1m long wire to increasethe antenna effect.Note the differences when the antenna is approached to the fluores-cent lights, and when you touch the antenna.Keeping the cage in the same position and without touching thecage, explain what you observe and coarsely estimate the amplitudeand frequency content of the picked-up signal in the following con-ditions:
(a) Antenna outside the cage,
(b) Antenna inside the cage,
(c) Antenna inside the cage with ground probe connected to thecage.
DRAFT
Chapter 3
The Operational Amplifier
3.1 Introduction
Operational amplifiers are one of the most extensively used analog inte-grated circuits especially because of their ability to approximate reason-ably well the ideal behavior. For this reason, real operational amplifierscan be quite often modeled as ideal or quasi-ideal. Moreover, the ver-satility this device, which hides a large internal complexity 1, makes theoperational amplifier suitable for many different applications.
In the first section, the mathematical formulation makes the ideal op-erational amplifier concept quite awkward, especially after a first reading.Using the ideal device properties in conjunction with the so called feed-back network, which links the output of the amplifier inputs, will clarifythe definition of the ideal operation amplifier.
The subsequent section is dedicated to the explanation of some basicoperational amplifier circuits. Finally, section 3.5 introduces a more real-istic model of operational amplifier together with some of the particularbehavior of this electronic device.
1A modern operational amplifier made of a cascade of stages, each one designedmainly to match the ideal characteristics, can have around 50 components both activeand passive. See the Analog Devices Web site, for example.
57
DRAFT
58 CHAPTER 3. THE OPERATIONAL AMPLIFIER
3.2 The Ideal Operational Amplifier
The ideal operational amplifier (Op-Amp) is a linear amplifier with twodifferential inputs v+, v− and one output vo (see figure 3.1) and with thefollowing characteristics:
• v0 = Av(v+ − v−), Av > 0, (linearity)
• input resistance Ri → ∞,
• output resistance Ro → 0,
• voltage gain Av → ∞,
• frequency response constant for any frequency.
Aside the welcome property of linearity and infinite frequency response,the need of all the other characteristics can be justified as follows. Infi-nite input resistance Ri means essentially that the Op-Amp inputs do notproduce perturbations to any circuit to which they are connected to. Zerooutput resistance Ro perfectly isolates the Op-Amp from any perturbation.Infinite input impedance and zero output impedance implies also no dis-sipation of energy. The condition of infinite voltage gain Av is necessary ifwe want a device able to deliver any gain, once a network which connectsthe output to the input is added to the Op-Amp. In general, this kind ofnetwork is called feedback network.
v+
v−
+v = v − v−i
+
−
+v = v − v−i
v−
v+
ov = A vv iov = A vv i
−
+A >0 +
−
Figure 3.1: Op-Amp symbol, some definitions of variables and ideal model withan voltage controlled source.
DRAFT
3.2. THE IDEAL OPERATIONAL AMPLIFIER 59
3.2.1 Ideal Op-Amp Fundamental Equation (Golden Rules)
The consequence of the following conditions
• Av → ∞,
• vo < ∞ if vi = v+ − v− < ∞,
is the following very useful and important formula
v+ − v− = 0, at all times. (3.1)
Equation 3.1 will be called the first Op-Amp golden rule.The consequence of the following condition
• Ri → ∞,
isi+ − i− = 0, at all times, (3.2)
Equation 3.2 will be called the second Op-Amp golden rule.These two rules are fundamental for the solution of any circuit involv-
ing Op-Amps. We will see in the next sections the importance of this equa-tions once a feedback network is connected to the Op-Amp.
3.2.2 Op-Amp Input Output “Logic”
It is worthwhile here to notice the behavior of Op-Amp output as functionof the two inputs. From the definition of Op-Amp we have that a signalsent to the negative input V− is amplified and changed in sign. A signalsent to the positive input V+ is just amplified. Two signals sent each to oneinput are indeed subtracted and amplified.
−
+
IR
IVs
+
−
Vo
Rf
A
Figure 3.2: Op-Amp with a feedback network.
DRAFT
60 CHAPTER 3. THE OPERATIONAL AMPLIFIER
3.2.3 Op-Amp with a Feedback Network
Let’s consider the circuit in figure 3.2, where a feedback resistance R f isconnected to the negative input. The current through the resistors R andR f is the same because the ideal Op-Amp input does not drive any current(Ri = ∞). Furthermore, since Vi = V+ − V− = 0 and with the use Ohm’slaw and the KVL, it follows that
I =Vs
R= − Vo
R f. (3.3)
The output voltage Vo and voltage gain A will be
Vo = AVs, A = −R f
R.
The gain of the Op-Amp depends just on the resistances ratio R f andR.
3.2.4 The Virtual Ground
Let’s re-analyze the circuit in figure 3.2. Considering that the golden ruleimposes Vi = V+ − V− = 0, and the negative input is grounded, the nodeA must always be at zero voltage. This is equivalent to having A virtuallygrounded. The adjective virtual is necessary because even if A is at thepotential of the ground there is no current flowing through A (Ri = ∞) asin a real ground. In other words, the virtual ground happens to be becausethe Op-Amp does its best to keep Vi = 0.
3.3 Commonly Used Op-Amp Circuits
In the study of the several common Op-Amp configurations, we will usethe approximation of an ideal circuit. A more realistic model is often nec-essary to understand some behaviors of real circuits. For an initial design,and where the the ideal Op-Amp characteristics are well approximated,the ideal model is quite often sufficient.
DRAFT
3.3. COMMONLY USED OP-AMP CIRCUITS 61
−
+
R
Vs
+
−
Vo
Rf
Figure 3.3: Non-inverting configurations of the Op-Amp.
3.3.1 Non-Inverting Amplifier
Let’s consider the non-inverting configuration of the Op-Amp in figure3.3. Because of Vi = 0, we will have
Vs − V− = Vs − RI = 0.
Considering that the output voltage Vo is
Vo = (R f + R)I,
we can use the expression of I to obtain
Vs =R
R + R fVo.
The output voltage Vo and voltage gain A will be
Vo = AVs, A = 1 +R f
R.
Considering that in this configuration Vs is directly connected to V+andV− is not a virtual ground, the input impedance of the amplifier is Ri + R,where Ri is the real input impedance of the Op-Amp.
DRAFT
62 CHAPTER 3. THE OPERATIONAL AMPLIFIER
3.3.2 Inverting Amplifier
This circuit has been already discussed in section 3.2.3. For completeness,the solution and some comments are here reported
Vo = AVs, A = −R f
R.
It is worthwhile to notice that because V− = 0, the circuit input impedanceis just R. Having values of R typically of few kΩ, the inverting configura-tion doesn’t preserve the high impedance characteristic of an Op-Amp. Aconnection of the circuit input to a network can potentially create appre-ciable perturbations.
3.3.3 Differential Input Stage
−
+
R0
R1
R2
V2I1
I1V1
Vo
Rf
Figure 3.4: Differential input configuration of the Op-Amp.
Let’s now solve the differential input circuit of the Op-Amp in figure3.4.
Writing the voltage drop across R1and R f , we obtain the linear system
V− − V1 = R1 I,Vo − V− = R f I.
Solving the system with respect to Vo, we get
Vo =
(
1 +R f
R1
)
V− −R f
R1V1.
DRAFT
3.3. COMMONLY USED OP-AMP CIRCUITS 63
G−
+
i
o
v (t)v (t)
Figure 3.5: Voltage follower or unity gain buffer.
Using the voltage divider equation to obtain V+and because V+−V− =0, we have
V− = V+ =R0
R2 + R0V2,
and finally, we get
Vo =R1 + R f
R1
R0
R2 + R0V2 −
R f
R1V1.
A way to to obtain the same voltage gain for V2 and V1 is to imposeR0 = R f and R1 = R2 = R. The output voltage becomes
Vo = A(V2 − V1), A =R f
R.
This differential configuration is not very convenient because it doesnot preserve the high input impedance of the Op-Amp. In fact , consid-ering that the Op-Amp input impedance is very high, we have that theresistance seen from V2 is R2 + R0. Usually, the sum of those resistors is atleast one order of magnitude smaller than the Op-Amp input impedance.If we need to build a variable gain differential amplifier, we will need tochange more than one resistor value. Matching the resistances values canbecome an issue when thermal drifts become important.
More practical and stable configurations called instrumentation ampli-fiers are available “off the shelf”.
3.3.4 Voltage Follower (Unity Gain “Buffer”)
The circuit sketched in figure 3.5 is called voltage follower or unity gainbuffer. The feedback line with no load gives
vo(t) = v−.
DRAFT
64 CHAPTER 3. THE OPERATIONAL AMPLIFIER
Moreover, because of the golden rule we will have
v− = v+,
which implies
vo = vi.
The output voltage vo(t) follows the input voltage vi(t) with unitarygain.
Considering that the high impedance input and the low impedanceoutput values of Op-Amps are close to the state of the art in the electronicdesign2, the voltage follower can be used as an isolation stage (buffer)between two circuits.
3.3.5 Integrator Amplifier
v (t)i v (t)o
−
+
R
Rf
Cf
Figure 3.6: Active integration stage using an Op-Amp.
2Devices expressly made to work as input unity gain buffer, and output unity gainbuffer are also available. Analog Devices SSM2141 and SSM2142 are complementarybuffers devices which can drive long delay lines for example.
DRAFT
3.3. COMMONLY USED OP-AMP CIRCUITS 65
Let’s consider the circuit in figure 3.6 without the resistance R f . Thevoltage drop vo across the capacitor C f is
vo(t) = − 1C f
∫ t
−∞i(τ)dτ (3.4)
and the current flowing through the resistance R is
i(t) =vi(t)
R.
Placing the expression of i(t) obtained from the previous equation intoeq.(3.4), we will obtain
vo(t) = − 1τ
∫ t
−∞vi(t
′)dt′, τ = RC f .
Real Op-Amps or signals connected to the input have often (always )a DC offset. This offset is indeed integrated and after a given time willsaturate the amplifier output. This saturation is essentially a manifesta-tion of the instability of the circuit at low frequency. Moreover, the initialcharge of the capacitor is undefined, making the initial output state unpre-dictable.
A common way to avoid these problems is to introduce the resistanceR f in parallel with the capacitor C f which reduces the amplifier DC gain.An intuitive way to understand the effect of this feedback resistance is thatit does not allow the capacitor to be charged "ad libitum". The choice ofthe R f is not so trivial if we want to preserve the characteristic of goodintegrator. Using the simple phasor analysis it easy to prove that the goodintegrator condition is ω ≫ 1/C f R f .
If the DC current must be integrated, we can place a switch in parallelwith the capacitor to be opened when the integration is started. In thisway we will have the capacitor state completely defined.
3.3.6 Differentiator Amplifier
Let’s now consider the circuit in figure 3.7 without the feedback capacitorC f . Applying a similar analysis to that used in the integrator amplifier we
DRAFT
66 CHAPTER 3. THE OPERATIONAL AMPLIFIER
−
+
Rf
Cf
ov (t)iv (t)
Ci(t)
Figure 3.7: Differentiator stage using an Op-Amp.
will have
i(t) = Cdvi
dt,
vo(t) = −R f i.
and indeed
vo(t) = −τdvi
dt, τ = R f C.
This configuration without C f doesn’t work well with real Op-Amps,because of stability problems. In fact, the introduction of the capacitorcompromises the internal compensation of the Op-Amp. Placing a capaci-tor C f in the feedback network restores the compensation making the over-all circuit stable. The choice of C f is not trivial if we want to preserve thecircuit differentiator characteristics.
Section 3.5.2 explains in more details the effect of this configuration onthe compensation of a real Op-Amp.
3.4 Negative Feedback Amplifiers
Let’s consider an amplifier with a negative feedback network as show infigure 7.1. Considering the voltage at the summation point output is
V ′ = Vi − β(ω)Vo ,
DRAFT
3.4. NEGATIVE FEEDBACK AMPLIFIERS 67
ViA(ω)
Vo
βVo
V´
β(ω)
−
+
Figure 3.8: Amplifier with negative feedback.
and the amplifier gain is A(ω), the output voltage will be
Vo = AV ′ = A(Vi − βVo) .
Collecting Vo, we will have
Vo =A
1 + βAVi ,
and the so called closed loop transfer function, ACL, will finally be
ACL(ω) =A
1 + βA. (3.5)
We can clearly see that if the denominator goes to zero for a given fre-quency ω∗, we are in trouble, ACL(ω
∗) diverges, and the amplifier satu-rates. The trick to avoid this situation, is to study the following equation
AOL(ω) = β(ω)A(ω) = −1, (3.6)
where AOL is the feedback amplifier open loop transfer function. If the phasewhere the magnitude of AOLis equal to one is different from 1800 plusmultiples of 3600, the denominator never goes to zero and the saturationis avoided. However, this is not enough because we can have just an oscil-lation with no saturation if the AOL phase is too close to 1800. The rule ofthumb is to have a so called phase margin of about 600from 1800. Finally,we can formulate the criterion for the stability:
where |AOL| = 1 ⇒ −120 < arg(AOL) < 120 .
DRAFT
68 CHAPTER 3. THE OPERATIONAL AMPLIFIER
Another important result of the theory of feedback amplifier is the fol-lowing straightforward result
if βA ≫ 1 ⇒ ACL(ω) ≃ 1β
.
Where the open loop transfer function Aβ is greater than one, the feed-back amplifier response does not depend on the response A(ω) of the am-plifier with no feedback. It is worthwhile to notice that the ideal amplifier(A → ∞) has ACL = 1/β for all angular frequencies. A close loop idealamplifier does not have undesired instabilities, but just the ones that canbe introduced by the feedback network.
3.4.1 Input Impedance Feedback Amplifier
The input impedace of a feedback amplifier is
Zi = Z′i (1 + βA) ,
where Z′i is the impedance of the amplifier without feedback network. For
frequency values such that
β (ω) A (ω) ≫ 1 ⇒ Zi ≃ Z′i βA .
In conclusion, the impedance of a feedback amplifier scales with the openloop gain. In other words, where the loop gain is much greater than onethe input impedance increases by the loop gain.
3.4.2 Output Impedance Feedback Amplifier
The output impedace of a feedback amplifier is
Zo =Z′
o
1 + βA
For frequency values such that
β (ω) A (ω) ≫ 1 ⇒ Zo ≃Z′
o
βA.
Where the loop gain is much greater than one the output impedancedecreases by the loop gain.
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3.4. NEGATIVE FEEDBACK AMPLIFIERS 69
3.4.3 Simple Feedback Network
Just to familiarize with the concept of feedback amplifier let’s analyzesome very simple circuit like the Op-Amp non inveriting and invertingamplifiers.
3.4.3.1 Non-Inverting Configuration
−
+
Zf
Vo
Vi
Z− V−
Figure 3.9: Non-inverting configuration Op-Amp with generic impedance.
Considering the Op-Amp Non-Inverting configuration as shown in fig-ure 3.9, and the voltage divider equation we have
V− =Z−
Z f + Z−Vo , (3.7)
and the feedback network transfer function is
β(ω) =V−V0
=Z−
Z f + Z−.
The approximate gain of the feedback amplifier is as expected
ACL ≃ 1β= 1 +
Z f
Z−.
3.4.3.2 Inverting Configuration
In this case the feedback network transfer function β is
β =Vi
V0
DRAFT
70 CHAPTER 3. THE OPERATIONAL AMPLIFIER
−
+
Zf
Vo
Z− V−Vi
Figure 3.10: Inverting configuration Op-Amp with generic impedance.
Considering the inverting configuration stage as shown in figure 3.10,because of the virtual ground we have
Vi = ZI−Vo = Z f I
⇒ β(ω) = −Z−Z f
,
and the gain of the feedback amplifier is simply
ACL ≃ 1β= −
Z f
Z−.
3.5 The Real Op-Amp
Lets consider in this section a more realistic model of the Op-Amp by in-cluding a finite input impedance Ri, non zero output impedance Ro, fi-nite and frequency dependent A (ω), input bias currents ib+, bb−and inputvoltage offset vb. Using ideal components, the equivalent circuit of the realOp-Amp is shown in figure 3.11.
3.5.1 Bias Currents and Voltage and Current Offsets
Imbalances inside of the Op-Amp, mainly due to differences in the elec-tronics components, produce undesirable bias currents and a voltage off-set at the inputs. Input voltage and current offsets can be modeled byintroducing ideal generators as shown in figure 3.11. Current Offset isdefined as the difference in the magnitude of the bias currents, i.e.
ios = |ib+| − |ib−|
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3.5. THE REAL OP-AMP 71
A way to characterize the voltage offset is to use the voltage followerconfiguration (see section 3.3.4) with the input Vi connected to the ground.The voltage offset will be directly the output voltage Vo.
Current input biases can be studied connecting a resistor between theone input and ground and measuring the voltage drop across the resistor.
vb
ib+
RiRo
vo
ib−
v+
v−
+v = v − v−i
−
+
+−
+
−
o
ωvA ( )
v = A (v −v −v )v + − b
Figure 3.11: Equivalent circuit for an Op-Amp using ideal components. Voltageoffsets and current biases are taken into account using ideal voltage and currentgenerators.
3.5.2 Compensated Op-Amp Transfer Function
Practical Op-Amps are often designed to have a frequency response dom-inated by a single pole, i.e. the transfer function with no feedback fromDC to a given frequency is well approximated by just a simple low-passfilter. In this case, the Op-Amp transfer function with no feedback can bewritten as
A(ω) =A0
1 + j ωω0
, (3.8)
where A0 is the DC gain and ω0 is the angular frequency of the dominantpole (the cut-off angular frequency of the low pass filter). This behavioris obtained by introducing a compensating circuit (quite often a capacitor)in the architecture of the Op-Amp.
This choice comes from the stability requirement that we mentionedin the previous section. In fact, an amplifier with a transfer function with
DRAFT
72 CHAPTER 3. THE OPERATIONAL AMPLIFIER
101
102
103
104
105
106
107
0
20
40
60
80
100
Frequency (Hz)
Diff
eren
tial O
pen
Loop
Gai
n (d
B)
Figure 3.12: Differential gain of the AD711 Op-Amp (cut-off frequency ν0 =
18Hz, unity gain frequency ν1 = 4MHz, and DC gain a0 = 110dB). Dominantsingle pole behavior is valid up to about 4MHz, where the slope becomes steeperthan 1/ω.
a dominant pole cannot lose more than 900 making quite easy the designof a stable feedback network. For example, feedback networks with justresistors, (ideal resistors don’t loose phase) will not generate oscillations.
Typical values for pole frequencies are between 5Hz and 100Hz. Figure3.12 shows the differential transfer function of the Op-Amp AD711 withno feedback network.
Let’s study more in details the compensated Op-Amp response with afeedback.
Considering the frequency response of a compensated feedback am-plifier the closed loop transfer function with a feeback network β(ω) will
DRAFT
3.5. THE REAL OP-AMP 73
be
ACL(ω) =
(
A0
1 + j ωω0
)/(
1 +βA0
1 + j ωω0
)
,
=A0
1 + βA + j ωω0
,
=
(
A0
1 + A0β
)/(
1 + jω
ω0(1 + βA0)
)
.
3.5.2.1 Compensated Op-Amp with Constant Frequency Response Feed-back
In the particular case that β(ω) is constant and β = β0 ≥ 1, the previousequation becomes
ACL(ω) =A0
1 + β0 A + j ωω0
,
=
(
A0
1 + A0β
)/(
1 + jω
ω0(1 + βA0)
)
.
and therefore
ACL(ω) =A1
1 + j ωω1
,
A1 = A01+A0β0
ω1 = ω0(1 + β0A0)
In this case, the feedback Op-Amp response ACL is the same as of theopen loop transfer function AOL but with a smaller DC gain (about 1/β0)and higher cut off angular frequency ω1 of about ω0β0A0.
3.5.2.2 Compensated Op-Amp in the Differentiator Configuration
Let’s find the frequency response of the "real" Op-Amp differentiator cir-cuit of figure 3.7. For the basic differentiator (no capacitor C f ) the feedbacknetwork transfer function is
β = − Z
Z f= − 1
jωRC= j
ω1
ω, ω1 =
1RC
.
Considering eq. (3.5), we have that the gain of the differentiator is
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74 CHAPTER 3. THE OPERATIONAL AMPLIFIER
ACL(ω) =A(ω)
1 + jA(ω) ω1/ω=
11/A + j ω1/ω
,
and finally
ACL(ω) =A0
1 + j(
A0ω1ω + ω
ω0
) = −A0ω0jω
ω2 − jωω0 + A0ω0ω1.
Resonance occurs when the denominator goes to zero, i.e for
ω∗ = jω0
2± j
√
ω20
4+ A0ω0ω1 ≃ ±j
√
A0ω0ω1 , ω0 ≪ ω1, A ≥ 1 .
3.5.3 The Common Mode Rejection Ratio (CMRR)
We want characterize the rejection of an Op-Amp output as a differentialamplifier, of signals sent to both inputs. For an ideal Op-Amp we expectto obtain Vo = 0 for all frequencies, i.e. a perfect rejection. To define a con-venient parameter which measures the rejection it is necessary to definethe following ones, the common mode gain
AC(ω) =Vo
V+ − V−, V+ = V− = Vs sin(ωt),
and the differential mode gain
AD(ω) =Vo
V+ − V−, V+ = Vs sin(ωt), V− = 0.
The Common Mode Rejection Ratio (CMRR) is defined as the modulus ofthe ratio of the differential gain AD over the common mode gain AC, i.e.
CMRR(ω) =
∣
∣
∣
∣
AD(ω)
AC(ω)
∣
∣
∣
∣
Ideally, the CMRR should be infinity for all frequencies.For values below ~90, CMRR can be measured using the Op-Amp dif-
ferential configuration (see figure 3.4) by measuring AC and AD as a func-tion of the frequency. To minimize possible large systematic errors, it is
DRAFT
3.5. THE REAL OP-AMP 75
necessary to have the same gain for the to inputs V1 and V2. This can beachieved by placing a trimmer in the voltage divider mesh of the differen-tial configuration circuit. Adjusting the trimmer we can minimize Vo for asingle frequency and study the CMRR for a given bandwidth.
Figure 3.13shows the CMRR as a function of frequency of a typicalOp-Amp. A typical value for CMRR is 90dB.
1 10 100 1000 10000 100000Frequency (Hz)
30
40
50
60
70
80
90
CM
RR
(dB
)
Figure 3.13: CMRR as a function of frequency of a typical Op-Amp.
3.5.4 The Gain Bandwidth Product (GBWP)
The gain bandwidth product, GBWP, is a common way to characterize thegain with respect to the available bandwidth of amplification. Using thepreviously defined notation, the GBWP is simply defined as
GBWP = A0ω0.
The larger the GBWP the better is the Op-Amp, and the closer the Op-Amp is to the ideal operational amplifier.
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76 CHAPTER 3. THE OPERATIONAL AMPLIFIER
0 10 20 30 40 50 60 70time (us)
0
2
4
6
8
10
12
14
16
Inpu
t/Out
put V
olta
ge (
V)
InputOutput
Figure 3.14: Slew rate illustration. The output vo takes 40µs to reach the desiredvoltage. The device is said to be slew rate limited.
3.5.5 The Slew Rate (SR)
The slew rate or maximum slew rate SR of an Op-Amp is defined as themaximum rate of the output voltage vo per unit time
SR = max∣
∣
∣
∣
∆vo(vi)
∆t
∣
∣
∣
∣
.
The slew rate can be easily observed sending a square wave (see figure3.14) to the Op-Amp input vi, and looking at the raising and falling slopeof the output signal vo. If the slopes do not change while changing theinput amplitude, then the Op-Amp is slew rate limited.
A similar procedure can be applied using a sinusoidal signal as input.In this case, if we increase the input amplitude too much, the output willbecome distorted and will look somehow closer to a triangular wave thana sinusoid. Considering a sinusoid of frequency ω0 and amplitude Vo
SR = max∣
∣
∣
∣
d
dtVo sin ω0t
∣
∣
∣
∣
= ω0Vo max cos ω0t = ω0V0.
For an undistorted signal with amplitude V and maximum frequencyω, we must have
SR ≫ ωV .
DRAFT
3.5. THE REAL OP-AMP 77
Usually, a frequency compensated Op-Amp has an integrating stagesomewhere, and therefore the slew rate is often proportional to the inverseof the capacitance of the compensating network.
Typical good slew rate values are of the order of few V/µs.The slew rate parameter essentially measures the ability of an Op-Amp
to follow voltage changes for large voltage inputs. The inability of follow-ing the voltage input usually comes from limitations on the current insidethe amplifier compesation circuit. In fact, on a capacitor compensated am-plifier the bottle-neck id the current to charge or discharge the capacitor.
3.5.6 Ideal versus Real and Practical Considerations
The following table summarizes the main characteristic of an ideal Op-Amp together with those of typical real Op-Amp. In some cases we canfind Op-Amps excelling some of the mentioned characteristics , quite oftenat the expense of other characteristics.
Property Ideal Op-Amp Typical Op-Amp
Open-Loop DC Gain Av ∞ > 104
Open-Loop Bandwidth ∞ ∼ 10Hz (dominant pole)
Common Mode RejectionRatio CMRR ∞ > 70dB
Input Resistance Ri ∞ > 10MΩ
Output Resistance Ro 0 < 100Ω
Input Current δI± 0 < 0.5µA
Input Offset Voltage δV± 0 < 10mV
Input Offset Current δIi 0 < 200pA
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78 CHAPTER 3. THE OPERATIONAL AMPLIFIER
What are the conditions that dictate the range of the feedback impedancesR f ? Apart from special cases, the feedback current I should be only a smallfraction of the maximum output current Io, i.e. I = 1%Io. A typical Op-Amp has a maximum output of 10mA at 10V, i.e.
R f =V
I=
10V10 · 1%mA
= 100kΩ
Anyway, typical feedback resistors should be in the range of R f = 50 −1MΩ.
Small difference on the differential stage of the Op-Amp produces aDC offset δV at the input, which can produce large DC output if the gainis extremely high. For example, if we have
δV = 10mV, G ≥ 104,⇒ Vo ≥ 10V.
DRAFT
3.6. PROBLEMS PREPARATORY TO THE LABORATORY 79
3.6 Problems Preparatory to the Laboratory
1. Supposing that the open-loop gain of an Op-Amp is a simple lowpass filter (first order) with DC gain 144dB and cut-off frequencyf0 = 10Hz, sketch in a bode diagram, the magnitude of the frequencyresponse of a non-inverting stage with gain G = 10 at 10Hz.
2. Prove that the good integrator condition for the circuit in figure 3.6is ω ≫ 1/R f C f . (Hint: calculate the response of the circuit andcompare it with the ideal response of the ideal inverting integrator,i.e. A(ω) = −1/(jωRC). Calculate the DC gain of the integratortransfer function.
3. Using an integrator stage with a feedback resistor R f , and time con-stant τ = RC, compute the values for τ and R f needed to integratea sinusoidal wave with frequency f > 1kHz and with 10% of lossesin the integration. Choose a value of R ≫ Rs, where Rs = 50Ω is theinput impedance of the used function generator.
4. Show that the slope of an integrated square wave is the inverse ofof the time constant τ = RC f of the Integrator shown in figure 3.6.Which characteristics of the square wave are needed to fulfill the re-quirement to not saturate the integrator output ?
5. Consider a differential stage having the following resistances values:R1 = R2 = 50 kΩ, R f = R0 = 100 kΩ . Calculate the followingquantities
(a) the two input impedances Z1and Z2 ,(b) the output impedance Zo,(c) Considering that the Op-Amp max output current and voltage
are respectively Imax =10mA and Vmax = 10V, calculate thesmallest load Rmin it can drive .
3.7 Laboratory Procedure
Read carefully the entire procedure before starting the experiment, andnote on your log book all the unpredicted behavior you experience in thecircuits response.
DRAFT
80 CHAPTER 3. THE OPERATIONAL AMPLIFIER
Consult the data-sheet to properly map the µ741 and AD711 Op-Amppin-out.
Op-Amp output high frequency noise can be reduced by adding 100nFcapacitors closest as possible to the ±15V power supplies input of the Op-Amp.
Before powering your circuit up, cross-check the power supply con-nections.
It is always a good practice to turn on the power supplies at the sametime to avoid potential damages of the Op-Amps.
1. Build a non-inverting staga amplifier with a µ741 Op-Amp with again of 100 and do the following:
(a) measure the transfer function of the amplifier,
(b) download the simulation file from the ph5/105 website for thecircuit, input the proper components values,
(c) run the AC response simulation with the ideal compensatedOp-Amp and find the discrepancies beteween your measure-ment and the simulation,
(d) replace the ideal Op-Amp with the model of the Op-Amp youare using and compare the frequency response with the simula-tion.
2. Using the previous circuit,
(a) estimate the slew rate of the Op-Amp,
(b) compare the measured slew rate to the simulation using the Op-Amp model,
(c) replace the AD711 and remeasure the slew rate.
3. Build an integration stage with a time constant τ ∼ 100µs using anAD711 Op-Amp . Include a feedback resistor R f to avoid saturationat the output and do the following steps:
(a) measure the impulse response,
(b) measure the frequency response,
DRAFT
3.7. LABORATORY PROCEDURE 81
(c) estimate the integrator time constant τ using a square wave,
(d) download the simulation file from the ph5/105 website for thecircuit, input the proper components values,
(e) run the AC response simulation with the ideal compensatedOp-Amp and find the discrepancies beteween your measure-ment and the simulation.
(f) run the transient analysis and compare it with the measuredimpulse response.
DRAFT
Bibliography
[1] The Art of Electronics, Paul Horowitz and Winfield Hill, CambridgeUniversity Press.
[2] Microelectronics Jacob Millman & Arvin Grabel, McGraw-Hill Electri-cal Engineering Series
[3] Analog Devices web site www.analog.com AD625: ProgrammableGain Instrumentation Amplifier Data Sheet (Rev. D, 6/00).
[4] An Introduction to Operational Amplifiers with Linear IC, Second Edi-tion, Luces M. Faulkenberry, edited by John Wiley and Son.
83
DRAFT
Chapter 4
Diodes and Transistors
4.1 Introduction
In this chapter we will analyze two new electronic devices, the semicon-ductor diode and the bipolar junction transistor (BJT). For a better under-standing of their behavior and characteristics, we will also introduce somebasic applications.
Unfortunately, there will be no time to study the quite complex physicsof semiconductors, and especially the conduction mechanism, which sub-stantially differs from that of metals. The interested student should lookfor a course and books on solid state physics.
It is important to notice that to quickly grab how the BJT device works,it is fundamental to acquire a clear understanding of the semiconductordiode’s behavior.
4.2 The Semiconductor Junction (Diode)
The semiconductor junction or semiconductor diode is a device which showsnon-linear behavior due to its peculiar conduction mechanism.
In fact, if ID and VD are the current and the voltage difference acrossthe junction, we will have
ID(VD) = I0(e−qVDηkBT − 1), (4.1)
where I0 is the reverse saturation current, kB = 1.3807 · 10−23J/K, the
85
DRAFT
86 CHAPTER 4. DIODES AND TRANSISTORS
Vb
VonI0
DV
ID
0−100 −50 1
(V)
( A)µ
0.5
Figure 4.1: Diode characteristic (continuous curve), simplified diode character-istic (dashed curve). Note the different scales in first and third quadrant of thediode characteristic plot.
Boltzmann constant, T the absolute temperature , q = −1.60219 · 10−19C,the electron charge, and η a dimensionless parameter which depends onthe diode type. Considering that the ambient temperature is T ≃ 300K,we will have kBT ≃ 4.14 · 10−21 J ≃ 0.026eV. For silicon diodes the reversesaturation current I0 is of the order of few tenths of nano-amperes.
Instead of following Ohm’s law, the semiconductor junction follows anexponential law. Deviations from this law are negligible depending on thecurrent magnitude and the diode characteristics.
Figure 4.1 shows standard symbols for a semiconductor diode and theI-V characteristic. The break-down voltage Vb reported in the same figureis the reverse voltage which essentially short circuits the junction (typicallybetween -100V and -50V). This behavior is not accounted in equation (4.1),and is generated by the so called avalanche multiplication mechanism andthe Zener mechanism1.
1The thermally generated carriers accelerated by the electric field have enough energyto disrupt the electrons bond of the crystal atoms producing new carriers (electron-holespairs). The new and accelerated pairs generate new carriers producing an avalanche ofcarriers, and indeed a break-down current.
A sufficient strong electric field can also disrupt electrons bonds creating an electron-hole reverse current. This effect is called Zener Breakdown mechanism.
DRAFT
4.2. THE SEMICONDUCTOR JUNCTION (DIODE) 87
D0I D VD
K
A
D0I D VD
K
A
D0I D VD
K
A
Figure 4.2: diode standard symbols. Starting from left, diode symbol , Zenerdiode symbol, and Schottky diode symbol. Diode terminals A, and K are respec-tively called anode and cathode.
A simplified model of the junction diode is that of a perfect switch, i.e.
ID(V) =
∞ V ≥ Von
0 V < Von,
where Von is the diode turn-on voltage or cut-in voltage, which dependson the junction type and on the current magnitude. For current up toID ∼ 100 mA, silicon diodes have Von ≃ 0.6V, and germanium diodeshave Von ≃ 0.3V .
For voltages greater than Von, the diode is a short circuit (current is notlimited by the diode) and is said to be forward biased. For smaller values itis an open circuit (current across the diode is zero ) and is reverse biased.
4.2.1 Zener Diodes
Zener diodes are particular semiconductor diodes with adequate power dis-sipation to operate in the break-down voltage region. They have a welldefined Vb, with values ranging from about few volts to several hundredsvolts. Zener diode symbol is shown in Figure 4.2. Approximating thecharacteristics with a piecewise linear relationship, we have
ID(V) =
−∞ V < Vb
0 0 ≤ V < Von
+∞ V ≥ Von
,
Often, the break-down curve is virtually vertical so that the previousapproximation of the reverse biased region is quite good.
DRAFT
88 CHAPTER 4. DIODES AND TRANSISTORS
4.2.2 Schottky Diodes
A junction made of a semiconductor and a metal can behave like a semi-conductor diode[2]. For example, Lightly doped silicon and aluminumcan form a semiconductor junction. Such kind of devices, called Schottkybarrier diodes (or simply Schottky diodes), still follow the diodes characteris-tics (4.1) with usually a lower turn-on voltage Von and a larger in magni-tude reverse saturation current Is. The symbol for Schottky diode deviceis shown in Figure 4.2.
4.3 Diode Dynamic Impedance
For linear devices the current is proportional to the applied voltage andfor a given frequency the impedance (V/I) is constant. With non-linearcircuits this is not true anymore, but we can generalize the impedanceconcept introducing the dynamic impedance
Rd =dV
dI
Let’s apply this definition to the diode. Starting from the I-V charac-teristic equation and neglecting the reverse saturation current, after somealgebra we obtain
VD = −ηkBT
qln
ID
I0.
Taking the derivative on both sides we obtain
Rd = −ηkBT
q
1ID
As we can see, the dynamic impedance of the diode depends on thecurrent ID.
Considering a silicon diode with a typical value of η = 2 at room tem-perature ( T = 300 K ), we will have
Rd(ID) ≃5.2 · 10−2
ID, ID = 1mA ⇒ Rd ≃ 52 Ω .
For small variations of the current around 1mA, we can assume thatthe impedance of a forward biased diode with η = 2 is ∼ 50 Ω . The
DRAFT
4.4. PRACTICAL CIRCUITS 89
Vs
+
−
ID
D
RL VL
Figure 4.3: Half-wave rectifier circuit.
dynamic impedance concept will be quite useful for studying the bipolarjunction transistor.
4.4 Practical Circuits
To better understand the behavior of a semiconductor junction, let’s ana-lyze a few typical applications of semiconductor diodes. Some other appli-cations in connection to other components will be studied in the followingchapters.
4.4.1 Rectifiers, AC to DC Conversion
The purpose of a rectifier circuit is to convert alternating current into aunidirectional current. This can be achieved using semiconductor diodes.The typical alternating current to direct current converter is a rectifier con-nected to an active low pass filter with a so called regulator circuit, whichsmooths the rectifier output and minimizes ripples. The simplest regula-tor is a capacitor placed in parallel with the rectifier output. Regulatorscan be easily found in literature (see [1]).
4.4.1.1 Half-Wave Rectifier
The simplest rectifier circuit is the so called half-wave rectifier shown inFigure 4.3.
Using the diode ideal characteristic, it is quite straightforward to pre-dict the voltage difference across the the resistor RL. In fact, when thesinusoidal signal is positive, it will forward bias the diode and we will
DRAFT
90 CHAPTER 4. DIODES AND TRANSISTORS
t
Vs
V0
V
VL
0.7V
Figure 4.4: Voltage difference across the load connected to the half-wave rectifieroutput.
have a voltage drop across the resistor VL = RI. For the negative halfcycle, because the diode is reverse biased VL must be zero.
Considering the diode threshold voltage V0, and the diode resistanceR f during the positive half cycle we will have
VL =RL
R f + RL(Vs − V0),
and ifRL ≫ R f ⇒ VL ≃ (Vs − V0).
During the negative half cycle we will have
VL =RL
Rr + RLVs,
and if
RL ≪ Rr ⇒ VL ≃ RL
RrVs ≃ 0.
The main disadvantage of this circuit is the very poor efficiency (lessthan 50% of current is rectified). In fact, instead of rectifying the entiresignal the circuit chops the negative half cycle out (see Figure 4.4).
DRAFT
4.4. PRACTICAL CIRCUITS 91
D3D1
D2D4
RL
v (t)s
A
C
B
D
Figure 4.5: Full-wave rectifier bridge circuit or simply bridge rectifier.
4.4.1.2 Full-Wave Rectifier Bridge
The Full-Wave rectifier bridge (see Figure 4.5), a more efficient way of rec-tifying an AC current, uses four arranged diodes in the so called bridgeconfiguration. To understand the circuit “logic”, let’s consider the twopossible states of the nodes A and B shown in Figure 4.5.
• When the node A is positive (B negative) the diodes D2, and D3 areforward biased (i.e. the diodes are a “short circuit”) and D1, andD4are reverse biased (i.e. the diodes are an “open circuit”). The cur-rent flows through the resistor RL and the node C is positive.
• When the node A is negative (B positive), the diodes D1, and D4 areforward biased (short circuit) and D2, and D3 are reverse biased. Thecurrent flows through the resistor RL and the node C is still positive.
Using the full-wave rectifier we will indeed have the negative half cyclerectified as shown in Figure4.6.
4.4.2 Voltage Limiter (Diode Clamp)
Diodes can be used to limit the voltage applied to an input as shown inFigure 4.7. Let’s consider the diode D1connected to Vmax. If Vi exceedsVmax + Von the diode is not reverse biased anymore and starts conducting,i.e the circuit limits the input voltage Vi to Vmax + Von . Analogously, D2limits the minimum input voltage Vi to Vmin +Vo. The resistor is necessaryto limit the current flowing through the diodes. In fact, without the resistor
DRAFT
92 CHAPTER 4. DIODES AND TRANSISTORS
t
V
2V0
VL
Vs
Figure 4.6: Voltage difference across the load connected to the full-wave rectifieroutput
Vmin
Vmax
Deviceto
Protect
RVi
D1
D2
Figure 4.7: Diode clamps circuit.
if we exceed one of the voltage limits an excessive current can destroy theforward biased diode junction. The worst scenario is when the brokendiode becomes an open circuit and then the device to protect becomescompletely unprotected.
4.5 The Bipolar Junction Transistor (BJT)
The bipolar junction transistor is essentially a device formed by two semi-conductor junctions which share one semiconductor layer (see Figure 4.8).
The common layer is called the base and the two others are the collector
DRAFT
4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 93
n np
EmitterBaseCollector
C
B
E
Figure 4.8: Qualitative physical model of a npn junction.
and emitter. We will have then the emitter-base and the collector-base junc-tions.
There are two types of BJT: the npn and the pnp transistor. In the pnptransistor the collector and the emitter are p-type and the base is n-type.The npn transistor has a p-type base , and n-type collector and emitter.Standard symbols for both types are shown in Figure 4.9.
Because the two junctions have two possible states (forward or reversebiased), the BJT can have four possible operating modes as shown in thefollowing table
Operating Bias BiasMode Emitter-Base Collector-Base
Forward-Active Forward ReverseCutoff Reverse Reverse
Saturation Forward ForwardReverse-Active Reverse Forward
Forward-Active:
The BJT approximates a current-controlled source of current as explainedin section 4.5.2.
Cutoff:
Both junctions are reverse biased. Neglecting the reverse saturation cur-rent, no current flows through the junctions. This mode, together with thesaturation mode, is used to implement the switch device (see section4.5.5).
DRAFT
94 CHAPTER 4. DIODES AND TRANSISTORS
IC
IBVCE
IC
IBVCE
E
C
B
IE
+
−
E
C
B
IE
+
−
pnp npn
Figure 4.9: Standard circuit symbols for npn and pnp transistors.
Saturation:
Both junctions are forward biased, and the current IC flows from the col-lector through the emitter.
Reverse-Active:
The BJT still approximates a current-controlled source of current, but theamplification factor is usually less than that of the forward-active mode.
4.5.1 The Collector Emitter Characteristic
Figure 4.10 shows collector emitter characteristic curves family of a typicalnpn transistor. Each curve corresponds to a given value of the base currentIB, with the base emitter junction forward biased.
The curves have three regions which are called, the saturation, forward-active, and breakdown regions. The break-down region starts for VCE valueslarger than those shown in the plots .
Saturation Region
The saturation region is where the collector emitter voltage difference VCE
slightly changes as a function of the collector current IC. For the 2N2222this regions is where VCE is between 0V to about 0.3V.
DRAFT
4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 95
0 0.5 1 1.50
5
10
15
20
25
30
35
Ib=10µA
Ib=20µA
Ib=50µA
Ib=100µA
Ib=150µA
Ib=200µA
Collector Emitter Voltage VCE
[V]
Col
lect
or C
urre
nt
I C
[mA
]
Figure 4.10: Collector Emitter voltage characteristics for the 2N2222 npn transis-tor. The value above each curve is the corresponding base current IB.
Forward-Active Region
The collector current IC slightly changes as a function of the collector emit-ter voltage VCE. Normally, this region is quite larger than the saturationregion. For the 2N2222 it is where VCE is between 0.3V to about 50V.
Break-Down Region
This is the region where the VCE doesn’t change and IC rapidly increases.In this case, the conduction in the junction is produced by the avalanchemechanism. For the 2N2222 this region starts from VCE > 60V.
4.5.2 The BJT as a Current-Controlled Current Source (CCCS)
As stated before, the bipolar junction transistor is a device that approx-imates a current-controlled source of current CCCS (see Figure 4.11). Inother words, because its current output io is proportional to the current
DRAFT
96 CHAPTER 4. DIODES AND TRANSISTORS
ii
iv
A i i(3)
A i i(2)
A i i(1)
vo
ioio
A i i
vo
R
Figure 4.11: Ideal current controlled source (diamond symbol), i.e. the currentoutput io is proportional to the current input ii, and is independent of the load R.In other words, if we change the load R and vo consequently, io stays constant.
input ii we can linearly control io by changing ii, i.e.
io(t) = βF ii(t).
if |βF| > 1 then the BJT is a current amplifier.As shown in Figure 4.11, once ii is set io must be constant indepen-
dently of the load R placed at the output. If the voltage across the outputvochanges we don’t expect to see any changes on io. The curve height sim-ply depends on the current input ii.
This approximation is valid for the so called small signal model andthe low frequency model. Non linearities arise for large signals and athigh frequency the response cannot be flat.
It is clear from the VCE characteristic that, if we want to use the BJT asCCCS , we have to bias it with a DC voltage to work in the forward-activeregion.
4.5.3 BJT Simplified DC Model
The simplified DC model of the BJT for the forward-active mode is shownin Figure 4.12 with two different arrangements. The first mimics the topol-ogy of the BJT symbol, and the second the topology of the CCCS in Figure4.11. This model is good enough to properly bias the transistor to work asan amplifier.
DRAFT
4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 97
iC
iB−+
VBE
i BβF
i BβF +
−VBE
iB iC
B
E
E
C
B C
=
Figure 4.12: Simplified DC model for the bipolar junction transistor working inforward-active mode. The two drawings are just two different arrangement ofthe same circuit.
The current controlled current source represents the VCE characteristicin the forward-active region. The battery in the base emitter circuit repre-sents the voltage across the base-emitter forward biased junction (it couldbe replaced with a diode). A typical value is VBE = 0.7V.
4.5.4 The BJT as an Amplifier
vi
RCRB
vo
+
i BβF
+
−VBE
IB
+
−VCC
+
−VCC
ICB
E
C
+
−
C
CC+V
Figure 4.13: The BJT as an AC basic amplifier (left ), and same circuit using theforward-active DC model (right).
Left circuit of Figure 4.13 shows the basic configuration of a BJT as asimple current amplifier. Resistors RB and RC are chosen to properly bias
DRAFT
98 CHAPTER 4. DIODES AND TRANSISTORS
and limit the currents across the junctions. The capacitance at the inputis necessary to prevent the DC bias from reaching the device connected tothe amplifier input. Let’s better analyze how to properly bias the transistorjunctions.
4.5.4.1 BJT Amplifier Bias
To obtain the largest voltage dynamic range, and considering the VCE char-acteristic, and neglecting the saturation region, we must have
VCC ≃ 2 VCE . (4.2)
Plugging the forward-active DC model into the amplifier circuit asshown in Figure 4.13, we will have2
VCC = VCE + RC IC,
Considering equation4.2 and the previous equation, the collector resistorvalue will be
RC =VCC − VCE
IC=
VCE
βF IB.
For the base resistor we will have
VCC = VBE + RB IB,
and finally
RB =2VCE − VBE
IB.
This circuit is not very useful because the junctions bias and the gaindepend on βF, which is quite often not well know and can easily varyby a factor of two for the same transistor. Moreover, βFis quite sensitive totemperature fluctuations. Anyway, this circuit is pedagogically interestingbecause of it simplicity.
2The repeated index is a common convention used to distinguish between the voltageof the transistor’s connections and the source voltages applied to the transistor connec-tions. In this case between the collector voltage VC and the source voltage VCC.
DRAFT
4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 99
Numerical Example
A typical BJT a transistor has VCE between 1V and 10V. Considering thefollowing parameters
βF = 100VCE = 5VVBE = 0.7VIB = 80µA
⇒
RC ≃ 625Ω
RB ≃ 116.25kΩ
VCC ≃ 10V.
4.5.4.2 BJT Amplifier Gain, Input and Output Impedance (Low Fre-quency Model)
VCC
+
−
IC
+
−VCCVi Vo
IB
I Bhfehie
CB
R RB C
E
Figure 4.14: BJT basic amplifier using the low frequency model (gray box). Theparameters h f e = βFand hie are provided by the manufacturer
Because the emitter-base junction is forward biased, the input impedanceseen from the points B and E is quite low. This consideration with the factthat the BJT approximates a CCCS is sufficient enough to define a modelfor the BJT transistor response for the low frequency region. Figure 4.14shows the model applied to the basic amplifier. The resistance hie is indeedthe dynamic input impedance of the forward biased emitter-base junction.
From Figure 4.14 we can easily calculate the amplifier voltage gain,which is
|Av| =RC IC
hie IB= h f e
RC
hie(βF = h f e)
Considering that the ideal current source is an open circuit and theideal voltage source is a short circuit, we will have
Ri ≃ RB|| hie, Ro ≃ RC .
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100 CHAPTER 4. DIODES AND TRANSISTORS
Thermal fluctuations can substantially change the response of the BJT. Away to avoid such kind of behavior is to add a feedback network. Es-sentially, a feedback network samples the output and sends it back to theinput with negative sign minimizing the output fluctuations. For example,if the amplifier gain increases because of a temperature increase, the feed-back signal will increase as well reducing the input signal by the amountnecessary to keep the gain constant. Feedback networks can create insta-bilities due to phase delays in the loop (the feedback signal can changesign). It is indeed necessary to satisfy stability criterion to avoid oscilla-tions. A detailed explanation of feedback theory can be found in [2] and[3].
4.5.5 BJT as Switch
vi
vo
vovi
t0 t1t1t0
RB
+
−
R
CC
C
+V
+
−t t
Figure 4.15: BJT as a switch
Figure 4.15 shows a npn BJT configured as a switch. In this case, thefunction of the two resistors RB and RC are just to limit the current flowingthrough the transistor junctions.
The input voltage vi control the output state of the switch. For sakeof simplicity let’s neglect the reverse currents components to study thecircuit.
• If vi = 0, The emitter-base junction is reverse biased and no currentflows through the circuit. This implies that vo ≃ VCC and (BJT incutoff state).
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4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 101
• If vi = V and supposing that this voltage forward bias both junctionswe will have vo ≃ 0 (BJT in saturation).
Let’s consider now the BJT reverse currents.
• If vi = 0, we will have iC = ICO and vo = VCC − ICORC. BecauseICO ∼ 1nA ICORC is negligible and v0 = VCC.
• If vi = V, then v0 is essentially the voltage drop VBEof the forwardbiased base-emitter junction vo = 0.7V.
4.5.6 BJT as Diode
Q
Figure 4.16: BJT as diode.
Figure 4.16 shows the typical configuration used to make a BJT work-ing as simple diode. The emitter-base junction acts as a simple semicon-ductor diode. Short circuiting the collector-base ensures that the collector-base junction is always reverse biased.
4.5.7 Current Mirror
Let’s consider the left circuit shown in Figure 4.17 where VCCforward biasthe emitter-base junction. From the KVL obtain
IR =VCC − VBE
R.
If VCC and R are kept constant (VBE = 0.7, typically ) then IR is constantas well. Applying the KCL to node we obtain
IR = IC + IB
DRAFT
102 CHAPTER 4. DIODES AND TRANSISTORS
VCC
Q 1
IR
IB1 IB2
Q 2
C2I
VCC
Q 1
R
IC1IC IB
IR R
Figure 4.17: BJT as diode.
and considering thatIc = βIB
we will finally have
IR =
(
1 +1β
)
IC. ⇒ IC ≃ IR.
The collector current IC is indeed constant if VCCand R are kept con-stant.
Let’s now consider the circuit on the right-hand side of Figure 4.17.Because of the KVL we will have
VBE1 = VBE2
Supposing that the two transistors Q1 and Q2 are perfectly identicaland because they have the same VBEwe must have
IC1 = IC2.
We will have indeed that the output IC2 will work as a constant currentsource.
Let’s analyze the stability of the circuit for a change on the transistorparameter β. From the KVL and KCL we have
IR =VCC − VBE
RIR = IC + 2IB
DRAFT
4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 103
After some simple algebra and considering that IC = βIBwe will have
IC =β
β + 2VCC − VBE
R
Studying the fluctuation of the transistor we will have
∆IC
IC≃ 2
∆β
β2 .
In other words, the stability of this current source due to the fluctua-tions of the transistor properties are expected to be remarkably good. Infact, if we suppose to have β = 100 and change of 100% in β then
β = 100∆β = 100
⇒ ∆IC
IC≃ 0.02
For their simplicity, current mirror are extensively used in ICs designwhere a constant current source is needed.
DRAFT
Bibliography
[1] ??Find a reference to Regulators??
[2] Microelectronics, Jacob Millman & Arvin Grabel, McGraw-Hill Elec-trical Engineering Series.
[3] The art of Electronics Second Edition, Paul Horowitz & Winfield Hill,Cambridge University Press
105
DRAFT
Chapter 5
Basic Op-Amp Applications
5.1 Introduction
In this chapter we will briefly describe some quite useful circuit based onOp-Amp, bipolar junction transistors, and diodes.
5.1.1 Inverting Summing Stage
−
+
Rf
I
In
I2
I
I1
V1
V2
Vo
Vn
R
R
R
A
Figure 5.1: Inverting summing stage using an Op-Amp. The analysis of thecircuit is quite easy considering that the node A is a virtual ground.
Figure 5.1 shows the typical configuration of an inverting summingstage using an Op-Amp. Using the virtual ground rule for node A and
107
DRAFT
108 CHAPTER 5. BASIC OP-AMP APPLICATIONS
Ohm’s law we have
In =Vn
R, I =
N
∑n=1
In.
Considering that the output voltage V0 is
Vo = −R f I,
we will have
Vo = AN
∑n=1
Vn, A = −R f
R.
5.1.2 Basic Instrumentation Amplifier
Instrumentation amplifiers (In-Amp) are designed to have the followingcharacteristics: differential input, very high input impedance, very lowoutput impedance, variable gain, high CMRR, and good thermal stability.Because of those characteristics they are suitable but not restricted to beused as input stages of electronics instruments.
R2
R1
R1
R2
−
+
Vi−
G+
−
Vi+
G+
−
Input Stage
Vo
StageDifferential
Figure 5.2: Basic instrumentation amplifier circuit.
Figure 5.2 shows a very basic In-Amp circuit made out of three Op-Amps. In this configuration, the two buffers improve the input impedanceof the In-Amp, but some of the problems of the differential amplifier are
DRAFT
5.1. INTRODUCTION 109
still present in this circuit, such as common variable gain, and gain thermalstability.
A straightforward improvement is to introduce a variable gain on bothamplifiers of the input stage as shown in Figure 5.3(a), but unfortunately,it is quite hard to keep the impedance of the two Op-Amps well matched,and at the same time vary their gain and maintaining a very high CMRR.A clever solution to this problem is shown in Figure 5.3(b). Because of thevirtual ground, this configuration is not very different from the previousone but it has the advantage of requiring one resistor to set the gain. Infact, if R3 = R4 then the gain of the Op-Amps A1 and A2 can be set at thesame time adjusting just RG.
For an exhaustive documentation on instrumentation amplifiers con-sult [2].
R4
R3
Vi−
Vi+
RGR4
R3
R1
R2
Vi−
Vi+
A1 A1
A2 A2
(a) (b)
−
+
+
−
+
−
−
+
Figure 5.3: Improved input stages of the basic instrumentation amplifier.
5.1.3 Voltage to Current Converter (Transconductance Am-
plifier)
A voltage to current converter is an amplifier that produces a current pro-portional to the input voltage. The constant of proportionality is usuallycalled transconductance. Figure 5.4 shows a Transconductance Op-Amp,which is nothing but a non inverting Op-Amp scheme.
DRAFT
110 CHAPTER 5. BASIC OP-AMP APPLICATIONS
−
+
R Zf
Rf
Zf
fi
v (t)s
Amperometer
Figure 5.4: Basic transconductance amplifier circuit.
The current flowing through the impedance Z f is proportional to thevoltage vs. In fact, assuming the Op-Amp has infinite input impedance,we will have
i f (t) =vs(t)
R.
Placing an amperometer in series with a resistor with large resistanceas a feedback impedance, we will have a high resistance voltmeter. Inother words, the induced perturbation of such circuit will be very smallbecause of the very high impedance of the operational amplifier.
5.1.4 Current to Voltage Converter (Transresistance Ampli-
fier)
A current to voltage converter is an amplifier that produces a voltage pro-portional to the input current. The constant of proportionality is calledtransimpedance or transresistance, and its units are Ω. Figure 5.5 show abasic configuration for a transimpedance Op-Amp. Due to the virtualground the current through the shunt resistance is zero, thus the outputvoltage is the voltage difference across the feedback resistor R f , i.e.
vo(t) = −R f is(t).
Photo-multipliers photo-tubes and photodiodes drivers are a typicalapplication for transresistance Op-amps. In fact, quite often the photo-current produced by those devices need to be amplified and convertedinto a voltage before being further manipulated.
DRAFT
5.2. LOGARITHMIC CIRCUITS 111
−
+Rs
Rf
isv =−i R fso
si
Figure 5.5: Basic transimpedance Op-Amp.
5.2 Logarithmic Circuits
By combining summing circuits with logarithmic and anti-logarithmic am-plifiers we can build analog multipliers and dividers. The circuits pre-sented here implements those non-linear operations just using the expo-nential current response of the semiconductor junctions. Because of that,they lack on temperature stability and accuracy. In fact, the diode reversesaturation current introduces an offset at the circuits output producing asystematic error. The temperature dependence of the diode exponential re-sponse makes the circuit gain to drift with the temperature. Neverthelessthese circuits have a pedagogical interest and are the basis for more sophis-ticated solutions. For improved logarithmic circuits consult [1] chapter 7,and [1] section 16-13 and[3].
−
+
−
+
D
ivo
v ivo
v
(a) (b)
R R
Q
Figure 5.6: Elementary logarithmic amplifiers using a diode or an npn BJT.
DRAFT
112 CHAPTER 5. BASIC OP-AMP APPLICATIONS
5.2.1 Logarithmic Amplifier
Figure 5.6 (a) shows an elementary logarithmic amplifier implementationwhose output is proportional to the logarithm of the input. Let’s analyzethis non-linear amplifier in more detail.
The Op-Amp is mounted as an inverting amplifier, and therefore if vi
is positive, then vo must be negative and the diode is in conduction. Thediode characteristics is
i = Is
(
e−qvo/kBT − 1)
≃ Ise−qvo/kBT Is ≪ 1,
where q < 0 is the electron charge. Considering that
i =vi
R,
after some algebra we finally get
vo =kBT
−q[ln (vi)− ln (RIs)] .
The constant term ln (RIs) is a systematic error that can be measuredand subtracted at the output. It is worth to notice that vi must be positiveto have the circuit working properly. An easy way to check the circuit is tosend a triangular wave to the input and plot vo versus vi.
Because the BJT collector current Ic versus VBE is also an exponentialcurve, we can replace the diode with an npn BJT as shown in Figure 5.6.The advantage of using a transistor as feedback path is that it should pro-vide a larger input dynamic range.
If the circuit with the BJT oscillates at high frequency, a small capacitorin parallel to the transistor should stop the oscillation.
5.2.2 Anti-Logarithmic Amplifier
Figure 5.7 (a) shows an elementary anti-logarithmic amplifier, i.e. the out-put is proportional to the inverse of logarithm of the input. The currentflowing through the diode is
i ≃ Ise−qvi/kBT Is ≪ 1.
DRAFT
5.2. LOGARITHMIC CIRCUITS 113
−
+
D
−
+
Q ivo
v ivo
v
(a) (b)
RR
Figure 5.7: Elementary anti-logarithmic amplifiers using a diode or an pnp BJT.
Considering that
vo = −Ri ,
thus
vo ≃ −RIse−qvi/kBT.
If the input vi is negative, we have to reverse the diode’s connection. Incase of the circuit of Figure 5.7 (b) we need to replace the pnp BJT with annpn BJT. Same remarks of the logarithmic amplifier about the BJT, appliesto this circuit.
−
+
Anti−LogAmplifier
vo
v1
v2
LogarithmicAmplifier
R
RLogarithmic
Amplifier
R
Figure 5.8: Elementary analog multiplier implementation using logarithmic andanti-logarithmic amplifiers
DRAFT
114 CHAPTER 5. BASIC OP-AMP APPLICATIONS
5.2.3 Analog Multiplier
Figure 5.8 shows an elementary analog multiplier based on a two log oneanti-log and one adder circuits. Fore more details about the circuit see [1]section 7-4 and [1] section 16-13.
−
+
Anti−LogAmplifier
vo
v1
v2
LogarithmicAmplifier
R0
R
R
RLogarithmic
Amplifier
Figure 5.9: Elementary analog divider implementation using logarithmic andanti-logarithmic amplifiers.
5.2.4 Analog Divider
Figure 5.8 shows an elementary logarithmic amplifier based on a two logone anti-log and one adder circuits. Fore more details about the circuit see[1] section 7-5 and [1] section 16-13.
5.3 Multiple-Feedback Band-Pass Filter
Figure 5.10 shows the so called multiple-feedback bandpass, a quite goodscheme for large pass-band filters, i.e. moderate quality factors around 10.
Here is the recipe to get it working. Select the following parameterwhich define the filter characteristics, i.e the center angular frequency ω0the quality factor Q or the the pass-band interval (ω1, ω2) , and the pass-band gain Apb
DRAFT
5.3. MULTIPLE-FEEDBACK BAND-PASS FILTER 115
−
G+
R3
R2R0
R1C2
C1
Vo
Vi
Figure 5.10: Multiple-feedback band-pass filter.
ω0 =√
ω2ω1
Q =ω0
ω2 − ω1
Apb < 2Q2
Set the same value C for the two capacitors and compute the resistancevalues
R1 =Q
ω0CApb
R2 =Q
ω0C (2Q2 − Apb)
R3 =2Q
ω0C
Verify that
Apb =R3
2R1< 2Q2
See [1] sections 8-4.2, and 8-5.3 for more details.
DRAFT
116 CHAPTER 5. BASIC OP-AMP APPLICATIONS
5.4 Peak and Peak-to-Peak Detectors
The peak detector circuit is shown in Figure 5.11. The basic ideal is toimplement an integrator circuit with a memory.
To understand the circuit letŽs first short circuit Do and remove R.Then the Op-amp A0 is just a unitary gain voltage follower that chargesthe capacitor C up to the peak voltage. The function of D0 and of A1 (highinput impedance) is to prevent the fast discharge of the capacitor.
Because of D0 the voltage across the capacitor is not the max voltage atthe input, and this will create a systematic error at the output vo. Placinga feedback from vo to vi will fix the problem. In fact, because v+ must beequal to v−, A0 will compensate for the difference.
Introducing the resistance (R ≃ 100kΩ) in the feedback will providesome isolation for vo when vi is lower than vC.
The Op-Amp A0 should have a high slew rate (~20 V/µs) to avoid themaximum voltage being limited by the Op-Amp slew rate.
The capacitor doesn’t have to limit the Op-Amp A0 slew rate S, i. e.
iC
C≪ dv
dt= S
It is worthwhile to notice that if D0 and D1 are reversed the circuitbecomes a negative peak detector.
The technology of the hold capacitor C is important in this application.The best choice to reduce leakage is probably polypropylene, and afterthat polystyrene or Mylar.
Using a positive and a negative peak detector as the input of a dif-ferential amplifier stage we can build a peak-to-peak detector (for moredetails see [1] section 9-1). Some things to check: holding time (a given %drop from the maximum) versus capacitor technology, systematic errors ,settling time required for the output to stabilize.
5.5 Zero Crossing Detector
When vi is positive and because it is connected to the negative input thenvo becomes negative and the diode D1is forward biased and conducting.
DRAFT
5.6. ANALOG COMPARATOR 117
A−
+
C0
D0vo
vCA
−
+vi
D1
R
RESET
Figure 5.11: Peak detector circuit.
5.6 Analog Comparator
An analog comparator or simply comparator is a circuit with two inputs vi,vre f and one output vowhich fulfills the following characteristic:
vo =
V1 , vi > vre f
V2, vi ≤ vre f
An Op-Amp with no feedback behaves like a comparator. In fact, if weapply a voltage vi > vre f , then V+ − V− = vi − vre f > 0. Because of thehigh gain, the Op-Amp will set vo to its maximum value +Vsatwhich is avalue close to the positive voltage of the power supply. If vi < vre f , thenvo = −Vsat. The magnitude of the saturation voltage are typically about1V less than the supplies voltages.
Depending on which input we use as voltage reference vre f , the Op-amp can be an inverting or a non inverting analog comparator.
It is worthwhile to notice that the analog comparator circuit is also a 1bit analog digital converter , which converts voltages to the two levels V1and V2.
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118 CHAPTER 5. BASIC OP-AMP APPLICATIONS
−
+
Vo
R+Rf
Vi
1V
−Vsat
(utp)V+
+Vsat
(ltp)V+
t
t
Figure 5.12: Schmitt Trigger and its qualitative response to a signal that swingsup and down between and through the saturation voltages ±Vsat.
5.7 Regenerative Comparator (The Schmitt Trig-
ger)
The Regenerative comparator or Schmitt Trigger1 shown in Figure 5.12 is acomparator circuit with hysteresis.
It is important to notice that the circuit has a positive feedback. Withpositive feedback, the gain becomes larger than the open loop gain makingthe comparator to swing faster to one of the saturation levels.
1Otto Herbert Schmitt (1913-1998) American scientist considered the inventor of thisdevice, that appeared in an article in 1938 with the name of "thermionic trigger"[3].
DRAFT
5.8. PHASE SHIFTER 119
Considering the current flowing through R+ and R f ,we have
I =V1 − V+
R+=
V+ − Vo
R f, ⇒ V+ =
V1R f + VoR+
R f + R+.
The output Vo can have two values, ±Vsat. Consequently, V+will as-sume just two trip points values
V(utp)+ =
V1R f + VsatR+
R f + R+V
(ltp)+ =
V1R f − VsatR+
R f + R+
When Vi < V(utp)+ , Vo is high, and when Vi < V
(ltp)+ , Vo is low.
To set V+ = 0 it requires that
V1 = −R+
R fVo
This circuit is usually used to drive an analog to digital converter (ADC).In fact, jittering of the input signal due to noise which prevents from keep-ing the output constant, will be eliminated by the hysteresis of the Schmitttrigger (values between the trip points will not affect the output).
See [1] section 11 for more detailed explanations.
Example1: (Vsat = 15V)
Supposing we want to have the trip points to be V+ = ±1.5V, if we setV1 = 0 then R f = 9R+.
5.8 Phase Shifter
A phase shift circuit shown in Figure 5.13, produces a sinusoidal signalat the output Vo which is equal to the sinusoidal input Vi with a definedphase shift . The basic idea of this clever circuit is to subtract using anOp-Amp two equal sinusoids one of which is lagging behind because islow pass filtered (the difference of these two same frequency sinusoid is aphase shifted attenuated sinusoid). The Op-Amp provides also the unitarygain.
DRAFT
120 CHAPTER 5. BASIC OP-AMP APPLICATIONS
Vi
Vo
−
+
CR
R0
R0
Figure 5.13: Phase shifter circuit.
Using the same method applied to compute the differential Op-Ampstage transfer function, we obtain
H (ω) =1 − jωRC
1 + jωRC,
The amplitude and phase of the transfer function are therefore
H (ω) = 1 for any frequency,
ϕ(ω) = arctan (−ωRC)− arctan (ωRC) = −2 arctan (ωRC) .
The phase shift is double the one of a simple low pass filter and there-fore can go from 0 down to −180. Exchanging the potentiometer andthe capacitor changes the phase lag to a phase lead.
Example
Supposing that we want a phase shift of −90 for a 1 kHz sinusoid withcapacitor with a reasonable capacitance value C = 10 nF, then
R =− tan
(ϕ
2
)
Cω=
110−8 · 2π · 103 = 15.915 kΩ.
The value of R0 can be in the range of few kilohoms to tens kilohoms.
DRAFT
5.9. GENERALIZED IMPEDANCE CONVERTER (GIC) 121
5.9 Generalized Impedance Converter (GIC)
Z1
Z2
Z3
Z4
Z5
+
−
+
−
A
Z
A
Figure 5.14: Generalized Impedance Converter (GIC).
The fundamental equation of the GIC, which can be found after tediouscalculation, is
Z =Z1Z3Z5
Z2Z4
By a careful choice of passive components, one can implement typesof impedance with values impossible to attain with standard passive com-ponents. This holds true where the Op-Amps behave very closely to idealOp-Amps and if one lead of Z is grounded. For example, we can make:
• C to L converter and vice versa,
• LC parallel to LC series and vice versa,
• impedance scaler
• negative resistance
DRAFT
122 CHAPTER 5. BASIC OP-AMP APPLICATIONS
This circuit is also a gyrator, i.e. a two voltage controlled current sources,where the currents have opposite direction. For more details consult [7].
5.9.1 Capacitor to Inductor Converter
If we choose, for example,
Z1 = Z2 = R1, Z3 = R3, Z4 =1
jωC, Z5 = R5,
then the GIC becomesZ = jωR3R5C .
The circuit will behave as an inductor with inductance L = R3R5C. Ifwe chose large resistance values R3, R5 and reasonably large capacitancevalues C, we can implement very large inductance values practically im-possible to attain using standard inductors.
DRAFT
5.10. PROBLEMS PREPARATORY TO THE LABORATORY 123
5.10 Problems Preparatory to the Laboratory
1. Considering the following circuit, determine the voltage output Vo
for the following input voltages Vi = −2V, 1V, 1.5V, 3V
−
G+
Vi
Vo
−10V
+10V
+1.5V
2. Consider the Schmitt trigger of Figure 5.12.
(a) If Vo = −15V and V+ = 0V, compute V1.
(b) If Vo = +15V, and V1 = 15V, compute V+.
3. Design a Schmitt trigger with two diode clamps and one resistor con-nected to the output.
(a) Limit the output Vo from 0 to 5V.
(b) Compute the resistance value R necessary to limit the diode cur-rent to 10mA.
4. What is the practical maximum and minimum output voltage of thelogarithmic amplifier in Figure 5.6?
5. Chose and study at least two circuits to study and design, one fromthis chapter and one form the next one on active filters .New circuits different than those ones proposed in this chapter arealso welcome. For a good source of new circuits based on Op-Ampssee [1] , [4], and [2].
DRAFT
Bibliography
[1] Luces M. Faulkenberry, An introduction to Operational Amplifierswith Linear IC Applications, Second Edition.
[2] Charles Kitchin and Lew Counts, A Designer’s Guide toInstrumentation Amplifiers (2nd Edition), Analog Devices(http://www.analog.com/en/DCcList/0,3090,759%255F%255F42,00.html)
[3] Theory and Applications of Logarithmic Amplifiers, NationalSemiconductors, AN-311 ( http://www.national.com/an/AN/AN-311.pdf ).
[4] Horowitz and Hill, The Art of Electronics, Second Edition
[5] Microelectronics Jacob Millman & Arvin Grabel, McGraw-Hill Elec-trical Engineering Series
[6] A thermionic trigger, Otto H Schmitt 1938 J. Sci. Instrum. 15 24-26.
[7] Sedra Smith, Microelectronics Circuits, third edition, Oxford Univer-sity Press.
125
DRAFT
Chapter 6
Active Filters
Introduction
An electronic circuit that modifies the frequency spectrum of an arbitrarysignal is called filter. A filter that modifies the spectrum producing ampli-fication is said to be an active filter. Vis à vis its definition, it is convenientto study the filter characteristics in terms of the frequency response of itsassociated two port network
H(ω) =Vo(ω)
Vi(ω),
where Vi and Vo are respectively the input voltage and the output voltageof the network, and ω the angular frequency. Depending on the design,active filters have some important advantages:
• they can provide gain,
• they can provide isolation because of the typical characteristic impedancesof amplifiers,
• they can be cascaded because of the typical characteristic impedancesof amplifiers,
• they can avoid the use of inductors greatly simplifying the design ofthe filters.
Here some disadvantages:
127
DRAFT
128 CHAPTER 6. ACTIVE FILTERS
• they are limited by the amplifiers’ band-with, and noise,
• they need power supplies,
• they dissipate more heat than a passive circuit.
Let’s make some simple definitions useful to classify different types offilters.
6.1 Classification of Ideal Filters
Based on their magnitude response |H (ω)|, Some basic ideal filters can beclassified as follows:
ω0
(ω)||H
0ω
1 1
(ω)||H
ω0
0ω
Low-pass High-pass
ω0 ω1
|H(ω)|
ω
1
0ω0 ω1
|H(ω)|
ω
1
0
Band-pass Stop-band/band-reject
|H(ω)|
ω0
ω
1
0
Notch
Practical filters approximate more or less the ideal definitions.
DRAFT
6.2. FILTERS AS RATIONAL FUNCTIONS 129
ω2 ω3 ω4 ω5 ω6 ω7ω8ω1
A2
A3
A1
DA1
DA2
DA3
ω
Figure 6.1: Graphical definition of the filter performance specifications, and hy-pothetical filter response (red curve) that satisfy the specification.
Usually, the filter requirements are specified defining the band frequen-cies with their gains (attenuation or amplification) gain ripples, and slopetransitions in terms of power of the frequency. Figure 6.1 shows a quitegeneral graphical definition of the design parameters of a filter with anhypothetical design. For a complete specification one should also definethe requirement for phase response.
6.2 Filters as Rational Functions
Let’s consider filters whose transfer function can be expressed as rationalfunction or standard form
H (ω) =α0 + α1 jω + α2 (jω)2 + . . . + αN (jω)N
β0 + β1 jω + β2 (jω)2 + . . . + βM (jω)M.
For the filter not to diverge
M ≥ N ⇒ |H (ω)| < ∞ for any value of ω
Writing the transfer function as a polynomial factorization we obtain
H (ω) = k(ω − z1)
n1 (ω − z2)n2 . . . (ω − zN)
nN
(ω − p1)m1 (ω − p2)
m2 . . . (ω − pM)mM
DRAFT
130 CHAPTER 6. ACTIVE FILTERS
Denominator roots p1, p2, . . . , pn are called poles, and numerator rootsz1, z2, . . . , zm are called zeros. The integers n1, n2, . . . , nN, and m1, m2, . . . , mN
are therefore the multiplicity of poles and zeros.
Poles and zeros values determine the shape of the filter, and apart fromzero frequency, one could say that poles provide attenuation and zerosamplification.
The transition from transmission to attenuation, and vice versa, in thefilter magnitude |H (ω)| is characterized by an asymptote slope which de-termine the so called filter order.
For example, considering the RC low pass filter with ω0 = 1/RC, wehave one pole p1 = jω0
H (ω) =ω0
ω0 + jω⇒ first oder low pass filter with cut-off freq. ω0
For the RC high pass filter with ω0 = 1/RC, we have one pole p1 = jω0and one zero z1 = 0
H (ω) =ω
ω0 + jω⇒ first oder high pass filter with cut-off freq. ω0
In the next sub-sections, we will analyze into more details filters withthe following transfer function
H (ω) = H0
−ω2 + jωω1
Q1+ ω2
1
−ω2 + jωω0
Q+ ω2
0
DRAFT
6.2. FILTERS AS RATIONAL FUNCTIONS 131
6.2.1 Second Order Low-Pass Filter
Figure below shows the second order low pass filter bode plot, with reso-nant frequency ωres, and characteristic frequency ω0
102
103
104
−40
−30
−20
−10
0
10
Mag
nitu
de [d
B]
ωres
Hmax
ω0
102
103
104
−150
−100
−50
0
Frequency [rad/s]
Pha
se [D
eg]
ωres
φres
ω0
−90
Filterω
resω
0
The second order low-pass filter written in standard form
Transfer Function Resonance Maximum DC High Freq.Gain Gain
H0ω2
0
−ω2 + jωω0
Q+ ω2
0
ω0
√
1 − 12Q2 H0
Q√
1 − 14Q2
H0 0
DRAFT
132 CHAPTER 6. ACTIVE FILTERS
6.2.2 Second Order High-Pass Filter
102
103
104
−30
−20
−10
0
10
Mag
nitu
de [d
B]
ωres
Hmax
ω0
102
103
104
0
50
100
150
Frequency [rad/s]
Pha
se [D
eg]
ωres
φres
ω0
90
Filterω
resω
0
The second order high-pass filter written in standard form
Transfer Function Resonance Maximum DC High Freq.Gain Gain
H0ω2
−ω2 + jωω0
Q+ ω2
0
ω0√
1 − 12Q2
H0Q
√
1 − 14Q
0 H0
DRAFT
6.2. FILTERS AS RATIONAL FUNCTIONS 133
6.2.3 Band-Pass Filter
102
103
104
−30
−25
−20
−15
−10
−5
0
5
Mag
nitu
de [d
B]
ωres
Hmax
ω0
102
103
104
−50
0
50
Frequency [rad/s]
Pha
se [D
eg]
ωres
φres
ω0
0
Filterω
resω
0
The band-pass filter written in standard form is
Transfer Function Resonance Maximum DC Gain High Freq.Gain
H0
jωω0
Q
−ω2 + jωω0
Q+ ω2
0
ω0 H0 0 0
DRAFT
134 CHAPTER 6. ACTIVE FILTERS
For example, depending on the output we consider, the already stud-ied LRC series circuit is a low-pass, a band-pass, or a high-pass filter withthe transfer function described above. When we will study difference fil-ters topologies we will reduce their transfer function into one of the stan-dard form above.
6.3 Common Circuit Filters Topologies
This is a brief and not exhaustive at all list of filter topologies that useresistors, capacitors, and operational amplifiers to implement the filterstypes described above:
• Infinite gain, multiple feedback (IGMF)
• Generalized Sallen-Key (GSK)
• State Variable (SV)
• Switched Capacitor Filters (SC)
Cascading these implementation allows to increase the filter order.
DRAFT
6.4. INFINITE GAIN MULTIPLE FEEDBACK CONFIGURATION (IGMF)135
6.4 Infinite Gain Multiple Feedback Configura-
tion (IGMF)
Vi
Vo
VA
Y4 Y5
Y2
Y3Y1
V−
V+
A B−
+
I1I
I
I2
4
3
Figure 6.2: Infinite Gain Multiple Feedback Filter.
Let’s consider the circuit in Figure 6.2 with generic admittances Y1, Y2, Y3, Y4,and Y5. Applying the KCL to node A and considering the circuit virtualground (V− = 0), we have
VAY3 + (Vo − VA)Y4 + (Vi − VA)Y1 + VAY2 = 0 . (6.1)
Again, applying KCL to node B and for the virtual ground we have
VoY5 + VAY3 = 0 ⇒ VA = −Y5
Y3Vo
Replacing the last expression into eq. 6.1 and after some algebra weobtain the generic transfer function for the circuit
Vo
Vi= − Y1Y3
Y5 (Y1 + Y2 + Y3 + Y4) + Y3Y4.
Choosing the proper type of admittances we can construct differenttypes of active filters, low-pass band-pass, and high-pass. It is worthwhilenoticing that IGMF configuration allows to implement low-pass, band-pass, and high-pass filter with capacitors, resistor and no inductors. Thissimplifies considerably the design of the filters.
DRAFT
136 CHAPTER 6. ACTIVE FILTERS
6.4.1 Low-pass Filter
ViR3R1
R4 C5
C2
VoG−
+
Figure 6.3: Low-pass filter configuration of the infinite gain multiple feedbackfilter.
A possible choice to implement a low-pass filter as shown in Figure 6.3 is
Y1 =1
R1, Y2 = jωC2, Y3 =
1R3
,
Y4 =1
R4, Y5 = jωC5,
and the transfer function of the circuit becomesVo
Vi= −
1/R1R3
jωC5 (1/R1 + jωC2 + 1/R3 + 1/R4) + 1/R3R4.
Rearranging the expression to obtain a rational fraction in ω we finallyobtain
Vo
Vi=
− 1R1R3C2C5
−ω2 + jω1
C2(1/R1 + 1/R3 + 1/R4) +
1R3R4C2C5
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.1 we find that the frequencyω0, the quality factor Q, and the DC gain H0 are respectively
ω0 =
√
1R3R4C2C5
, Q = ω0C2
(1/R1 + 1/R3 + 1/R4), H0 = −R4
R1.
DRAFT
6.4. INFINITE GAIN MULTIPLE FEEDBACK CONFIGURATION (IGMF)137
6.4.2 High-pass Filter
Vi
Vo
C1 C3
C4
R
R5
G−
+2
Figure 6.4: High-pass filter configuration of the infinite gain multiple feedbackfilter.
A possible choice to implement a high-pass filter as shown in Figure 6.4is
Y1 = jωC1, Y2 =1
R2, Y3 = jωC3,
Y4 = jωC4, Y5 =1
R5,
and the transfer function of the circuit becomes
Vo
Vi= − jωC1 jωC3
1/R5 (jωC1 + 1/R2 + jωC3 + jωC4) + jωC3 jωC4.
Rearranging the expression to obtain a rational fraction in ω we obtain
Vo
Vi=
−ω2 (−C1/C4)
−ω2 + jω (C1 + C3 + C4)1
R5C3C4+
1R2R5C3C4
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.2 we find that the frequencyω0, the quality factor Q, High frequency gain H∞are respectively
ω0 =
√
1R2R5C3C4
, Q = ω0R5C3C4
(C1 + C3 + C4), H∞ = −C1
C4.
DRAFT
138 CHAPTER 6. ACTIVE FILTERS
6.4.3 Band-pass Filter
−
+
Vi
Vo
C4 R5
R2
R1 C3
Figure 6.5: Band-pass filter configuration of the infinite gain multiple feedbackfilter.
A possible choice to implement a Band-pass filter is shown in Figure 6.5.The admittances are
Y1 =1
R1, Y2 =
1R2
, Y3 = jωC3,
Y4 = jωC4, Y5 =1
R5,
and the transfer function of the circuit becomesVo
Vi= − jωC3/R1
1/R5 (1/R1 + 1/R2 + jωC3 + jωC4) + jωC3 jωC4.
Rearranging the expression to get a rational fraction in ω we finallyobtain
Vo
Vi= −R5
R1
jω
(
C3 + C4
R5C3C4
)
−ω2 + jωC3 + C4
C3C4R5+
R1 + R2
R1R2R5C3C4
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.3 we find that the resonancefrequency, and the quality factor are respectively
ω0 =
√
R1 + R2
R1R2R5C3C4, Q = ω0
R5C3C4
C3 + C4, H0 = −R5
R1
DRAFT
6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 139
6.5 Generalized Sallen-Key Filter Topology (GSK)
Vo
V+
V−
Y6
I6Y5
Vi VA
Y4
Y2Y1
I3I4
Y3I3
+
−
A BI1
C
I5
Figure 6.6: Generalized Sallen-Key Topology.
Let’s consider the circuit in Figure 6.6 with generic admittances Y1, Y2, Y3, Y4, Y5,and Y6. Applying the KCL to node A , we have
(Vi − VA)Y1 + (Vo − VA)Y4 + (V+ − VA)Y2 = 0 . (6.2)
Applying KCL to node B
(V+ − VA)Y2 + V+Y3 = 0 ⇒ VA =Y2 + Y3
Y2V+ .
Applying KCL to node C
(V0 − V−)Y6 − V−Y5 = 0 ⇒ V− = V+ =Y6
Y6 + Y5V0 .
Replacing the expression found for VA, and V+ into eq. (6.2) and afterquite some boring algebra, we obtain
Vo
Vi=
(
1 +Y5
Y6
)
Y1Y2Y6
Y1Y6 (Y2 + Y3) + Y3Y6 (Y2 + Y4)− Y2Y4Y5.
Let’s analyze some admittances’ configuration of the this filter topol-ogy.
DRAFT
140 CHAPTER 6. ACTIVE FILTERS
6.5.1 GSK Second Order Low-pass Filter
R2Vi
Vo
R6
C4
C3
R1
R5
+
−
Figure 6.7: Low-pass filter configuration of the Generalized Sallen-Key filter.
A possible choice to implement a low-pass filter as shown in Figure 6.7 is
Y1 =1
R1, Y2 =
1R2
, Y3 = jωC3,
Y4 = jωC4, Y5 =1
R5, Y6 =
1R6
,
and the transfer function of the circuit becomes
Vo
Vi=
(
1 +R6
R5
)
1R1R2C3C4
−ω2 + jω
(
1R1C4
+1
R2C4− 1
R2C3
R6
R5
)
+1
R1R2C3C4
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.1we find that the frequencysquare ω2
0, the quality factor Q, and the DC gain H0 are respectively
ω20 =
1R1C4R2C3
, Q = ω0R1R2R5C3C4
R5 (R1 + R2)C3 − R1R6C4, H0 =
(
1 +R6
R5
)
.
DRAFT
6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 141
6.5.2 Simple Case
If R1 = R2 = R, C3 = C4 = C, and R5 = R6 = 0, then
Vo
Vi=
ω20
−ω2 + jωω0 + ω20
, ω20 =
1R2C2 , , Q = 1 ,
which is the transfer function of a second order low-pass filter with lowquality factor.
6.5.3 GSK Second Order High-pass Filter
Vi
Vo
R6
R5
R4
C2C1
R3
+
−
Figure 6.8: High-pass filter configuration of the Generalized Sallen-Key filter.
To implement a low-pass filter as shown in Figure 6.8 one needs to choosethe admittances as follows
Y1 = jωC1, Y2 = jωC2, Y3 =1
R3,
Y4 =1
R4, Y5 =
1R5
, Y6 =1
R6,
and the transfer function of the circuit becomes
DRAFT
142 CHAPTER 6. ACTIVE FILTERS
Vo
Vi=
(
1 +R6
R5
) −ω2
−ω² + jω
(
1R3C2
+1
R3C1− 1
R4C1
R6
R5
)
+1
R3R4C1C2
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.2 we find that the frequencysquare ω2
0, the quality factor Q, and the DC gain H0 are respectively
ω20 =
1R3C1R4C2
, Q = ω0R3R4R5C1C2
R5 (C1 + C2) R3 − C1R6R4, H0 =
(
1 +R6
R5
)
.
6.5.4 Simple Case
If R1 = R2 = R, C3 = C4 = C, and R5 = R6 = 0, then
Vo
Vi=
−ω2
−ω2 + jωω0 + ω20
, ω20 =
1R2C2 , , Q = 1 ,
which is the transfer function of a second order high-pass filter with lowquality factor.
6.5.5 GSK Band-pass Filter
R4
C2
C3
Vo
ViR1
R3 R6
R5
+
−
Figure 6.9: Band-pass filter configuration of the Generalized Sallen-Key filter.
DRAFT
6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 143
To implement a band-pass filter as shown in Figure 6.9 one needs to choosethe admittances as follows
Y1 =1
R1, Y2 = jωC2, Y3 =
1R3
+ jωC3,
Y4 =1
R4, Y5 =
1R5
, Y6 =1
R6,
and the transfer function of the circuit becomes
Vo
Vi=
(
1 +R6
R5
)
jω
R1C3
−ω2 + jω
(
C2 + C3
C2C3R1+
1C3R3
+1
C2R4− 1
C3R4
R6
R5
)
+R1 + R4
C2C3R1R3R4
.
Comparing the denominator of the previous equation with the denom-inator of the transfer function in section 6.2.3 we find that the frequencysquare ω2
0, the quality factor Q, and the DC gain H0 are respectively
Q = ω0C2C3R1R3R4R5
(C2 + C3) R3R4R5 + C2R1R4R5 + C3R1R3R5 − C2R1R3R6,
ω20 =
R1 + R4
C2C3R1R3R4,H0 =
1R1C3
(
1 +R6
R5
)
Q
ω0.
6.5.6 Simple Case
If R1 = R3 = R4 = R, C2 = C3 = C, and R5 = R6 = 0, then
Vo
Vi=
jωω0
Q
−ω2 + jωω0
Q+ ω2
0
, ω0 =
√2
RC, , Q =
√2
3,
which is the transfer function of a second order high-pass filter with lowquality factor.
DRAFT
144 CHAPTER 6. ACTIVE FILTERS
6.6 State Variable Filter Topology (SV)
The state variable filter provides a low pass, a band pass, and a high passfilter outputs. At the same time, it allows to change the gain, the cut-offfrequencies, and the quality factor independently, but it requires 4 Op-Amps.
R1Vi
G−
+
VHPVBP
G−
+
C1
R7
R6
R2
VLP
G−
+
C2R3 R4 R5
Figure 6.10: State variable filter circuit.
TBF
6.7 Practical Considerations
6.7.1 Component Values
How do we select the values of capacitance and resistance? Here are someconsiderations that should help the filter design:
• reducing the resistance values reduces the thermal noise and there-fore the filter noise,
• reducing resistance values minimizes the op-amp voltage offsets,
DRAFT
6.7. PRACTICAL CONSIDERATIONS 145
• increasing the resistance reduce the current load on the op-amps,
• increasing the resistances usually allows to decrease the capacitanceand therefore it make easier to find capacitors because of the smallcapacitance values needed,
• reducing the capacitance minimizes the capacitance fluctuations dueto temperature,
• increasing the capacitance allows to reduce resistance values andtherefore the thermal noise.
As we can clearly see, some of the consideration cannot be used at thesame time. Based on the design requirements one can decide which of theconsideration above are more important to finally meet the design require-ments.
Rules of Thumb
Particularly critical design often overrule these following rules:
• Capacitor with capacitance less of ~100 pF should be avoided,
• Try to use resistor with resistance between few kilo-ohms to few hun-dreds of kilo-ohms.
6.7.2 Components technology
Capacitors
The use of low loss dielectric is very important to obtain good results.If possible one should use plastic film capacitors or C0G/NPO ceramiccapacitors, 1% tolerance for temperature stability.
Resistor
Low thermal noise resistors such as metal film resistors 1% tolerance fortemperature stability should be used.
DRAFT
Bibliography
[1] Hank Zumbahlen, State Variable Filters, Mini Tutorial MT-223, Ana-log Devices
147
DRAFT
Chapter 7
Basics on Oscillators
7.1 Introduction
Waveform generators are circuits which provide a periodic signal withconstant frequency, phase, and amplitude. The quality of these devicesare measured by the frequency stability, amplitude stability, and absenceof distortion. The last characteristics is essentially cleanness of the spec-trum signal. For example, the spectrum of a perfect sinusoidal oscillatormust be a delta of Dirac at the oscillating frequency. Practically, sinusoidaloscillators has a sharp narrow peak at the oscillation frequency, and otherless taller peaks at different frequencies, mainly at multiples of the oscilla-tion frequency (harmonics ).
In this chapter we will study the criterion to sustain a sinusoidal oscil-lation with a positive feedback amplifier, the so-called Barkhausen crite-rion, and some simple circuit to produce different waveforms.
Direct Digital Synthesis[1], a more versatile and effective technique toproduce arbitrary waveforms, is out of the scope of these simple notes.
7.2 Barkhausen Criterion
Let’s consider an ideal amplifier with a positive feedback network as showin figure 7.1. Considering that the summation point output is
Vi + β(ω)Vo ,
149
DRAFT
150 CHAPTER 7. BASICS ON OSCILLATORS
VoViV + Vβ oi
Voβ
β(ω)
A(ω)
Figure 7.1: Amplifier with positive feedback
and the amplifier gain is A(ω), the output voltage will be
Vo = A(Vi + βVo),
Collecting Vo we will finally have
Vo =A
1 − βAVi.
For|β(ω)A(ω)| = 1, arg [β(ω)A(ω)] = 0, 360, ...
the output Vo diverges. If the previous condition is satisfied for theangular frequency ω0, any excitation at the frequency ω0 will make theoutput to oscillate at the frequency ω0 with infinite amplitude. If Vi goesto zero as fast as 1 − βA then the output will theoretically oscillate at thefrequency ω0 with amplitude A.
The previous condition which can be rewritten as
ℜ[βA] = 1, ℑ[βA] = 0 (7.1)
is the so called Barkhausen criterion for the oscillation.The term βA is called the open loop gain or simply loop gain since
that is exactly the gain of the loop in the feedback amplifier network whenthe loop is open at the summing point.
In the discussion of the oscillator circuits, we will assume that the am-plifier is able to deliver the required positive or negative gain withoutadding any additional phase. In the general case, this is clearly a crudeapproximation, but it is used here just to simplify the study of the circuits.
DRAFT
7.2. BARKHAUSEN CRITERION 151
7.2.1 Gain Stability
Oscillators with exactly unitary open loop gain at a given frequency andinput Vi equal to zero at any time are just a mere mathematical abstraction.In real circuits, there will always be some noise at ω0 and the gain cannotbe kept absolutely stable. For example, external perturbations, drifts dueto temperature, and components aging would make these two conditionsimpossible to keep.
Practically, it is necessary to have a loop gain βA somewhat larger thanunity to start and sustain the oscillation. This can lead to a slow drift ofthe oscillation amplitude, and in the worst case, the oscillation can evensaturate or stop.
It is worthwhile to notice that large values of the amplifier gain A, thatproduce saturation at the output, can be used to generate squares or pulsewaves. Moreover, cascading a proper filtering stage, one can select justone frequency and make a quite amplitude stable sinusoidal generator.
7.2.2 Automatic Gain Control (AGC)
To properly sustain the oscillation in case of temperature drifts, we needto add to the positive feedback path another feedback loop this time neg-ative to stabilize the gain. This path often called Automatic Gain Control(AGC) circuit can be done using temperature sensitive components. Forexample, semiconductor diodes, transistors, or even incandescent bulbs,whose resistivity increases or decreases with temperature can be used inthe AGC.
7.2.3 Oscillation Kick-start
We don’t have to provide an initial kick to start the oscillation. This istrue, because every time we turn on a circuit on or we toggle a switch, astep like perturbation propagates through the circuit providing an initialexcitation at the right frequency. Moreover, the probability to have a smallsignal perturbation ( due to the omnipresent noise ) at the right frequencyis usually quite high.
DRAFT
152 CHAPTER 7. BASICS ON OSCILLATORS
Q 0
VDD
Vo Vi
DRr d
Vo
Vigm
R
RD
S
C
R
C C
RR
Figure 7.2: Phase shift oscillator using a JFET as amplification stage (leftgray rectangle) and a phase shift network (right gray rectangle). The cir-cuit on the left represents the low frequency model of the JFET amplifier.
7.2.4 Frequency Stability
The frequency stability of an oscillator is a quite complex topic of study.Here we can simply say that it depends mainly on the ability of the cir-cuit to maintain the loop gain phase constant to 0or to multiples of 360.Phase fluctuations will therefore introduce noise in the oscillator frequency.
7.3 Phase Shift Oscillator
The phase shift oscillator exemplifies the concepts set forth above. Re-ferring to figure 7.2, we can distinguish the JFET amplifier stage and thepositive feedback network made of three cascaded RC phase shifting fil-ters.
Supposing that the amplifier load ZL is negligible, i.e. |ZL| ≫ RD||rd
then, the amplifier will just change sign (180) to any signal injected in thegate. The network feedback will provide additional phase shift to satisfythe Barkhausen criterion at a given angular frequency ω0.
DRAFT
7.4. THE WIEN-BRIDGE OSCILLATOR 153
It can be proved that
β(ω) =Vi
Vo=
1
1 − 5(ωτ)2 + j
(
1(ωτ)3 − 6
ωτ
) τ = RC , (7.2)
The amplifier gain, supposed to be constant is A = −gmRD , where gm isthe JFET amplifier gain.
Imposing the condition ℑ[βA] = 0, we get
ω0 =1√6
1τ
.
Replacing the previous expression in the open loop gain Aβ and usingthe second condition ℜ [βA] = 1, we get
gmRD = 29
To sustain the oscillation, the amplifier must have a gain of at least29/RD .
7.4 The Wien-Bridge Oscillator
The Wien Bridge Oscillator show in figure 7.3, uses a differential amplifierto provide positive and negative feedback to satisfy the two condition ofoscillation.
Referring to figure 7.3 , setting YC = 1/ (jωC) , and thanks to the volt-age divider equation we can write
V+ =
RYCYC+R
R + YC + RYCYC+R
Vo =1
(YC+R)2
RYC+ 1
Vo =1
YCR + R
YC+ 3
Vo
andβ(ω) =
V+
Vo=
1
3 + j(
ωτ − 1ωτ
) τ = RC.
The oscillation will happen where the phase shift is zero, i.e. for
ωτ − 1ωτ
= 0, ⇒ ω0 =1τ
.
DRAFT
154 CHAPTER 7. BASICS ON OSCILLATORS
V+
V+V−
Vo
Rf
Rf
R−
−
A+
R−
Vo
C
R
R
C
C
R
CR
Figure 7.3: Wien Bridge oscillator, and components rearrangement toshow the bridge topology.
The angular oscillation frequency ω0 depends on the inverse of the re-sistance R and the capacitance C.
Because the attenuation at the resonant frequency is
V+
Vo=
13
.
the negative feedback must have a theoretical gain of A(ω0) = 3. Theresistances R− and R f must be given by the usual equation
Vo‘
V+= 1 +
R f
R−.
The oscillation frequency can be continuously tuned using coupledvariable resistors.
To minimize distortions due to the Op-amp saturation when the gainis larger than one, it is required to provide a circuit with variable gain.Essentially, we need an overall gain larger than one for small signal tosustain the oscillation and gain of about 1 or less for large signal to avoiddistortion. The negative feedback path shown in figure 7.4 does the job.
DRAFT
7.5. LC OSCILLATOR 155
Rf
D0
D1
Rf
Figure 7.4: Automatic gain control circuit for the Wien bridge oscillatornegative feedback.
For large signals one of the diodes becomes forward biased reducing thefeedback resistance and the Op-Amp gain. For smaller signal the gain isnot affected by the diodes.
Practically, Wien Bridge oscillators are used in the kilohertz region witha variable range up to ~10 times ω0.
7.5 LC Oscillator
A quite general form of oscillator circuits is depicted in figure 7.5. In thiscase it is not straightforward to separate the oscillating feedback networkand the amplifier itself. Let’s suppose that the amplifier is ideal but has anon zero output resistance Ro. Referring to figure 7.5 we have
β =Vi
V∗0
.
Applying the voltage divider equation twice we have the two equa-tions
Vi =Z1
Z1 + Z3Vo
and
Vo =Z
Z + RoV∗
0 , Z = Z2|| (Z1 + Z3) ,
or1
V∗o=
Z
Z + Ro
1V0
.
DRAFT
156 CHAPTER 7. BASICS ON OSCILLATORS
Z3
Z1
Z2
Vi
Vo
RoVo
+ −A(V − V )
Vi
+
A−
Z3
Z1
Z2
Vo
I=0
+
−
*
Figure 7.5: LC Oscillator circuit using an ideal Op-Amp with non zero outputimpedance Ro and its equivalent ideal circuit. Note that the feedback loop isconnected to the negative input of the amplifier, and therefore to get a positiveloop feedback the feedback network has to flip the signal phase by 180.
After some algebra we finally get
β =Z1Z2
Ro (Z1 + Z2 + Z3) + Z2 (Z1 + Z3). (7.3)
Let’s consider the case of the LC tunable oscillators, i.e. the impedancesare purely reactive (real part equal to zero)
Zi = jXi , Xi > 0 for i = 1, 2, 3
Then the previous eq. (7.3) becomes
β =−X1X2
jRo (X1 + X2 + X3)− X2 (X1 + X3).
For β to be realX1 + X2 + X3 = 0 ,
andβ(ω0) =
X1
X1 + X3,
where ω0 is the oscillation frequency. Using the two previous equation wefinally get
DRAFT
7.6. CRYSTAL OSCILLATOR 157
β(ω0) = −X1
X2⇒ AOL = −A
(
−X1
X2
)
.
Since AOL must be positive and A > 0, then X1 and X2 must have samesign. For example they have be both capacitors or inductors. From thecondition of imaginary part equal to zero we find that if X1 and X2 are ca-pacitors, then X3 must be an inductor, and vice versa. Here is the oscillatorcircuit name depending on the choice of the reactance:
• Colpitts Oscillator: X1 and X2 capacitive reactances and X3 an in-ductive reactance ( X1,2 = −1/(ωC1,2), X3 = ωL3).The oscillator angular frequency and the gain in this case are
ω0 =
√
√
√
√
1
L3
(
C1C2C1+C2
) , β(ω0) =C2
C1
• Hartley oscillator: X1 and X2 inductive reactances and X3 a capaci-tive reactance ( X1,2 = ωL1,2, X3 = −1/(ωC3)).The oscillator angular frequency and the gain in this case will be
ω0 =
√
1C3 (L1 + L2)
, β(ω0) =L1
L2
Using a BJT amplifier we can usually obtain higher oscillating frequencythan using standard operational amplifiers. In this case the high frequencyhybrid-π model[2] must be used to properly model the transistor behav-ior. Moreover, the BJT amplifier low input impedance makes the designmore complicated.
7.6 Crystal Oscillator
Crystal oscillators are based on the property of piezoelectricity1 exhibitedby some crystals and ceramic materials. Piezoelectric materials change
1Piezoelectricity was discovered by Jacques and Pierre Curie in the 1880’s during ex-periments on quartz.
DRAFT
158 CHAPTER 7. BASICS ON OSCILLATORS
C2 L2
L3
C1
C3
L1
Figure 7.6: Colpitts (left) and Hartley (right) feedback circuits β(ω) for theLC oscillator circuit of Figure 7.5.
size when an electric field is applied between two of its faces. Conversely,if we apply a mechanical stress, piezoelectric materials generate an electricfield. Some crystals have internal mechanical resonances with very highquality factors (quartz can reach quality factors of 104) 2 and can be indeedused to generate very stable oscillators.
Figure 7.7 shows the circuit symbol for a piezoelectric component andthe equivalent circuit modeled using ideal components.
Usually, to apply an electric field to a crystals is necessary to make aconductive coating on two parallel faces, and this process creates a capaci-tor with an interposed dielectric. This explain the presence of the capacitorof capacitance Cp in the model. The LCR series circuit accounts for the par-ticular mechanical resonance we want to use to build the oscillator.
To design a crystal oscillator it is important to study the reactance ( theimaginary part of the impedance) whose qualitative behavior is shown infigure 7.8. Where the reactance is essentially inductive and very close tothe resonance, the crystal behaves as a simple equivalent inductor. We canindeed replace the inductor Ls of the LC oscillator of figure 7.5 with thepiezoelectric crystal to build a simple oscillator.
Crystal oscillators using a Colpitts configuration and a BJT in common-emitter or common-collector configuration, can work from few kHz up to
2Mechanical resonance stability depends mainly on the fact that the resonance valueis determined by the crystal geometry. It the crystal size slightly depends on the tem-perature we can have very stable resonators. Active temperature stabilization can clearlyimprove frequency stability.
DRAFT
7.6. CRYSTAL OSCILLATOR 159
L
R
C
C
s
s
p
s
Figure 7.7: Circuit symbol for a piezoelectric oscillator (or quartz oscilla-tor) and the equivalent electronic circuit. The LCR series circuit accountsfor the sharp mechanical resonance The capacitor Cp in parallel describesthe capacitance of the crystal for frequency far for the resonance.
CapacitiveHalf Plane
Inductive Half Plane
X( )ωX
ω
Figure 7.8: Qualitative behavior of the crystal reactance versus frequency.
DRAFT
160 CHAPTER 7. BASICS ON OSCILLATORS
~100MHz.
7.7 Relaxation Oscillators
Relaxation oscillators include a wide class of non-linear systems many ofthem found in different fields such as mechanics, biology, chemistry, elec-tricity, to just mention a few.
Relaxation oscillators are characterized by the following properties:
• a non linear mechanism that provides a bistable state,
• a relaxation process that creates the transition from one stable stateto the other,
• a period of oscillation characterized by a relaxation phenomena, i.e.by the time constant of the relaxation process,
The canonical example of relaxation oscillator is the seesaw with one bucketon one end and a weight on the other with the bucket continuously filledby a constant water flow. When the bucket is filled, it changes the equi-librium of the seesaw, and the system transitions to the new state of equi-librium. In the new state, the bucket is tilted enough to be emptied andtherefore the system transition back to the older state. The seesaw + water-flow is clearly the bistable nonlinear system, and the relaxation process isthe emptying of the bucket.
Balthasar van der Pol3 was one of the first to analyze a relaxation oscil-lator system.
7.7.1 Square Wave Generator
A very simple relaxation oscillator is the RC charge discharge oscillatorshow in figure 7.9. The ideal Op-Amp is configured as a Schmitt triggerwhich provides the non-linear bistable states. The negative feedback pro-vides the relaxation mechanism.
To qualitatively understand the circuit, let’s suppose that the Schmitttrigger output rails down to the Op-Amp power supply voltage −Vss. The
3Dutch physicist of the beginning of 20th century whose work covered several differ-ent fields such as applied mathematics, radio waves, and electrical engineering.
DRAFT
7.7. RELAXATION OSCILLATORS 161
R+ Rf
C0 RvC
voG
−
+
+Vss t
t
+Vss
−Vss
−Vss
−Vss
2
vC
vo
ss
2+V
Figure 7.9: The Op-Amp version of the RC Charge Discharge Oscillator.
capacitor will start to charge down and its voltage VC will swing down toreach −Vss with a characteristic time constant τ = RC. Once VC ≤ −Vss/2, the Schmitt trigger output will switch to +Vssand the the capacitor volt-age VC will start swinging to +Vss with the same characteristic time con-stant τ. This cycle will keep repeating generating a square wave at theSchmitt trigger output.
The Period of the oscillation can be computed considering the time forexponential decay with time constant τ to go from Vss/2 to −Vss/2. Aftersome algebra one obtains
T = 2 log (3) τ
which shows in this case ( same resistors on the positive feedback loop)that the period does not depend on the voltage limits but only on τ. In amore general case when the positive feedback loop resistors R0 are differ-ent, T will depend also on the values of those resistors.
7.7.2 Triangular Wave Generator
A triangular waveform generator can be easily built by cascading a SchmittTrigger and an Op-amp integration stage as shown in Figure 7.10.
Let’s suppose that the Schmit Trigger output vst has railed up to +VSS.A current Vss/R will start charging the capacitor C and as consequence,the output vo which is connected to the capactor will decrease. Once vo islower than the Schmitt Trigger lower tripping voltage VLT , vst will transi-tion to −Vss and the capacitor will start discharging and vo will increase.
DRAFT
162 CHAPTER 7. BASICS ON OSCILLATORS
When vo will reach the high trip voltage VHT then vst will go back to+Vssand the cycle will repeat again over and over, generating a triangularwave.
Let’s now figure out the period of the triangular waveform by findingout the time to charge and discharge the capacitor. If vst is at +Vss, then vo
will go from VHT down to VLT with a slope Vss/RC. From Figure 7.10 wecan easily se that
VLT − VHT
T1= −Vss
RC, and T1 = RC
VHT − VLT
Vss
Analogously
VHT − VLT
T2=
Vss
RC, and T2 = RC
VHT − VLT
Vss
Replacing the tripping voltages expression
VHT = −VLT =R+
R fVss
we finally obtain the triangular wave period T
T = T1 + T2 = 2RC
R+
R fVss −
(
−R+
R fVss
)
Vss= 4RC
R+
R f.
DRAFT
7.7. RELAXATION OSCILLATORS 163
R+
G−
+
v−v o
t
−Vss
+Vss
vo
tV LT
V HT
vo
vst
T1 T2
R
G−
+
+Vss
f
ss−V
v stR
C
Figure 7.10: Triangular wave form generator made using a Schmitt Triggerand an Op-amp integration stage.
DRAFT
Bibliography
[1] http://www.analog.com/UploadedFiles/Tutorials/450968421DDS_Tutorial_rev12-2-99.pdf
[2] Microelectronics, Jacob Millman, and Arvin Grabel , Mac-Graw Hill
165
DRAFT
Chapter 8
Phase Locked Loop (PLL)
A phase locked loop PLL1 is a circuit with a feedback network that syn-chronizes an oscillator, the reference oscillator (REF), to another oscillator,the controlled oscillator (CO), so that they will oscillate (be locked together)at the same frequency.
VoltageControlledOscillatorDetector
Phase InputOutput
Phase LockedLoop
vlp
vivovph
Filter
Figure 8.1: Phase-Locked loop block diagram.
To implement a PLL we need a circuit that generates a signal propor-tional to the phase difference between the REF and the CO. This continu-ously changing signal is then used to correct the frequency of the CO to bethe same of the REF. In fact, if the phase difference is constant or zero thetwo oscillators must have the same frequency. In other words, keeping thephase difference constant makes the oscillator frequencies the same.
1It seems that the first phase locked loop was proposed by the French scientist DeBelleseize in 1932.
167
DRAFT
168 CHAPTER 8. PHASE LOCKED LOOP (PLL)
vlp
C
vmixv1
v2
R
Figure 8.2: Mixer Phase-Detector and low-pass filter. The two cascadedcircuits produce the error signal to be sent to the VCO.
Another way to see this is that the time variation of phase is propor-tional to the frequency difference between the oscillators, and therefore thephase difference is the signal we need to correct the change of frequencybetween the two oscillators.
Let’s look the at Figure 8.1 containing the block diagram of a basic PLL.The reference signal from REF is sent to the PLL input, goes into the phasedetector, which gives a signal proportional to the phase difference betweenthe CO and the reference. This signal has high frequency noise and in gen-eral needs to be low pass filtered and compensated. Then, the filtered sig-nal goes to the voltage controlled oscillator (VCO). The VCO, the core of thePLL, has a circuit to control the frequency by changing its voltage input.This input is therefore driven with a voltage with the proper sign to zerothe phase difference between the reference frequency and the CO.
8.1 Phase Locked Loop Basic Analysis
TBD
8.2 Phase Detector
Phase detectors convert the phase difference between two signals into asignal proportional to the phase difference.
Phase detectors can be classified into two types. Type I phase detectorsare designed to be driven by analog signals, whereas Type II are driven bydigital signal and in particular by the transitions/edges of such signals.
DRAFT
8.2. PHASE DETECTOR 169
8.2.1 Analog Mixer Phase Detector
The analog mixer is a device that ideally multiplies two arbitrary signals.If the two signals are simple sinusoids with the same frequency and dif-ferent phase, the output can be decomposed into two components. If thetwo input signals are
v1 = V1 sin (ωt) ,v2 = V2 sin (ωt + δφ0) ,
then after some algebra, the multiplied signal vmix (the mixer output) willbe
vmix = v1 v2 =12
V1V2 sin (δφ0) +12
V1V2 sin (2ωt + δφ0) .
The output of the mixer is therefore a signal proportional to the phasedifference of the two sinusoidal signals plus another component propor-tional to a sinusoid at twice the frequency of v1or v2. Applying an ap-propriate low pass filter, we can remove the two omega component andfinally get our wished phase difference detector.
8.2.2 Logic Gate Phase Detector
Another basic type I phase detector, a XOR logic gate with a low-pass fil-ter, is shown in Figure 8.3 together with the time plots of the circuit volt-ages, and the phase detector characteristic. As shown in the time plots, theXOR pulses output vxor have a duration of the time difference ∆T betweenthe two same period T input square waves v1 and v2 . Those pulses arethen integrated by the low pass filter whose ouput vl p will be on averageproportional to ∆T and therefore to the phase difference ∆φ between thesquare waves v1 and v2.
Let’s find the phase detector characteristic of the XOR PD. If there is notime difference and the capacitor is not charged then vl p is zero. As soon atime difference appears, the capacitor will charge and vl p will increase. Ifwe keep increasing ∆T, vl p will reach a maximum when v1and v2 are offby T/2 because vxor is always on. Then, if we keep increasing even fur-ther ∆T, the capacitor will start discharging and vl p will decrease and willeventually reach zero. By continuing to increase ∆T, this cicle will repeatproducing a triagular plot as shown in the phase detector characteristic ofFigure 8.3.
DRAFT
170 CHAPTER 8. PHASE LOCKED LOOP (PLL)
t
t
t
t
v1
v2
vxor
vlp
vxor
v2
v1
vlp
C
R
vlp
XOR
π 2π 3π
Average
∆φ0
Figure 8.3: Phase-Detector and low-pass filter. The two cascaded circuitsproduce the error signal proportional to the phase difference which is thensent to the VCO.
8.3 Voltage Controlled Oscillator (VCO)
As we already said before, a voltage controlled oscillator is an oscillatorwhose frequency can be controlled by changing the circuit voltage input.The circuit shown in Figure 8.4 shows how to implement such a circuit us-ing an analog multiplier and the triangular waveform generator explainedin chapter7.
Looking at the VCO circuit, we see that effect of the analog multiplierplaced at the output of the Schmitt Trigger is simply to change the gain ofthe output vst by a factor vi/VR and therefore the wave slopes by the samefactor. As a consequence, the wave period will change. Considering this
DRAFT
8.4. VARACTORS OR VARYCAP 171
R+
G−
+
v−v o
v i
v st
R
G−
+
+Vss
f
ss−V
R
C
Figure 8.4: Voltage Controlled Oscillator (VCO) circuit built using the tri-angular waveform generator explained in chapter7.
scaling factor, the frequency of the triangular waveform is then
ν (vi) =1
4RC
R f
R+
vi
VR. (8.1)
8.4 Varactors or Varycap
A varactor diode or varycap is a voltage controlled capacitance. It is essen-tially a reverse biased p-n junction whose capacitance increases if the re-verse bias decreases.
Intuitively, a reverse biased p-n junction is a capacitor with the deple-tion region acting as an insulator. Increasing the reverse bias the p-n deple-tion region increases and therefore the capacitance decreases. The majordifference between a varactor and a diode is that the varactor is optimizedto be a variable capacitance (as much as the technology allows) controlledwith a bias.
Typical values are from tens to hundreds of picofarads. Because thesmall variation of capacitance available they cannot be effectively used atlow frequency.
Varactors commonly available are the Motorola’s MVAM115, and thePhillips BB112, BB212, BB204.
DRAFT
172 CHAPTER 8. PHASE LOCKED LOOP (PLL)
8.5 CMOS 4046 PLL Circuit
The CMOS 4046 PLL is an integrated circuit which implements a VCOand two PDs and some extra circuits to simplify the construction of a PLLcircuit.
The VCO frequency range is set with the components R1, R2, and C1.Resistor R1 and capacitor C1 values set the maximum frequency fmax ofthe VCO. Resistor R2 and Capacitor C1 set an optional frequency offsetfmin. The values limitations are:
• 5kΩ ≤ R1 ≤ 1MΩ
• R2 ≤ 1MΩ
• C1 ≥ 100pF, 5V ≤ VDD < 10V
• C1 ≥ 50pF, 10V ≤ VDD < 20V
VCO input has a very high input impedance which allows us to use a widerange of values for the capacitor C and the resistor R for the low-pass filtercircuit.
8.6 Pre-lab Problems
• Derive equ. 8.1 using the analysis done in chapter 7.
• Considering that VR = 10 V, and a max VCO input voltage vi = 5 V,determine the values of R+, R f , R and C to set the VCO frequencybetween 0 Hz and 10 kHz.
• Sketch a complete PLL circuit using the VCO circuit reported in sec-tion 8.3 and the mixer phase detector reported in section 8.2.1. Usethe square wave output of the VCO to close the phase locked loop.
• Considering that the mixer has differential inputs, modify your pre-vious sketch by adding a circuit to the VCO input that allows theoscillator to oscillate at 5 kHz frequency (free runnning frequency)when the the PLL input is disconnected. Use the VCO componentsvalues computed in the previous exercise.
DRAFT
8.6. PRE-LAB PROBLEMS 173
C1
R1
R2
vi
vo
VDD
R
C
vlp
vVCO
6
7
11
12 SIMPLIFIEDCD4046B
3
2
8
1614
4
XOR
VCO
PD
9
Figure 8.5: Simplified circuitry of the CMOS 4046 with components to setthe VCO frequency range and the low-pass circuit compensating circuit.
DRAFT
174 CHAPTER 8. PHASE LOCKED LOOP (PLL)
vVCOvminvmax
fVCO
fmax
fc
fmin
VDD
VDD
2
Figure 8.6: VCO characteristic of the CMOS 4046 .
• Determine the value of the mixer low-pass filter components R, C,for a cut-off frequency of 1 kHz.
DRAFT
Bibliography
[1] William F. Egan, Phase-Lock Basics, Wiley-Interscience, 1998.
[2] Floyd Gardner, Phaselock Techniques - Third Edition,Wiley-Interscience, 2005.
175
DRAFT
Chapter 9
Final Project, Some UsefulCircuits
This appendix is a collection of practical consideration, suggestions, anduseful simple circuits to be used with transducers that can help you build-ing your final project.
9.1 Solderless Breadboard
The figure below shows the circuit breadboard contacts topology and sug-gested power supply connections.
5 10 15 20 25 30 35 40 45 50 55 60
E
CBA
D
YZ
GN
D
−15V
+15V
J
H
F
I
G
XW
TRENCH
IC
Here some rules and guidance to follow when assembling a circuit us-ing a solderless breadboard
177
DRAFT
178 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
• Wires gauge AWG 24 must be used.
• Do not force thick leads into the board holes connections. Leads fitmust be somehow loose to allow the spring loaded contact to workproperly.
• Green jacket wires should be used to connect components to ground(GND), red jacket wires for +15 V, and black jacket wires for −15 V.A different color should be used for feedback connections.
• Component’s leads should be cut short to place the components asclose as possible to the board.
• ICs must be placed on and along the trench otherwise opposite onside IC’s pins will be short circuited.
• Always double check power supply connections to avoid damagingor more likely destroying ICs components.
This type of pragmatism will minimize the number of surprises you willhave building your circuit and also will help you debug your circuit.
9.2 Decoupling/Bypassing Capacitor
Decoupling or bypassing capacitors are capacitor placed between the ICspower supply inputs and ground to filter out (decouple) noise comingfrom the power supply lines.
We can somehow distinguish two type of noise:
• transient noise due to fluctuation of the voltages generated by sud-den increase of current demanded by the ICs,
• broad band or high frequency noise either random or constant witha given frequency spectrum.
Large capacitors acting as a current reservoir are needed to compensatefor voltage transients, and small capacitor are required for high frequencynoise filtering.
A typical value for high frequency noise decoupling capacitors is 100 nF.These capacitors should be placed very close to the ICs power supply in-puts to avoid the inductive effects of long electric connections. The faster
DRAFT
9.3. VARIABLE RESISTORS 179
the IC circuitry is the more important the decoupling becomes especiallyfor high frequency noise. For transient noise, much larger capacitor withvalues, between 1 µF to 10 µF, are necessary to provide some kind of "cur-rent reservoir". Apart from special cases, they can be placed somewherein the circuit board. Usually, decent off the shelf power supplies alreadyinclude those capacitors.
A very extensive source of information about decoupling capacitor isfound in the bibliography.
9.3 Variable Resistors
It is good practice to place potentiometer to set amplifier gains, match re-sistor pairs, or in circuits to null voltage offset or set the proper voltagedivider outputs. Variable resistors come in so many flavors that it is timeconsuming to choose the right components. For the project purpose, it isconvenient to use at least 10 turn trimmers potentiometers with up rightwiper screw, which are compact and fit reasonably well onto the solderlessbreadboard. As shown in the figure below, trimmers should be placed inseries with a resistor every time one needs to limit the current to a maxi-mum . The figure also shows where usually the wiper (B) is located.
R
Rx
Vi
Vo
WiperWiper
9.4 Surface Mount Devices
Due the absence of leads, Surface Mount Devices (SMD) cannot be eas-ily used with solderless prototyping boards. Adapters, which permits to
DRAFT
180 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
solder SMDs onto a small printed circuit boards with legs, can be used toproperly wire these type components on the solderless board.
There is a plethora of SMD standards such as Small Outline IntegratedCircuit (SOIC), mini-SOIC, Small Outline Package (SOP), Shrink SOP (SSOP)Thin SSOP (TSSOP), et. cetera. Each standard differs by ICs dimensions(especially the footprint) and distance between leads. Some of them haveso small packages that it is practically impossible to solder ICs withoutexpressely made tooling.
Soldering SOIC components on PCBs is somehow a quite simple op-eration once done two or three times. SOIC leads are about 1.3 mm apartand therefore small an narrow solder iron tips allow to solder each leadat a time. Smaller packaging are quite difficult to solder and because oftheir small size, it is easy to damage the ICs if overheated. Consult thedata-sheet before soldering SMDs on adapters to check how long the com-ponent can withstand the maximum temperature. SOIC adapters with 8pin connection are available in the laboratory.
9.5 Switches
Switching circuits to drive high power load are shown in the figure below
R
15kΩ
D0R
1k−3.3kΩ
D0
D1
Vcc
D1
Vcc
Load
N−MOSFET
Load
BJT
The diode D0at the input is necessary in case the switch input can golower than zero volts. The diode in parallel with the load is necessary if theload is inductive to damp over-currents generated when the load switchstatus. Typical inductive load are relays whose large inductance valuescome from the relay’s solenoid.
DRAFT
9.6. VOICE COIL LOUD-SPEAKERS DRIVER 181
9.6 Voice Coil Loud-speakers Driver
Voice coil loud-speakers are transducers with a quite low input impedance,usually of 4 Ω or 8 Ω and few to several watts of power consumption. Theytherefore need quite some current to be properly driven. For our purposes(unless the project is to make a very powerful speaker) a 50 mW to 100 mWspeaker for the mid-range acoustic frequencies is more than sufficient.
Usually, because Op-Amps can provide no more than few milliamperes,they cannot drive a speaker directly. A current booster such as the push-pull amplifier with BJTs able to dissipate about 0.5 W, which can increasethe current by a factor 10 to 100 easily, can drive a small speaker in themid-range acoustic frequencies. It is fundamental to limit the current toensure that the transistor power rating are not exceeded. The circuit be-low includes the resistor necessary to limit the current flowing throughthe BJTs which needs to be calculated based on the power supply voltageVCC and the rms dissipation Prms the transistors can sustain. Resistors Rpower dissipation must be also computed .
RL
vAG
−
+
vo
v−
v+
R
−Vcc
R
Vcc
1R
vi
R0
1Q
1Q
Heat-sinks should be placed on the BJTs to ensure that the amplifierworks reliably.
DRAFT
182 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
9.6.1 Off the shelf Audio Amplifiers
ICs power audio amplifier suitable to power small speakers (~1 Wspeakers)are for example the LM380 and the LM386. Heat sink should be used withthose off the shelf audio anplifiers.
9.7 Microphones
A simple condenser (capacitor) microphone can be used as a transducerto convert audio waves into a current. A condenser microphone exploitsthe change in capacitance caused by sound waves modulating the distanceof the capacitor plates. This change corresponds to a charge variation ofthe capacitor which generates a current proportional to the sound waveintensity. A voltage bias is required to charge the capacitor otherwise therewould not be a capacitance to be modulated by the sound waves. Usuallyone capacitorŽs plate is a stiff conductor and the other is a light smallconducting membrane under tension which can absorb the sound waveenergy and vibrate.
Electret microphones are condenser microphones with a so called elec-tret material as dielectric which has an intrinsic electric field analogouslyto permanent magnet and its magnetic field. The electric field generatesa capacitance without the need of a bias voltage as in a conventional con-denser microphone. A n-channel JFET connected as show in the figurebelow "hide" the capacitive load of the electret microphone.
0Q
R
C−
0V+
VoVo
VDD
R
VDD
−
Mic.
Mic.
++
−
DRAFT
9.7. MICROPHONES 183
The following basic preamplifier circuit can be used to amplify theweak microphone signal to further conditioning.
C
VCC
G−
+
Rf
Cf
100pF
100kΩ
R2
3.3kΩ
R1
6.8kΩ
+
10µF
15 V
+
−
AOM−4544P−2Mic.
The voltage divider resistors R1 and R2 set the positive bias voltage forthe condenser microphone to the required level specified by the transducercharacteristics. It also sets the maximum current that the transducer willdrain. The capacitor C bypass the DC component which is too large tobe amplified. The capacitor value should be such that the high pass cut-off frequency is about 20 Hz. Electrolytic capacitor can be used becauseof the microphone positive bias and therefore even large values such as10 µF can be easily used. The capacitor C f adds a pole at high frequencyto filter out high frequency oscillations and noise. The low-pass cut-offfrequency should be at about 15 kHz. Between the poles, the invertingamplifier gain is set as usual by the ratio R f /R and should probably bequite large, between 50 to 100 depending on the microphone used. Theamplifier transfer function is
H (jω) = −R f
R
jωRC
1 + jωRC
11 + jωR f C f
, R =R1R2
R1 + R2.
The electret condenser microphone available in the lab has followingcharacteristics
• Part #: AOM-4544P-2-R
• Directivity: Omnidirectional
DRAFT
184 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
• Sensitivity: -44dB
• Frequency Response: from 20 Hz to 20 kHz,
• Max supply voltage Max: 10 V
• Max drain current : 500 µA
• Impedance: R (source impedance of microphone and bias, see schematic)
• Pin-out:
(+) (−)
It is worthwhile to notice that a speaker can be used as a microphoneas well. In fact, vibrations induced by the sound waves on the speakermembrane will move the solenoid respect to the permanent magnet. Therelative velocity between solenoid and magnet will induce a current in thesolenoid proportional to the sound wave intensity. Dynamic microphoneshave essentially the same topology of a speaker and do not require a biasvoltage as condenser microphones do.
9.8 Phototransistors
A common type of phototransistor is the photo-BJT whose base region isenlarged compared to standard BJT and has the base exposed such thatlight can be absorbed to generate a photocurrent. Photo-BJTs can eitherhave two leads , Collector and Emitter leads or all the three BJT leads.
The circuit below is the simplest configuration that can be used to havea photo-BJT working as switch or an amplifier driven by a light source.The operation mode depends on the value of the load RL that sets thecurrent ICC. For the circuit to work as a switch or as an amplifier, we need
DRAFT
9.9. PHOTODIODES 185
to either keep the transistor working on the saturated or the active modewhen light is impinging on the transistor, and therefore
VCC = RL IC ⇒ Switch
VCC > RL I(max)C ⇒ Amplifier
Vo
VCC
RL
RC
Usually, because of their faster response and lower noise, photodiodeswork better as transducer to convert light power into voltage. With mod-ulated light, photodiodes should be therefore preferred.
9.9 Photodiodes
Photodiodes are essentially semiconductor junctions which generate a cur-rent (photocurrent) when exposed to light. They are therefore used to mea-sure light intensity. The equivalent photodiode circuit is show below.
D Rp
Rs
CjVD Vo
IoID
Vo
Io
A
K
Pi
Iph
K
A
DRAFT
186 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
Note the opposite direction of the photocurrent Iph and the forwardbiased diode current ID.
• Iph: photocurrent proportional to the amount of incident light ofpower P on the photodiode active surface, i.e.
Iph = −α (λ) P ,
where α depends on the light wavelength λ.
• ID: diode PN junction current
ID = Is
(
e−qVD/KBT − 1)
.
The saturation current is usually called dark current, i.e. current withno incident light.
• Rp: shunt resistance (in parallel.)
• Rs: series resistance.
• Cj: capacitance due to the PN junction. The smaller the N dopedactive region surface, the smaller is the capacitance.
The I-V characteristic of the photodiode for different values of incidentpower is qualitatively shown in the figure below. Note how the input dy-namic range where the response is linear increases when the photodiodeis reverse biased.
DV
ID
3Pi
2Pi
Pi
oV
oV
0
DRAFT
9.9. PHOTODIODES 187
Fast and low noise photodiodes are hard to build and it is even harderin case of high power application. Ultra fast photodiodes can have anactive area of about less than 100 µm2 and bandwidth of 25 GHz. Typicalsemiconductor substrate for visible light are Silicon (Si) and for infraredlight Indium-Gallium-Arsenide (InGaAs).
9.9.1 Photovoltaic Mode
In this mode, the photodiode works thanks to the photovoltaic effect. Someof the electron-hole pairs generated by incident photons do not give uptheir energy as in a metal or are complectely extracted from the solid inthe photoelectric effect. They just stay inside the semiconductor with en-ergy in the conduction band of the semiconductor. These pairs then buildup generating a charge distribution and therefore an electric field that fi-nally produces the photocurrent.
As shown in the figure below, the photocurrent is measured as a volt-age drop across a load or is transformed into a voltage with a transimpedanceamplifier.
−
+
Vo
Vo
D
Rf
R >> R p
Major advantages of this configuration:
• Smaller dark current ⇒ low current noise.
• linear output because smaller dark current.
• accurate voltage response.
Major disadvantage:
• slow response. The Cj in parallel to the current generator low passfilter the signal.
DRAFT
188 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS
9.9.2 Photocurrent Mode
In this mode, the generated photocurrent is collected by the revers biasvoltage applied across the photodiode. As shown in the figure below,apart from having the photodiode reverse biased with −VDD the circuitsare the same as the photovoltaic mode circuits.
−
+
−VDD
Rf
Vo
−VDD
R D
Cf
Major advantages of this configuration:
• Fast response. The reverse voltage bias −VDD reduces the junctiondepletion region and therefore the junction capacitance.
Major disadvantages:
• larger dark current than the unbiased photodiode.
• small OpAmp current bias amplified by the transimpedance.
Consult [3, 4] for more detailed information.
9.10 Ultrasonic Transceivers
TBD
9.11 Velocity Sensors
TBD
DRAFT
Bibliography
[1] Semiconductor Packaging Information by Type, Texas Instruments,http://www.ti.com/sc/docs/psheets/type/type.html
[2] Decoupling Techniques, MT-101 Tutorial, Analog Devices,www.analog.com/static/imported-files/tutorials/MT-101.pdf
[3] Photodiode Technical Information - Hamamatsu Photonics,http://sales.hamamatsu.com/assets/applications/SSD/photodiode_technical_information.pdf
[4] Characteristics and use of infrared detectors, Hamamatsu Photonics,http://sales.hamamatsu.com/assets/applications/SSD/infrared_kird9001e04.pdf
191
DRAFT
Appendix A
Decibels
A.1 Definition of Bel and Decibel
The bel1 is defined as the logarithm in base ten of a power P normalizedto a reference power Pr , i.e.
X B = log10P
Pr. (A.1)
The decibel is 10 bels
X dB = 10 X B = 10 log10P
Pr. (A.2)
Bels and decibels are dimensionless. The bel is not a unit, but a formulato conveniently scale homogeneous quantities thanks to the properties ofthe logarithmic function.
Bels are not commonly used because if we consider integer values ofbels they do not provide a good resolution. We will just consider decibelsfor the remainder of this notes.
Considering that
P =V2
|Z| = |Z| I2,
and supposing that we use the same reference impedance magnitude |Zr|1The units scale "bell" was name after Alexandre Graham Bell, scientist and inventor.
193
DRAFT
194 APPENDIX A. DECIBELS
for P, and Pr,we can rewrite equ. (A.2) as
X dB = 20 log10V
Vr= 20 log10
I
Ir,
where Vr, and Ir are respectively the voltage and the current across thereference impedance |Zr|. In other words, we have to measure the voltageor the currents across equal impedances, to get the decibels.
A.2 Generalization of the Use of Decibel
For practical purposes, the decibel is also used to report the ratio of anyhomogeneous quantities such as the voltage output Vo over the voltageinput Vi of a two port network, or in general, the ratio of any kind ofhomogeneous quantities x1, x2
X dB = 20 log10x1
x2.
In this case there is no normalization respect to a reference load Rr orpower Pr.
A.3 Useful Table and Properties
The next table is quite useful to easily translate decibels into magnitude
[dB] 0 1 2 3 4 5 6 7 8 9 10
Magnitude 1 1.1 1.2 1.4 1.6 1.8 2 2.2 2.5 2.8 3.2
For convenience, letŽs rewrite some useful properties of the logarithmfunction
log(x y) = log x + log y,log(x/y) = log x − log y,
log xn = n log x,loga x = logb x/ logb a.
DRAFT
A.4. STANDARD POWER REFERENCES 195
A.4 Standard Power References
Decibels comes in many flavors (different reference powers) depending onthe application, radio frequency, microwaves, optics, acoustics, et cetera.
For example the following definition is quite often used
X dBm(Rr) = 10 log10V2/R
1mW
The value of Rr depends on the application field
Rr [Ω]
Radio Frequency 50TV Frequencies 75
Audio Frequencies 600
DRAFT
Appendix B
Resistor Color Code
Nominal values of resistances are coded using colors bands around theresistors (see figure below). The bands identify digits and the exponentin base ten for the resistance value and the tolerance as explained in thefollowing table:
Band 1 2 3 4 5Number (Tolerance band)3 Bands Digit Digit Exponent Always 20%4 Bands Digit Digit Exponent Tolerance5 Bands Digit Digit Exponent Tolerance Tolerance after
1000 hours
3 Band resistors have no band for the tolerance because it is assumed tobe 20% of the nominal values.The fifth band is not an industry standard,but quite often it means the tolerance after 1000 hours of continuous use.
A B C D
R = AB · 10C, ∆R = R · D
The bands are counted from left to right. The following table reportsthe coding of the values using colors and a mnemonic sentence to remem-ber the color code table.
197
DRAFT
198 APPENDIX B. RESISTOR COLOR CODE
Mnemonic Color Exponent Tolerance Tolerance (%)Sentence (%) 5th BandBig Black 0 20Bart Brown 1 1 1%Rides Red 2 2 0.1%Over Orange 3 0.01%Your Yellow 4 0.001%Grave Green 5Blasting Blue 6Violent Violet 7Guns Gray 8Wildly. White 9Go Gold -1 5Shoot (him?) Silver -2 10
For example, the nominal resistance of a 4 band resistor having thesequence brown, black, orange and gold is
Rnom. = 10 kΩ
⇒ Rnom. = (10.0 ± 0.5) kΩ
∆Rnom. = 5%10 kΩ
Resistor size (volume) is related to the power dissipation capability. Typi-cal used values are 1/8W, 1/4W, 1/2W, 1W.
DRAFT
Appendix C
The Cathode Ray TubeOscilloscope
Every time we need to analyze or measure an electronic signal in the timedomain we will probably use some type of oscilloscope. The oscilloscopeis therefore one of the most useful tools used in a laboratory. Practically, itis an indispensable instrument for measuring, designing, manufacturing,or repairing electronic equipment.
Quite often, one can still find old Cathode Ray Tube (CRT) oscillo-scopes even in modern laboratory, mainly because of the inadequacy ofstate of the art digital oscilloscope scopes to represent very fast signals. Itis therefore worthwhile to study this device and understand how a CRTworks and also its limitations.
C.1 The Cathode Ray Tube Oscilloscope
The cathode ray tube oscilloscope is essentially an analog1 instrument that isable to measure time varying electric signals. It is made of the followingfunctional parts (see figure C.1):
• the cathode ray tube (CRT),
• the trigger,
1Hybrid instruments combining the characteristics of digital and analog oscilloscopes,with a CRT, are also commercially available.
199
DRAFT
200 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
• the horizontal input,
• the vertical input,
• time base generator.
Let’s study in more detail each component of the oscilloscope.
C.1.1 The Cathode Ray Tube
The CRT is a vacuum envelope hosting a device called an electron gun ,capable of producing an electron beam, whose transverse position can bemodulated by two electric signals (see figures C.1 and C.7).
When the electron gun cathode is heated by wire resistance becauseof the Joule effect it emits electrons . The increasing voltage differencesbetween a set of shaped anodes and the cathode accelerates electrons to aterminal velocity v0 creating the so called electron beam.
The beam then goes through two orthogonally mounted pairs of metal-lic plates. Applying voltage difference to those plates Vx and Vy, the beamis deflected along two orthogonal directions (x and y ) perpendicular toits direction z. The deflected electrons will hit a plane screen perpendicu-lar to the beam and coated with florescent layer. The electrons interactionwith this layer generates photons, making the beam position visible on thescreen.
C.1.2 The Horizontal and Vertical Inputs
The vertical and horizontal plates are independently driven by a variablegain amplifier to adapt the signals vx(t), and vy(t) to the screen range. ADC offset can be added to each input to position the signals on the screen.These two channels used to drive the signals to the plates signals are calledhorizontal and vertical inputs of the oscilloscope.
In this configuration the oscilloscope is an x-y plotter.
C.1.3 The Time base Generator
If we apply a sawtooth signal Vx(t) = αt to the horizontal input, the hori-zontal screen axis will be proportional to time t. In this case a signal vy(t)
DRAFT
C.1. THE CATHODE RAY TUBE OSCILLOSCOPE 201
RampGenerator
CATODE RAY TUBE (CRT)
Line(60Hz)
External
Internal
s/div
TIME BASE GENERATORTRIGGER
Source Level
V/div
Preamplifier Amplifier
INPUT CHANNEL
Figure C.1: Sketch of the functional parts of the analog oscilloscope,preamplifier, amplifier, trigger, time base generator, and CRT.
DRAFT
202 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
applied to the vertical input, will depict on the oscilloscope screen the sig-nal time evolution.
The internal ramp signal is generated by the instrument with an am-plification stage that allows changes in the gain factor α and the intervalof time shown on the screen. This amplification stage and the ramp gen-erator are called the time base generator.
In this configuration, the horizontal input is used as a second indepen-dent vertical input, allowing the plot of the time evolution of two signals.
Visualization of signal time evolution is the most common use of anoscilloscope.
v (t)y
Sawtoothsignal
t
t
t
T T
Trigger
Signal
Figure C.2: Periodic Signal triggering. The second trigger is ignored be-cause the ramp is still of the sawtooth signal is still increasing to its maxi-mum αT.
C.1.4 The Trigger
To study a periodic signal v(t) with the oscilloscope, it is necessary to syn-chronize the horizontal ramp Vx = αt with the signal to obtain a steadyplot of the periodic signal. The trigger is the electronic circuit which pro-vides this function. Let’s qualitatively explain its behavior.
The trigger circuit compares v(t) with a constant value and producesa pulse every time the two values are equal and the signal has a given
DRAFT
C.2. OSCILLOSCOPE INPUT IMPEDANCE 203
−
+Cs Rs
C
AmplifierHigh Voltage
Deflection Plates
Pre−Amplifier
AC
GND
DCInput
Figure C.3: Oscilloscope input impedance representation using ideal com-ponents (gray box). Input channel coupling is also shown.
slope. The first pulse triggers the start of the sawtooth signal of period2 T, which will linearly increase until it reaches the value V = αT, and thenis reset to zero. During this time, the pulses are ignored and the signalv(t) is plotted for a duration time T. After this time, the next pulse thattriggers the sawtooth signal will happen for the same previous value andslope sign of v(t), and the same portion of the signal will be re-plotted onthe screen.
C.2 Oscilloscope Input Impedance
A good approximation of the input impedance of the oscilloscope is shownin the circuit of figure C.3. The different input coupling modes ( DC ACGND ) are also represented in the circuit.
The amplifying stage is modeled using an ideal amplifier (infinite in-put impedance) with a resistor and a capacitor in parallel to the amplifierinput.
The switch allows to ground the amplifier input and indeed to verti-cally set the origin of the input signal (GND position), to directly couplethe input signal (DC position), or to mainly remove the DC component ofthe input signal (AC position).
2In general, the sawtooth signal period T and the period of v(t) are not equal.
DRAFT
204 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
C.3 Oscilloscope Probe
An oscilloscope probe is a device specifically designed to minimize the ca-pacitive load and maximize the resistive load added when the instrumentis connected to the circuit. The price to pay is an attenuation of the signalthat reaches the oscilloscope input3.
Let’s analyze the behavior of a passive probe. Figure C.4 shows theequivalent circuit of a passive probe and of the input stage of an oscillo-scope. The capacitance of the probe cable can be considered included inCs.
Cp
Rp
CableCoaxial
Cs
Vs
Rs
Oscilloscope Input Stage
Rp
Rs
Vi
Cp
Cs
Vs
Probe
Probe Tip
GND Clip
BA
Figure C.4: Oscilloscope input stage and passive probe schematics.Theequivalent circuit made of ideal components for the probe shielded cableis not shown.
Considering the voltage divider equation, we have
H(jω) =Vs
Vi=
Zs
Zp + Zs, (C.1)
where1
Zs= jωCs +
1Rs
,1
Zp= jωCp +
1Rp
,
and then
Zs =Rs
jωτs + 1, Zp =
Rp
jωτp + 1.
3Active probes can partially avoid this problems by amplifying the signal.
DRAFT
C.3. OSCILLOSCOPE PROBE 205
Defining the following parameters
τp = CpRp, α =Rs
Rs + Rp, β =
Cp
Cs + Cp,
and after some tedious algebra, equation (C.1) becomes
H(jω) = α1 + jωτp
1 + jω αβ τp
,
which is the transfer function from the probe input to the oscilloscope be-fore the ideal amplification stage.
The DC and high frequency gain of the transfer function H(jω) arerespectively
H(0) = α, H(∞) = β.
The numerator and denominator of H(jω) are respectively equal tozero, (the zeros and poles of H) when
ω = ωz = j1τp
, ω = ωp = jβ
α
1τp
.
Figure C.5 shows the qualitative behavior of H for αβ > 1.
C.3.1 Probe Frequency Compensation
By tuning the variable capacitor Cp of the probe, we can have three possi-ble cases
α
β< 1 ⇒ over-compensation
α
β= 1 ⇒ compensation
α
β> 1 ⇒ under-compensation
if α < β the transfer function attenuates more at frequencies above ωz,and the input signal Vi is distorted.
if α = β the transfer function is constant and the input signal Viwill beundistorted and attenuated by a factor α.
DRAFT
206 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
Frequency
Pha
seM
agni
tude
ω ω2
β
1
α
Figure C.5: Qualitative transfer function from the under compensatedprobe input to the oscilloscope before the ideal amplification stage. Asusual, the oscilloscope input is described having an impedance Rs||Cs.
if α > β the transfer function attenuates more at frequencies below ωp
and the input signal Viis distorted.The ideal case is indeed the compensated case, because we will have
increased the oscilloscope input impedance by a factor α without distort-ing the signal.
The probe compensation can be tuned using a signal able to show aclear distortion when it is filtered. A square wave signal is very usefulin this case because it shows a quite different distortion if the probe isunder or over compensated. Figure C.6 sketches the expected square wavedistortion for the two uncompensated cases.
It is important to notice that if
α
β= 1, ⇒ Rs
Rp=
Cp
Cs,
and this condition implies that:
• the voltage difference V1 across Rs is equal the voltage difference V2across Cs, i.e V1 = V2
DRAFT
C.3. OSCILLOSCOPE PROBE 207
• the voltage difference V3 across Rp is equal the voltage difference V4across Cp , i.e. V3 = V4
• and therefore V1 + V2 = V3 + V4.
This means that no current is flowing through the branch AB when theprobe is compensated, and we can consider just the resistive branch of thecircuit to calculate Vs. Applying the voltage divider equation, we finallyget
Vs =Rs
Rs + RVi
The capacitance of the oscilloscope does not affect the oscilloscope in-put anymore, and the oscilloscope+probe input impedance Ri becomesgreater, i.e.
Ri = Rs + Rp.
t t
VV
Figure C.6: Compensation of a passive probe using a square wave. Leftfigure shows an over compensated probe, where the low frequency con-tent of the signal is attenuated. Right figure shows the under compensatedcase, where the high frequency content is attenuated.
DRAFT
208 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
yV
0v
yE
d D
0V x
h z
eθ
Figure C.7: CRT tube schematics. The electron enters into the electric fieldand makes a parabolic trajectory. After passing the electric field region itwill have a vertical offset and deflection angle θ.
C.4 Beam Trajectory
Let’s consider the electron motion through one pair of plates.The electron terminal velocity v0 coming out from the gun can be easily
calculated considering that its initial potential energy is entirely convertedinto kinetic energy, i.e
12
µv20 = eV0, ⇒ v0 =
√
2eV0
µ,
where µ is the electron mass, e the electron charge, and V0 the voltageapplied to the last anode.
If we apply a voltage Vy to the plates whose distance is h, the electronswill feel a force Fy = eEy due to an electric field
|Ey| =Vy
h.
The equation of dynamics of the electron inside the plates is
µz = 0, ⇒ z = v0,µy = e|Ey|.
DRAFT
C.4. BEAM TRAJECTORY 209
Supposing that Vy is constant, the solution of the equation of motionwill be
z(t) =
√
2eV0
µt,
y(t) =12
eVy
µht2.
Removing the dependency on the time t, we will obtain the electronbeam trajectory , i.e.
y =1
4h
Vy
V0z2,
which is a parabolic trajectory.Considering that the electron is transversely accelerated until z = d,
the total angular deflection θ will be
tan θ =
(
∂y
∂z
)
z=d
=12
d
h
Vy
V0.
and displacement Y on the screen is
Y(Vy) = y(z = d) + tan θD,
i.e.,
Y(Vy) =12
d
h
1V0
(d
2+ D)Vy.
Y is indeed proportional to the voltage applied to the plates through arather complicated proportional factor.
The geometrical and electrical parameters of this proportional factorplay a fundamental role in the resolution of the instrument. In fact, thesmaller the distance h between the plates, or the smaller the gun voltagedrop V0, the larger is the displacement Y. Moreover, Y increases quadrati-cally with the electron beam distance d.
C.4.1 CRT Frequency Limit
The electron transit time through the plates determine the maximum fre-quency that a CRT can plot. In fact, if the transit time τ is much smaller
DRAFT
210 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE
than the period T of the wave form V(t), we have
V(t) ≃ constant, if τ ≪ T,
and the signal is not distorted.The transit time is
τ =d
v0= d
√
µ
2eV0.
Supposing that
V0 = 1kVd = 20mmµc2 ≃ 0.5MeVe = 1eV
⇒ τ ≃ 1ns
DRAFT
Appendix D
Electromagnetic Field Noise
D.1 Introduction
Human and natural activities fill the surrounding space with electromag-netic fields (radiation) creating a very complex and unpredictable frequencyspectrum of radiation. For example, domestic appliances, bulbs, fluores-cent lights, and power line grids mainly irradiate at 60Hz and harmonicsof 60Hz. Radios, televisions, wireless internet connections, and cellularphones networks are other typical sources, which fill the radiation spec-trum from the kilohertz to the gigahertz region. Light mainly produced bythe sun pervades the spectrum in the optical region. Radioactivity, gammaray burst (GRB) emitted by astrophysical sources are for eaxmple respon-sible for filling the high and very high region of the spectrum.
Portion of this so complex spectrum can be attenuated by the so calledelectromagnetic shields but some others portions because of the energyinvolved cannot be effectively even attenuated.
The so called radio frequency noise can be easily attenuated (shielded)using a quite simple device known as the Faraday cage.
D.2 The Faraday Cage
Gauss’s law states that a closed surface will prevent extern electrostaticfields from reaching the space enclosed by the surface. If the electric fieldis slowly varying i.e., its wavelength λ is large compared to the typical sized of the enclosure), then the field on the surface can be considered static
211
DRAFT
212 APPENDIX D. ELECTROMAGNETIC FIELD NOISE
and Gauss’s law is then applicable. This enclosure is commonly calledFaraday cage.
Using this crude approximation we can state that all frequencies muchsmaller than the following
ν∗ ∼ c
d
where c is the speed of light, will be effectively attenuated. For example ifd = 1 m then the Faraday cage will attenuate the external electromagneticfields with frequencies much smaller than ν∗ ∼ 300 MHz.
D.3 Practical Considerations
Normally, when we perform a measurement we cannot easily fit the lab ina small Faraday cage. Anyway, most of the time it is sufficient to enclosethe physical system under measurement inside the cage . Then to performthe measurement we will have to connect the instrument sitting outsidethe cage to the system. The instruments leads acting like an antenna willstill pick-up some of the ambient electromagnetic radiation. This effect canbe amplified if we touch one of the leads increasing the antenna effect. Away to minimize this effect is to connect Faraday cages together. Reason-ably good instruments have a built in Faraday cage connected to ground.Connecting the cages to ground will create a more or less single effectivecage which will attenuate the electromagnetic noise pick-up.
DRAFT
Appendix E
Common Emitter BJT Amplifier
The common emitter BJT amplifier is one of the most simple design thatallows to set the voltage amplification Av quite independently from theBJT characteristics.
RC
RER2
IB
IC
IE
VCEQ Vi
Vo
VCC
Ci
Co
R1
C
B
E
Figure E.1: BJT Common emitter amplifier with coupling capacitors Ci,and Co.
To properly set the BJT working point, we have to forward bias theemitter base junction and reverse bias the collector base junction. But thisis not enough if we want to build an amplifier. The other requirement is toset the voltage VCE where the VCE characteristic is flat and wide enough
213
DRAFT
214 APPENDIX E. COMMON EMITTER BJT AMPLIFIER
R2
R1RC
RE
ICIB
IE
VCC−
+
−
+VCC −
+BE h I
V fe B
CB
E
Figure E.2: Common emitter equivalent circuit which simplifies the BJTbiasing understanding.
to accommodate the output signal excursion. In other words, we donŽtwant the output to swing into the BJT saturation region or into the breakdown region.
The design parameters we have to set are are Av, IC,VCE,VCC, and es-sentially, the VCE characteristics contains all the information we need toproperly bias the BJT. As last remark, voltage gain and bias point are "in-timately" related and cannot be completely independent.
E.1 Amplifier Design
The analysis of the circuit becomes quite easy if we observe from the VCE
characteristic thatIC ≫ IB . (E.1)
Applying KVL to the output mesh, we will have
VCC = RC IC + RE IE + VCC ≃ (RC + RE) IC + VCE (E.2)
If we want to optimize the dynamic range of the amplifier, and neglect-ing the saturation region, we will have to set according to the IC − VCE
characteristicVCE ≃ 1
2VCC
Using this design condition and and voltage gain of this circuit we willhave
RE =1
2 (1 + Av)
VCC
IC
DRAFT
E.2. RESUME 215
This equations together with the gain equation (E.8) set the values RC andRE based only on the design parameters VCC,IC, and Av. Let’s now find thevalues of the voltage divider which forward bias the base-emitter junction.
If IB is negligible, then resistors R1 and R2 act as a simple voltage di-vider, i.e.
VB ≃ R2
R1 + R2VCC . (E.3)
and for KVL
VB = VBE + RE IE ≃ VBE + RE IC
where VBE must be the voltage drop of a forward polarized diode junc-tion, typically between 6.0 V to 0.7 V.
Using the two expressions of VB and after some algebra, we get
R1 ≃ R2
(
VCC
VBE + RE IC− 1)
.
E.2 Resume
Summarizing the results we have for IC ≫ IB
α =1
2 (1 + Av)(E.4)
RE = αVCC
IC(E.5)
RC = AvRE (E.6)
R1 =
(
VCC
VBE + αVCC− 1)
R2 (E.7)
E.3 Example
Let’s set the following design values
Av = 10VCC = 20 VIC = 1 mAR2 = 40 kΩ
⇒
R1 ≃ 452 kΩ
R2 ≃ 40 kΩ
RC ≃ 909 Ω
RE ≃ 91 Ω
DRAFT
216 APPENDIX E. COMMON EMITTER BJT AMPLIFIER
R2
R1RC
RE
ICIB
IB
VoVih I fe B
CB
E
hie
Figure E.3: Small signal circuit model for the common emitter BJT ampli-fier
E.4 Amplifier Gain and Sign
Using the equivalent small signal circuit model for the BJT and consider-ing the impedance of the ideal voltage and current sources we can con-struct the circuit show in figure E.3. Then from that figure it is finally easyto compute the voltage gain Av and the input and output impedance Ri
and Ro of the circuit.In fact, considering that IB ≪ IC, RE ≫ hie, the input and the output
voltage are simply
Vi = (hie + RE) IE ≃ RE IC
Vo = RC IC
,⇒ Av ≃ RC
RE(E.8)
The Common Emitter BJT amplifier is an inverting stage. In fact, con-sidering that
Vo = VCC − (RE + RC) IC ⇒ VCC = Vo + (RE + RC) IC
if IC increases, then Vo must decrease to keep VCC constant. If, we startwith an input current and voltage in phase they will end up being out ofphase by 180 degrees.
E.5 Input and Output Impedance
The input impedance is the impedance seen from the inputs lead , and canbe easily computed considering that the ideal current source is an open
DRAFT
E.6. I/O COUPLING CAPACITORS 217
circuit, i.e.
Ri = R2|| R1|| (hie + Re) .
The output impedance is then
Ro = RC .
E.6 I/O Coupling Capacitors
The coupling capacitors Ci will provide a way to send the input signal toamplifier without perturbing the DC bias of the BJT. Similarly, placing thecapacitor Co to the output will allow to connect a load without perturbingthe DC bias of the BJT circuit.
Coupling capacitance should be selected to minimize the filtering effecton the amplifier response. For example, Ci will create a RC high pass filterwith the R being the input resistance of the amplifier and Co will do thesame with the eventual resistance of the amplifier load.
R1RC
RER2
IB
IC
IE
VCEQ
C
C
Vi
Vo
VCC
C
B
E
Figure E.4: BJT Common emitter amplifier with emitter bypassing capaci-tor.
DRAFT
218 APPENDIX E. COMMON EMITTER BJT AMPLIFIER
E.7 Emitter Bypass Capacitor
Adding a so called bypass capacitor CE in parallel with RE will not changethe DC bias of the BJT and will provide a the maximum possible voltagegain at high frequency as seen in the simple BJT amplifier circuit.
DRAFT
Appendix F
Push-Pull BJT Amplifier
The BJT push-pull current amplifier is an amplifier topology which pro-vides small standing currents, reasonable low distortion, and good effi-ciency. It is therefore quite useful to drive small loads such loudspeakerswhich usually have a few Ohms input impedance.
1Q vo
−Vcc
vi
Vcc
RL1Q
+
−
Figure F.1: Push-pull amplifier using a BJT complementary pair. The gray areahighlights the “pushing” part of the circuit with the transistor Q1, which pushesthe current through the load RL. The other transistor Q1is the circuit “pulling”part that pulls the current through the load.
The etymology of the term “push-pull” dates back to the first vacuumtube amplifiers. It referred to the interpretation that one part of the circuit“pushed” current through a transformer connected to the amplifier outputand the other complementary part “pulled” current from the transformer.
Different push-pull BJT configurations can be found in literature, but
219
DRAFT
220 APPENDIX F. PUSH-PULL BJT AMPLIFIER
VBEVi
vo
vi
VBE−VBE
−VBE
VBE
Vo
−VCC
VCC
v
O tO
Figure F.2: Cross-over distortion. For −I0 < i < I0 the output current i iszero because neither transistors Q1 and Q1 are in conduction.
the basic topology is the two complementary NPN PNP transistors con-nected as show in Figure F.1.
F.1 Push-Pull BJT Configuration
First, let’s consider just half of the BJT push-pull circuit, the one inside thegray area shown in Figure F.1. When the sinusoidal input vi is positiveand greater than VBE but smaller than VCC, the NPN transistor Q1 turnson, i.e. the base-emitter junction is forward biased and the collector-basejunction is reverse biased. The complementary transistor Q1 is in a cut offstate because the base-emitter junctions is reverse biased. Apart from anoffset VBE, the output vo follows the input
vo ≃ vi − VBE VCC > vo > VBE ,
whereVBE ≃ 0.65 V.The previous analysis can be repeated for the negative portion of the
sinusoid just considering that transistor Q1 is now in its cut off mode, andQ1is on. We will have then
vo ≃ vi + VBE − VCC < vo < −VBE ,
DRAFT
F.2. DISSIPATION AND EFFICIENCY 221
RL
Vcc
vAG
−
+vi
vo
v−
v+
−Vcc
1Q
1Q
Figure F.3: Push-pull amplifier using an Op-Amp to minimize crossoverdistortion.
Figure F.2 shows the input and output signal of the circuit, and clearly thedistortion produced by of this type of circuit. This signal distortion, calledcross-over distortion, can be effectively minimized with some changes to thecircuit.
Figure F.3 a more complex and a little more costly but quite effectiveway to minimize the cross-over distortion. In this case, the ideal OpAmpeliminates the cross-over distortion thanks to the feedback from the circuitoutput to the OpAmp negative input. In fact, because the OpAmp willhave to keep its input difference v+ − v− to zero it will have to compen-sate for all the difference between the push-pull circuit output and vi. Thecorrection will show up at the OpAmp output vA and therefore at vo elim-inating the cross-over distortion. As usual, limitations of real OpAmpsand in particular bandwidth limitation make the correction more or lesseffective.
F.2 Dissipation and Efficiency
One of the advantages of a push-pull configuration is the low power con-sumption. In fact, considering the ideal case where the amplifier charac-teristics shows zero current when no signal is present, the amplifier doesnot dissipate energy. In real circuits, there are always bias currents flowingthrough but usually they are quite small making power consumption verysmall compared to circuits with biased BJTs.
DRAFT
222 APPENDIX F. PUSH-PULL BJT AMPLIFIER
1000 2000 3000 4000 5000 6000 7000 8000
10−4
10−3
10−2
10−1
100
Frequency [Hz]
Am
plitu
de [
V/s
qrt(
Hz)
]
V(out)(2), df: 6.7Hz, Avgs: 12V(in)(1), df: 6.7Hz, Avgs: 12
Figure F.4: Simulated square-root of the power spectral density of the basicpush-pull circuit input and output. The simulation modeled the 2N2222NPN and the 2N2907 PNP transistors, with a sinusoidal input amplitudeof 10 V and 1 kHz frequency.
F.3 Distortion
We want to evaluate the type of distortion we will have due to the nonideal BJTs base collector current characteristic ( iC versus iB) .
Supposing that the characteristic can be written as a polynomial of theform
iC ≃N
∑k=0
Gkikb .
Then, for a sinusoidiB = IB cos(ωt) ,
and considering that the BJTs collector currents are 180out of phase, wewill have that the collector currents of the two BJTs are
DRAFT
F.3. DISTORTION 223
i1 ≃ IB
N
∑k=0
Gk cosk(kωt)
=N
∑k=1
α2k cos(2kωt) +N
∑k=0
α2k+1 cos [(2k + 1)ωt] ,
i2 ≃ IB
N
∑k=0
Hk cosk(kωt + π)
=N
∑k=1
β2k cos(2kωt) −N
∑k=0
β2k+1 cos [(2k + 1)ωt] .
If the two transistors coefficients are the same (complementary BJTsperfectly matched), then the currents difference cancels the even terms outleaving just the odd terms
αk = βk, k = 1, 2, ..., N ⇒ iL = i1 − i2 = 2N
∑k=0
α2k+1 cos((2k + 1)ωt),
In this case, the amplifier output shows just the odd harmonics. In casethe two transistors are not perfectly matched we will also have the evenharmonics as well.
Figure F.4 shows the power spectra density output computed from asimulation of the basic push-pull circuit of Figure F.1. The simulation usedthe models of a 2N2222 NPN transistor, a 2N2907 PNP transistor and asinusoidal input with 10 V of amplitude and 1 kHz of frequency. Note thatthe input is not an ideal sinusoid. As expected, the plots clearly show alarge difference between the input and the output for the odd harmonics.