SMPS Workshop Guide

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SMPS Design Workshop Design and Analysis of Switched-mode power-supply using new PWM models 1

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pspice simulation

Transcript of SMPS Workshop Guide

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SMPS Design Workshop

Design and Analysis of Switched-mode power-supply using new PWM models

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Introduction: This workshop will show how to use OrCAD technologies for SMPS design. For background on the tools and methodologies used here see PSpicepowersupply_position.pdf found in the zip folder with this guide.

Software Used: • OrCAD Capture • PSpice A/D • PSpice Advanced Analysis Option*

* Note: Advanced Analysis Option is not required for this lab and the sections involving those capabilities can be skipped. If you are interested in evaluating the capabilities provided with Advanced Analysis contact your local sales representative to discuss getting access to these capabilities.

UTable of Contents TUSMPS Design Workshop UT .............................................................................................................................................1 TUIntroduction:UT ................................................................................................................................................................2

TUSoftware Used:UT..........................................................................................................................................................2 TUPrepare your files UT.........................................................................................................................................................3

TUChange profile to idealUT..............................................................................................................................................3 TUCheck the profile and notice the capacitor being sweptUT............................................................................................4 TUOpen the Schematic Window and browse aroundUT ....................................................................................................5

TURun the Simulation and examine the results UT .............................................................................................................9 TUMake a more realistic Coupling model using the Magnetic Parts EditorUT .............................................................13 TUAdd Smoke information to the Transformer library model*UT ................................................................................16

TUCreate a Capture Symbol for this libraryUT ................................................................................................................17 TUCapture, replace the ideal inductors with the modeled deviceUT ................................................................................17 TUVerify the contents of the TFXMR partUT ..................................................................................................................18

TUSimulate the design with the new transformer.UT.......................................................................................................20 TUExamine Measurement Results and AssertionsUT ......................................................................................................20 TUGenerate some checkpoints to save simulation timeUT...............................................................................................21 TUExamine the stresses on the design using Smoke*UT .................................................................................................27

TUView PSpice measurements and create constraints based off themUT ......................................................................29 TUConclusionUT ..................................................................................................................................................................33

TUFor More InformationUT .............................................................................................................................................33

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Prepare your files a. In the downloaded SMPS zip file is a Smps_lab folder. Make sure that folder is

an accessible directory.

b. Open OrCAD Capture (you will want to make sure the product you choose gives you access to PSpice as well)

(your Product Choices may be a bit different than this screenshot),

c. Select File -> Open -> Project and Browse to the folder where you extracted your zip file to. Open the uc1823a.opj file.

Change profile to ideal a. In the upper left hand corner of Capture, change the profile from UC_1823A-sim1

to ideal

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b. This will make the ideal_core Schematic Folder in Capture the active folder, you

can tell it’s now active because it has a little slash through it where the UC_1823A folder was active previously.

c. What you’re doing here is changing the Schematic Folder that is active in PSpice

and will be simulated; additionally the simulation settings are changed by changing the profile.

Check the profile and notice the capacitor being swept a. Open the ideal simulation profile by going to PSpice -> Edit Simulation Profile or

by selecting the icon on the toolbar

b. Select the Parametric Sweep Option and notice that there is a Global Parameter called FB_CAP being swept.

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c. Under the Value list we can see that it’s being swept between two values, 1nf and

2.5nf.

d. Hit OK on this window

Open the Schematic Window and browse around a. In the project open up the ideal_core folder and then the Topidealcore page

(double click on it)

b. Notice cap C12, instead of having a regular capacitor value, it contains a pointer to the FB_CAP parameter that we’re sweeping in the step previous. By doing this, we’re going to see the effects on the PWM by having different values of feedback capacitance.

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c. Scroll down in your schematic and notice part V6, this is the 50V DC voltage

source that we’re attempting to change in to 24V. We’ve added a problem in our line with component V26; this source is going to induce an additional 5V spike onto our 50V source at 600us into our simulation. By adding this, we want to see how our SMPS responds to variations in the supply line.

d. This highlighted section of circuitry is taking our ~50V source and turning it into

AC so we can eventually feed that into our transformer

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e. The transformer in our case is simply modeled and doesn’t model many of the

losses associated with a normal core. This part is the reason that the simulation is labeled as ‘ideal’.

f. It works by using the K8 part as a coupler of the two inductors. If you’d like to

edit the properties of the K8 part you’ll see that there’s a property called L1

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(meaning the 1st inductor coupled) which is pointing to L1 (meaning the part with reference designator L1) and the same for L2 pointing to L2.

g. This section of circuitry using the Diodes (to rectify) and the capacitor (C10) to stabilize is taking the AC waveform out of the transformer and turning it back in to DC, this time, we’re trying to get 24V out. The load of our PS is component R375 which is currently 5 Ohms giving us an output wattage of ~120W

h. Notice the ILIMIT net that’s coming off of the output. This is being fed into the

PWM chip as a safety precaution to see if the current in the load is exceeding our limit. If it does, we’re hoping that it stops outputting voltage.

i. We’re going to check to see how this works by introducing at 800us using the V28 part to short M17 and give an output load of ~1 Ohm instead of 5.

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j. Lastly, notice the FB net in the screenshot above. It’s use is to provide feedback to the PWM so it knows how much charging the output still needs.

k. Now that we’ve checked a bunch of stuff out, lets look at what this does.

Run the Simulation and examine the results a. In Capture, select PSpice -> Run or the icon on the icon bar (F11 also works)

b. This will invoke PSpice and display for you the output of the SMPS, which should be close to 24V

i. Note that it will take 2+ minutes to run and will graphically seem to be complete when it reaches only 50% progress. That’s because we’re doing the simulation twice with the two different capacitor values.

c. When it’s done simulating it will pop up a window asking you what sections you’d like to display, Choose All and hit OK

d. Your results should look something like this:

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Time

0s 0.5ms 1.0msV(C10:1)

0V

10V

20V

30V

e. At about 350us we can really see the differences between the two capacitors. The

green one (1nf) was able to recover more quickly after going above 24V where the red one (2.5nf) took a little longer realizing that it was above 24V and needed to go back down.

f. At 800us we introduced the short in the output and you can see the voltage rapidly falling down. Let’s take a closer look at what’s happening in the PWM at that point.

g. In the Probe window, go to Trace -> Add Trace or hit the icon

h. In the Add Traces dialog box, in the center, uncheck the Currents and Power toggle buttons as we’re looking for a voltage.

i. In the upper left hand corner change the * to *OUT* and hit Enter, that will filter your list down to nets that have OUT somewhere in their name.

j. Click on V(OUTA) then on V(OUTB) to add those two traces to your Trace Expression at the bottom; Hit OK

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k. That will load up the lower 15V portion of your design with the switching output

from your PWM.

l. We want to have a look at the section around 800us. To zoom in there, choose

View -> Zoom -> Area or hit the icon (Ctrl+A will also work) and draw a rectangle around the 800us area; you’ll get a window that looks about like this:

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Time

800.00us 805.00us797.13us 809.47usV(C10:1) V(OUTA) V(OUTB)

0V

5V

10V

15V

m. From this, you can notice that at 800us when the load of the output is shorted, the

PWM stops supplying voltage pulses to our circuit as a limiting feature.

n. Next, zoom all the way out (Use View -> Zoom -> Fit or hit the icon) and then zoom back in to the area around 150us. This is when the output is charging up but we can see that the pulse width is still less than 50% even though it needs lots of voltage. This is a feature to prevent over exerting our system called soft-start.

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Time

148.00us 150.00us 151.79usV(C10:1) V(OUTA) V(OUTB)

0V

5V

10V

15V

Make a more realistic Coupling model using the Magnetic Parts Editor

a. We’re going to replace the ideal inductors in our design with a model that we’re going to get from our Magnetic Parts Editor (MPE). To open up MPE, go to Start -> Programs -> Cadence -> Release 16.3 -> PSpice Accessories -> Magnetic Parts Editor.

b. We’re going to run through the interview process filling in as much information as we know about our transformer so that it can be made and that we’ll also get a model for it to use in PSpice.

c. Choose File -> New or hit the icon (Ctrl+N should work too)

d. In Step 1, we’re going to choose the component that we’d like to make – Choose the first one (Power Transformer) and hit Next

e. In Step 2, we’re providing the Input Specifications. For us, we have one output on the secondary (it’s not center tapped) so our No. of Secondary is 1, everything else can be left at the default, hit Next

f. In Step 3, the Primary Voltage being fed into our transformer is 50V and the secondary is 24V with 5A Current. The operating frequency is 1MEG and the waveform that’s going in is a Pulse as opposed to Sine; punch those values in and hit Next

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g. In Step 4, we’re changing the Vendor to Ferroxcube, using the UU core instead of

the EE one and using the material of 3C90 instead of 3C81. At this point you can hit Propose Part and it will propose the vendor part U10_8_3, Hit Next

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h. In Step 5, you may notice at the bottom that you’re getting a warning that the skin depth is being violated on the primary and secondary winding, the tool suggests changing your Wire Type from Single to Litz to solve this. Hit Next

i. Step 6 is a summary of the input parameters that you entered, coupled with some

information about the output parameters of your transformer.

j. At the bottom of this window, notice that there’s a Model View Tab, click that tab to take a look at the resulting PSpice model which we’re going to plug in to our circuit

k. Hit File -> Save or the icon (or Ctrl+S) to save the file. Save it to the Desktop as tfxmr1.mgd; this will also save the tfxmr1.lib PSpice file in the same location. Close the MPE

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Add Smoke information to the Transformer library model* d. Open the PSpice Model Editor by going to Start -> Programs -> Cadence ->

Release 16.3 -> PSpice Accessories -> Model Editor *Smoke analysis is part of the Advanced Analysis package. If you do not have access to Advanced Analysis contact your local representative to gain access or you can skip this section

e. In PSpice Model Editor, select File -> Open or the icon (or Ctrl+O) and browse for the tfxmr1.lib file that you just saved to your desktop

f. On the left hand side, select the tfxmr1 model to see its contents in the right hand side.

g. Select Model -> Add Smoke to add some limit information for this part

h. In the resulting Add Smoke window, choose the Device Type of Transformer and a Single Secondary Winding. Hit OK.

i. This will add a window in the upper right corner of the Model Editor in which

you can enter the Smoke Parameter information. For Primary Current, enter 10, for Secondary Current, enter 20, for Isolation Voltage, enter 1000. This specifies some component limits that we’re now able to watch for in Smoke.

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Create a Capture Symbol for this library a. To bring this library file that we made into Capture, we need to make a Capture

symbol for it, so to do that, go to File -> Export to Capture part library.

b. In the Create Parts for Library window that comes up, it will automatically choose to make a tfxmr1.olb (that’s the Capture symbol library) which will correspond to the .lib file (the PSpice model file) that we made. Hit OK, Yes to Save and OK on the feedback window.

c. Close the PSpice Model Editor.

Capture, replace the ideal inductors with the modeled device a. Go back to your Capture window and drop down to select and make active the

UC_1823A-sim1 profile. This will likely close your schematic page and make the UC_1823A Schematic Folder the active one. Open the Top page under the UC_1823A folder.

b. This is pretty much a copy of the previous schematic with the inductors and coupling part swapped out for the new transformer that we made.

c. If you’d like to put the transformer that you made in instead, you can just delete the U5 device and add in your part.

i. To do that, go to Place -> Part or hit the icon (or the P key) in Capture

ii. In the Place Part flyout on the right hand side, hit the button to add a new library to your list of available libraries. We want to add the tfxmr1.olb file that we made a few steps ago. Browse to your desktop, select the tfxmr1.olb file and select Open.

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iii. Within the tfxmr1 library there’s also a part called tfxmr1 – double click that part (or hit Enter) to place that in the schematic.

Verify the contents of the TFXMR part a. First, we need to tell the project where the .lib intelligence is for the TFXMR1

part as it (the project) is the place where all the libraries are managed.

b. Select PSpice -> Edit Simulation Profile (or select the icon on the toolbar) and go to the Configuration Files Tab then to the Library Category in the upper left hand corner. In the upper right hand corner, Select Browse and navigate to the desktop where you have your tfxmr1.lib file, hit Open. Once it’s selected, hit Add to Design to make it available to the project for any part that may need it. Hit OK.

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c. On your placed part in Capture, select it, right mouse button and choose Edit

PSpice Model (or select it and choose Edit -> PSpice Model from the menu pick)

d. It will pop up the PSpice Model Editor and show you the model that you had been

editing complete with the Smoke information.

e. Close the PSpice Model Editor.

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Simulate the design with the new transformer. a. In Capture, hit PSpice -> Run to have it generate new results using the new

transformer. This will take ~1 minute to run.

Time

0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0msV(ILIMIT) V(OUT_VOLT)

0V

20V

40V

Examine Measurement Results and Assertions a. In Probe, Select View -> Output Window to open up the Output window at the

bottom of your Probe window.

b. In here, you can see a collection of Over-Load conditions at 800us warning us that the output was shorted and that the current was in overload state. In the case, these were specified as warnings instead of errors so the simulation continued on to completion.

c. Close the Output Window section if you need the space.

d. In the Measurement Results Window which should still be open (if it’s not, you can get it from View -> Measurement Results), you can see that we’ve previously set up a bunch of measurements that we’d like to take a closer look at in the design.

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e. From these measurements, I can quickly learn about what’s happening in my design

instead of having to zoom in. For example, the Max_XRange(V(C10:1),.6m,.7m)- Min_XRange(V(C10:1),.6m,.7m) measurement is asking, when I add the 5V spike to the input, what effect does that have on the output? The answer is that it puts the output up 3.10723V. This is a very useful piece of information that I can use to determine if this SMPS is handling that condition well enough or not.

f. g. These measurements can also be useful to help us feed our Capture tool with Property

information that will ultimately end up driving how the board gets routed. Notice for the Max(RMS(ID(M15))) measurement value, I’m getting a result of 36.23568A. That’s a lot of current and is something that we’ll want to manage the trace thickness of when we get it across to the board.

h.

Generate some checkpoints to save simulation time a. Back in Capture, change your profile to UC_1823A-load_reg. This will change your

profile settings so that it’s set up for a checkpoint simulation.

b. Select PSpice -> Edit Simulation Profile (or select the icon on the toolbar) and notice that the Restart Simulation Option is checked, uncheck that box and instead check the one above, the Save Check Points box and verify that the Simulation Interval is .1ms. Hit OK

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c. What this is going to do is run you simulation again but this time it’s going to save

checkpoints that it can come back to for a restart every 100us.

d. On the schematic notice that the load resistance is pointing to a variable called load and that value is 5 Ohms. This is the regular load that we’re used to having but we’re going to change that around to see how our SMPS reacts.

e. Select Run and wait for ~1 minute while the simulation progresses. You should end up getting something that looks like this:

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Time

0s 100us 200us 300us 400us 500us 600usV(OUT_VOLT)

0V

10V

20V

30V

f. We’d like to keep this waveform around for later, so let’s save it by going to File ->

Save As and saving it as load_reg_5.dat on your Desktop.

g. Back in Capture, go to the simulation profile and uncheck Save Check Points and Check off Restart Simulation. Choose a restart time of 500us. Hit OK

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h. In Capture, go to the upper left hand corner and note the load parameter of 5, double

click it and change the value to 4

i.

PARAMETERS:PER = 5uload = 4

j. Select Run and notice that the simulation should start at 83% instead of 0% because we’re skipping the beginning of the simulation with our Restart. The simulation now takes only about 10 seconds which over many simulation runs can be a big time savings. You should see results that look about like this:

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Time

0s 200us 400us 600usV(OUT_VOLT)

23.0V

23.5V

24.0V

24.5V

k. Hit File -> Save As to save these points to a file on your desktop that you can call

load_reg_4.dat

l. Go back to Capture and change the load parameter to 6 and rerun, again save the .dat file off to your desktop, this time as load_reg_6.dat

m. Now that these waveforms have been generated, you can put them all together by

selecting File -> Append Waveform (.DAT) or by clicking the icon. Choose the load_reg_4.dat and load_reg_5.dat files that you had saved off previously and you can see all the results together, it should look something like this:

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Time

0s 100us 200us 300us 400us 500us 600usV(OUT_VOLT)

0V

10V

20V

30V

n. To see what’s happening there a little better, I’ll zoom in and paste that here:

Time

520.0us 560.0us487.5us 600.0usV(OUT_VOLT)

24.00V

26.00V

22.27V

27.06V

o. This gives us a nice look at what our SMPS will do with different attached loads with

blue being the regular 5 Ohm, red representing the 4 Ohm load and green the 6 Ohm

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attached load. Checkpoint restart saved us a lot of time and was able to give us some great results.

Examine the stresses on the design using Smoke* a. In Capture, choose profile UC_1823A-sim1 again *Smoke analysis is part

of the Advanced Analysis package. If you do not have access to Advanced Analysis contact your local representative to gain access or you can skip this section

b. Since the regular PSpice simulation has already been run, we don’t need to do that again – we can go directly to Smoke Analysis

c. To start Smoke, which is a part of PSpice Advanced Analysis, select (in Capture) PSpice -> Advanced Analysis -> Smoke. This will open up the Smoke tool, run a Smoke Analysis and display the results. It will take ~1 minute to run at which time you should get results that look something like this:

d. First off, we can see that this design is not going to perform very well as there are

a lot of components that are well beyond their maximums, I want to focus specifically on component M15.

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e. As an exercise, I’d like to be able to make that component dissipate its heat better and pass the Smoke test that we’re seeing here.

f. To do that, select the part M15 in the Smoke results and right mouse click to choose Find in Design to highlight the part in Capture.

g. Now in Capture, right mouse click the highlighted component and choose Edit

PSpice Model to bring up the component in the PSpice Model Editor.

h. In the PSpice Model Editor, change the RCA from 75 to 0. This puts on a perfect heat sink which is able to dissipate all heat from the case of this FET to the Ambient area around it. Hit Save. Close the PSpice Model Editor.

i. Back in Capture, you don’t need to re-run the whole simulation; instead, to save

time, you can just create a new PSpice netlist. You can do that by selecting PSpice -> Create Netlist.

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j. Navigate your way back to the PSpice Advanced Analysis Tool and hit the Run

button to re-run the Smoke simulation and see if changing the heat sink helped M15.

k. l. You can see that changing the heat sink brought down the Power Dissipation in

the component to an acceptable level.

View PSpice measurements and create constraints based off them

a. Open up the PSpice window and view the Measurement Results, you should be on the sim1 profile and the Measurement Results tab should be open (Select View -> Measurement Results to toggle it on if it is not)

b. From these and other measurements, we can set some rules of how we would like the

nets to be routed or where we would like the components placed.

c. In Probe, Select Click here to evaluate a new measurement and type in:

iv. MAX(RMS(I(U2:OUTA)))

d. This will evaluate the current flowing through OUTA and find the highest point of the RMS’ed calculation of the waveform. In our case that will be ~351mA. Let’s assume we run this through a table along with some other information and determine that our trace width should be 20 mils.

e. To enter 20 mils as a constraint, go back to Capture, find net OUTA (it’s on the PWM, pin 11) and double click on the net to get to the Properties Spreadsheet page

f. On the Filter-by drop down – select Cadence-Allegro and on the tabs at the bottom, select Flat Nets. Scroll down to MIN_LINE_WIDTH property and enter 20. When you netlist this off to Allegro PCB, it will automatically be routed with a trace thickness of 20 mils on the PCB instead of whatever the default is.

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g. Go back to Capture and select PSpice -> Advanced Analysis -> Smoke. This will

load the Smoke tool and run a simulation.

h. Click on the Parameter header to sort by it and scroll down to the TJ (Junction Temperature) area. You’ll notice that there are some parts that are running really hot. In reality, they’re running too hot and will not work at all but if you decided that you wanted to put these into a special area on the board for hot components so they stay away from others, you can do that by putting them in to a room.

i. Let’s put components M13 thru M17 into a Room called hot1. To do that, go back to

Capture, click on the schematic page and hit Ctrl+A to select everything on the page; next hit Ctrl+E to Edit the Properties for all those parts.

j. At the bottom of the Property Editor in Capture, choose the Parts tab, under the ‘Filter By’ choose Cadence-Allegro and sort by Part Reference (double click the column name), select the M13 through M17 values of ROOM and Right Mouse Button

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(RMB) in the space to select Edit… In the pop up window, type hot1 to put a value in the ROOM property for all the 5 FET’s of hot1.

k. What this will do is automatically populate these parts on the board in Allegro PCB in

an area specified for hot components called hot1.

l. If you’ve left the PSpice window open, go back to it; if you haven’t, go back to

Capture and Select PSpice -> View Simulation Results or choose the icon (F12 also works).

m. In PSpice, take a look at the results and notice that Max(D(ID(M15))) is 1.79G. What this means is that the largest change in the slope of current through the drain of M15 is 1.79G. Since large changes in current mean more EMI, we’d like to make this route segment as short as possible to minimize the EMI being radiated.

n. To do that, select the net that’s connected to the drain pin of M15, double click it to get to the Property Editor. Choose the Cadence Allegro filter and again make sure that you’re on the Flat Nets tab.

o. For the Route Priority Property, give it a value of 1 – this ensures that the autorouter will route it first ensuring that it gets the first choice of path which means it will likely find the shortest one available.

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p. Lastly, let’s check for big voltage differences between nets to constrain how close

those nets can be to each other.

q. In this example, we’ll just take the simple case of the 50V source lines and make sure that they’re a safe distance from everything else.

r. To attach that property, double click the 50V line in Capture, go to the Flat Nets tab and make sure the Cadence-Allegro filter is on.

s. Select the NET_SPACING_TYPE property and give it a value of 50V_spacing.

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t. What this does is specify a rule that once this net gets across to the Allegro PCB board, it will search for the 50V_spacing rule which is set in the Constraint Manager of Allegro PCB and will then adhere to all those spacing rules.

Conclusion

This workshop has shown how to use OrCAD Capture and PSpice (with the Advanced Analysis Option) to develop, analyze, optimize, and then constraint an SMPS design. Using these methodologies provides design teams with better performance and reliability all while still enabling the designer to meet their design schedule. The topics discussed are focused on but not limited to SMPS design and can be used in a variety of design scenarios.

For More Information

EMA Design Automation 225 Tech Park Drive Rochester, NY 14623 Website: www.ema-eda.com Information and Sales: [email protected] Phone (within North America): 800.813.7494

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