Slides Apoio IC - DCClblopes/aulas/ic/T7.pdf · 2019. 10. 16. · Slides Apoio IC Author: Luis...
Transcript of Slides Apoio IC - DCClblopes/aulas/ic/T7.pdf · 2019. 10. 16. · Slides Apoio IC Author: Luis...
INSTRUCTIONS
Instruction Set Architecture (ISA) - an abstract interface between the hardware and the
lowest level software of a machine that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, and
I/O.
(source: Computer Organization & Design, Patterson & Hennessy)
in short: it defines the set of resources (e.g., registers) and
operations (e.g., instructions) that must be directly supported in a microprocessor
Microprocessors are implementations of ISA
they are semiconductor integrated circuits that are implemented in conformity to the
specification of a given ISA
there is no single way of doing this, many distinct implementations may be provided for a given ISA
e.g., the MIPS R2000 microprocessor is an implementation of the MIPS ISA
e.g., the Intel and AMD microprocessors in your PC all implement the Intel x86 ISA
MIPS R2000 encodes the instructions as 32 bit sequences
a textual representation of the binary instructions, called MIPS R2000 assembly, is provided to aid the development, debugging and optimisation of code
the MIPS R2000 ISA defines how these 32 bits sequencesare broken into fields, the information that lies within
and how it should be interpreted
there are only 3 distinct ways to break the instructions into fields of different length
(corresponding to 3 instruction-types)
there are only 5 distinct ways to interpret the information within these fields
(corresponding to 5 addressing modes)
original (source) code in C
MIPS R2000 assembly code
the Intel x86 assembly code for the
same program is rather different
MIPS R2000 provides instructions for :
• arithmetic and logic operations • comparison of values• memory access• program control flow
instructions are executed sequentially by default
control flow instructions change the sequential flow
an internal, non programable, register ($pc, the program counter) keeps the memory address of
the next instruction to be executed
some information is stored inside the microprocessor in small memory cells called registers
the MIPS R2000 features 32 registers, each with a capacity of 32 bits; registers are known internally as $0, $1, $2 …, $31 (but they have names too)
registers $ra (return address), $sp (stack pointer), $gp (global pointer) and $fp (frame pointer) hold
important memory addresses for the program
registers $t0 to $t9 and $s0 to $s7 are used to keep the values of program variables and temporary
values for expressions
registers $a0-$a3 are used to pass arguments to functions
MIPS R2000 REGISTERS32 registers with distinct designations and semanticsnote: 1 = $at (assembler), 26-27 = $k0, $k1 (OS)
SPECIAL REGISTERS
MIPS R2000 ASSEMBLY
The MIPS R2000 ISA defines 3 instruction types, i.e., 3 different ways of dividing the 32 bits of an instruction
MIPS R2000 BINARY
it is easy to translate binary sequences into instructions and vice-versa
for example, in the MIPS R2000 instruction set, the 32-bit sequence
000000 10001 10010 01000 00000 100000
represents the type-R instruction
add $t0, $s1, $s2
how to interpret the data in the fields?
the MIPS ISA defines 5 addressing modes:
immediate addressingregister addressing base addressing PC relative addressingPC absolute addressing
the simplicity of the architecture is typical of a Reduced (complexity!) Instruction Set Computer (RISC)
design, namely:
• many registers• same-sized instructions• few instruction types• few addressing modes• load/store architecture• pipelining• branch prediction
indeed, MIPS R2000 was the first commercial RISC processor and hit the market in 1986