Slide Set 11 - for ENCM 369 Winter 2018 Section...

Slide Set 11for ENCM 369 Winter 2018 Section 01

Steve Norman, PhD, PEng

Electrical & Computer EngineeringSchulich School of Engineering

University of Calgary

April 2018

ENCM 369 Winter 2018 Section 01 Slide Set 11 slide 2/63

Contents

Integer Multiplication and Division

Introduction to Floating-Point Numbers

MIPS Formats for F-P Numbers

IEEE Floating-Point Standards

MIPS Floating-Point Registers

Coprocessor 1

Translating C F-P Code to to MIPS A.L.

Quick Overview of F-P Algorithms and Hardware


Outline of Slide Set 11






Coprocessor 1





So far in ENCM 369, we’ve looked in detail at integer additionand subtraction, and also at use of left-shift instructions formultiplication by powers of two.

Obviously, many computer programs need to do multiplicationof integers that are not powers of two, and some programsneed to do integer division.


However, the basics of integer multiplication and division withcomputers are relatively easy to learn by reading textbooksand online material, and lecture time in ENCM 369 in Winter2018 is now very scarce.

So lecture content will skip integer multiplication and division,and move on to floating-point numbers.

Please go to the ENCM 369 Winter 2018 Home Page, thenclick on “Index page for documents used in both lecturesections” to find slides on integer multiplication and division.

You can expect that a small number of marks on the 2018final exam will be related to basic understanding of MIPSinteger multiplication and division instructions.








Coprocessor 1




Introduction to floating-point numbers

Floating-point is the generic name given to the kinds ofnumbers you’ve seen in C and C++ with types double andfloat.

Section 5.3.2 in the textbook is about the basic concepts offloating-point numbers.

Section 6.7.4 provides a very brief introduction to MIPSfloating-point registers and instructions.


Scientific Notation

This is a format that engineering students should be veryfamiliar with!

Example: 6.02214179× 1023 mol−1

Example: −1.60217656× 10−19 C

Floating-point representation has the same structure asscientific notation, but floating-point typically uses base two,not base ten.


Introductory floating-point example

A programmer gives a value to a constant in some C code:

const double electron_charge = -1.60217656e-19;

The C compiler will use the base ten constant in the C code tocreate a base two constant a computer can work with.

When the program runs, the number the computer uses is

−1.0111101001001101101000010110101110011100011110101101× two−111111,

which is very close to but not exactly equal to−1.60217656× 10−19.


Names for parts of a non-zero floating-point

number

significand

fractionsign

- 1 .01001100011010111010111

exponent00001011× two

The significand includes bits from both sides of thebinary point. Another name for significand is mantissa.

(Note: This is not base ten, so we should not use the termdecimal point!)

The fraction is the part of the significand that is to the rightof the binary point. So the fraction represents some numberthat is ≥ 0 but < 1.


Normalized non-zero floating-point numbers

In normalized form, an f-p number must have a single 1 bitimmediately to the left of the binary point, and no other1 bits left of the binary point.

Therefore, the significand of a normalized number mustbe ≥ 1.0 and must also be < 10.0two. (In English: greaterthan or equal to one, strictly less than two.)


Normalized non-zero f-p numbers: examples

Which of the following are in normalized form?

I A. −1.00000000× two00000101

I B. +10.0000000× two00100101

I C. +1.10001011× two00010111

I D. −0.11101100× two00001100

I E. +101.111011× two01001100


Example conversion from base ten to base-two

floating-point

What is 9.375ten expressed as a normalized f-p number?

What are the sign, significand, fraction, and exponent of thisnormalized f-p number?


Standard organizations for bits of floating-point

numbers

For computer hardware to work with f-p numbers there mustbe precise rules about how to encode these numbers.

The most usual overall sizes for f-p numbers are 32 bits or64 bits, but other sizes (e.g., 16, 80, or 128 bits) are possible.

We need one bit for the sign and some number of bits forinformation about the exponent; the remaining bits can beused for information about the significand.


Sign information for non-zero f-p numbers

This requires a single bit.

A sign bit of 0 is used for positive numbers.

A sign bit of 1 is used for negative numbers.


Exponent information for a non-zero f-p numbers

Exponents in f-p numbers are signed integers! f-p numberswith small magnitudes will have negative exponents.

So of course two’s complement is used for exponents,right . . . ?

WRONG! In fact, an alternate system for signed integers,called biased notation, is used for exponents in f-p numbers.

(This fact explains why many introductions totwo’s-complement systems state that two’s complement isalmost always used for signed integers in modern digitalhardware.)


How does biased notation work?

The biased exponent is equal to the actual exponent plussome number called a bias.

The bias is chosen so that roughly half the allowable actualexponents are negative, and roughly half are positive.

Example: The bias for an 8-bit exponent is 127ten, or0111_1111two. If the actual exponent is 3ten, what is thebiased exponent in base ten and base two?


Why is biased notation used for exponents in f-p

numbers?

It turns out that biased notation helps with the design ofrelatively small, speedy circuits to decide whether one f-pnumber is less than another f-p number. (We won’t study thedetails of that in ENCM 369.)

Also, it’s useful that the bit pattern for an actual exponent ofzero is not a sequence of zero bits—then a sequence of zerobits can have a different, special meaning.


Significand information for a non-zero, normalized

f-p number

XXX1

We know this bit

will be a 1.Any pattern of 1’s and

0’s is possible here.

XXX· · ·

There is no need to encode the entire significand. Instead wecan record only the bits of the fraction.

Leaving out the 1 bit from the left of the binary point allowsmore precision in the fraction.








Coprocessor 1




MIPS formats for 32-bit and 64-bit f-p numbers

bit 31sign bit

bit 63sign bit

bits 30–23biased exponent

bits 62–52biased exponent

bits 22–0fraction

bits 51–0fraction

Exponent bias for 32-bit format: 127ten = 0111_1111two.Exponent bias for 64-bit format: 1023ten = 011_1111_1111two.


MIPS formats for 32-bit and 64-bit f-p numbers

The 32-bit format is called single precision.

The 64-bit format is called double precision.

We’ll see later that MIPS instruction mnemonics forsingle-precision operations end in .s, as in mov.s, while themnemonics for double-precision operations end in .d, as inadd.d.


Example: How is 9.375ten encoded in 32-bit and

64-bit formats?

From previous work:

9.375 = 9 +1

4+

1

8= 1001.011two

= 1.001011× twothree (normalized)

For each of the 32-bit and 64-bit formats, what are the bitpatterns for the biased exponents?

What are the complete bit patterns for the f-p numbers?


More examples

How would −9.375ten be encoded in the 32-bit format?

How would 0.125ten be encoded in the 32-bit format?

What base ten number does the 32-bit pattern1_0111_1110_11_[21 zeros] represent?


How to represent zero in f-p formats

A special rule says that if all exponent and fraction bitsare zero, the number being represented is 0.0.

So, what are the representations of 0.0 in 32-bit and 64-bitformats?








Coprocessor 1




IEEE standards for floating-point numbers and

arithmetic (1)

IEEE: Institute of Electrical and Electronics Engineers

“IEEE 754” and “IEEE floating-point” are informal names forboth the original IEEE 754-1985 standard and the revisedIEEE 754-2008 standard.

Prior to the development of the IEEE 754-1985 standard,different companies produced a wide variety of incompatibleschemes for floating-point numbers.


IEEE standards for floating-point numbers and

arithmetic (2)

Modern computer architectures (if they have f-p at all)typically implement part or all of IEEE standard f-p.

MIPS follows the IEEE standard for 32-bit and 64-bit f-ptypes. The same is true for x86, x86-64, ARM and many otherarchitectures. (So examples in earlier slides were not reallyMIPS-specific—they would also be correct for many otherarchitectures.)


Scope of IEEE f-p standards

In addition to 32-bit and 64-bit formats, various other formatsare specified, for example, 16-bit and 128-bit formats.

There are detailed rules for arithmetic—comparison, addition,multiplication, and many other operations.

There are detailed rules for rounding—choosing anapproximate value when exact results can’t be represented.


F-p formats for some types in programming

languages

In C and C++, float is typically 32-bit IEEE f-p, anddouble is typically 64-bit IEEE f-p.

Java requires float to be 32-bit IEEE f-p, and double to be64-bit IEEE f-p.

Python does not specify how its float type is represented,but all the Python interpreters that your instructor knowsabout use 64-bit IEEE f-p for float.

Javascript uses 64-bit IEEE f-p for all numbers—it does nothave integer types.


Special IEEE f-p bit patterns

exponent bits fraction bits meaningall 0’s all 0’s number is 0.0, as seen

alreadyall 0’s at least one

1 bitdenormalized number

all 1’s all 0’s ±infinity, dependingon sign bit

all 1’s at least one1 bit

NaN: “not a number”

If the exponent field of an IEEE f-p bit pattern has at leastone 0 bit and at least one 1 bit, the bit pattern represents anormal, non-zero f-p number.


Denormalized numbers

These are non-zero numbers with magnitudes so tiny that theycan’t be represented in the normal sign-exponent-fractionformat.

Example: 1.25× 2−128 in the 32-bit format. The range ofbiased exponents is 0000_0001two to 1111_1110two, that is,1 to 254ten, which allows encoding of actual exponents from−126ten to +127ten.

We will NOT study the details of the denormalized numberformat in ENCM 369.

(However, if you’re curious, . . . 1.25× 2−128 is represented as0 00000000 01010000000000000000000 in the 32-bit format.)


Infinity

IEEE standard f-p arithmetic specifies many ways to generate±infinity.

Some common examples . . .

I x / 0.0 generates +∞ if x > 0.0.

I x / 0.0 generates −∞ if x < 0.0.

I If a and b are regular f-p numbers but the “everydaymath” product a × b is too large in magnitude to be anf-p number, then a * b will be ±∞, depending on thesigns of a and b.


NaN: “not a number”

NaN is specified as the result for many computations wherenot even ±infinity makes sense as a result.

Examples . . .

I 0.0 / 0.0

I infinity / infinity

I sqrt(x), where x < 0.0

I asin(x), where x > 1.0 or x < −1.0(asin is the C library inverse sine function.)

I arithmetic operation with one or more NaNs as inputs,e.g., 1.0 + x , where x is NaN


Demonstration of f-p infinityIn “everyday math”, 16303 = 4,330,747,000 and

(5.7× 10102)3 = 1.85193× 10308.

#include <stdio.h>

int main(void) {

int i = 1630; double d1 = 1630.0, d2 = 5.7e102;

printf("%d cubed is %d\n", i, i * i * i);

printf("%.1f cubed is %.1f\n", d1, d1 * d1 * d1);

printf("%g cubed is %g\n", d2, d2 * d2 * d2);

return 0;

}

Program output . . .

1630 cubed is 35779704

1630.0 cubed is 4330747000.0

5.7e+102 cubed is inf


Demonstration of Not a Number

#include <math.h>

#include <stdio.h>

int main(void) {

double a = 1.0, b = 2.0, c = 2.0;

double sqrt_of_d, r1, r2;

sqrt_of_d = sqrt(b * b - 4.0 * a * c);

r1 = (-b + sqrt_of_d) / (2.0 * a);

r2 = (-b - sqrt_of_d) / (2.0 * a);

printf("r1 = %g, r2 = %g\n", r1, r2);

return 0;

}

Program output . . .

r1 = -nan, r2 = -nan


The usefulness of infinity and NaN

Recall that for integer addition, subtraction, andmultiplication, C and C++ systems usually will NOT tell youthat results are wrong because magnitudes of numbers got outof hand.

Results of ±infinity or NaN in floating-point computationclearly indicate that something has gone wrong. This ishelpful!

Of course, absence of ±infinity and NaN does NOT provethat your program’s results are correct!


ENCM 369 Lecture Document: “Floating-Point

Format Examples”

Please read this document carefully.

Here are some brief notes on what you will see:

I π cannot be represented exactly in f-p format. (This isprobably not a surprise.)

I 0.6 cannot be represented exactly in f-p format. (Thismight be surprising.)

I 32-bit and 64-bit f-p approximations are given for πand 0.6.

I f-p bit patterns for 1.0 are given; they are very differentfrom integer bit patterns for 1.








Coprocessor 1




Floating-point registers

Most processor architectures that have f-p instructions have aset of floating-point registers (FPRs) that is separate from theset of general-purpose registers (GPRs).

Important: Most f-p instructions have only FPRs assources and destination!

But there have to be a few instructions for copying databetween FPRs and GPRs, or between FPRs and memory.


MIPS FPRs

There are 16 64-bit double-precision FPRs: $f0, $f2, $f4,. . . , $f28, $f30. (Note that odd numbers are not allowed fornames of these double-precision registers.)

There are 32 32-bit single-precision FPRs: $f0, $f1, $f2, . . . ,$f30, $f31.

Attention: Unlike the set of GPRs, where $zero has specialbehaviour, none of the FPRs hold a constant value of 0.0.

Section 6.7.4 in the textbook suggests names such as $fv0,$fv1, $ft0–$ft3, and so on for the 64-bit FPRs. Those namesdo not work in MARS!


MIPS FPR organization: Each 64-bit FPR shares

bits with two 32-bit FPRs . . .

green: 32-bit single-precision FPRs

$f1

$f30

$f0

$f2$f3

$f31 $f30

$f0

purple: 64-bit

double-precision

FPRs

$f2


Each 64-bit MIPS FPR shares bits with two32-bit FPRs: Detailed example

63

31 0bit number within

· · ·· · ·

· · ·0· · ·

bit number within 64-bit $f4

bit number within

32-bit $f5 32-bit $f4

3132 0

31

A program using the 64-bit $f4 for a double variable mustnot at the same time use the 32-bit $f4 or $f5 for a float

variable!








Coprocessor 1




Coprocessor 1: The MIPS term for floating-point

unit

In the old days, when dinosaurs roamed, and processor chipsonly had hundreds of thousands of transistors (or less), f-punits were literally “coprocessors”.

The main processor and the f-p unit were separate chips withseparate sockets on a motherboard.

Example: Intel 80386 (main processor) and 80387 (f-p unit).


Coprocessor 1, continued

In 2018, a single chip (with billions of transistors) can have 2or 4 or 8 cores; each core has a main processor, its ownfloating-point unit, and a lot of other stuff.

Students in ENCM 369 need to know that “coprocessor 1”means “floating-point unit”, because c1 shows up in themnemonics for many MIPS f-p instructions, and because the“Coproc 1” tab in MARS is where you need to look to findvalues of FPRs.


Some important MIPS c1 instructionswhat mnemonic stands for /

mnemonic operation performedmtc1 move to coprocessor 1 /

copy 32 bits from GPR to 32-bit FPRmfc1 move from coprocessor 1 /

copy 32 bits from 32-bit FPR to GPRlwc1 load word to coprocessor 1 /

copy 32 bits from memory to 32-bit FPRswc1 store word from coprocessor 1 /

copy 32 bits from 32-bit FPR to memoryldc1 load double to coprocessor 1 /

copy 64 bits from memory to 64-bit FPRsdc1 store double from coprocessor 1 /

copy 64 bits from 64-bit FPR to memory








Coprocessor 1




Example translation #1 from C code to MIPS f-p

instructions

x = i + y;

x and y are of type double in $f2 and $f4, and i is of typeint in $s0.

WRONG ANSWER:

addu $f2, $s0, $f4

Why is this a wrong answer?

What would be correct code?

Let’s trace the correct code assuming that $s0 contains 2 and$f4 contains 1.5.


Example translation #2 from C code to MIPS f-p

instructions

if (x < y)x = y;

x and y are of type double in $f2 and $f4.

WRONG ANSWER:

slt $t0, $f2, $f4

bne $t0, $zero, L1

add.d $f2, $f4, $zero

L1:

Why is this a wrong answer?

What would be correct code?


F-P comparisons in MIPS: How to compare?

type is d for double precision, s for single precision . . .

Instruction Test

c.lt. type FPR1 , FPR2 is FPR1 < FPR2 ?

c.le. type FPR1 , FPR2 is FPR1 ≤ FPR2 ?

c.eq. type FPR1 , FPR2 is FPR1 = FPR2 ?

slt puts its result in a GPR. Where does an f-p comparison putits result?


F-P comparisons in MIPS: How to branch?

bc1t: branch if coprocessor 1 flag is true.

bc1f: branch if coprocessor 1 flag is false.

Messy detail: Actually, MIPS has eight separate coprocessor 1flag bits, but by default c.lt.d, c.le.d, c.eq.d, c.lt.s, c.le.s,c.eq.s, bc1t and bc1f all access the same single flag bit.


Key things to learn from examples #1 and #2

Do NOT assume that f-p instructions are organized just likeinteger instructions!

Mixing types often works in C arithmetic expressions butusually DOESN’T work in assembly language arithmeticinstructions.

Before writing f-p MARS code in Lab 12, carefully study f-pinstruction documentation provided along with the labinstructions.


Register-use conventions and FPRs in ENCM 369

Students are expected to know conventions related to use ofGPRs.

Use of FPRs makes register-use conventions much morecomplicated.

We’ll use simplified register-use conventions for FPRs; eachlab and final-exam f-p programming problem will give adescription of FPR-use conventions needed for that problem.


Addresses live in GPRs, never in FPRs!

void foo(void){

double d;double *p;

more code}

What kind of registershould be used for d ?

What kind of registershould be used for p ?


More detail about MIPS f-p programming

There won’t be any more lecture time spent on details ofMIPS floating-point instructions.

You’ll learn about the most frequently-used f-p instructions bydoing Lab 12.








Coprocessor 1




The minifloat type (as introduced in Lab 12)

This is an 8-bit f-p type similar to the IEEE 754 types, butwith tiny, tiny exponent and fraction fields . . .

bit 7:signbit

biased exponentbits 6-4:

fractionbits 3-0:

Minifloat is useless forpractical computation, butgood for classroomexamples andpencil-and-paper labexercises.

The exponent bias is 3ten = 011two.


Let’s try to understand f-p addition by adding two

minifloats . . .

(Similar steps would be needed for 32- or 64-bit addition, butwe would have to keep track of a lot more bits!)

Bits of a are 01001111; bits of b are 00010110.

a represents 3.875ten; b represents 0.34375ten. (Check thesevalues yourself!)

So, how to compute the best possible minifloat result fora + b ?


Rounding errors in f-p arithmetic

Both rounded results in the minifloat addition example areapproximations to the exact sum, which is 4.21875ten.

The same kind of rounding errors will occur in 32- and 64-bitf-p arithmetic operations.

Relative sizes of rounding errors decrease as the number offraction bits increases.


Floating-point hardware example: Adder

(Unfortunately this year’s textbook doesn’t have any examplecircuits for f-p arithmetic.)

An f-p adder would have to implement all the steps we’ve justseen in minifloat addition:

I comparing exponents of the two inputs

I shifting the input with the smaller exponent

I adding

I normalizing the sum

I rounding the sum

Note how much more complicated this is than a simple integeradder!


Floating-point hardware concepts: Just a couple of

remarks

f-p arithmetic circuits are significantly larger and morecomplex than integer arithmetic circuits.

But modern f-p circuits are very fast, because f-p performancehas been a key selling point for processors and other digitalhardware . . .

I games and video processing for consumers

I high-speed number-crunching for science and industry


Remember this: F-P math is usually approximate

// Classic mistake: Counting using fractions ...

double x;

for (x = 0.1; x <= 0.3; x += 0.1)

printf("x is %f\n", x);

Expected output . . .

x is 0.100000

x is 0.200000

x is 0.300000

Actual output . . .

x is 0.100000

x is 0.200000

What went wrong here?

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