Silicon wafer shaping: plastic vs. elastic .Silicon wafer shaping: plastic vs. elastic deformation

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Transcript of Silicon wafer shaping: plastic vs. elastic .Silicon wafer shaping: plastic vs. elastic deformation

  • 1 Confidential Proprietary

    Silicon wafer shaping:

    plastic vs. elastic deformation

    J. ik1, R. Lenhard1, R. Hudec2,3

    1ON Semiconductor Czech Republic

    2Astronomical Institute of the Academy of Sciences of the Czech Republic

    3Czech Technical University in Prague, Faculty of Electrical Engineering, Prague,

    Czech Republic

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    Silicon wafer shaping: plastic vs. elastic deformation

    J. ik, R. Lenhard, R. Hudec

    Abstract:

    Polished wafer from monocrystalline silicon available in semiconductor industry has thickness

    homogeneity of tenths of micrometer and surface roughness of tenths of nanometer. The possible

    utilization of silicon wafers for mirrors in astronomical x-ray optics is dependent on the possibility to

    precisely shape them without surface deterioration. One of the proposed solutions is lightweight

    optics based on self supporting wafers. We present comparison of two shaping methods: plastic

    deformation and the use of thin layers with intrinsic stress. Advantages and disadvantages of both

    methods are discussed.

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    OUTLINE

    Motivation

    Silicon wafer

    Deformation of silicon wafer with thin layers

    Method summary

    Plastic deformation of crystalline silicon

    Method summary

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    MOTIVATION

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    SILICON WAFER

    Available in semiconductor industry

    Diameters 100 300 mm

    Thickness 300 900 m

    Thickness variation (TTV) ~ 0.1 m

    Flatness (Warp) ~ 1 m

    Crystallographic orientations (100) and (111)

    Material properties can be tuned with dopants (As, P, B, Sb, Oi)

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    Thermal expansion

    Intrinsic

    - growth

    - misfit

    - phase transformation

    Extrinsic

    - applied stress

    - plastic deformation

    extthtot int

    ORIGIN of THIN FILM STRESS

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    THIN FILM

    SUBSTRATE

    Compressive stress in layer

    sf

    Due to mismatch of thermal expansion coefficient between substrate ( ) and film ( ),

    after temperature ramp down a strain ( ) is built in.s f

    th

    DEPOSITION TEMPERATURE ROOM TEMPERATUREdepT roomT

    0th ))(( roomdepsfth TT

    THERMAL STRAIN and STRESS

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    Biaxial stress in thin film on thick substrate is related with strain:

    thth

    E

    1

    Youngs modulus; Silicon (100) 1.31011 N/m2

    Poissons ratio; Silicon (100) 0.28

    E

    Material[1/C]

    Silicon 2,610-6

    Polysilicon 2,810-6

    Thermal SiO2 0,3510-6

    PECVD SiO2 2,310-6

    LPCVD Si3N4 1,610-6

    Aluminum 2510-6

    Tungsten 4,310-6

    THERMAL STRAIN and STRESS

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    THIN LAYER

    w

    Youngs modulus ; Silicon (100) 1.31011 N/m2

    Poissons ratio; Silicon (100) 0.28

    Wafer thickness

    Radius of curvature after film depo

    Radius of curvature before film depo

    WAFER

    COMPRESSIVE STRESS in layer

    R

    Thin film with residual stress on the

    top of silicon wafer deform wafer

    according stress value and stress type

    [S.Timoshenko, J. Opt. Soc. Am., 11, 233 (1925) ]

    (compressive or tensile)

    Therefore the warp is proportional to the

    residual stress and film thickness and

    inversely proportional to the wafer

    thickness squared.

    TENSILE STRESS in layerTHIN LAYER

    WAFER

    f

    st

    E

    0

    2 11

    )1(6 RRt

    tE

    f

    sf

    R

    0R

    INTRINSIC THIN FILM STRESS

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    Example of residual stress in different depo and thermal growth layers are in tables.

    Values are just indicative as the intrinsic stress may vary with the process conditions.

    LayerStress[N/m2]

    PE TEOS low stress 0,5108

    PECVD Si3N4 low stress 0,5108

    PECVD TEOS 1,8108

    Thermal SiO2 3108

    PECVD Si3N4 5108

    LPCVD Poly Si ~ 2108 *)

    Compressive stress

    LayerStress

    [N/m2]

    LPCVD SiO2 3108

    LPCVD Si3N4 1109

    Tensile stress

    *) at deposition temperature 615C

    THIN FILM STRESS VALUE

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    BACK SIDE LAYER

    After depo of poly-Si (THX 1436 nm at temperature 615C) and for wafer thickness 507 m

    the warp 110 m (R = 25.6 m) was achieved.

    Wafer deformation map Warp profile perpendicular to

    the facet

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    Circular 150 mm wafer, thickness 378 m, warp 181 m was squared to 100 mm.Squared wafer keeps axially symmetrical shape.

    WAFER SHAPE

    -60 -40 -20 0 20 40 60

    0

    20

    40

    60

    80

    100

    120

    140

    160

    1

    2

    3

    4

    4

    3

    2

    1

    D

    evia

    tio

    n (m

    )

    Position (mm)

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    -60 -40 -20 0 20 40 60

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180

    measured data

    spherical R=11.7m

    De

    via

    tio

    n (m

    )

    Position (mm)

    Squared wafer has spherical shape. Deviation from ideal sphere is within 1 m.

    WAFER SHAPE

    -60 -40 -20 0 20 40 60

    -1

    0

    1

    deviation from sphere

    De

    via

    tio

    n (m

    )

    Position (mm)

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    WAFER THICKNESS INFLUENCE

    For any layer stack we can calculate the wafer thickness to achieve expected radius of curvature.

    In example picture the wafer thickness of 195 m would be needed for R ~ 2 m.

    That thin wafer is sensitive for handling and also it is affected by gravity sag.

    0,0

    1,0

    2,0

    3,0

    4,0

    5,0

    6,0

    7,0

    100 150 200 250 300 350 400

    Wafer THX [um]

    R [

    m]

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    Technology is available in semiconductor industry

    Layers with intrinsic stress uniformly shape silicon wafer w/o deterioration of high

    quality of the polished front side.

    Multilayer stack can be designed to decrease the radius of wafer curvature to R ~ 2 m.

    For other than spherical shape a lateral stress pattern needs to be modified with

    photolithography process.

    Achieve radius of wafer curvature R < 2 m is difficult.

    Material properties (thermal expansion, durability, ..) of layers influence the shape of

    mirrors

    SUMMARY: THIN FILMS WITH INTERNAL STRESS

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    kT

    QK exp5,10

    0.25 eV for crystallographic plane (100)

    k... Boltzman constant

    T... wafer temperature [K]

    In crystalline silicon (at temperatures

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    2,45 nm

    SURFACE STEPS AFTER PLASTIC DEFORMATION

    (AFM)

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    SLIPS ON THE SILICON SURFACE

    (OPTICAL MICROSCOPY)

    4 mm 2 mm 1mm

    Silicon wafer edge

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    SLIPS ON THE SILICON SURFACE (PROFILOMETER)

    90 nm

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    SUMMARY: PLASTIC DEFORMATION

    Shaped wafer is without intrinsic stress

    Radius of wafer curvature R < 2 m is possible

    Clean technology has to be developed (surface contamination)

    Surface steps and slips are present due to crystallographic arrangement of atoms