Signal Integrity Engineering for High-Speed Links EMCS 2015 - Global Universi… · High...
Transcript of Signal Integrity Engineering for High-Speed Links EMCS 2015 - Global Universi… · High...
Signal Integrity Engineering for High-Speed Links
Christian Schuster
Institut für Theoretische Elektrotechnik
Technische Universität Hamburg-Harburg (TUHH)
Global University Lecture, Joint IEEE International Symposium on
Electromagnetic Compatibility and EMC Europe, Dresden, August 16-22, 2015
C. Schuster, TUHH – 2
Digital Core Frequencies
C. Schuster, TUHH – 3
Digital I/O Frequencies
C. Schuster, TUHH – 4
(1) SI, PI & EMC
(2) Digital High-Speed Links
(3) 5 Ways to Improve SI
(4) Vias and Return Currents
(5) Measurement Techniques
(6) Wrapping Up
Outline
C. Schuster, TUHH – 5
(1)
SI, PI & EMC
C. Schuster, TUHH – 6
Power Plane Ground Plane
Driver Via
Receiver
A Bird‘s Eye View on SI, PI & EMC
DC Power Supply
PCB
C. Schuster, TUHH – 7
A Bird‘s Eye View on SI, PI & EMC
Signal Transmission Issues:
Attenuation, Reflection, Dispersion, Interference, Crosstalk
C. Schuster, TUHH – 8
A Bird‘s Eye View on SI, PI & EMC
Signal Transmission Issues:
Attenuation, Reflection, Dispersion, Interference, Crosstalk
C. Schuster, TUHH – 9
A Bird‘s Eye View on SI, PI & EMC
Power Delivery Issues:
Voltage Drop, Switching Noise, Crosstalk
C. Schuster, TUHH – 10
A Bird‘s Eye View on SI, PI & EMC
Power Delivery Issues:
Voltage Drop, Switching Noise, Crosstalk
C. Schuster, TUHH – 11
A Bird‘s Eye View on SI, PI & EMC
Electromagnetic Compatibility Issues:
Near Field Coupling, Radiated Emissions
C. Schuster, TUHH – 12
A Bird‘s Eye View on SI, PI & EMC
Electromagnetic Compatibility Issues:
Near Field Coupling, Radiated Emissions
C. Schuster, TUHH – 13
Electrical Integrity of Digital Systems
C. Schuster, TUHH – 14
SI and PI in the IEEE Community
Number of publications
found in IEEE Xplore
containing the index
terms:
“Signal Integrity“
“Power Integrity“
C. Schuster, TUHH – 15
(2)
Digital High-Speed Links
C. Schuster, TUHH – 16
Typical Digital Link Data Rates
Data Rate [Gb/s]
10
5
CPU to CPU Storage Network/ Peripherals
Infiniband
10.0
PCIe
5.0
Hyper
Transport
5.2
SA-SCSI
3.0
SATA III
6.0 Fibre
Channel
4.25
10G Ethernet
10.0
USB 2.0
0.5
FireWire
up 3.2
DVI
3.7
DDR3
8-12
C. Schuster, TUHH – 17
Tx
High performance digital links are mostly serial: HSS = HIGH SPEED SERIAL.
The technology is typically CMOS with the links being voltage mode,
unidirectional, serial, point-to-point, and source-synchronous. Both single-ended
and differential signaling can be found.
For improved bandwidth equalization is typically used in the Tx, Rx, or both.
CDR
.
.
.
Deserializer
Interconnect
Clock & Data Recovery
Data .
.
.
Serializer
Data
Clock
Equalizer
Equalizer
+ Slicer
Rx
Typical Digital Link Design
C. Schuster, TUHH – 18
In a VOLTAGE MODE link
a defined voltage is forced
on the interconnect.
In a CURRENT MODE link
a defined current is forced
on the interconnect.
Voltage Mode vs. Current Mode
C. Schuster, TUHH – 19
In a UNIDIRECTIONAL
link the interconnect is
used to transmit data only
in one direction.
In a BIDIRECTIONAL link
the interconnect is used to
transmit data in both
directions.
Unidirectional vs. Bidirectional
C. Schuster, TUHH – 20
In SERIAL link one bit is
sent after the other over the
interconnect in a sequential
fashion.
In a PARLLEL link several
bits are sent at the same
time over the interconnect
(which in that case is often
called a bus).
Serial vs. Parallel
C. Schuster, TUHH – 21
In a POINT-TO-POINT link
there is a single
transmitter connected to a
single receiver over the
interconnect.
In a MULTI-DROP link
there are multiple
transmitters or multiple
receivers (or both) present.
Point-to-Point vs. Multidrop
C. Schuster, TUHH – 22
In a SINGLE-ENDED link
there is a common
(global) reference against
which the signal is
measured ("ground").
In a DIFFERENTIAL link
the reference is the
negative of the signal
itself (which has to be
transmitted as well).
Single-Ended vs. Differential
C. Schuster, TUHH – 23
In a SOURCE-
SYNCHRONOUS link
the clock used in the Rx
is generated by the Tx
and sent along with the
data.
In a link with a GLOBAL
CLOCK the clock used
by Tx and Rx is created
and transmitted
separateley.
Source-Synchronous vs. Global Clock
C. Schuster, TUHH – 24
Packaging of Digital Systems
Housing / Chassis
Connector
Package / Module
IC (Transmitter)
IC (Receiver)
Connector
Cable
Backplane / Motherboard
Socket
Da
ug
hte
rca
rd
C. Schuster, TUHH – 25
Packaging of Digital Systems
Connector
Interconnect
(Link)
C. Schuster, TUHH – 26
The ideal interconnect will simply delay the signal:
t
Tx Rx
Effect of Interconnects
C. Schuster, TUHH – 27
The ideal interconnect will simply delay the signal:
Any real interconnect will additionally change timing and amplitude:
t
Tx Rx
t
Tx Rx
Effect of Interconnects
C. Schuster, TUHH – 28
Effect of Interconnects
The deviations in timing and amplitude are in general called:
t
Timing jitter or simply: JITTER
Amplitude noise or simply: NOISE
C. Schuster, TUHH – 29
More precise definitions of jitter and noise use the EYE DIAGRAM. For such a
digram the received bit stream is partioned in bit periods:
and the individual
partitions overlayed
on top of each other:
t
t
BT
Eye
Opening
Eye Diagrams
C. Schuster, TUHH – 30
Besides S-parameters and
step response eye diagrams
are another useful method
to analyze transmission
characteristics:
Tx
Rx
Tx
Rx
Eye Diagrams
C. Schuster, TUHH – 31
NOISE
Receiver
Sampling
Point
In the eye diagram timing jitter and anplitude noise are defined as follows:
JITTER
Jitter and Noise
C. Schuster, TUHH – 32
Jitter and noise can have many different sources. To distinguish them the
following classification scheme has been widely adopted (replace "jitter" with
"noise" for noise classification):
Total Jitter (TJ)
Random Jitter (TJ) Deterministic Jitter (DJ)
Data Dependent Jitter (DDJ) Periodic Jitter (PJ)
I/O circuitry, clock circuitry
voltage regulator module interconnect
Jitter and Noise
C. Schuster, TUHH – 33
Signal Bandwidth
s
)(ts
t
2/s
RTBT
timerise
5.0..3.01
R
max T
f
periodbit
5.0
2
1
B
0 T
f
Maximum Frequency
Fundamental Frequency
C. Schuster, TUHH – 34
Signal Bandwidth
s
)(ts
t
2/s
RTBT
timerise
5.0..3.01
R
max T
f
periodbit
5.0
2
1
B
0 T
f
Maximum Frequency
Fundamental Frequency
Typically x 5
C. Schuster, TUHH – 35
"Lumped" vs. "Distributed"
Interconnects or elements thereof are often classified in terms of their spatial
extent or length. More precisely: in terms of how their length relates to the
minimum wavelength or the length of the signal edges
Interconnect Length
C. Schuster, TUHH – 36
Two classes are (vaguely) distinguished ...
Lumped:
Interconnect Length < 0.1 · Minimum Wavelength
< 0.1 · Phase Velocity : fmax
< 0.2 · Phase Velocity · Rise/Fall Time
< 0.2 · Length of Signal Edge
Distributed:
Interconnect Length ≥ 0.2 · Length of Signal Edge
Other sources cite factors between 0.1 and 0.5. At 0.5 the edge length is exactly
twice the spatial extent of the element, i.e. the propagation delay is half the
rise/fall time.
"Lumped" vs. "Distributed"
C. Schuster, TUHH – 37
(3)
5 Ways to Improve SI
C. Schuster, TUHH – 38
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce Coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 39
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce Coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 40
Effect of Terminations
Let‘s use the following interconnect (link) model:
lZ ,,0
u0 u1 u2
LZSZ
Transmitter Receiver Interconnect
??
C. Schuster, TUHH – 41
Typical trace length
≈ 5 – 75 cm
Velocity of propagation
≈ 150 000 km/s
Operating frequency
≈ 5 GHz
Corrsponding wavelength
≈ 3 cm
…
up to 25 wavelengths on a trace!
Delay ≈ 5 ns
Transmission Lines in Digital Systems
Printed circuit board layout
C. Schuster, TUHH – 42
R' Resistance per Length Unit: W/m
L' Inductance per Length Unit: H/m
C' Capacitance per Length Unit: F/m
G' Conductance per Length Unit: S/m
Transmission Line Parameters
R L
C G
Transmission line parameters completely determine realistic (non-ideal)
transmission lines:
C. Schuster, TUHH – 43
From these the following important properties can be calculated
Characteristic Impedance:
Propagation Constant:
Phase Velocity: Wavelength:
Transmission Line Parameters
CjG
LjRZ
0
)()( CjGLjRj
phv
2
Attenuation Constant Phase Constant
C. Schuster, TUHH – 44
Metal Dielectric
Microstrip
Line
Stripline
(symmetric)
(h = height of dielectric,
w = conductor width,
t = conductor thickness)
W
tw
hZ
8.0
98.5ln
41.1
87
r
0
W
tw
hZ
8.0
9.1ln
60
r
0
(h = height of dielectric,
w = conductor width,
t = conductor thickness)
Transmission Lines in Digital Systems
C. Schuster, TUHH – 45
Common Transmission Line Designs
The most important transmission line in dense high-speed systems is the stripline
with a characteristic impedance around 50 Ohm. The plot below shows
dependencies of the impedance using a dielectric with r = 4.
(1 mil = 25.4 mm)
C. Schuster, TUHH – 46
Let‘s use the following interconnect (link) model:
lZ ,,0
u0 u1 u2
LZSZ
!max. and const.0
2 u
u
Effect of Terminations
??
C. Schuster, TUHH – 47
lZ ,,0
LZSZ
input acceptance
0S
0
ZZ
Za
Effect of Terminations
C. Schuster, TUHH – 48
lZ ,,0
LZSZ
input acceptance TL transfer function
)exp( lH
Effect of Terminations
C. Schuster, TUHH – 49
lZ ,,0
LZSZ
input acceptance TL transfer function
load transmission
load reflection
LL 1 rt
0L
0LL
ZZ
ZZr
Effect of Terminations
C. Schuster, TUHH – 50
lZ ,,0
LZSZ
input acceptance TL transfer function
source transmission load transmission
source reflection load reflection
0S
0SS
ZZ
ZZr
SS 1 rt
Effect of Terminations
C. Schuster, TUHH – 51
lZ ,,0
LZSZ
??1 SL
2
L
0
2
rrH
tHa
u
u
Effect of Terminations
C. Schuster, TUHH – 52
lZ ,,0
LZSZ
Effect of Terminations
!!1
)1(
1 SL
2
L
SL
2
L
0
trans
0
2
rrH
rHa
rrH
tHa
u
u
u
u
C. Schuster, TUHH – 53
Hu
u
2
1
0
2 0LS ZZZ
lZ ,,0
LZSZ
0L ZZ Hau
u
0
2
Effect of Terminations
C. Schuster, TUHH – 54
Matched interconnect:
Mismatched Interconnect:
Time
low source impedance
high source impedance
D2 T
Time
Vo
lta
ge
lossless transmisson line
Vo
lta
ge
DT
lossy transmisson line
Effect of Terminations
C. Schuster, TUHH – 55
3
4
2
5 6
1
1 kΩ1,Ω50,Ω10 L0S ZZZ
zero losses
2 Ω100,Ω50,Ω50 L0S ZZZ
zero losses
3 Ω50,Ω50,Ω50 L0S ZZZ
zero losses
4 Ω100,Ω50,Ω100 L0S ZZZ
zero losses
kΩ1,Ω50,Ω10 L0S ZZZ
non-zero losses
5
6 Ω50,Ω50,Ω50 L0S ZZZ
non-zero losses
(all lines have a delay of 0.1 ns)
Effect of Terminations
C. Schuster, TUHH – 56
Matching Terminations
Check your interconnect length !
Check your interconnect impedance!
Match receiver input impedance!
Match transmitter output impedance!
!
)2( RD TT
C. Schuster, TUHH – 57
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 58
Packaging of Digital Systems
Connector
Interconnect
(Link)
C. Schuster, TUHH – 59
Realistic Interconnect Models
Real-world transmission
and reflection may look very
complicated:
An appropriate model consists of
a concatenation of transmission lines
and parasitic lumped elements:
C. Schuster, TUHH – 60
Reminder: Lumped Elements
Parasitic lumped elements are not distributed and – as previously stated – may
be used in the following case:
Interconnect Element Length < 0.2...0.5 · Length of Signal Edge
Interconnect Element Delay < 0.2...0.5 · Rise/Fall Time of Edge
C. Schuster, TUHH – 61
Effect of Lumped Discontinuities
Signal
Out
Signal
In
u1 u2 50 W
50 W 2.5
nH
Tx-Output Bond Wire Rx-Input
Source
Voltage
Received
Voltage
© C. Schuster, TUHH
C. Schuster, TUHH – 62
Effect of Lumped Discontinuities
Attenuation of high frequency signal components
„Slowing down" of the edges of a digital signal
Frequency [GHz] Time [ps]
Magnitude o
f u
2 /
u1
u2(t
) /
u1(t
)
Frequency Response Step Response
f0 ≈ 6.37 GHz t 1/0 = 25 ps
C. Schuster, TUHH – 63
Effect of Lumped Discontinuities
u1 u2
Signal
In Signal
Out
50 W 50 W 1 pF
Tx-Output Via Rx-Input
Source
Voltage
Received
Voltage
© Y. Kwark, IBM
C. Schuster, TUHH – 64
Effect of Lumped Discontinuities
Attenuation of high frequency signal components !!
„Slowing down" of the edges of a digital signal !!
Frequency [GHz] Time [ps]
Magnitude o
f u
2 /
u1
u2(t
) /
u1(t
)
Frequency Response Step Response
f0 ≈ 6.37 GHz t 1/0 = 25 ps
C. Schuster, TUHH – 65
Effect of Distributed Discontinuities
lZ ,, 0Z0Z
GHzl
cf 952.2
4
1 inch, 45 Ohm mismatched transmission line at c0 /2
Frequency Response
(Scattering Parameters)
C. Schuster, TUHH – 66
Overall Effect of Discontinuities
0 0 0 0
Port1 Port2
Z=49
P=1cm
300fF
2nHZ=48
P=15cm
300fF
2nH
300fF
Z=52
P=5cm
300fF
Z=48
P=1cm
2nH
C. Schuster, TUHH – 67
Managing Discontinuities
Avoid them!
Check their impact!
Minimize them (± 10 Ohm around 50 Ohm)!
Compensate them (difficult)!
Concentrate on the “bottleneck!
!
C. Schuster, TUHH – 68
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 69
Packaging of Digital Systems
Connector
Interconnect
(Link)
C. Schuster, TUHH – 70
(3) Near End (4) Far End
Aggressor Line (Active Line)
Victim Line (Quiet Line)
(1) Input (2) Output
Effect of Coupling
Consider two transmission lines in close proximity:
C. Schuster, TUHH – 71
IC
IC-NE IC-FE
Effect of Coupling
Consider two transmission lines in close proximity:
Capacitive Crosstalk
C. Schuster, TUHH – 72
UL
UL-NE UL-FE
Effect of Coupling
Consider two transmission lines in close proximity:
Inductive Crosstalk
C. Schuster, TUHH – 73
UL
IC
(3) Near End (4) Far End
(1) Input (2) Output
NEXT =
Near End Crosstalk (sum of ind. and cap. crosstalk)
FEXT =
Far End Crosstalk (difference of ind. and cap. crosstalk)
Consider two transmission lines in close proximity:
Effect of Coupling
C. Schuster, TUHH – 74
(3) Near End (4) Far End
For weak coupling (kL,C ≤ 0.25) it is found approximatively:
(1) Input (2) Output
RT
DT
DTRD TT
RD2 TT
Polarity also depends
on coupling coefficients. Polarity is equal
to input polarity.
Effect of crosstalk
is usually small. INPUT
maxU
RT
Effect of Coupling
C. Schuster, TUHH – 75
Example from measurements:
Effect of Coupling
C. Schuster, TUHH – 76
It should be noted that these formulas do not take into account losses
on the lines or reflections from load mismatches.
)5.0(4
)5.0(2
RD
INPUT
maxLC
RD
INPUT
max
R
DLC
NEXT
max
TTUkk
TTUT
Tkk
U
INPUT
max
R
DLCFEXT
max2
UT
TkkU
Effect of Coupling
For weak coupling (kL,C ≤ 0.25) it is found approximatively:
C. Schuster, TUHH – 77
It should be noted that these formulas do not take into account losses
on the lines or reflections from load mismatches.
)5.0(4
)5.0(2
RD
INPUT
maxLC
RD
INPUT
max
R
DLC
NEXT
max
TTUkk
TTUT
Tkk
U
INPUT
max
R
DLCFEXT
max2
UT
TkkU
Effect of Coupling
For weak coupling (kL,C ≤ 0.25) it is found approximatively:
C. Schuster, TUHH – 78
Example for Coupling Coefficients
h
a
diameter = d
0
For two thin wires above infinite ground one can find:
1211
12C
CC
Ck
)/4ln(2
))/2(1ln( 2
dh
ah
C. Schuster, TUHH – 79
Reducing Coupling
Increase line separation!
Decrease distance to ground!
Balance capacitive and inductive coupling!
Increase rise time!
Reduce coupling length!
Use differential signaling!
!
C. Schuster, TUHH – 80
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 81
Losses on transmission lines are generated in electrical conductors (Ohmic
losses, R' > 0) and dielectrics (dielectric or polarization losses, G' > 0):
The attenuation constant is a measure for the decay of the voltage or current
amplitude per line length. Its unit is Np/m (Neper per meter).
One Np/m indicates that the wave amplitude has decayed to 1/e of its orginal
value after 1 m of propagation. An alternative unit is the dB/m with 1 dB/m = 20 ·
log10(e) Np/m ≈ 8.868 Np/m.
Attenuation values differ widely for the different transmission lines, e.g.:
PCB trace at 3 GHz ≈ 0.2 dB/cm, optical fiber at 200 THz ≈ 0.2 dB/km.
)()(Re CjGLjR
Transmission Line Losses
C. Schuster, TUHH – 82
Losses on transmission lines are generated in electrical conductors (Ohmic
losses, R' > 0) and dielectrics (dielectric or polarization losses, G' > 0):
The attenuation constant is a measure for the decay of the voltage or current
amplitude per line length. Its unit is Np/m (Neper per meter).
One Np/m indicates that the wave amplitude has decayed to 1/e of its orginal
value after 1 m of propagation. An alternative unit is the dB/m with 1 dB/m = 20 ·
log10(e) Np/m ≈ 8.868 Np/m.
Attenuation values differ widely for the different transmission lines, e.g.:
PCB trace at 3 GHz ≈ 0.2 dB/cm, optical fiber at 200 THz ≈ 0.2 dB/km.
)()(Re CjGLjR
Transmission Line Losses
C. Schuster, TUHH – 83
Time Domain Effect of Losses
When taking into account DC losses the effect in the time domain is twofold:
edge degradation
DC drop
Time
Voltage
step response
without losses
step response
with losses
C. Schuster, TUHH – 84
Attenuation usually increases with frequency. The exact calculation can be
difficult but for weakly lossy lines:
a convenient approximations exists:
with c = attenuation due to conductor losses and d = attenuation due to
dielectric losses. The following dependencies are often found:
with k = electrical conductivity and tan d = loss tangent.
CGLR and
dc22
C
LG
L
CR
d tan~ CGk /~R
Contributors to Line Losses
C. Schuster, TUHH – 85
Attenuation usually increases with frequency. The exact calculation can be
difficult but for weakly lossy lines:
a convenient approximations exists:
with c = attenuation due to conductor losses and d = attenuation due to
dielectric losses. The following dependencies are often found:
with k = electrical conductivity and tan d = loss tangent.
CGLR and
dc22
C
LG
L
CR
d tan~ CGk /~R
Contributors to Line Losses
C. Schuster, TUHH – 86
Attenuation usually increases with frequency. The exact calculation can be
difficult but for weakly lossy lines:
a convenient approximations exists:
with c = attenuation due to conductor losses and d = attenuation due to
dielectric losses. The following dependencies are often found:
with k = electrical conductivity and tan d = loss tangent.
CGLR and
dc22
C
LG
L
CR
d tan~ CGk /~R
Contributors to Line Losses
C. Schuster, TUHH – 87
Dielectric Packaging Materials
Dielectric materials are typically classified with respect to their
relatice dielectric constant r and their loss tangent tan d:
tan d
r
Quartz (SiO2) Alumina (Al2O3)
"FR-4"
Silicon Teflon (PTFE)
C. Schuster, TUHH – 88
For the frequency dependence follows with these assumptions:
In other words, a typical semi-
logarithmic plot of the magnitude
of the transfer function will be
dominated by a square root
behavior at lower and a linear
behavior at higher frequencies.
fflllleeeeeeH
dcdc constconst
~
ffH dc constconst~ln
linear
square root
total
Frequency Dependence of Losses
C. Schuster, TUHH – 89
Provided the overall transmission characteristics in frequency domain are
known an important question is: What does the time domain look like?
Connector
Package / Module
IC (Transmitter)
IC (Receiver)
Connector
Backplane / Motherboard
Socket
Da
ug
hte
rca
rd
Overall Bandwidth and Rise Time
C. Schuster, TUHH – 90
Overall Bandwidth and Rise Time
In general the answer can be found by an inverse (discrete) Fourier transform of
the transmitted signal spectrum.
In an approximative way the answer can be given using the BANDWIDTH-
DURATION PRINCIPLE of Fourier Theory which says that for any real-valued
waveform for which a bandwidth ΔF in frequency domain and a duration or rise
time ΔT in time domain can be specified the following relationship* holds:
Transfer Function
f
Impulse Response
t
Step Response
t
const. TF
IFT ∫ ΔF ΔT ΔT
* (definitions of bandwidth and duration / rise time vary)
C. Schuster, TUHH – 91
Overall Bandwidth and Rise Time
For a definition of ΔF and ΔT as follows:
Frequency at which the transmission has degraded
by a factor of -3dB.
Time which is required by the step response to rise
from a 10% to a 90% level of full signal swing.
The constants can be found analytically to be in the range from 0.33 to 0.36 for
Gaussian, exponential and first order low pass filters.
Based on this the respone of a step with finite rise time TR can be estimated as:
dB3FF
90/10TT
2
90/10
2
dtransmitteR,receivedR, )()( TTT
C. Schuster, TUHH – 92
Limiting Attenuation
Ask first: Is attenuation really limiting you?
Check for most important loss effect!
Increase line width if possible!
Use dielectrics with low loss tangents!
Apply equalization techniques!
!
C. Schuster, TUHH – 93
Improving Signal Integrity
1. Match terminations
2. Minimize discontinuities
3. Reduce coupling
4. Limit attenuation
5. Balance deficiencies
C. Schuster, TUHH – 94
Realistic Interconnects
A realistic interconnect for digital signals is a composed of many different
structural elements:
Connector
Package / Module
IC (Transmitter)
IC (Receiver)
Connector
Backplane / Motherboard
Socket
Da
ug
hte
rca
rd
C. Schuster, TUHH – 95
Realistic Interconnects
Accordingly, the transmission
and reflection may look very
complicated:
An appropriate model for such an interconnect can be obtained by
concatenation of transmission lines and parasitic lumped elements:
C. Schuster, TUHH – 96
Compensation vs. Equalization
In order to increase the bandwidth of the interconnect the following measures
can be taken:
(1) Compensation of individual parasitic lumped elements
(2) Compensation of individual mismatched transmission line sections
(3) Equalization of the complete interconnect by an analog or digital filter
(1) and (2) are local countermeasures, (3) is a global countermeasure
(3) (1) (2) (3)
C. Schuster, TUHH – 97
Compensation of Lumped Parasitics
Lumped parasitic elements are usually compensated by:
Adding local balancing elements, i.e. right before, behind, or in the middle
(e.g. capacitive elements for inductances and vice versa)
Adding remote balancing elements, i.e. in a distance before of behind that
has to be considered as electrically significant (and, hence, has to be
modelled as a transmission line section)
The physical implementation of the balancing element can be e.g. a ground
plane cut out, a removal of a dielectric, the thinning or shaping of a trace etc.
C. Schuster, TUHH – 98
Overview of Equalization Techniques
Tx
CDR
.
.
.
Deserializer
Interconnect
Clock & Data Recovery
Data .
.
.
Serializer
Data
Clock
Equalizer
Equalizer
+ Slicer
Rx
Most high speed serial links nowadays use some EQUALIZATION, i.e. some
kind of signal processing technique to correct for the degradations in the
interconnect, and thereby improve the quality of signals. When the corrections
are applied at the transmitter equalization is sometimes also called DE-
EMPHASIS or PRE-EMPHASIS. Apart from continuous time equalization (CTE)
signal processing takes place in the discrete time domain / digital filters.
C. Schuster, TUHH – 99
Overview of Equalization Techniques
In frequency domain the effect of equalization can be to some extent be
visualized as the flattening of the transfer function of the interconnect.
An interconncet with a completely flat transfer function would transmit a signal
undisturbed apart from a potential amplitude scaling.
f
TF
Interconnect
f
Equalization
f
Equalized Response
=
C. Schuster, TUHH – 100
Two big classes of (digital, discrete) equalization exist:
Equalization
Linear Feedforward
Equalization (LFE/FFE) Distributed Feedback
Equalization (DFE)
- Uses only information from the
current and previously received
bits
- Can be interpreted as a non-
recursive digital filter (finite
impulse response filter)
- Uses a feedback loop after the
signal has been decoded by an
LFE/FFE
- The output of the LFE/FFE is
added to the feedback loop
resulting in the equalized signal
Overview of Equalization Techniques
C. Schuster, TUHH – 101
Balancing Deficiencies
Consider a local balancing for lumped
deficiencies!
Consider a global equalization for
distributed deficiencies!
Start using LFE/FFE and add DFE only if
necessary!
!
C. Schuster, TUHH – 102
(4)
Vias and Return Currents
C. Schuster, TUHH – 103
The Problem With Vias
Load
SignalVia
Signal Current
Load
Ground Via
Return Current
C. Schuster, TUHH – 104
The noise voltage generated
by a return current of a
signal via passing a pair of
parallel power/ground planes
is fairly well understood.
It is influenced both by the
geometry of the planes as
well as the number and
location of ground vias
nearby.
Via current
Return current
Port 1
Port 2
Parallel-
plate
modes
Ground
via
z
x y
Cavity
thickness d
Vias and Parallel Planes
C. Schuster, TUHH – 105
Time domain simulation results (Gaussian pulse) with infinite planes:
Port 1
Port 2
Cylindrical waves excited inside
one cavity
Top view, 5th cavity Cross-section
Excitation
Vias and Parallel Planes
C. Schuster, TUHH – 106
Frequency domain simulation results (40 GHz) with infinite planes:
Port 1
Port 2
Phase animation at 40 GHz
Top view, 5th cavity Cross-section
Excitation
Vias and Parallel Planes
C. Schuster, TUHH – 107
Investigation of Via Return Currents
Effect of number
of ground vias:
6 GND vias 4 GND vias
2 GND vias 1 GND via
GND via
C. Schuster, TUHH – 108
Investigation of Via Return Currents
Effect of number
of ground vias:
Frequency [GHz]
Mag
nit
ud
e o
f S
12 [
dB
]
1 GND vias
2 GND vias
4 GND vias
6 GND vias
C. Schuster, TUHH – 109
Investigation of Via Return Currents
Signal via
rvia = 5 mil
rantipad = 15 mil
Ground via
d
Return currents for one signal and one ground via between infinite planes
Variable distance
10 mil εr = 3.8,
tan δ = 0.03
Boundary condition: PML
Copper
d
Variable distance
C. Schuster, TUHH – 110
Investigation of Via Return Currents
Return currents for one signal and one ground via between infinite planes
SIGGR / IISIGDR / II
C. Schuster, TUHH – 111
Investigation of Via Return Currents
Signal via
rvia = 5 mil
rantipad = 15 mil
Ground via
d
Return currents for one signal and one ground via between finite planes
Variable distance
10 mil εr = 3.8,
tan δ = 0.03
Boundary condition: PMC
Copper
d
Variable distance
Board size:
1 x 2 inch
C. Schuster, TUHH – 112
Investigation of Via Return Currents
Return currents for one signal and one ground via between finite planes
SIGGR / IISIGDR / II
C. Schuster, TUHH – 113
A “Physcis-Based” Model for Vias
Via Cross Section
Zp
Zpp
Zp
viu
vil
iiu
iil
v'il
i'iu
i'il
vi
l
l
u
u
i
ipp
i
i
i
vZ
i
v
10
1
u
u
uu
u
i
i
pi
i
i
v
Zi
v
1/1
01
'
'
l
l
ll
l
i
i
pi
i
i
v
Zi
v
'
'
1/1
01Via
Plane
Plane Cp
Cp
Zpp:
(Parallel Plate
Impedance)
Current
© Y. Kwark, IBM
C. Schuster, TUHH – 114
What Does Zpp Look Like?
Example: Large board with dielectric losses (eps_r = 4, h = 10 mil
)
(ports are 80 mil separated from each other)
(corresponds to approx.
0.16 nH @ 10 GHy)
C. Schuster, TUHH – 115
Where Do We Zpp Get From?
x
y
z
(0,0,0) (a,0,0)
(a,b,0)
(a,b,d)
Port i Port j (xi,yi)
Open
Plane
Edges Voltage
Current
(xj,yj)
Filling with and m
0 0222
22)cos()cos()cos()cos(
)(m n ynxm
jynjxmiynixm
nmijkkk
ykxkykxkCC
ab
djZ
m
otherwise 2 and 0,for 1 , nmCC nm
m
kb
nk
a
mk ynxm
C. Schuster, TUHH – 116
Trace between planes:
2 Modes: Stripline + Parallel Plate
Modal decomposition: find suitable transformation matrices to diagonalize MTL equations
Stripline Mode
Parallel Plate Mode (pp)
Including Striplines
© Y. Kwark, IBM
C. Schuster, TUHH – 117
Including Striplines
2
1
2
1
22
22
2
1
2
1
)12()(
)(
gs
gs
ps
ps
ppstriplineppstripline
ppstriplineppstripline
gs
gs
ps
ps
V
V
V
V
YYkkYYkk
YYkkYYk
I
I
I
I
21
1
hh
hk
h2
h1
R. Rimolo-Donadio, H. D. Brüns, C. Schuster, “Including Stripline Connections into Network Parameter Based Via Models for Fast
Simulation of Interconnects,” International Zurich Symposium on Electromagnetic Compatibility, Switzerland, Jan. 12-15, 2009.
C. Schuster, TUHH – 118
Decoupling capacitor model
Cavity
representation
S-Parameter
Matrix
Port 1 Port n
Cavities joined by
segmentation
techniques
R. Rimolo-Donadio et al., “Physics-Based Via and Trace Models for Efficient Link Simulation on Multilayer
Structures up to 40 GHz", IEEE Trans. Microw. Theory and Techn., vol. 57, no. 8, pp. 2072-2083, August 2009.
Zpp Ztl
Decap
Linterc. Decoupling capacitor model
Zpp Ztl
Decap
Linterc. Decoupling capacitor model Decap
Linterc. Decoupling capacitor model
Cavity
representation
Stacking the Deck
C. Schuster, TUHH – 119
6 Vias, 4 traces case
Centered striplines at two
levels, and thru vias in a 6
cavity stackup
Full-wave model
Mag
nit
ude
of
S12 [
dB
]
Frequency [GHz]
Model
FEM simulation
FIT simulation Full-wave model M
agn
itu
de
of
S14 [
dB
]
Frequency [GHz]
Model
FEM simulation
FIT simulation
Comparison with Full-Wave Results
C. Schuster, TUHH – 120
• 119 vias (76 signal,
43 ground)
• 14 differential
striplines (2D)
• 6 cavities
• Terminations
Comp. time: < 3 min
Assumption
of infinite
plates
Comparison with Measurements
© Y. Kwark, IBM
C. Schuster, TUHH – 121
Models capture the salient features of the
hardware response despite the drastic
model simplification
|S13| [dB] - FEXT |S12| [dB] - IL
Link 10 -
S3 Stripline
Link 17 -
S5 Stripline
Link 10 -
S3 Stripline
Link 17 -
S5 Stripline
Measurement Link 10
Measurement Link 17
Model Link 10
Model Link 17
Comparison with Measurements
C. Schuster, TUHH – 122
(5)
Measurement Techniques
C. Schuster, TUHH – 123
Multiport Vector Network Analysis
Agilent Vector Network
Analyzer 8364C with
12-port extension at
Institute of Electromagnetic
Theory (TUHH)
12 ports
Bandwidth 10 MHz – 50 GHz
Electronic calibration module
Advanced calibration software
© C. Schuster, TUHH
C. Schuster, TUHH – 124
There is No Free L(a)unch …
© C. Schuster, TUHH
C. Schuster, TUHH – 125
Surface Connectors
STRUCTURE UNDER TEST
5 mm
STRUCTURE UNDER TEST
MICRO-PROBE Access Vias
5 mm
Common Surface Launches
... but vias are usually a high
frequency bottleneck !
C. Schuster, TUHH – 126
STRUCTURE
UNDER TEST
MICRO-
PROBE
MICRO-
PROBE Ground Vias
Ground pads with “U” strap
Signal trace
No access vias → less distortion → probes closer to the structure
The Recessed Probe Launch (RPL)
© Y. Kwark, IBM
M. Kotzev et al., “Electrical Performance of the Recessed Probe Launch Technique for Measurement of Embedded
Multilayer Structures", IEEE Trans. Instr. and Meas., vol. 61, no. 12, pp. 3198-3206, December 2012.
C. Schuster, TUHH – 127
TV1 courtesy of IBM, Yorktown USA
(open instead of short was used) Typical Recessed Probe Launch
GGB Microprobes 225µm pitch
• Implementation of the Thru-Reflect-Line calibration algorithm
• Using two-tier calibration and line standards for extraction of the RPL on TV1
Stripline
Ground Vias
U shape
RPL Error Box Extraction
© Y. Kwark, IBM
© Y. Kwark, IBM
C. Schuster, TUHH – 128
Error boxes of RPLs from TRL calibration
(thru = 90 mil long, line = 220 mil long)
RPL Error Box Extraction
C. Schuster, TUHH – 129
Problems with Via Arrays
13
mm 45°
Via array
Via array
129
… many vias at tight pitch!
© C. Schuster, TUHH © C. Schuster, TUHH
C. Schuster, TUHH – 130
Problems with Via Arrays
130
… who has time for this?
PCB
Probe
Probe Probe
Probe
© C. Schuster, TUHH
C. Schuster, TUHH – 131
The Interposer Concept
~ 1 cm
SMA or SMP Connectors
~ 1 cm
~ 1 mm
Signal pitch conversion from ~1 cm to ~1 mm
& easy multiport access
131
C. Schuster, TUHH – 132
Typical Measurement Set-up
Multiport VNA
Interposer 1 Interposer 2
High speed serial links
132
C. Schuster, TUHH – 133
Interposer Prototype
133
Interposer
LGA
SMP
connectors
Test
board
Clamping and pressure plates
SMP
adapters
Hardware courtesy of
IBM YKT (Y. Kwark)
© C. Schuster, TUHH
C. Schuster, TUHH – 134
First Measurement Results
1st interposer connected to
the via array 2nd interposer connected to the
via array
Stripline connecting vias
from both via arrays
134
Hardware courtesy of
IBM YKT (Y. Kwark) © C. Schuster, TUHH
C. Schuster, TUHH – 135
Al2O3 Metal layer (Au)
Metal layer: Gold
σ = 4.1 *107 S/m
εr = 9.8
tanδ = 0.002
Thin film resistor
Dedicated Calibration Substrate
135
© C. Schuster, TUHH
C. Schuster, TUHH – 136
136
Good separation of the
designed standards
Dedicated Calibration Substrate
C. Schuster, TUHH – 137
VNA
1
2
6
E-Box 1
E-Box 2
E-Box 6
Digital
Link
Interposer 1
Cables
1
2
6
E-Box 7
E-Box 8
E-Box 12
VNA
7
8
12
Interposer 2
Cables
7
8
12
Second tier SOL - calibration on
the alumina substrate
First tier coaxial SOLT calibration
137
Deembedding Approach
C. Schuster, TUHH – 138
Deembedding Tool
E-Box
4- Port 1
3
r are the ports of the error box connected to q
q are the ports which have to be deembedded
2
4
3 2 1
C. Schuster, TUHH – 139
(6)
Wrapping Up
C. Schuster, TUHH – 140
Electrical Integrity of Digital Systems
C. Schuster, TUHH – 141
Electrical Integrity of Digital Systems
The basic goals of EMC, SI, and PI for an electrical system are
complementary to each other.
SIGNAL INTEGRITY: insure
acceptable quality of signals within
POWER INTEGRITY: insure
acceptable quality of power
delivery within
EMC: insure acceptable level of
interference with the outside
EMI
Frequency
Target
System
Frequency
PDN
Impedance
Target
System
SNR
Frequency
Target System
C. Schuster, TUHH – 142
Further Resources (Selection)
C. R. Paul, "Introduction to Electromagnetic Compatibility", Wiley & Sons (1993)
H. Johnson, "High-Speed Digital Design", Prentice Hall (1993)
S. Ramo et al., "Fields and Waves in Communication Electronics", Wiley & Sons (1994)
R. K. Poon, "Computer Circuits Electrical Design", Prentice Hall (1995)
Brian Young, "Digital Signal Integrity", Prentice Hall (2001)
B. Archambeault, "PCB Design for Real-World EMI Control", Springer (2002)
W. Maichen, "Digital Timing Measurements", Springer (2006)
D. Derickson et al., "Digital Communications Test and Measurement", Prentice Hall (2007)
Workshop on Signal Propagation on Interconnects (SPI): http://www.spi2016.org/
Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS):
http://www.epeps.org/
Electronic Components and Technology Conference (ECTC): http://www.ectc.net/
IEEE Transactions (mostly EMC and AP): http://ieeexplore.ieee.org/
Signal Integrity Mailing List: http://www.freelists.org/list/si-list
C. Schuster, TUHH – 143
http://www.tet.tuhh.de
C. Schuster, TUHH – 144
© C. Schuster, TUHH