Semiconductor Education Education ... System Integration & Scaling ... Technology Development New...

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Semiconductor Education A Paradigm Shift Indian Institute of Science, Bangalore Rudra Pratap

Transcript of Semiconductor Education Education ... System Integration & Scaling ... Technology Development New...

Page 1: Semiconductor Education Education ... System Integration & Scaling ... Technology Development New Frontier Opening Ideas Product Development

Semiconductor Education A Paradigm Shift

Indian Institute of Science, Bangalore

Rudra Pratap

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•  India’s rightful place in the semiconductor technology world

•  Bangalore – Silicon valley of India

•  Transformation from services to systems, software to sought-after-ware

Major  Goals  

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Change  Agents  

Educa5on   Research  

Industry  Government  

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Usual Education

New Education

Job Seeker

Theoretical Information Centric

Job Creator

Hands-on Technology

Rich

Educa5on  

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•  Technology-aware, status-challenging, NOT follower research

•  Problem-oriented, application-savvy, possibly wealth generator

•  Team-oriented, skill-integrator, real impact making work

•  Not risk averse, new frontier creator •  Industry-friendly

Research  

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Major  Opportuni5es  

Technology   Integra/on   Applica/on  

System Scaling

Functional Scaling Path

Agriculture Energy

Healthcare

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R. Pratap, IISc 7 Courtesy: Dr. Gary Patton, IBM

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Nanoelectronics

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Scaling

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System Integration & Scaling

A multi-sensor 3-D integrated chip for smart watches

Bio  Sensors  for  Health  Monitoring  

Energy  Harves/ng   Energy  Storage  

CMOS  

Iner/al  Sensors  

Environmental  Sensor  Pressure  sensor  

Microneedles    

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Human Resource Requirements

Estimated number of nanotech workers in 2014: 2 million Ratio of highly trained (researcher grade) to technician: 1:8

The world would need: Researchers (PhDs): 250,000 Trained nanotechies: 1,750,000

What should be our share? How are others preparing for it? Examples: Take a look at USA, China

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HRD  Ambi/on  

1000 PhDs per year through a network program

Major centres

Satellite centres

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R. Pratap, CeNSE, IISc

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Academia-Industry Partnership Technology Readiness Ladder

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TRL &

The Indian Scenario

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@ CeNSE

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CeNSE at a Glance

•  Core faculty: 11 (7 + 4) •  Associate Faculty: 14 •  PhD students: 120 •  Postdocs: 5 •  Technical Staff: 50 •  Admin Staff: 15 •  Infrastructure: NNFC, MNCF, 16 other Labs

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Guiding theme: Social Impact

CeNSE    Major  Thrust  

Educa5on  Research   Commer-­‐cializa5on  Incuba5on  

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Collaborations Research Projects

Human Resource

Development

Technical Outreach

Academic IITB, Cornell, EPFL, etc. National R&D ISRO, SITAR, DRDO Industrial IBM, Tokyo Electron, AD

Social (on policy and ethics)

•  PhDs •  Postdocs •  MS •  BS

•  INUP •  NMDCs •  Interns •  Industry meet

Detailed Research Matrix

CeNSE    Ac5vi5es  

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Research  Classifica5on  

Basic Research

Technology Development

New Frontier Opening Ideas

Product Development High  impact    

research  

High  impact    research  

Major    opportuni5es  

Commercial  poten5al  

Industrial  partnership  

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Modeling & Simulation

Major Research Areas

Nano materials Nanoelectronics Process

Technology MEMS & NEMS

A truly interdisciplinary effort involving several departments in science and engineering faculty spanning areas from materials research to system integration

AE

CEDT

ChE

CPDM

ECE

IPC

IN

MatE

MRC

MBU

ME

Phy

SERC

About 50 faculty members from 14 Departments

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Area/ Impact

Creation of New Frontiers

Continuing Research

Technology Development

Products for Social Impa c t

Energy

Bio Engineering

Agriculture

Modelling and Simulation

TrR and memory technologies

Sensor systems

   Research  Matrix:  Ongoing  Projects  

31 projects 74 faculty 14 fields

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Technology Examples

1. Nano-zinc ferrite layers as inductor core for GHz RF-CMOS

•  Solution processing at <250oC, compatible with CMOS technology

•  Uses safe complexes of Zn and Fe •  Enables circuit performance up to 10

GHz, highest to date •  “Ready” for 5 G, perhaps even 6 G

Mobile communications •  Patent application filed •  Scale-up Engineering under way; very

“green” process

Frequency (GHz) 2 4 6 8 10

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GaN Power Electronics

Reactor at IISc Substrate

Laser Diode

Etalon

CCD Detector

Substrate

Laser Diode

Etalon

CCD Detector

Stack A Stack B Stack C

-N. Mohan, N. Ravishankar and S. Raghavan, Just accepted, Appl. Phys. Lett.

Thinnest transition from Si to crack free GaN. Reduced from ~2 µm

to 200 nm.

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Collaborations •  Academic

–  IIT Bombay –  NITK Surathkal –  IIT Hyderabad –  Stanford University –  Cornell University –  EPFL Lausanne –  UC Berkeley –  Univ. of Western Aust. –  Tokyo University

•  Industrial –  Analog Devices –  Tokyo Electron –  Samsung –  TI (Leadership University) –  Centum Electronics –  Bharat Electronics Ltd. (BEL) –  Semiconductor Complex

Limited (SCL) –  SITAR

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New Initiatives

Visi5ng    Faculty  

Industry  Affiliates  

System  Scaling  Nano-­‐Agri  

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Industry Affiliate Members

•  Centum Electronics •  Analog Devices •  Samsung Electronics •  Hindustan Unilever Limited •  IBM Corporation •  Lam Research •  Tokyo Electron

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Infrastructure  

•  State of the art 14,000 sqft cleanroom benchmarked against the best in the world

•  Reasonable size of fab facility to support networked activities

•  Comprehensive characterization facilities (SEMs, FIB, SAM, MSA, µPL, ProbeStations, etc.)

•  16 other functionally distinct labs (e.g., Neuroelectronics, Systems Electronics, Packaging, etc.) •  Dedicated support staff

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Central Clean Corridor

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Micro & Nano Characterization Facility

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Outreach:  INUP  (Indian  Nanoelectronics  Users  Program)  

•  Three Levels of training (IISc & IITB) –  Level 1: Familiarization –  Level 2: Hands on Training –  Level 3: Extensive Training

•  More than 150 Institutions interacting at various levels

•  Collaborative Projects

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Output:  No.  trained  through    Familiariza/on  workshops:  620    No.  of  Projects  completed:  39+121*          (Medium  term  +  *Short  term)    Manpower  trained:  364    No.  of  Publica/ons:  61#    

No.  of  Patents:  03#  

INUP  Overview,  2007-­‐2012  

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Outreach:  NMDCs  NPMASS  Sponsored  Na/onal  MEMS  Design  Centres  

6 Resource Centres 56 Tier I & Tier II Centres

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Back to the Future

•  We are here to update you with education and research initiatives

•  Need you to get involved and work more closely

•  Need you to rally for “filling the gap”

•  Let’s start with rallying for a commercial prototyping fab in Bangalore

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Acknowledgements

IESA Dr. Prabhakararao

Dr. Vijay Mishra Mr. Manjunath Jyothinagar, UHP

Thank you!