S5U13513P00C100 Evaluation Board User Manual · 01000b MIPS/ISA Little Endian: ... 10110b...

S1D13513 Display Controller

S5U13513P00C100 Evaluation Board User Manual

Document Number: X78A-G-003-01

Status: Revision 1.0

Issue Date: 2007/03/30

© SEIKO EPSON CORPORATION 2006-2007. All Rights Reserved.

Information in this document is subject to change without notice. You may download and use this document, but only for your own use inevaluating Seiko Epson/EPSON products. You may not modify the document. Epson Research and Development, Inc. disclaims anyrepresentation that the contents of this document are accurate or current. The Programs/Technologies described in this document may contain material protected under U.S. and/or International Patent laws.

EPSON is a registered trademark of Seiko Epson Corporation. All other trademarks are the property of their respective owners.

Revision 1.0

Epson Research and DevelopmentVancouver Design Center

S1D13513 S5U13513P00C100 Evaluation Board User ManualX78A-G-003-01 Issue Date: 2007/03/30

Revision 1.0

Epson Research and Development Vancouver Design Center

Table of Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Installation and Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.1 Configuration DIP Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.2 Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Technical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.1 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1.1 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.1.2 Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.1.3 S1D13513 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.2 Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.3 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.4 Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.4.1 Connecting to the Epson S5U13U00P00C100 USB Adapter Board . . . . . . . . . 154.4.2 Connecting to the Epson PC Card Extender Board . . . . . . . . . . . . . . . . . . 154.4.3 Direct Host Bus Interface Support . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.5 LCD Panel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.6 Camera Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.7 YUV Output for TV Display . . . . . . . . . . . . . . . . . . . . . . . . 194.8 Keypad Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.9 PWM Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.10 GPIO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.11 JTAG Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

7 S5U13513P00C100 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308.1 Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308.2 Document Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

9 Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319.1 EPSON Display Controllers (S1D13513) . . . . . . . . . . . . . . . . . . . . 319.2 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

S5U13513P00C100 Evaluation Board User Manual S1D13513Issue Date: 2007/03/30 X78A-G-003-01

Revision 1.0



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1 IntroductionThis manual describes the setup and operation of the S5U13513P00C100 Evaluation Board. The evaluation board is designed as an evaluation platform for the S1D13513 Display Controller.

The S5U13513P00C100 evaluation board can connect to the S5U13U00P00C100 USB Adapter board so that it can be used with a laptop or desktop computer, via USB 2.0. With some minor modifications, it is possible to connect the S5U13513P00C100 evaluation board to a Epson PC Card Extender board instead of a USB Adapter board. The S5U13513P00C100 evaluation board can also be used with many other native platforms via the host connectors which provide the appropriate signals to support a variety of CPUs.

This user manual is updated as appropriate. Please check the Epson Research and Devel-opment Website at www.erd.epson.com for the latest revision of this document before beginning any development.

We appreciate your comments on our documentation. Please contact us via email at [email protected].


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2 FeaturesThe S5U13513P00C100 Evaluation Board includes the following features:

• 256-pin PBGA S1D13513 Display Controller

• On-board SDRAM, selectable as 8MB x 32-bit or 8MB x 16-bit

• Headers for connection to the S5U13U00P00C100 USB Adapter board or to the PC Card Extender board

• Headers for connecting to various Host Bus Interfaces

• Headers for connecting to LCD panels

• Headers for connecting to cameras

• On-board 10MHz crystal (used for OSC1 clock input)

• On-board 27MHz crystal (used for OSC2 clock input)

• 14-pin DIP socket (used to install an oscillator for CLKI3 clock input)

• 3.3V input power

• On-board voltage regulator with 1.8V output


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3 Installation and ConfigurationThe S5U13513P00C100 evaluation board incorporates a DIP switch, jumpers, and 0 ohm resistors which allow it to be used with a variety of different configurations.

3.1 Configuration DIP Switch

The S1D13513 has configuration inputs (CNF[8:0]) which are read on the rising edge of RESET#. A 10-position DIP switch (SW1) is used to configure the S1D13513 for multiple Host Bus Interfaces. The following figure shows the location of DIP switch SW1 on the S5U13513P00C100.

Figure 3-1: Configuration DIP Switch (SW1) Location

All S1D13513 configuration inputs (CNF[8:0]) are fully configurable using DIP switch SW1 as described below.

Table 3-1: Summary of Power-On/Reset Options

SDU13513B00C SW1-[10:1] Config

S1D13513 CNF[8:0] Config

Power-On/Reset State1 (ON) 0 (OFF)

SW1-[10] - Not used

SW1-[9:8] CNF[8:7]

00b CLKI3 is the PLL1 clock source

01b BUSCLK is the PLL1 clock source

10b OSC1 is the PLL1 clock source

11b OSC2 is the PLL1 clock source

SW1-[6] CNF5 Indirect access Direct access

SW1-[7] CNF6 See Table 3-2: “CNF[4:0] Setting for CNF[6] = 1b”

See Table 3-3: “CNF[4:0] Setting for CNF[6] = 0b”

SW1-[5:1] CNF[4:0] 00000b Parallel Direct 80 Type 2: 1CS# (see Table 3-2: “CNF[4:0] Setting for CNF[6] = 1b” )

= Required settings when using S5U13U00P00C100 USB Adapter board (SW1-[9:1] = 101000000b)

DIP SWITCH - SW1


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Table 3-2: CNF[4:0] Setting for CNF[6] = 1b

CNF[4:0] Host Bus00000b Parallel Direct 80 Type 2: 1 CS#00001b Parallel Direct 80 Type 3: 1 CS#00010b Parallel Indirect 80 Type 200011b Parallel Indirect 80 Type 300100b Parallel Direct 80 Type 1: 1 CS#00101b Parallel Direct 68: 1 CS#00110b Parallel Indirect 80 Type 100111b Parallel Indirect 6801000b Parallel Direct 80 Type 2: 2 CS#01001b Parallel Direct 80 Type 3: 2 CS#01010b Reserved01011b Reserved01100b Parallel Direct 80 Type 1: 2 CS#01101b Parallel Direct 68: 2 CS#01110b Reserved01111b Reserved10000b Serial on HVDD1: Data valid on falling edge10001b Serial on HVDD2: Data valid on falling edge10010b Reserved10011b Reserved10100b Reserved10101b Reserved10110b Reserved10111b Reserved11000b Serial on HVDD1: Data valid on rising edge11001b Serial on HVDD2: Data valid on rising edge11010b Reserved11011b Reserved11100b Reserved11101b Reserved11110b Reserved11111b Reserved

= Required settings when using S5U13U00P00C100 USB Adapter board (SW1-[9:1] = 101000000b)


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Table 3-3: CNF[4:0] Setting for CNF[6] = 0b

CNF[4:0] Host Bus00000b Generic Little Endian: Active Low WAIT# with tri-state00001b Generic Little Endian: Active Low WAIT# always driven00010b Generic Little Endian: Active HIgh WAIT# with tri-state00011b Reserved00100b Generic Big Endian: Active Low WAIT# with tri-state00101b Generic Big Endian: Active Low WAIT# always driven00110b Generic Big Endian: Active HIgh WAIT# with tri-state00111b Reserved01000b MIPS/ISA Little Endian: Active Low WAIT# with tri-state01001b MIPS/ISA Little Endian: Active Low WAIT# always driven01010b MIPS/ISA Little Endian: Active HIgh WAIT# with tri-state01011b Reserved01100b MC68000 Big Endian: Active High WAIT# with tri-state01101b Reserved01110b MC68030 Big Endian: Active High WAIT# with tri-state01111b Reserved

10000b PR31500/31700/TX3912 Little Endian: Active Low WAIT# with tri-state (16-bit memory accesses only)

10001b PR31500/31700/TX3912 Little Endian: Active Low WAIT# always driven (16-bit memory accesses only)

10010b Reserved10011b Reserved10100b Reserved10101b Reserved10110b MPC821/555/556 Big Endian: Active High WAIT# with tri-state10111b Reserved11000b SH3 Little Endian: Active Low WAIT# with tri-state11001b SH3 Little Endian: Active Low WAIT# always driven11010b SH4 Little Endian: Active High WAIT# with tri-state11011b Reserved11100b SH3 Big Endian: Active Low WAIT# with tri-state11101b SH3 Big Endian: Active Low WAIT# always driven11110b SH4 Big Endian: Active High WAIT# with tri-state11111b Reserved


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3.2 Configuration Jumpers

The S5U13513P00C100 has 11 jumper blocks which configure various board settings. The jumper positions for each function are shown below.

Table 3-4: Configuration Jumper SummaryJumper Function Position 1-2 Position 2-3 No Jumper

JP1 COREVDD Normal — COREVDD current measurement

JP2 PLLVDD1 Normal — PLLVDD1 current measurement

JP3 PLLVDD2 Normal — PLLVDD2 current measurement

JP4 OSCVDD1 Normal — OSCVDD1 current measurement

JP5 OSCVDD2 Normal — OSCVDD2 current measurement

JP6 HVDD1 Normal — HVDD1 current measurement





JP11 SDRAM Width Select 32-bit wide SDRAM 16-bit wide SDRAM —


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JP1-JP10 - Power Supplies for the S1D13513

JP1-JP10 can be used to measure current consumption of each S1D13513 power supply.When the jumper is at position 1-2, normal operation is selected.When no jumper is installed, the current consumption for each power supply can be measured by connecting an ammeter to pin 1 and 2 of the jumper.

The jumper associated to each power supply is as follows:

JP1 for COREVDDJP2 for PLLVDD1JP3 for PLLVDD2JP4 for OSCVDD1JP5 for OSCVDD2JP6 for HVDD1 (Host interface)JP7 for HVDD2 (LCD Panel interface)JP8 for HVDD3 (Camera2 interface)JP9 for HVDD4 (Camera1 interface)JP10 for HVDD5 (SDRAM interface)

Figure 3-2: Configuration Jumper Locations (JP1-JP10)

JP10

JP1JP8

JP9JP7JP6

JP4JP5JP2JP3


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JP11 - SDRAM Width Select

JP11 is used to select the bus width of the external SDRAM.When the jumper is at position 1-2, the external SDRAM is 32-bit wide and memory size is 32MB. The memory consists of 2 chips in parallel, each 16MB and 16-bit wide.When the jumper is at position 2-3, the external SDRAM is 16-bit wide and memory size is 16MB. In this position one memory chip is disabled and only one chip is active (16MB and 16-bit wide).

Figure 3-3: Configuration Jumper Location (JP11)

JP11


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4 Technical Description

4.1 Power

4.1.1 Power Requirements

The S5U13513P00C100 evaluation board requires an external regulated power supply (3.3V at 1A). The power is supplied to the evaluation board through pin 5 of the P2 header, or pin 29 of the H2 header.

The green LED ‘3.3V Power’ is turned on when 3.3V power is applied to the board.

4.1.2 Voltage Regulators

The S5U13513P00C100 evaluation board has an on-board linear regulator to provide the 1.8V power required by the S1D13513 Display Controller.

Additionally, there is a step-up switching voltage regulator to generate 6~24V. This output is adjustable and can be used to power the LED backlight on some LCD panels.

4.1.3 S1D13513 Power

The S1D13513 Display Controller requires 1.8V and 3.3V power supplies.

1.8V power is provided by the on-board linear voltage regulator. It is used for CoreVDD, PLLVDD1, PLLVDD2, OSCVDD1, OSCVDD2.

3.3V power must be provided by the external power supply. It is used for HVDD1 (host interface - HIOVDD), HVDD2 (LCD panel interface - PIOVDD), HVDD3 (camera 2 interface - CIOVDD2), HVDD4 (camera 1 interface - CIOVDD1), and HVDD5 (SDRAM interface).

HIOVDD is connected to 3.3V through a 0 ohm resistor, R31. If it is desired to have a different voltage for HIOVDD, R31 must be removed and the desired supply connected to pin 11 of connector P1.

PIOVDD is connected to 3.3V through a 0 ohm resistor, R33. If it is desired to have a different voltage for PIOVDD, R33 must be removed and the desired supply connected to pin 32 of connector H4.

CIOVDD2 is connected to 3.3V through a 0 ohm resistor, R34. If it is desired to have a different voltage for CIOVDD2, R34 must be removed and the desired supply connected to pin 15 of connector H7.


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CIOVDD1 is connected to 3.3V through a 0 ohm resistor, R70. If it is desired to have a different voltage for CIOVDD1, R70 must be removed and the desired supply connected to pin 15 of connector H6.

HVDD5 is always connected to 3.3V.

NoteThe recommended range for HVDD1 (HIOVDD), HVDD2 (PIOVDD), HVDD3 CIOVDD2), and HVDD4 (CIOVDD1) is 3.0V~3.6V.

4.2 Clocks

S1D13513 has four clock inputs: BUSCLK, OSC1, OSC2 and CLKI3. BUSCLK and CLKI3 require a clock provided by an external oscillator. OSC1 and OSC2 have an internal oscillator and can work with a crystal or with an external oscillator.

For the S5U13513P00C100 evaluation board, OSC1 and OSC2 use crystals (10MHz for OSC1 and 27MHz for OSC2).

For the S5U13513P00C100 evaluation board, CLKI3 is not used and is pulled to ground by a 10kΩ resistor. However, if CLKI3 is required, connect a 14-pin, DIP package oscillator in the Y1 footprint.

For the S5U13513P00C100 evaluation board, BUSCLK is not used and is pulled to ground by a 10kΩ resistor. However, if BUSCLK is required, the BUSCLK pin is connected to the H2 connector and to the P1 connector where it may be provided by the host development platform.

4.3 Reset

The S5U13513P00C100 evaluation board can be reset using a push-button, or via an active low reset signal from the host development platform (see H2 connector or P1 connector).

The reset signal will reset the S1D13513 Display Controller and is available on the H6 and H7 connectors. It is possible to remove the reset signal from the H6 and H7 connectors by removing the 0 Ohm resistor R80 from the board.


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4.4 Host Interface

4.4.1 Connecting to the Epson S5U13U00P00C100 USB Adapter Board

The S5U13513P00C100 evaluation board is designed to connect to a S5U13U00P00C100 USB Adapter Board. The USB adapter board provides a simple connection to any computer via a USB 2.0 connection. The S5U13513P00C100 directly connects to the adapter board through connectors P1 and P2. The USB adapter board also supplies the 3.3V power required by the S5U13513P00C100.

4.4.2 Connecting to the Epson PC Card Extender Board

The S5U13513P00C100 evaluation board may be connected to an Epson PC Card Extender Board, but it will require an external 3.3V power supply and some modifications to the S5U13513P00C100 board.

The modifications required for the S5U13513P00C100 board are:

1. Remove R107 and R108 (0 ohm resistors, size 0603)

2. Remove R109 and R112 (0 ohm resistors, size 0402)

3. Populate R110 and R111 with 0 ohm resistors, size 0402 (or short the pads on the board)

4. Set DIP switch SW1-[5:1] to 00100b (CNF[4:0]=00100b) to select Parallel Direct 80 Type 1: 1CS# host interface

To use a modified S5U13513P00C100 with an Epson PC Card Extender board:

1. Connect the 2 boards using connectors P1 and P2.

2. Connect 3.3V power supply to the S5U13513P00C100. Connect the positive of the power supply to test point TP3.3VDD1, and the negative to test point TPGND2

3. Plug the PC Card Extender (with S5U13513P00C100 connected to it) into a PC Card slot on a PC.

4. Turn on the 3.3V power supply and the S5U13513P00C100 is ready to use. Note that a windows driver is required to be installed on the PC (the S1D13xxx PCI/PC Card Bus driver is available from www.erd.epson.com).


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4.4.3 Direct Host Bus Interface Support

The S1D13513 Display Controller directly supports many host bus interfaces. For detailed S1D13513 pin mapping, refer to the S1D13513 Hardware Functional Specification, document number X78B-A-001-xx.

All S1D13513 host interface pins are available on connectors H2 and H3 which allow the S5U13513P00C100 to be connected to a variety of development platforms. However, connectors H2 and H3 are not populated on the S5U13513P00C100 evaluation board.

If connectors H2 and H3 are added, all host interface signals must match HVDD1 of the S1D13513. For the maximum/minimum values of the voltages, refer to the S1D13513 Hardware Functional Specification, document number X78B-A-001-xx.

The following diagram shows the location of the host bus connectors, H2 and H3. They are 0.1x0.1” 34-pin headers (17x2).

Figure 4-1: Host Bus Connector Locations (H2 and H3)

For the pinout of connectors H2 and H3, see “Schematic Diagrams” on page 24.

H2H3


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4.5 LCD Panel Interface

The LCD interface signals are available on connectors H4 and H5. Connector H5 includes GPIOG[4:0] which may be used as additional signals for extended TFT interfaces. For S1D13513 LCD interface pin mapping, refer to the S1D13513 Hardware Functional Speci-fication, document number X78B-A-001-xx.

Connectors H4 and H5 are both 0.1x0.1” 40-pin headers (20x2). For the pinout of connectors H4 and H5, see “Schematic Diagrams” on page 24.

On the evaluation board there is an adjustable 6~24V, 40mA max. power supply. This voltage is provided only on connector H4 (it is not used elsewhere on the board). It is intended for use to power the LED backlight on some LCD panels. The voltage is adjusted by the R106 pot.

NoteFor LCD panels that use CCFL backlight, an external power supply must be used to pro-vide power to the inverter for CCFL backlight. Usually, the inverter current consump-tion is higher than the maximum 40mA current available from the on-board voltage regulator.

The following diagram shows the location of the LCD panel connectors H4 and H5.

Figure 4-2: LCD Panel Connectors Locations (H4, H5)

H5H4


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4.6 Camera Interface

All the signals for the Camera1 interface are available on connector H6. All the signals for the Camera2 interface are available on connector H7. H6 and H7 are 0.1x0.1” 20-pin headers (10x2). For the pinout of connectors H6 and H7, see “Schematic Diagrams” on page 24.

The S1D13513 Camera1 interface signals use the GPIOC[7:0] and GPIOD[3:0] pins. The Camera2 interface signals use the GPIOA[7:0] and GPIOB[7:0] pins. These GPIO pins may be configured for a variety of S1D13513 supported functions. GPIOC[7:0] and GPIOD[3:0] may be configured as GPIO pins, Camera1 interface pins, or as YUV output pins. GPIOA[7:0] and GPIOB[7:0] may be configured as GPIO pins, Camera2 interface pins, Keypad interface pins, or PWM output pins. For detailed S1D13513 GPIO pin mapping, refer to the S1D13513 Hardware Functional Specification, document number X78B-A-001-xx.

Connector H6 and H7 may be used to evaluate any function for which the GPIOA[7:0], GPIOB[7:0], GPIOC[7:0], GPIOD[3:0] can be configured.

The S1D13513 has an I2C interface which uses two signals that are connected to both the H6 and H7 connectors. The default configuration of the evaluation board has the I2C signals, I2C_SCL and I2C_SDA, pulled high to CIOVDD1. If the I2C signals must be pulled high to CIOVDD2, R162 and R175 must be removed and 4.7kΩ resistors must be mounted for R164 and R177.

The reset signal provided on H6 and H7 is active low and is pulled to HIOVDD when inactive.

The following diagram shows the location of the camera connectors H6 and H7.

Figure 4-3: Camera Expansion Connector Locations (H6, H7)

H6H7


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4.7 YUV Output for TV Display

The S1D13513 can output YUV data which can be used to display an image on a TV screen via an external video encoder. The YUV output is multiplexed with other functions on the GPIOC[7:0] and GPIOD[2:0] pins. These pins are routed to connector H6.

4.8 Keypad Interface

The S1D13513 has a 5x5 keypad interface which is multiplexed with other functions on the GPIOA[4:0] and GPIOB[4:0] pins. These pins are routed to connectors H6 and H7. It is possible to use a Keypad device with the S5U13513P00C100 evaluation board by connecting it to the H6 and H7 connectors.

4.9 PWM Outputs

The S1D13513 has 4 PWM outputs which may be used to control the brightness of 4 LEDs. It also has an input, AUDIN, which is used to control the overall operation of the PWM outputs. The PWM output function is multiplexed on the GPIOA[7:5] and GPIOB[7] pins. AUDIN is multiplexed on the GPIOD[3] pin. These pins are routed to connector H6 and H7.

4.10 GPIO Connections

The S1D13513 Display Controller GPIO pins have multiple functions. All the GPIO pins are routed to the connectors on the S5U13513P00C100 evaluation board. If any pin is configured as a GPIO, it will be available on the connectors as listed below:

GPIOA[7:0] pins are routed to connector H7.

GPIOB[7:5] and GPIOB[3:0] pins are routed to connector H7. GPIOB[6:5] are also routed to connector H6.

GPIOB[4] pin is routed to connector H6.

GPIOC[7:0] pins are routed to connector H6.

GPIOD[3:0] pins are routed to connector H6.

GPIOG[4:0] pins are routed to connector H5.

FPDAT[23:18] which may be used as GPIOH[5:0] are routed to connector H5.


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4.11 JTAG Connector

The S1D13513 design includes a JTAG interface. All the JTAG signals are available on connector H1, however, connector H1 is not populated on the board. For the pinout of connector H1, see “Schematic Diagrams” on page 24.

The following diagram shows the location of the JTAG connector (H1).

Figure 4-4: JTAG Connector Location

H1


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5 Parts ListTable 5-1: Parts List

Item Qty Reference Part Description Manufacturer / Part No. / Assembly Instructions

1 49

C1, C2, C3, C4, C5, C6, C7, C8, C9, C19, C22,

C26, C28, C29, C30, C31, C32, C33, C34, C35, C43, C44, C45, C46, C47, C48, C49, C50, C51, C65, C66, C69, C70, C71, C72, C73, C74, C75, C76, C77, C78, C79, C80, C81, C82, C98,

C100, C104, C105

0.1uF Yageo America 04022F104Z7B20D

2 41

C10, C11, C12, C13, C14, C15, C16, C17, C18, C25, C27, C36, C37, C38, C39, C40, C41, C42, C52, C53, C54, C55, C56, C57, C58, C59, C60, C83, C84, C85, C86, C87, C88, C89, C90, C91, C92, C93, C94, C95,

C96

0.01uF Yageo America 0402ZRY5V7BB103

3 2 C20, C23 1nF Yageo America 04022R102K9B20D

4 2 C21, C24 10uF Panasonic - ECG ECJ-CV50J106M

5 4 C61, C62, C63, C64 18pF Panasonic - ECG ECJ-0EC1H180J

6 2 C67, C68 10uF Panasonic - ECG ECJ-2FB1A106K

7 2 C97, C99 1uF Panasonic - ECG ECJ-0EB0J105M

8 1 C101 4.7uF 10V T Kemet T491B475K010AS

9 1 C102 10pF Panasonic - ECG ECJ-0EC1H100D

10 1 C103 1uF 50V TDK C3216X7R1H105K

11 1 D1 DIODE DIODE SCHOTTKY 20V100MA SSSMINI2

Panasonic - SSG MA27D2700L

12 1 D2 3.3V Power LED GREEN SS TYPE LOW CUR SMD

Panasonic - SSG LNJ308G8LRA

13 1 D3 MBR0530 Micro Commercial Co. MBR0530-TP

14 2 F1, F2 ACF451832-222 FILTER 3-TERM 60MHZ 300MA SMD TDK ACF451832-222

15 0 H1 HEADER 6X2 Samtec TSW-106-05-G-D

16 0 H2, H3 HEADER_17X2 AMP 1-87215-7

17 1 H4 LCD Connector Samtec TST-120-01-G-D

18 1 H5 Extended LCD Connector Samtec TST-120-01-G-D


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19 2 H6, H7 HEADER_10X2 Samtec TSW-110-05-G-D

20 10 JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10

CONN HEADER VERT 2POS .100 TIN or

GENERIC

21 1 JP11 HEADER 3CONN HEADER VERT

3POS .100 TIN or GENERIC

22 9 L1, L2, L3, L4, L5, L6, L7, L8, L9 Ferrite FERRITE 200MA 938

OHMS 0603 SMDSteward HZ0603B751R-

10

23 1 L10 10uH COIL 10UH 1300MA CHOKE SMD

Panasonic - ECG ELL-6SH100M

24 2 P1, P2 HEADER_20X2 3M 151240-8422-RB

25 58

R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11,

R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R32, R35, R36, R37, R38, R39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57, R58, R68,

R69, R77

33 1%

26 7 R31, R33, R34, R70, R96, R107, R108 0

27 12R59, R60, R61, R62, R63, R64, R65, R66, R67, R78,

R79, R8110k

28 6 R71, R76, R80, R102, R109, R112 0

29 2 R72, R73 1M

30 2 R74, R75 220

31 1 R82 270 1%

32 15

R83, R85, R87, R88, R89, R90, R91, R92, R93, R94,

R95, R97, R99, R101, R105

47k

33 2 R84, R98 4.7k

34 0 R86, R100, R110, R111 NP

35 1 R103 887k 1%

36 1 R104 22k

37 1 R106 200k Panasonic - ECG EVN-5ESX50B25

38 11SH1, SH2, SH3, SH4, SH5, SH6, SH7, SH8,

SH9, SH10, SH11.100 in. Jumper Shunt JUMPER SHORTING TIN Sullins Electronics Corp.

STC02SYAN

Table 5-1: Parts List



Revision 1.0


39 1 SW1 SW DIP-10 CTS 218-10LPST

40 1 SW2 SW TACT-SPST SWITCH TACT SILVER PLT GULLWING

ITT Industries KSC241GLFS

41 4 TPGND1, TPGND2, TPGND3, TP3.3VDD1 TP_SMT PC TEST POINT

MINIATURE SMT Keystone 5015

42 0 T1 TP SIP

43 1 U1 S1D13513 PBGA256

44 2 U2, U3 IS42S16800D-7TL alternate Micron MT48LC8M16A2P-7E ISSI IS42S16800D-7TL

45 1 U4 TPS3801L30DCKR IC 2.64V SUPPLY MON SOT-323-5

Texas Instruments TPS3801L30DCKR

46 1 U5 MIC37100-1.8WS Alternate MIC39100-1.8WS Micrel MIC37100-1.8WS

47 1 U6 TPS61040 IC CONV DC/DC BOOST LP SOT-23-5 TI TPS61040DVBR

48 1 X1 MA-506 10.0000M

49 1 X2 MA-506 27.0000M

50 0 Y1 14-Pin DIP AMP 2-641609-1

Table 5-1: Parts List



Revision 1.0


6 Schematic Diagrams

Figure 6-1: S5U13513P00C100 Schematics (1 of 4)

5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

513_

TDO

513_

TDI

FPD

AT1

2

FPD

AT0

DB

12

FPD

AT2

0

513_

TCK

FPD

AT1

3

DB

10

AB

0

FPD

AT1

5

FPD

AT4

DB

13

AB

16A

B17

FPD

AT7

DB

8

DB

2

AB

5

FPD

AT1

6

DB

14

AB

15

AB

8

AB

6

FPD

AT2

2

FPD

AT9

FPD

AT5

DB

15

DB

9

FPD

AT8

DB

11

AB

12A

B11

AB

4

AB

19

FPD

AT1

1

FPD

AT2

FPD

AT1

8

AB

20

513_

TDI

513_

TMS

DB

3

FPD

AT1

7

AB

7

513_

TCK

FPD

AT2

3

FPD

AT2

1

FPD

AT3

AB

1

FPD

AT1

0

FPD

AT6

DB

6D

B5

DB

1

AB

13

AB

3

AB

18

FPD

AT1

4

FPD

AT1

AB

14

513_

TMS

DB

7

DB

0

AB

2

513_

TDO

AB

10

FPD

AT1

9

DB

4

AB

9

ME

MD

Q20

ME

MD

Q29

ME

MD

Q4

ME

MD

Q18

ME

MA

4M

EM

A5

ME

MA

6

ME

MD

Q3

ME

MD

Q9

ME

MD

Q28

ME

MD

Q13

ME

MD

Q31

ME

MD

Q22

ME

MD

Q27

ME

MA

3

ME

MD

Q12

ME

MD

Q16

ME

MD

Q24

ME

MD

Q25

ME

MA

8

ME

MD

Q11

ME

MD

Q14

ME

MD

Q10

ME

MA

0

ME

MD

Q5

ME

MA

10

ME

MD

Q17

ME

MA

2

ME

MA

7

ME

MD

Q21

ME

MA

11

ME

MA

1

ME

MD

Q15

ME

MD

Q23

ME

MD

Q6

ME

MD

Q1

ME

MD

Q30

ME

MA

9

ME

MD

Q19

ME

MD

Q26

ME

MD

Q8

ME

MD

Q0

ME

MD

Q2

ME

MD

Q7

513_

TRS

T

513_

TRS

T

CIO

VD

D1

1.8V

DD

CO

RE

CO

RE

HIO

VD

D HV

DD

1P

IOV

DD H

VD

D2

HV

DD

4H

VD

D5

HV

DD

2H

VD

D3

OS

C1O

SC

2

CIO

VD

D1

HV

DD

1P

LL1P

LL2

OS

C1

1.8V

DD

PLL

21.

8VD

D

OS

C2

1.8V

DD

3.3V

DD

HV

DD

5C

IOV

DD

1 HV

DD

4

CIO

VD

D2 HV

DD

3

1.8V

DD

PLL

1

GN

D1G

ND

2

GN

D1

GN

D2

GN

D3G

ND

4

GN

D3

GN

D4

3.3V

DD

3.3V

DD

3.3V

DD

3.3V

DD

FPD

AT[

23:0

]4

FPFR

AM

E4

FPLI

NE

4FP

SH

IFT

4FP

DR

DY

4

AB

[20:

0]3

DB

[15:

0]3

OS

CO

12

OS

CO

22

OS

CI1

2

OS

CI2

2

CLK

I32

RE

SE

T#

2

INT1

#3

CS

#3

RD

#3

WE

0#3

BS

#3

BD

IP#

3

INT2

#3

M/R

#3

RD

/WR

#3

BU

SC

LK3

WE

1#3

WA

IT#

3

BU

RS

T#3

ME

MC

S#

2M

EM

WE

#2

ME

MA

[11:

0]2

ME

MC

AS

#2

ME

MR

AS

#2

ME

MD

QM

22

ME

MD

QM

02

ME

MD

QM

32

ME

MD

QM

12

ME

MC

KE

2M

EM

CLK

2

ME

MB

A0

2

ME

MD

Q[3

1:0]

2

ME

MB

A1

2

GP

IOG

04

GP

IOG

14

GP

IOG

24

GP

IOG

34

GP

IOG

44

GP

IOA

04

GP

IOA

14

GP

IOA

24

GP

IOA

34

GP

IOA

44

GP

IOA

54

GP

IOA

64

GP

IOA

74

GP

IOB

04

GP

IOB

14

GP

IOB

24

GP

IOB

34

GP

IOB

44

GP

IOB

54

GP

IOB

64

GP

IOB

74

GP

IOC

04

GP

IOC

14

GP

IOC

24

GP

IOC

34

GP

IOC

44

GP

IOC

54

GP

IOC

64

GP

IOC

74

GP

IOD

04

GP

IOD

14

GP

IOD

24

GP

IOD

34

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

S1D

1351

3 P

BG

A25

6

C

14

Thur

sday

, Jan

uary

04,

200

7

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

S1D

1351

3 P

BG

A25

6

C

14

Thur

sday

, Jan

uary

04,

200

7

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

S1D

1351

3 P

BG

A25

6

C

14

Thur

sday

, Jan

uary

04,

200

7

JTA

G /

Bou

ndar

yS

can

Por

t

Pla

ce a

0.0

1uF

and

a 0

.1uF

cap

on

each

CO

RE

VD

D p

ower

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

HV

DD

1 po

wer

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

HV

DD

2 po

wer

pin

of t

he S

1D13

513

Pla

ce 3

3 O

hm s

erie

s so

urce

term

inat

ion

resi

stor

s as

clo

se to

the

S1D

1351

3 as

poss

ible

.

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

OS

CV

DD

1 po

wer

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

OS

CV

DD

2 po

wer

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

HV

DD

5 po

wer

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

HV

DD

4 po

wer

pin

of t

he S

1D13

513

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

HV

DD

3 po

wer

pin

of t

he S

1D13

513

R53

33 1

%R

5333

1%

R31 0

R31 0

R18

33 1

%R

1833

1%

R35

33 1

%R

3533

1%

R66

10k

R66

10k

R52

33 1

%R

5233

1%

C7

0.1u

F

C7

0.1u

F

R17

33 1

%R

1733

1%

C12

0.01

uF

C12

0.01

uF

C50

0.1u

F

C50

0.1u

F

R32

33 1

%R

3233

1%

R16

33 1

%R

1633

1%

R70 0

R70 0

C17

0.01

uF

C17

0.01

uF

C54

0.01

uF

C54

0.01

uF

R61

10k

R61

10k

R30

33 1

%R

3033

1%

C41

0.01

uF

C41

0.01

uF

R51

33 1

%R

5133

1%

L1 Ferr

iteL1 Fe

rrite

C60

0.01

uF

C60

0.01

uF

R15

33 1

%R

1533

1%

U1

S1D

1351

3 P

BGA

256

U1

S1D

1351

3 P

BGA

256

AB

1A

2

AB

2B

2

AB

3A

3

AB

4B

3

AB

5C

4

AB

6B

4

AB

7A

4

AB

8A

5

AB

9B

5

AB

10C

5

AB

11C

6

AB

12D

6

AB

13B

6

AB

14A

6

AB

15A

7

AB

16C

7

DB

0G

3

DB

1F1

DB

2F7

DB

3F2

DB

4F5

DB

5F3

DB

6F4

DB

7E

1

DB

8E

5

DB

9E

3

DB

10E

4

DB

11D

2

DB

12D

3

DB

13D

1

DB

14C

2

DB

15C

1

CLK

IK

1

CS

#G

6

M/R

#G

1

INT1

#H

5

RD

#H

4

WE

0#H

1

WE

1#G

5

RD

/WR

#H

2

RE

SE

T#J3

WA

IT#

J2

CN

F0J1

5

CN

F1J1

3

CN

F2K

11

FPD

AT0

M7

FPD

AT1

N7

FPD

AT2

T7

FPD

AT3

R7

FPD

AT4

P7

FPD

AT5

L7

FPD

AT6

M6

FPD

AT7

K6

FPD

AT8

R6

FPD

AT9

P6

FPD

AT1

0M

5

FPD

AT1

1N

5

FPD

AT1

2T5

FPD

AT1

3T4

FPD

AT1

4R

4

FPD

AT1

5T2

FPD

AT1

6P

4

FPD

AT1

7N

4

FPFR

AM

ER

8

FPLI

NE

T8

FPS

HIF

TP

8

FPD

RD

YM

8

GP

IOG

0L9

GP

IOG

1P

9

GP

IOG

2R

9

GP

IOG

3T9

AB

17E

6

GP

IOG

4N

8

CN

F3J1

4

CN

F4K

16

CN

F5K

12

CN

F6K

15

AB

18D

7

CN

F7L1

6

TES

TEN

L15

TRS

TP

13

TMS

R14

TDO

R15

TDI

N12

TCK

P12

VC

P1

N1

ME

MC

AS

#G

14

ME

MR

AS

#G

15

ME

MB

A0

F16

ME

MB

A1

G12

ME

MC

S#

H11

ME

MW

E#

G16

ME

MC

KE

H16

ME

MC

LKJ1

6

ME

MD

QM

0H

13

ME

MD

QM

1H

14

COREVDDC3

COREVDDF6

COREVDDL11

COREVDDF11

COREVDDC14

COREVDDK3

HVDD1D5

VSS G7

VSS G8

VSS G9

VSS D4

VSS D8

VSS D13

VSS G10

VSS H7

VSS H8

VSS H10

VSS G13

OSCVSS1 L3

OSCVSS2 M4

PLLVSS1 N2

PLLVSS2 R2

COREVDDL6

VSS H9

COREVDDP3

COREVDDP14

HVDD1E2

HVDD1G4

HVDD2L5

HVDD2L8

HVDD2T6

HVDD3R11

HVDD4L12

HVDD4M13

HVDD4T15

HVDD5B9

HVDD5C12

HVDD5E15

HVDD5G11

HVDD5H12

HVDD5J12

OSCVDD1L4

OSCVDD2M3

PLLVDD1P1

PLLVDD2P2

AB

0B

1

AB

19B

7

AB

20E

7

FPD

AT1

8R

5

FPD

AT1

9K

5

FPD

AT2

0P

5

FPD

AT2

1T3

FPD

AT2

2R

3

FPD

AT2

3K

4

BU

SC

LKG

2

INT2

#H

6

BS

#H

3R

eser

ved

J5

BU

RS

T#J4

BD

IP#

J6

VC

P2

R1

VSS J1

VSS J7

VSS J8

VSS J9

VSS J10

VSS K2

VSS K7

VSS K8

VSS K9

VSS K10

VSS K13

VSS N3

VSS N6

VSS N9

VSS N13

VSS T1

VSS A16VSS A1

VSS T16

CN

F8K

14

ME

MD

Q0

C9

ME

MD

Q1

A10

ME

MD

Q2

B10

ME

MD

Q3

C10

ME

MD

Q4

B11

ME

MD

Q5

D11

ME

MD

Q6

E12

ME

MD

Q7

A12

ME

MD

Q8

D12

ME

MD

Q9

C13

ME

MD

Q10

A14

ME

MD

Q11

B15

ME

MD

Q12

B16

ME

MD

Q13

D14

ME

MD

Q14

D15

ME

MD

Q15

E14

ME

MD

Q16

D9

ME

MD

Q17

F10

ME

MD

Q18

E10

ME

MD

Q19

D10

ME

MD

Q20

E11

ME

MD

Q21

C11

ME

MD

Q22

A11

ME

MD

Q23

B12

ME

MD

Q24

A13

ME

MD

Q25

B13

ME

MD

Q26

B14

ME

MD

Q27

A15

ME

MD

Q28

C15

ME

MD

Q29

C16

ME

MD

Q30

E13

ME

MD

Q31

D16

ME

MA

0F8

ME

MA

1E

8

ME

MA

2C

8

ME

MA

3B

8

ME

MA

4A

8

ME

MA

5F9

ME

MA

6E

9

ME

MA

7A

9

ME

MA

8E

16

ME

MA

9F1

2

ME

MA

10F1

3

ME

MA

11F1

4

ME

MA

12F1

5

ME

MD

QM

2H

15

ME

MD

QM

3J1

1

OS

CI1

L1

OS

CO

1L2

OS

CI2

M1

OS

CO

2M

2

GP

IOA

0P

10

GP

IOA

1N

10

GP

IOA

2R

10

GP

IOA

3T1

0

GP

IOA

4T1

1

GP

IOA

5M

10

GP

IOA

6L1

0

GP

IOA

7M

9

GP

IOB

0R

13

GP

IOB

1P

11

GP

IOB

2R

12

GP

IOB

3T1

2

GP

IOB

4T1

4

GP

IOB

5T1

3

GP

IOB

6N

11

GP

IOB

7M

11

GP

IOC

0N

16

GP

IOC

1M

12

GP

IOC

2P

16

GP

IOC

3N

15

GP

IOC

4M

14

GP

IOC

5N

14

GP

IOC

6P

15

GP

IOC

7R

16

GP

IOD

0M

16

GP

IOD

1L1

3

GP

IOD

2L1

4

GP

IOD

3M

15

R29

33 1

%R

2933

1%

JP5

OS

CV

DD

2

JP5

OS

CV

DD

212

R50

33 1

%R

5033

1%

C22

0.1u

F

C22

0.1u

F

L7 Ferr

iteL7 Fe

rrite

C6

0.1u

F

C6

0.1u

F

C11

0.01

uF

C11

0.01

uF

R14

33 1

%R

1433

1%

JP4

OS

CV

DD

1

JP4

OS

CV

DD

112

C49

0.1u

F

C49

0.1u

F

SH

5.1

00 in

. Jum

per S

hunt

SH

5.1

00 in

. Jum

per S

hunt

L6 Ferr

iteL6 Fe

rrite

C16

0.01

uF

C16

0.01

uF

R13

33 1

%R

1333

1%

R65

10k

R65

10k

C24

10uF

C24

10uF

C34

0.1u

F

C34

0.1u

F

C40

0.01

uF

C40

0.01

uF

SH

4.1

00 in

. Jum

per S

hunt

SH

4.1

00 in

. Jum

per S

hunt

C48

0.1u

F

C48

0.1u

F

R49

33 1

%R

4933

1%

R12

33 1

%R

1233

1%

C5

0.1u

F

C5

0.1u

F

L5 Ferr

iteL5 Fe

rrite

R48

33 1

%R

4833

1%

SW

1S

W D

IP-1

0S

W1

SW

DIP

-10

R60

10k

R60

10k

C10

0.01

uF

C10

0.01

uF

R11

33 1

%R

1133

1%

C47

0.1u

F

C47

0.1u

F

JP3

PLL

VD

D2

JP3

PLL

VD

D2

12

R59

10k

R59

10k

C26

0.1u

F

C26

0.1u

F

C15

0.01

uF

C15

0.01

uF

R47

33 1

%R

4733

1%

R10

33 1

%R

1033

1%

C39

0.01

uF

C39

0.01

uF

C33

0.1u

F

C33

0.1u

F

SH

3.1

00 in

. Jum

per S

hunt

SH

3.1

00 in

. Jum

per S

hunt

R46

33 1

%R

4633

1%

L2 Ferr

iteL2 Fe

rrite JP

7

HV

DD

3

JP7

HV

DD

3

12

C46

0.1u

F

C46

0.1u

F

H1

HE

AD

ER

6X

2

H1

HE

AD

ER

6X

22 4 6 8 10 12

1 3 5 7 9 11

R9

33 1

%R

933

1%

JP6

HV

DD

2

JP6

HV

DD

212

JP2

PLL

VD

D1

JP2

PLL

VD

D1

12

R64

10k

R64

10k

C4

0.1u

F

C4

0.1u

F

R45

33 1

%R

4533

1%

R8

33 1

%R

833

1%

SH

8.1

00 in

. Jum

per S

hunt

SH

8.1

00 in

. Jum

per S

hunt

SH

6.1

00 in

. Jum

per

Shu

ntS

H6

.100

in. J

umpe

r S

hunt

SH

2.1

00 in

. Jum

per S

hunt

SH

2.1

00 in

. Jum

per S

hunt

R28

33 1

%R

2833

1%

C55

0.01

uF

C55

0.01

uF

C14

0.01

uF

C14

0.01

uF

R44

33 1

%R

4433

1%

C27

0.01

uF

C27

0.01

uF

R7

33 1

%R

733

1%

C32

0.1u

F

C32

0.1u

F

C38

0.01

uF

C38

0.01

uF

R27

33 1

%R

2733

1%

R43

33 1

%R

4333

1%

C45

0.1u

F

C45

0.1u

F

C20

1nF

C20

1nF

L3 Ferr

iteL3 Fe

rrite

R69

33 1

%R

6933

1%

C56

0.01

uF

C56

0.01

uF

R6

33 1

%R

633

1%

C3

0.1u

F

C3

0.1u

F

R26

33 1

%R

2633

1%

C25

0.01

uF

C25

0.01

uF

R42

33 1

%R

4233

1%

R5

33 1

%R

533

1%

R25

33 1

%R

2533

1%

C57

0.01

uF

C57

0.01

uF

R41

33 1

%R

4133

1%

C23

1nF

C23

1nF

C37

0.01

uF

C37

0.01

uF

R63

10k

R63

10k

JP8

HV

DD

1

JP8

HV

DD

112

R68

33 1

%R

6833

1%

C31

0.1u

F

C31

0.1u

F

C43

0.1u

F

C43

0.1u

F

R4

33 1

%R

433

1%

R24

33 1

%R

2433

1%

C35

0.1u

F

C35

0.1u

F

R40

33 1

%R

4033

1%

R34 0

R34 0

R58

33 1

%R

5833

1%

R3

33 1

%R

333

1%

L8 Ferr

iteL8 Fe

rrite

SH

7.1

00 in

. Jum

per S

hunt

SH

7.1

00 in

. Jum

per S

hunt

C2

0.1u

F

C2

0.1u

F C19

0.1u

F

C19

0.1u

F

C58

0.01

uF

C58

0.01

uF

R23

33 1

%R

2333

1%

JP1

CO

RE

VD

D

JP1

CO

RE

VD

D12

C9

0.1u

F

C9

0.1u

F

R39

33 1

%R

3933

1%

C44

0.1u

F

C44

0.1u

F

R57

33 1

%R

5733

1%

JP9

HV

DD

4

JP9

HV

DD

4

12

R2

33 1

%R

233

1%

JP10

HV

DD

5

JP10

HV

DD

5

12

R22

33 1

%R

2233

1%

R67

10k

R67

10k

C52

0.01

uF

C52

0.01

uF

SH

1.1

00 in

. Jum

per S

hunt

SH

1.1

00 in

. Jum

per S

hunt

C30

0.1u

F

C30

0.1u

F

C36

0.01

uF

C36

0.01

uF

L4 Ferr

iteL4 Fe

rrite

R38

33 1

%R

3833

1%

R56

33 1

%R

5633

1%

R71 0

R71 0

C21

10uF

C21

10uF

R33 0

R33 0

SH

9.1

00 in

. Jum

per S

hunt

SH

9.1

00 in

. Jum

per S

hunt

R21

33 1

%R

2133

1%

SH

10.1

00 in

. Jum

per S

hunt

SH

10.1

00 in

. Jum

per S

hunt

R37

33 1

%R

3733

1%

C1

0.1u

F

C1

0.1u

F

R55

33 1

%R

5533

1%

C42

0.01

uF

C42

0.01

uF

R1

33 1

%R

133

1%

R20

33 1

%R

2033

1%

R62

10k

R62

10k

C51

0.1u

F

C51

0.1u

F

C8

0.1u

F

C8

0.1u

F

C13

0.01

uF

C13

0.01

uF

C59

0.01

uF

C59

0.01

uF

R54

33 1

%R

5433

1%

C28

0.1u

F

C28

0.1u

F

R19

33 1

%R

1933

1%

C18

0.01

uF

C18

0.01

uF

C29

0.1u

F

C29

0.1u

F

R36

33 1

%R

3633

1%

C53

0.01

uF

C53

0.01

uF


Revision 1.0



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

ME

MD

Q4

ME

MD

Q27

ME

MD

Q21

ME

MD

Q2

ME

MD

Q19

ME

MD

Q7

ME

MD

Q31

ME

MD

Q13

ME

MD

Q3

ME

MD

Q24

ME

MD

Q30

ME

MD

Q22

ME

MD

Q1

ME

MD

Q15

ME

MD

Q11

ME

MD

Q10

ME

MD

Q8

ME

MD

Q23

ME

MD

Q16

ME

MD

Q26

ME

MD

Q14

ME

MD

Q25

ME

MD

Q9

ME

MD

Q0

ME

MD

Q12

ME

MD

Q6

ME

MD

Q5

ME

MD

Q18

ME

MD

Q29

ME

MD

Q28

ME

MD

Q20

ME

MD

Q17

ME

MA

5

ME

MA

2M

EM

A3

ME

MA

9

ME

MA

6

ME

MA

8

ME

MA

1M

EM

A0

ME

MA

10

ME

MA

7

ME

MA

11

ME

MA

4

ME

MA

7M

EM

A8

ME

MA

5

ME

MA

0M

EM

A1

ME

MA

4M

EM

A3

ME

MA

6

ME

MA

10M

EM

A11

ME

MA

2

ME

MA

9

ME

MB

A1

ME

MB

A0

ME

MW

E#

ME

MC

AS

#M

EM

RA

S#

ME

MC

S#

ME

MC

KE

ME

MC

LK

ME

MB

A0

ME

MC

AS

#M

EM

RA

S#

ME

MC

LK

ME

MB

A1

ME

MC

KE

ME

MW

E#

ME

MC

S#

3.3V

DD

3.3V

DD

3.3V

DD

3.3V

DD

3.3V

DD

GN

D1

GN

D2

GN

D2

HIO

VD

D

HIO

VD

D

GN

D1

3.3V

DD

1.8V

DD

ME

MD

Q[3

1:0]

1

ME

MD

Q[3

1:0]

1

ME

MA

[11:

0]1

ME

MA

[11:

0]1

ME

MB

A0

1M

EM

BA

11

ME

MC

S#

1

ME

MW

E#

1M

EM

CA

S#

1M

EM

RA

S#

1

ME

MD

QM

01

ME

MD

QM

11

ME

MD

QM

21

ME

MD

QM

31

ME

MC

KE

1M

EM

CLK

1

OS

CI1

1

CLK

I31

OS

CI2

1O

SC

O2

1O

SC

O1

1

RE

SE

T#1

CM

_RS

T#4

HO

ST_

RE

SE

T#3

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

SD

RA

M /

Clo

cks

/ Res

et /

1.8V

Sup

ply

B

24

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

SD

RA

M /

Clo

cks

/ Res

et /

1.8V

Sup

ply

B

24

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

SD

RA

M /

Clo

cks

/ Res

et /

1.8V

Sup

ply

B

24

Frid

ay, J

anua

ry 1

9, 2

007

SD

RA

M W

idth

Sel

ect

1 2

x32

SD

RA

M (3

2MB

)2

3 x1

6 S

DR

AM

(16M

B)

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

VD

D p

ower

pin

of t

he tw

o S

DR

AM

chi

ps.

Pla

ce a

0.0

1uF

and

a 0.

1uF

cap

on e

ach

VD

DQ

pow

er p

in o

f the

two

SD

RA

M c

hips

.

TTL/

CM

OS

Osc

illat

or

This

resi

stor

is u

sed

topu

ll do

wn

CLK

I3 in

put

whe

n os

cilla

tor i

s no

tus

ed. I

f an

osci

llato

r is

used

, the

n th

is re

sist

orca

n be

rem

oved

.

C82

0.1u

F

C82

0.1u

F

R74

220

R74

220

C71

0.1u

F

C71

0.1u

F

C94

0.01

uF

C94

0.01

uF

U4

TPS

3801

L30D

CK

R

U4

TPS

3801

L30D

CK

R

GN

D1

GN

D2

MR

#5

RE

SET#

3V

DD

4

X1

MA

-506

10.

0000

M

X1

MA

-506

10.

0000

M

XIN

1XO

UT

4

NC

2N

C3

C83

0.01

uF

C83

0.01

uF

C77

0.1u

F

C77

0.1u

F

R76

0R

760C

6318

pFC

6318

pF

C89

0.01

uF

C89

0.01

uF

C72

0.1u

F

C72

0.1u

F

C95

0.01

uF

C95

0.01

uF

R78

10k

R78

10k

C10

5

0.1u

F

C10

5

0.1u

F

C65

0.1u

F

C65

0.1u

F

C84

0.01

uF

C84

0.01

uF

C78

0.1u

F

C78

0.1u

F

SW

2S

W T

AC

T-S

PS

TS

W2

SW

TA

CT-

SP

ST

243

1

C90

0.01

uF

C90

0.01

uF

C62

18pF

C62

18pF

C73

0.1u

F

C73

0.1u

F

C96

0.01

uF

C96

0.01

uF

SH

11.1

00 in

. Jum

per S

hunt

SH

11.1

00 in

. Jum

per S

hunt

JP11

HE

AD

ER

3

JP11

HE

AD

ER

3

123

C85

0.01

uF

C85

0.01

uF

C79

0.1u

F

C79

0.1u

F

D1

DIO

DE

D1

DIO

DE

AK

R77

33 1

%R

7733

1%

U5

MIC

3710

0-1.

8WS

U5

MIC

3710

0-1.

8WS

IN1

OU

T3

GND 2

TAB 4

C66

0.1u

F

C66

0.1u

F

L9 Ferr

iteL9 Fe

rrite

C91

0.01

uF

C91

0.01

uF

SDRAM2Mb x 16-bit x 4banks

U3

IS42

S16

800D

-7TL


U3

IS42

S16

800D

-7TL

A023

A124

A225

A326

A429

A530

A631

A732

A833

A934

A10

22A1

135

BA1

21BA

020

VSS

Q6

VSS

Q12

VSS

Q52

VS

S28

VS

S41

VS

S54

VSS

Q46

VD

D1

VD

D14

VD

D27

VDD

Q3

VDD

Q9

VDD

Q43

VDD

Q49

D0

2D

14

D2

5D

37

D4

8D

510

D6

11D

713

D8

42

D9

44

D10

45D

1147

D12

48D

1350

D14

51D

1553

DQ

ML

15D

QM

H39

WE

#16

CA

S#17

RA

S#18

CS

#19

CLK

38C

KE

37

NC

40N

C36

R80

0R

800

C74

0.1u

F

C74

0.1u

F

Y1

14-P

in D

IP

Y1

14-P

in D

IP

OE

1

OU

T8

GN

D7

VDD

14

C10

4

0.1u

F

C10

4

0.1u

F

R79

10k

R79

10k

C67

10uF

C67

10uF

C86

0.01

uF

C86

0.01

uF

C80

0.1u

F

C80

0.1u

F

C68

10uF

C68

10uF

C69

0.1u

F

C69

0.1u

F

C92

0.01

uF

C92

0.01

uF

C75

0.1u

F

C75

0.1u

F

R72

1MR

721M

X2

MA

-506

27.

0000

M

X2

MA

-506

27.

0000

M

XIN

1XO

UT

4

NC

2N

C3


U2

IS42

S16

800D

-7TL


U2

IS42

S16

800D

-7TL

A023

A124

A225

A326

A429

A530

A631

A732

A833

A934

A10

22A1

135

BA1

21

BA0

20

VSS

Q6

VSS

Q12

VSS

Q52

VS

S28

VS

S41

VS

S54

VSS

Q46

VD

D1

VD

D14

VD

D27

VDD

Q3

VDD

Q9

VDD

Q43

VDD

Q49

D0

2D

14

D2

5D

37

D4

8

D5

10

D6

11

D7

13D

842

D9

44

D10

45D

1147

D12

48D

1350

D14

51

D15

53

DQ

ML

15D

QM

H39

WE

#16

CA

S#17

RA

S#18

CS

#19

CLK

38C

KE

37

NC

40N

C36

C87

0.01

uF

C87

0.01

uF

C81

0.1u

F

C81

0.1u

F

C70

0.1u

F

C70

0.1u

F

R73

1MR

731M

C93

0.01

uF

C93

0.01

uF

C64

18pF

C64

18pF

C61

18pF

C61

18pF

C76

0.1u

F

C76

0.1u

F

R75

220

R75

220

C88

0.01

uF

C88

0.01

uF


Revision 1.0



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

DB

0D

B2

DB

1D

B3

DB

4D

B6

DB

5D

B7

DB

8D

B10

DB

12D

B14

DB

9D

B11

DB

13D

B15

CS

#R

D#

M/R

#IN

T1#

WE

1#

HO

ST_

RE

SE

T#W

AIT

#W

E0#

RD

/WR

#

AB

1A

B2

AB

19A

B17

AB

9

AB

15A

B13

AB

11A

B8

AB

10A

B12

AB

14

AB

0

AB

4A

B6

AB

18A

B20

AB

16

AB

3

AB

7A

B5

BS

#

BU

SC

LK

WA

IT#

DB

0D

B2

DB

4D

B6

DB

1D

B3

DB

5D

B7

DB

8D

B10

DB

12D

B14

DB

15D

B13

DB

11D

B9

BU

SC

LK

INT1

#

HO

ST_

RE

SE

T#

WE

1#

RD

#

AB

0A

B2

AB

4A

B6

AB

9A

B11

AB

13A

B15

AB

17A

B19

AB

20A

B18

AB

16A

B14

AB

12A

B10

AB

8A

B7

AB

5A

B3

AB

1

CS

#M

/R#

RD

/WR

#

WE

0#

3.3V

DD

HIO

VD

D

3.3V

DD

3.3V

DD

RD

#1

CS

#1

M/R

#1

INT1

#1

WE

1#1

HO

ST_

RE

SE

T#2

WA

IT#

1W

E0#

1R

D/W

R#

1

BU

SC

LK1

BD

IP#

1B

S#

1B

UR

ST#

1IN

T2#

1

DB

[15:

0]1

AB

[20:

0]1

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

Hos

t con

nect

ors

B

34

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

Hos

t con

nect

ors

B

34

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

Hos

t con

nect

ors

B

34

Frid

ay, J

anua

ry 1

9, 2

007

This

resi

stor

is u

sed

to p

ull

dow

n B

US

CLK

inpu

t whe

n it

isno

t use

d. If

BU

SC

LK in

put i

sus

ed, t

hen

this

resi

stor

can

be re

mov

ed.

R10

90

R10

90

R10

80

R10

80

R11

0N

PR

110

NP

TPG

ND

3TP

_SM

TTP

GN

D3

TP_S

MT

1

R11

1N

PR

111

NP

TPG

ND

2TP

_SM

TTP

GN

D2

TP_S

MT

1

R11

20

R11

20

R81

10k

R81

10k

TPG

ND

1TP

_SM

TTP

GN

D1

TP_S

MT

1

R82

270

1%R

8227

0 1%

P2

HE

AD

ER

_20X

2

P2

HE

AD

ER

_20X

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

D2

3.3V

Pow

erD

23.

3V P

ower

A K

H3

HE

AD

ER

_17X

2

H3

HE

AD

ER

_17X

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33

TP3.

3VD

D1

TP_S

MT

TP3.

3VD

D1

TP_S

MT

1

H2

HE

AD

ER

_17X

2

H2

HE

AD

ER

_17X

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33

R10

70

R10

70

P1

HE

AD

ER

_20X

2

P1

HE

AD

ER

_20X

2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39


Revision 1.0



5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

FPD

AT4

FPD

AT2

FPD

AT3

FPD

AT1

FPD

AT0

FPD

AT6

FPD

AT9

FPD

AT5

FPD

AT8

FPD

AT7

FPD

AT1

1FP

DA

T10

FPD

AT1

4FP

DA

T13

FPD

AT1

2

FPD

AT1

5

FPD

AT1

6FP

DA

T17

FPD

AT1

9

FPD

AT2

1

FPD

AT2

3

FPD

AT2

0

FPD

AT1

8

FPD

AT2

2

CM

STR

OU

TG

PIO

B4

GP

IOB

4

I2C

_SD

A

CM

2VR

EF

CM

2DA

T0

CM

2HR

EF

CM

STR

OU

T

CM

_RS

T#

CM

_RS

T#I2

C_S

CL

I2C

_SD

A

CM

1CLK

INC

M1C

LKO

UT

CM

1VR

EF

CM

1HR

EF

CM

2CLK

IN

CM

2DA

T0C

M2D

AT3

CM

2HR

EF

CM

2CLK

OU

T

CM

2DA

T6C

M2D

AT5

CM

2DA

T4

CM

2VR

EF

CM

2DA

T1C

M2D

AT2

CM

2DA

T7

CM

1DA

T3

I2C

_SC

L

CM

1DA

T0C

M1D

AT2

CM

1DA

T1

CM

1DA

T5C

M1D

AT4

CM

1DA

T6

I2C

_SC

LI2

C_S

DA

CM

1DA

T7

CM

2CLK

OU

TC

M2C

LKIN

CM

2DA

T1C

M2D

AT2

CM

2DA

T3C

M2D

AT4

CM

2DA

T5C

M2D

AT6

CM

2DA

T7

12V

DD

PIO

VD

D

CIO

VD

D2

CIO

VD

D1

CIO

VD

D1

CIO

VD

D1

CIO

VD

D2

CIO

VD

D2

CIO

VD

D1

CIO

VD

D2

12V

DD

3.3V

DD

GP

IOG

21

GP

IOG

01

GP

IOG

41

GP

IOG

31

GP

IOG

11

FPLI

NE

1FP

FRA

ME

1

FPS

HIF

T1

FPD

RD

Y1

FPD

AT[

23:0

]1

GP

IOD

11

GP

IOA

01

GP

IOA

21

GP

IOA

41

GP

IOA

61

GP

IOB

41

GP

IOB

01

GP

IOB

11

GP

IOC

01

GP

IOB

71

CM

_RS

T#2

GP

IOC

21

GP

IOC

41

GP

IOC

61

GP

IOA

11

GP

IOA

31

GP

IOA

51

GP

IOA

71

GP

IOB

61

GP

IOD

31

GP

IOB

51

GP

IOB

31

GP

IOB

21

GP

IOC

11

GP

IOD

21

GP

IOC

31

GP

IOC

51

GP

IOD

01

GP

IOC

71

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

LCD

and

Cam

era/

GP

IO c

onne

ctor

s

B

44

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

LCD

and

Cam

era/

GP

IO c

onne

ctor

s

B

44

Frid

ay, J

anua

ry 1

9, 2

007

Title

Siz

eD

ocum

ent N

umbe

rR

ev

Dat

e:S

heet

of

<Doc

>1.

0

LCD

and

Cam

era/

GP

IO c

onne

ctor

s

B

44

Frid

ay, J

anua

ry 1

9, 2

007

Pla

ce th

ese

capa

cito

rs c

lose

to p

in 1

5 of

the

head

er.

Thes

e re

sist

ors

are

to p

reve

ntG

PIO

A[7

:0] a

nd G

PIO

B7,

GP

IOB

[4:0

] fro

m fl

oatin

g if

they

are

not u

sed.

GP

IOB

[6:5

] are

pulle

d up

. If a

ny o

f GP

IOA

[7:0

],G

PIO

B7

or G

PIO

B[4

:0] a

re u

sed,

the

corr

espo

ndin

g pu

ll do

wn

resi

stor

may

be

rem

oved

.

Pla

ce th

ese

capa

cito

rs c

lose

to p

in 1

5 of

the

head

er.

Inte

rnal

Ste

p U

p 6

to 2

4VP

ower

Sup

ply

Typi

cal 1

2V @

40m

A

Vou

t=1.

233x

[1+R

103/

(R10

5+R

106)

] (V

)

R85

47k

R85

47k

U6 TP

S61

040

U6 TP

S61

040

VIN

5

EN4

GN

D2

SW

1

FB3

C10

31u

F 50

VC

103

1uF

50V

+C

101

4.7u

F 10

V T

+C

101

4.7u

F 10

V T

1 2

C99

1uF

C99

1uF

R99

47k

R99

47k

R10

620

0kR

106

200k

1 3

2

R10

422

kR

104

22k

R98

4.7k

R98

4.7k

C10

0

0.1u

F

C10

0

0.1u

F

C10

210

pFC

102

10pF

L10

10uH

L10

10uH

R86

NP

R86

NP

R10

147

kR

101

47k

R91

47k

R91

47k

R96

0R

960

H7

HE

AD

ER

_10X

2

H7

HE

AD

ER

_10X

2

1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20

D3

MB

R05

30D

3M

BR

0530

AK

T1T1

R84

4.7k

R84

4.7k

R83

47k

R83

47k

R87

47k

R87

47k

R92

47k

R92

47k

F1 AC

F451

832-

222

F1 AC

F451

832-

222

1

2

3

R88

47k

R88

47k

H4

LCD

Con

nect

or

H4

LCD

Con

nect

or2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

R93

47k

R93

47k

R10

20R

102

0

R10

388

7k 1

%R

103

887k

1%

R10

0N

PR

100

NP

R94

47k

R94

47k

C97

1uF

C97

1uF

R89

47k

R89

47k

H6

HE

AD

ER

_10X

2

H6

HE

AD

ER

_10X

2

1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20

C98

0.1u

F

C98

0.1u

F

H5

Ext

ende

d LC

D C

onne

ctor

H5

Ext

ende

d LC

D C

onne

ctor

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

R95

47k

R95

47k

R10

547

kR

105

47k

R90

47k

R90

47k

F2 AC

F451

832-

222

F2 AC

F451

832-

222

1

2

3

R97

47k

R97

47k


Revision 1.0


7 S5U13513P00C100 Board Layout

Figure 7-1: S5U13513P00C100 Board Layout - Top View


Revision 1.0


Figure 7-2: S5U13513P00C100 Board Layout - Bottom View


Revision 1.0


8 References

8.1 Documents• Epson Research and Development, Inc., S1D13513 Hardware Functional Specification,

document number X78B-A-001-xx.

8.2 Document Sources• Epson Research and Development Website: http://www.erd.epson.com.


Revision 1.0


9 Technical Support

9.1 EPSON Display Controllers (S1D13513)

9.2 Ordering Information

To order the S5U13513P00C100 Evaluation Board, contact the Epson sales representative in your area and order part number S5U13513P00C100.

JapanSeiko Epson CorporationIC International Sales Group421-8, Hino, Hino-shiTokyo 191-8501, JapanTel: 042-587-5812Fax: 042-587-5564http://www.epson.co.jp/

Hong KongEpson Hong Kong Ltd.20/F., Harbour Centre25 Harbour RoadWanchai, Hong KongTel: 2585-4600Fax: 2827-4346http://www.epson.com.hk/

TaiwanEpson Taiwan Technology & Trading Ltd.14F, No. 7Song Ren RoadTaipei 110, Taiwan, ROCTel: 02-8786-6688Fax: 02-8786-6677http://www.epson.com.tw/

SingaporeEpson Singapore Pte Ltd1 HarbourFront Place #03-02HarbourFront Tower OneSingapore, 098633Tel: (65) 6586-5500Fax: (65) 6271-3182http://www.epson.com.sg/

EuropeEpson Europe Electronics GmbHRiesstrasse 1580992 Munich, GermanyTel: 089-14005-0Fax: 089-14005-110http://www.epson-electronics.de/

North AmericaEpson Electronics America, Inc.2580 Orchard ParkwaySan Jose, CA 95131, USATel: (408) 922-0200Fax: (408) 922-0238http://www.eea.epson.com/


Revision 1.0


Change Record

X78A-G-003-01 Revision 1.0 - Issued: March 30, 2007

• minor edits

• updated schematics

• updated parts list

• added board layout

X78A-G-003-00 Revision 0.02

• revised manual due to design changes

• added new schematics

• added new parts list

X78A-G-003-00 Revision 0.01

• Initial draft of manual


Revision 1.0

S5U13513P00C100 Evaluation Board User Manual · 01000b MIPS/ISA Little Endian: ... 10110b...

Documents

Transcript of S5U13513P00C100 Evaluation Board User Manual · 01000b MIPS/ISA Little Endian: ... 10110b...