s RH850/P1L-C 100-pin PiggyBack board V1 · RH850 Evaluation Platform . RH850/P1L-C 100-pin...
24
RH850 Evaluation Platform RH850/P1L-C 100-pin PiggyBack board V1 Y-RH850-P1XC-100PIN-PB-T1-V1 R20UT3885ED0100, Rev. 1.0 2016-08-08 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Technology Corp. website (http://www.renesas.com). The newest version of this document can be obtained from the following web location http://www.renesas.eu/updates?oc=Y-RH850-P1XC-100PIN-PB-T1-V1. www.renesas.com User`s Manual 32
-
Upload
phungthuan -
Category
Documents
-
view
227 -
download
0
Transcript of s RH850/P1L-C 100-pin PiggyBack board V1 · RH850 Evaluation Platform . RH850/P1L-C 100-pin...
RH850 Evaluation Platform
RH850/P1L-C 100-pin PiggyBack board V1 Y-RH850-P1XC-100PIN-PB-T1-V1
R20UT3885ED0100, Rev. 1.0 2016-08-08
All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Technology Corp. website (http://www.renesas.com). The newest version of this document can be obtained from the following web location http://www.renesas.eu/updates?oc=Y-RH850-P1XC-100PIN-PB-T1-V1.
www.renesas.com
Use
r`s
Man
ual
32
Table of Contents
Chapter 1 Introduction ......................................................................... 3
Chapter 2 Overview .............................................................................. 4 2.1 Overview ............................................................................................... 4 2.2 Mounting of the device ........................................................................ 5
Chapter 3 Power supply ....................................................................... 6 3.1 Board power connection ..................................................................... 6 3.2 Voltage distribution .............................................................................. 7
Chapter 4 Clock sources ...................................................................... 8 4.1.1 MainOsc ......................................................................................................................... 8 4.1.2 Programmable Oscillator ............................................................................................. 8
Chapter 5 Debug and Programming interface .................................... 9
Chapter 6 Connectors for ports of device ......................................... 10 6.1 Connectors for ADC voltage supply ................................................. 10 6.2 Push button for RESET ...................................................................... 10 6.3 Mode Selection ................................................................................... 10 6.4 Connectors to MainBoard .................................................................. 11 6.4.1 Connector CN1 ............................................................................................................ 11 6.4.2 Connector CN2 ............................................................................................................ 12 6.4.3 Connector CN3 ............................................................................................................ 12
Chapter 7 Other circuitry .................................................................... 15 7.1 Signalling for CVMOUTZ and ERROROUTZ ..................................... 15 7.2 Pin Headers for Pull-Down and Pull-Up ............................................ 15 7.3 Signalling LEDs .................................................................................. 15
Chapter 8 Precautions ........................................................................ 16
Chapter 9 Mechanical dimensions .................................................... 17
Chapter 10 Schematic .......................................................................... 18
Chapter 11 Revision History ................................................................ 22
R20UT3885ED0100 Rev. 1.0 2 2016-08-08
Chapter 1 Introduction
The RH850/P1L-C Application Board is part of the RH850 Evaluation Platform and serves as a simple and easy to use platform for evaluating the features and performance of Renesas Electronics 32-bit RH850/P1L-C microcontrollers in a QFP100 package. The PiggyBack board (Y-RH850-P1XC-100PIN-PB-T1-V1) can be used as a standalone board, or can be mated with a mainboard (Y-RH850-X1X-MB-Tx-Vx) for extended functionality.
Main features:
• Socket for mounting of device
• Standalone operation of the board
• Direct supply of device voltage (typ. 3.3V and 5V)
• Device programming capability
• Device debugging capability
• Pin headers for direct access to each functional device pin
• Reset switch
• MainOSC circuitry
• Connectors to MainBoard
• Operating temperature from 0°C to +40°C
This document describes the functionality provided by the PiggyBack board and guides the user through its operation.
For details regarding the operation of the microcontroller, refer to the corresponding User’s Manual.
R20UT3885ED0100 Rev. 1.0 3 2016-08-08
Chapter 2 Overview
2.1 Overview Figures 1 and 2 provide a schematic view of the PiggyBack board.
Figure 1 PiggyBack Board Schematic Top View
The black arrow denotes the position of socket pin #1.
Figure 2 PiggyBack Board Schematic Bottom View
R20UT3885ED0100 Rev. 1.0 4 2016-08-08
2.2 Mounting of the device The board is designed for use with the following device:
RH850/P1L-C in 100pin QFP with 0.4mm pin pitch
The device must be placed inside the socket IC1. To insert the device, press down the lid of the socket, align the #1 pin of the device to the #1 pin of the socket, insert the device into the socket and release the lid.
R20UT3885ED0100 Rev. 1.0 5 2016-08-08
Chapter 3 Power supply
3.1 Board power connection For operation of the device, a supply voltage must be connected to the board. There are several possibilities to power the device.
Within this document the following voltages are considered as ‘typical’ connections:
Voltage1 = 5V
Voltage2 = 3.3V
Direct voltage supply
Two different voltages can be supplied to the board.
The following connectors are available to supply those voltages directly:
• Three 4mm ‘banana-type’ connectors: - Two red connectors for voltages Voltage1 (CN21) and Voltage2 (CN23). - A black connector for ground (GND) connection (CN22). Note: The three connectors are supplied with the board but not assembled.
For details about voltage distribution, refer to Chapter 3.2 ‘Voltage distribution’.
Supply by E1 emulator
The E1 emulator that is used for debug purposes and flash programming can also supply a single operating voltage (‘Dbg_Voltage’). This voltage is connected via E0VCC to the board.
See the documentation of the E1 and Chapter 5 ‘Debug and Programming interface’ for details.
Supply by MainBoard
In case the PiggyBack board is mounted on a MainBoard, the voltage Voltage1 and Voltage2 is supplied by the on-board regulator of the MainBoard.
CAUTION: Do not supply Voltage1 or Voltage2 directly to the PiggyBack board in case it is mounted on the MainBoard.
For each of the voltages, Voltage1 and Voltage2 a green LED (LED1 and LED2, respectively) is available to signal that the related voltage is available on the PiggyBack board. The corresponding LEDs are placed directly beneath the connectors of the related voltage.
R20UT3885ED0100 Rev. 1.0 6 2016-08-08
3.2 Voltage distribution The table shows the required device power supply pins and their function. For detailed explanation of their function, please refer to the user documentation of the corresponding device:
Device Supply Pin
SYSVCC
VCC
EnVCC (n = 0, 1)
AnVCC (n = 0, 1)
AnVREFH (n = 0, 1)
Additional one power supply for the MainBoard can be selected:
Supply voltage Function
VDDIOF IO supply voltage for components located on a connected mainboard.
The following figure shows the configurable voltage distribution on the PiggyBack board.
Figure 3 Voltage Distribution on the PiggyBack Board
• All power supply lines can be interrupted by jumpers. This provides the possibility to measure the current consumption of each individual power domain of the device.
• The IO supply voltage for the Mainboard (VDDIOF) can be connected via jumper JP1 to Voltage1 or Voltage2, if the PiggyBack board is mounted on a MainBoard.
• The voltage available at the uneven pins of CN15 is configurable via jumper JP11
JP9Voltage1
JP0Voltage2 JP3
JP10
JP6
VCC
JP4
E0VCC
E1VCC
VDDIOF (to mainboard)
JP5
JP1
JP2
SYSVCC
JP7
A0VCC
JP8
A0VREFH
#1 #2
#3 #2 #1
#1 #2
#3 #2 #1
JP11CN15 (uneven pins)
R20UT3885ED0100 Rev. 1.0 7 2016-08-08
Chapter 4 Clock sources
One external crystal oscillator for the device clock supply is provided with the board.
4.1.1 MainOsc
A crystal or ceramic resonator can be mounted on socket X1.
A 16Mhz oscillator is supplied with the board.
4.1.2 Programmable Oscillator
It is possible to mount a programmable crystal oscillator on the PiggyBack board at OSC1. The available footprint and circuitry is designed for a SG-8002CE programmable crystal oscillator from Epson Toyocom. The output from this oscillator can be connected to port X1 via jumper JP16. The SG-8002CE is neither mounted nor provided with the board. For details about the available circuitry refer to Chapter 10 ‘Schematic’. A resonator mounted on socket X1 must not be used in parallel to another clock source.
R20UT3885ED0100 Rev. 1.0 8 2016-08-08
Chapter 5 Debug and Programming interface
For connection of the microcontroller debug and flash programming tools, the connector CN25 with fourteen pins is provided.
The signal connection of the connector CN25 is shown in the table below:
CN25 Pin Device Port Device Signal
1 JP0_2 TCK / LPDCLK / FLSCI3SCKI
2 GND GND
3 JP0_4 TRSTZ
4 FLMD0 FLMD0
5 JP0_1 TDO / LPDO / FLSCI3TXD
6 - -
7 JP0_0 TDI / LPDI / FLSCI3RXD / FLSCI3TXD
8 ‘Dbg_Voltage’ E0VCC
9 JP0_3 TMS
10 - -
11 JP0_5 RDYZ / LPDCLKOUT
12 GND -
13 RESET RESETZ
14 GND -
R20UT3885ED0100 Rev. 1.0 9 2016-08-08
Chapter 6 Connectors for ports of device
Connection to each functional pin of the devices is possible via the connectors CN5 to CN8.
CAUTION: The pin headers are directly connected to the pins of the device, therefore special care must be taken to avoid any electrostatic or other damage to the device.
6.1 Connectors for ADC voltage supply It is possible to apply the ADC related reference, as well as one input voltage via SMA connectors (CN10 and CN11). These are directly connected (JP8 is bypassed) to the following pins of the device
Device Port
CN11 -> ADC0I0
CN10 -> A0VREFH
The SMA connectors are not mounted on nor provided with the boards. SMA connectors that fit to the following mounting holes available on the board can be mounted on the board
Figure 4 Mounting Holes for SMA Connectors
6.2 Push button for RESET In order to issue a RESET to the device, the push-button SW1 is available.
6.3 Mode Selection The PiggyBack Board gives the possibility to configure the following mode pins
• FLMD0 via jumper JP12 • FLMD1 via jumper JP13 • MODE0 via jumper JP14 • MODE1 via jumper JP15
To apply “High” or “Low” to the mode pins, the pins 1 and 2, or the pins 2 and 3 of the corresponding jumper must be shorted, respectively. Note: Pin 1 of the jumpers is marked by a small circle. CAUTION: Be careful in configuration of mode related pins, as wrong configuration can cause irregular behaviour of the devices. Be sure to check the corresponding User Manual, for details, which modes can be selected for the used device.
5.1mm
5.1m
m
Ø 1.6mm
R20UT3885ED0100 Rev. 1.0 10 2016-08-08
6.4 Connectors to MainBoard Three connectors (CN1, CN2 and CN3) are available to connect the PiggyBack board to a MainBoard. Regarding the function on the MainBoard, please refer to the UM of any supported MainBoard (Y-RH850-X1X-MB-Tx-Vx).
Some functions might not be available for every device. Therefore, please refer to the corresponding User’s Manual for available pins on the used device, and a detailed explanation of their function.
6.4.1 Connector CN1
Pin Function on MainBoard Device Port Pin Function on
MainBoard Device Port
1 Voltage1 - 2 Voltage1 - 3 Voltage1 - 4 Voltage1 - 5 RESET RESETZ 6 NMI P5_7
7 - - 8 - - 9 INT0 P4_7 10 INT1 P2_7 11 INT2 P5_13 12 INT3 P3_8 13 - - 14 - - 15 UART0TX P5_8 16 UART1TX P5_5 17 UART0RX P5_9 18 UART1RX P5_4 19 LIN0TX P5_8 20 LIN1TX P5_5 21 LIN0RX P5_9 22 LIN1RX P5_4 23 IIC0SDL P2_0 24 - - 25 IIC0SDA P2_1 26 - - 27 CAN0TX P5_1 28 CAN1TX P4_6 29 CAN0RX P5_0 30 CAN1RX P4_5 31 SENT0IN P0_0 32 SENT1IN P0_1 33 SENT0OUT P2_4 34 SENT1OUT P3_13 35 - - 36 - - 37 - - 38 - - 39 - - 40 - - 41 - - 42 - - 43 - - 44 - - 45 - - 46 - - 47 - - 48 - - 49 - - 50 - - 51 - - 52 - - 53 - - 54 - - 55 - - 56 - - 57 - - 58 - - 59 - - 60 - - 61 - - 62 - - 63 - - 64 - - 65 - - 66 - -
R20UT3885ED0100 Rev. 1.0 11 2016-08-08
Pin Function on MainBoard Device Port Pin Function on
MainBoard Device Port
67 - - 68 - - 69 - - 70 - - 71 - - 72 - - 73 - - 74 - - 75 - - 76 - - 77 - - 78 - - 79 - - 80 - - 81 - - 82 - - 83 - - 84 - - 85 DIGIO_0 P5_6 86 DIGIO_1 P5_7 87 DIGIO_2 P5_10 88 DIGIO_3 P5_14 89 DIGIO_4 P5_15 90 DIGIO_5 P1_2 91 DIGIO_6 P2_0 92 DIGIO_7 P2_1 93 DIGIO_8 P2_2 94 DIGIO_9 P2_3 95 DIGIO_10 P2_4 96 DIGIO_11 P2_5 97 DIGIO_12 P2_6 98 DIGIO_13 P2_7 99 DIGIO_14 P2_8 100 DIGIO_15 P2_9 101 - - 102 - - 103 MUX0 P4_0 104 MUX1 P4_8 105 MUX2 P4_9 106 - - 107 ADC0 ADC0I0 108 ADC1 ADC0I1 109 ADC2 ADC0I2 110 ADC3 ADC0I10 111 ADC4 ADC0I11 112 ADC5 ADC0I12 113 ADC6 ADC0I13 114 ADC7 ADC0I14 115 VDDIOF - 116 VDDIOF - 117 Voltage2 - 118 Voltage2 - 119 Voltage2 - 120 Voltage2 -
6.4.2 Connector CN2
CN2 is mounted on the PiggyBack board to enable a stable mechanical connection to the currently available MainBoard (Y-RH850-X1X-MB-Tx-Vx). No function is assigned to CN2
6.4.3 Connector CN3
Pin Function on MainBoard Device Port Pin Function on
MainBoard Device Port
1 - - 2 - - 3 - - 4 - - 5 - - 6 - -
R20UT3885ED0100 Rev. 1.0 12 2016-08-08
Pin Function on MainBoard Device Port Pin Function on
MainBoard Device Port
7 - - 8 - - 9 - - 10 CSIH1CSS0 P4_1 11 - - 12 - - 13 - - 14 - - 15 - - 16 - - 17 - - 18 - - 19 - - 20 - - 21 CSIH1CSS2 P3_12 22 CSIH1CSS7 P3_11 23 - - 24 - - 25 - - 26 DIGIO P2_2 27 - - 28 CSIH1SO P4_2 29 CSIH1SC P4_3 30 CSIH1SI P4_4 31 - - 32 - - 33 - - 34 - - 35 - - 36 - - 37 - - 38 - - 39 DIGIO P2_3 40 - - 41 - - 42 - - 43 - - 44 - - 45 - - 46 - - 47 - - 48 - - 49 - - 50 - - 51 - - 52 - - 53 - - 54 - - 55 - - 56 - - 57 - - 58 - - 59 - - 60 - - 61 - - 62 - - 63 - - 64 - - 65 - - 66 - - 67 - - 68 - - 69 - - 70 - - 71 - - 72 - - 73 - - 74 - - 75 - - 76 - - 77 - - 78 - - 79 - - 80 - - 81 - - 82 - - 83 - - 84 - - 85 - - 86 - - 87 - - 88 - - 89 - - 90 - - 91 - - 92 - -
R20UT3885ED0100 Rev. 1.0 13 2016-08-08
Pin Function on MainBoard Device Port Pin Function on
MainBoard Device Port
93 - - 94 - - 95 - - 96 - - 97 - - 98 - - 99 - - 100 - - 101 - - 102 - - 103 - - 104 - - 105 - - 106 - - 107 - - 108 - - 109 - - 110 - - 111 - - 112 - - 113 - - 114 - - 115 - - 116 - - 117 - - 118 - - 119 - - 120 - -
R20UT3885ED0100 Rev. 1.0 14 2016-08-08
Chapter 7 Other circuitry
7.1 Signalling for CVMOUTZ and ERROROUTZ Two red LEDs, LED5 and LED4 are available two indicate a “low” output signal from CVMOUTZ and ERROROUTZ, respectively.
7.2 Pin Headers for Pull-Down and Pull-Up A connector CN15 is available to enable easy connection to Voltage1/Voltage2 (5V/3.3V) or GND via pull-up or pull-down resistances, respectively. The voltage supply to the uneven pins can be configured via JP11. See 3.2 ’Voltage distribution’ for details.
Hereby uneven pins from 1 to 19 (in total ten) are configured as pull-up pin headers, while the even numbers from 2 to 20 (in total ten) can be used for pull-down.
By connecting device port pins from CN5 – 8 to CN9 it is therefore possible to pull a desired port pin to “Low” or “High”.
7.3 Signalling LEDs
Eight LEDs are provided to allow visual observation of the output state of device port pins. Device pins P2_2 to P2_9 are connected to the uneven pins 15 to 1 of the pin header CN9, while the LEDs 6 to 13 are connected to the even pins 16 to 2, respectively. Thus the LEDs can be either connected to the device port pins P2_2 to P2_9 via jumper or any device port pin can be connected directly to the even pin headers.
R20UT3885ED0100 Rev. 1.0 15 2016-08-08
Chapter 8 Precautions
No limitations are known at the release of this document.
R20UT3885ED0100 Rev. 1.0 16 2016-08-08
Chapter 9 Mechanical dimensions
100,00mm
160,
00m
m
CN2
CN1
24,0
0mm
24,0
0mm
CN3
9,00
mm
80,0
0mm
50,00mm
R20UT3885ED0100 Rev. 1.0 17 2016-08-08
Chapter 10 Schematic
CAUTION: The schematic shown in this document is not intended to be used as a reference for mass production. Any usage in an application design is in sole responsibility of the customer.
The following components described in the schematic are not provided with the board:
• SMA connectors
o CN10
o CN11
• Jumper JP16
• Oscillator OSC1
• Capacitors
o C1
o C2
• Resistances
o R1
o R2
o R12
• Mainboard Connector CN4
The following components described in the schematic are provided with but not mounted on the board:
• Standard 4mm power lab sockets
o CN21
o CN22
o CN23
R20UT3885ED0100 Rev. 1.0 18 2016-08-08
Chan
ges
Date
Vers
ion
Com
pone
nt
Sign
allin
g fo
r CVM
OUT
and
ERR
ORO
UTSM
As C
onne
ctor
s
Thu
May
19
06:4
0:10
201
6PA
GE
1 O
F3
1.00
EESS
-040
0-12
6-01
RH85
0-P1
XC-1
00PI
N-PB
-T1-
V1El
ectro
nics
Eur
ope
Gm
bH
3.3V
head
er 2
way
jum
per 2
.54m
m
16.0
00 M
HZ +
SO
CKET
4.7p
18PF
SG80
02CE
-16M
Hz
3.3
OR
5V
10K
1516
1413
1.25
VVC
L_1
3.3
OR
5VSY
SVCC
4.7p
100n
Boar
d_VC
C
2PB7
09AR
T
100n
RH85
0_d1
v2_1
00_y
am_S
ocke
t
3.3
OR
5VA0
VREF
H
220n
220n
1.25
V3.
3 O
R 5V
E1VC
C
151413121110
19
313335
28
3.3
OR
5V
151413
3.3
OR
5VA0
VCC
29
3.3
OR
5V3.
3 O
R 5V
E0VC
C
34 32
424345
41 39 33
SMA
stra
ight
100n
100n
100n
100n
100n
70
6059
143.3
OR
5V
3.3
OR
5V3.
3 O
R 5V
Boar
d_VC
C
head
er 2
5way
head
er 2
5way
THT
5048 4945 47464443424135343230 3127 28 292623 25242221
head
er 2
5way
THT
100999895 979693 9492919088 898786858482 8381807977 7876
THT
7573 7471 727020191817161513 1410 11 12985 6 73 42
686665 6763 646160 6258 5957565553 545251
10K
56K
VCC
E1VC
C3.
3 O
R 5V
100n
A0VC
C
100n
SYSV
CC
VCC
3.3
OR
5V
1K0
100999796
12
4
100
9997 989695
1
4432
56
56
67
8
109
789
89
111011
121314
1617 17
181819
202121
20
22 22232424
23
2525
2626
2731
27
93987654320
9493929190878483828180787776
94939291878584 8682 8379 8178
75757474
73 7372727171
70
432
E1VC
C
6969
67
6564 64
6262
6059
5858575756565555
54 545353525251512
36
3941 40
43
4647484950
48
40
23
10
5
A0VR
EFH
3.3
OR
5V
014567891012131415111 0
10
12
95104 5 6 7 8 1312
403938373633
69
89 90
5
3
03
185 88 98
44
28
42
38 37
4047
30
86
63 63
7
37
3436
38 30
444546
4950 32
350 1 2 3 4 5
3.3
OR
5V3.
3 O
R 5V
A0VR
EFH
2
VCL_
11.
25V
1.25
VVC
L_0
14E1
VCC
88
66
80
V3V
red
56K
150
2PB7
09AR
T
red
150
76
89
77
79
1
61 61
656667
68 68
THThe
ader
25w
ay
1
29
E0VC
C
1
3.3
OR
5V
VCL_
0
SMA
stra
ight
C2
JP16
OSC
1
C12
R6
CN10
CN11
C3
X1
C1
I C1
TR11 LE
D4
R26
R27
R28
TR10 LE
D5
R30
R29
R25
C20
C14
C13
C11
C10
8C9C
C6C5
CN8
CN6
CN5
CN7
Z_PI
NS<1
00..1
>
Z_PI
NS<1
00..1
>
P1<4
..2>
ERRO
ROUT
Z
ERRO
ROUT
Z
P6<0
>
Z_PI
NS<1
00..1
>Z_
PINS
<100
..1>
CVM
OUT
Z
P4<1
4..1
3>
ADC0
I<15
..10>
P4<1
0..0
>
P2<9
..0>
P0<2
>
JP0<
5..0
>
P5<1
0..4
>
P5<1
5..1
2>
P3<1
4..0
>
P0<2
..0>
P3<1
3..3
>
P3<1
3..3
>
P5<1
..0>
ADC0
I<5.
.0>
P4<1
0..0
>
P3<1
4..0
>
FLM
D0
P0<1
4..1
0>
CVM
OUT
Z
RESE
TZ
ADC0
I<0>
21
41
23
1
5 43 2
1
5 43 2
67
69
99
65
16
66
15
98
70
64
19
47 46 45 44 43 42 41 40 39 38 37 36 35
1817
141312
987654321
9796
50
959493929188878685848382818079787776
737271
5756
51
49 48
68
58
63
59606162
52
10090
75
10
89
74
11
5455
53
202122232425
293031323334 27 2628
2 3
1
2 3
1
25242322212019181716151413121110987654321
2524232221201918171615141312111098765432125242322212019181716151413121110987654321
25242322212019181716151413121110987654321
BI
25242322212019181716151413121110987654321
2524232221201918171615141312111098765432125242322212019181716151413121110987654321
25242322212019181716151413121110987654321
BI
BI
21
OE
VCC
GND
CLK
BI
BI
BI
BI
BI
BI
BI B
I
BI
BI
BI
BI B
IB
I
BI
BI
BI
BI
BI
BI
P5[1
]
P4[10]
ERRO
ROUT
ZVS
S[2]
VCC
P3[1
3]P3
[12]
P3[1
0]P3
[9]
P3[8
]P3
[7]
P3[6
]E1
VSS[
2]E1
VCC[
2]P3
[5]
P3[4
]P3
[3]
P2[9
]P2
[8]
P2[7
]P2
[6]
P2[5
]P2
[4]
P2[3
]P2
[2]
P2[1
]P2
[0]
E1VSS[1]E1VCC[1]
P1[4]P1[3]P1[2]
SYSVCCX1
OSCVSSX2
VCL[1]VSS[1]
RESETZJP0[4]JP0[0]JP0[1]JP0[2]JP0[3]JP0[5]P0[14]P0[10]
E0VCCE0VSS
CVMOUTZFLMD0
P0[2]
P3[1
1]P0
[1]
P0[0
]P5
[15]
P5[1
4]P5
[13]
P5[1
2]P5
[10]
P5[9
]P5
[8]
P5[7
]P5
[6]
P5[5
]P5
[4]
P5[0
]AD
C0I[0
]AD
C0I[1
]AD
C0I[2
]AD
C0I[3
]AD
C0I[4
]AD
C0I[5
]A0
VCC
A0VS
SA0
VREF
H
ADC0I[10]ADC0I[11]ADC0I[12]ADC0I[13]ADC0I[14]ADC0I[15]P6[0]P4[14]P4[13]VSS[0]VCL[0]
P4[9]P4[8]E1VCC[0]E1VSS[0]P4[7]P4[6]P4[5]P4[4]P4[3]P4[2]P4[1]P4[0]P3[14]
B
E C
B
E C
Siz
eD
ocum
ent N
umbe
r
A2
Title
Dat
e:
98
76
54
32
1
A B C D E F
A B C D E F
R20UT3885ED0100 Rev. 1.0 19 2016-08-08
Min
7.2
ms
from
VCC
up to
rese
tz u
p
POW
ER S
UPPL
Y
VOLT
AGE
DIST
RIBU
TIO
N
LED
- P2<
9..2
>
PUSH
BUT
TON
FOR
RESE
T
5V
TOP
GND
TES
T PO
INT
BOTT
OM
3.
3V
RUBB
ER F
EET
DEBU
G A
ND P
ROG
RAM
MIN
G IN
TERF
ACE
GND
Wed
May
18
10:4
6:49
201
6PA
GE
2 O
F3
1.00
EESS
-040
0-12
6-01
RH85
0-P1
XC-1
00PI
N-PB
-T1-
V1El
ectro
nics
Eur
ope
Gm
bH
GRE
EN
1SM
A591
4BT3
G_3
.6V
STD
POW
ER L
AB S
OCK
ET 4
MM
RED
1SM
A591
9BT3
G_5
.6V
150
STD
POW
ER L
AB S
OCK
ET 4
MM
BLA
CK
head
er 3
way
long
jum
per 2
.54m
m
head
er 3
way
long
jum
per 2
.54m
m
head
er 2
way
long
jum
per 2
.54m
m
head
er 2
way
long
jum
per 2
.54m
m3.3VA3V0
head
er 2
way
long
jum
per 2
.54m
m
head
er 2
way
long
jum
per 2
.54m
m
5V
E0VC
C3.
3 O
R 5V
10K
GRE
EN
1K5
NXP_
BC84
7C
yello
w
1K5
56K
3.3
OR
5V
yello
w
Boar
d_VC
C
10K
head
er 3
way
long
jum
per 2
.54m
m
V5V
FIDU
CIAL
_1M
M
FIDU
CIAL
_1M
M
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
GND
-TES
TPO
INT
GND
-TES
TPO
INT
GND
-TES
TPO
INT
GND
-TES
TPO
INT
GND
-TES
TPO
INT
FIDU
CIAL
_1M
M
5V
3.3
OR
5V
3.3
OR
5VBo
ard_
VCC
3.3
OR
5VBo
ard_
VCC
3.3
OR
5V
Boar
d_VC
C
P5V0
1N58
19HW
3.3V
00
5V
51
100U
5.0V
100U
100u
4K7
NXP_
BC84
7C10
K
56K
NXP_
BC84
7C
1K5
56K
NXP_
BC84
7C10
K
yello
w
56K
10K
56K yello
w
1K5
10K
56K
head
er 1
6way
NXP_
BC84
7C
1K5
10K
56K
3 72 4 5 6 8 9
VDDI
OF
3.3
OR
5V
V3V
5V
1.0u
1.0u
1.0u
100u
A0VR
EFH
A0VC
C
yello
w
56K
10K
3.3V
1K0
2 1 3 50
1K0
4
100U
STD
POW
ER L
AB S
OCK
ET 4
MM
RED
3.3V
P3V3
Boar
d_VC
C
P3V3P5
V0V5
V
1.0u
5.0V
3.3
OR
5V
470n
TLC7
701I
D
Boar
d_VC
C3.
3 O
R 5V
VCC
GND
-TES
TPO
INT
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
E0VC
C
FIDU
CIAL
_1M
M
A5V0
1N58
19HW
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
RUBB
ER F
OO
T D=
11.1
MM
/H=5
MM
GRE
Y
yello
w
1K5
1K5
NXP_
BC84
7C
1K5
Boar
d_VC
C3.
3 O
R 5V
yello
w
10K
NXP_
BC84
7C
Boar
d_VC
C
VIN_
3.3V
VIN_
5V
PUSH BUTTON 4 PIN SMD
3.3
OR
5V
100n
Boar
d_VC
CBo
ard_
VCC
3.3
OR
5V
3.3
OR
5V
Boar
d_VC
C3.
3 O
R 5V
yello
w
NXP_
BC84
7C
3.3
OR
5V
3.3
OR
5V 1.0u
3.3
OR
5V 1.0u
E0VC
C
SN74
LVC1
G12
5DCK
10K10K
3.3
OR
5V
1.0u
E1VC
C
SYSV
CC3.
3 O
R 5V
head
er 3
way
long
jum
per 2
.54m
m
3.3
OR
5Vhe
ader
3wa
y lo
ng ju
mpe
r 2.5
4mm
head
er 3
way
long
jum
per 2
.54m
m
head
er 3
way
long
jum
per 2
.54m
m
V3V
3.3
OR
5VVC
C
3.3V
3.3V
5
10K
150K
0
HEAD
ER 1
4WAY
SHR
OUD
ED
R8
MP6
JP1
C7C4
JP2
JP5
R9
R73
LED9
TR4
R71
LED8
R67
R69
TR3
R74
LED1
3
TR8
R72
R70
LED1
2 R68
TR7
R44
R42
LED7
R40
TR2
R38
R36
R45
R43
LED1
1 R41
TR6
R39
R37
LED6
R34
TR1
R32
R23
LED1
0 R35
TR5
R33
R31
CN9
R46
IC2
C21
IC3
C42
R7
R10
SW1
C18
JP8
JP6
JP1 0
C27
C26
C28
C32
C23
C25
C30
R14
R15
R12
D4D3
MP1TP
12
TP11
TP14
TP15
MP2
MP3
MP4
MP5
TP5
TP6
TP8
TP7
TP9
TP10
R2
C15
R4
LED1
C16
R5
LED2
D1 D2
CN21
CN22
CN23
R3
R1
CN25
JP9
JP3
JP4 JP
7
JP0
JP0<
5..0
>
P2<9
..0>
Port6
Port5
Port4
Port2
Port6
Port3
Port4
Port5
Port7
Port9
Port8
Port8
Port3
Port2
RESE
TZ
Port7
Port9
RESE
T_IN
RESE
TZ
RES
P4<1
0..0
>
FLM
D0FP
MD0
321
321321
23
1
23
1
23
1
23
1
23
1
23
1
23
1
23
1
1615
1413
1211
109
87
65
43
21
451 32
8
7256
4
31
321
21
21
111 1
1 1 11 1 121 21
21
1413
1211
109
87
65
43
21
21
321 321
321
21
21
321
321321
B
EC
B
EC
B
EC
B
EC
B
EC
B
EC
B
EC
B
EC
5161
3141
1121
901 8
76
54
32
1
IN
OE
ZVC
C YG
ND
A
RESE
T_Z*
RESE
T
GNDVCC
SENS
ERE
SIN*
CTCONT
ROL
32121
21
OU
T
BI
3141
1121
9018
76
54
32
1
OU
T
BI
21
321 321
321
Siz
eD
ocum
ent N
umbe
r
A2
Title
Dat
e:
98
76
54
32
1
98
76
54
32
1
A B C D E F
A B C D E F
R20UT3885ED0100 Rev. 1.0 20 2016-08-08
Conn
ecto
r
CONN
ECTO
R4
MO
DE1
MO
DE0
FLM
D1
CONN
ECTO
R2
MO
DE J
umpe
rPU
LL U
P PU
LL D
OW
N
CONN
ECTO
R3CO
NNEC
TOR1
TO M
AIN
BOAR
D CO
NNEC
TORS
Thu
May
19
06:4
0:24
201
6
Elec
troni
cs E
urop
e G
mbH
RH85
0-P1
XC-1
00PI
N-PB
-T1-
V1
EESS
-040
0-12
6-01
1.00
PAG
E 3
OF
3
head
er 3
way
long
jum
per 2
.54m
m
1K0
QTH
-060
-01-
F-D-
A
3.3
OR
5VVD
DIO
F3.
3 O
R 5V
VDDI
OF
2
1K01K0
1K0
1K01K0
3
head
er 3
way
long
jum
per 2
.54m
m
5
head
er 2
way
long
jum
per 2
.54m
m
1K0
3.3
OR
5VE0
VCC
3.3
OR
5VE1
VCC
E1VC
CE1
VCC
3.3
OR
5V
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
1K0
5VV5V
1K0
QTH
-060
-01-
F-D-
A
5.0V
P5V0
P5V0
3.3V
QSH
-060
-01-
F-D-
A
P3V3
3.3V
V3V
1K0
3.3
OR
5V
head
er 2
way
long
jum
per 2
.54m
mhe
ader
3wa
y lo
ng ju
mpe
r 2.5
4mm
P3V3
QSH
-060
-01-
F-D-
A5.
0V
3.3V
R50
R48
R47
JP11
R21 R2
2
R19
R18
JP15
R20
JP14
R17
JP13
JP12
R57
R59
R58
R60
R62
R61
R49
R52
R51
R63
R64
R65
R66
CN15
R53
R54
R55
R56
CN4
CN2
CN1
CN3
P 4<2
>P4
<4>
P4<0
>P4
<9>
ADC0
I<0>
ADC0
I<2>
ADC0
I<11
>AD
C0I<
13>
P5<6
>
P2<8
>P2
<6>
P2<4
>
P2<0
>P2
<2>
P5<1
5>P5
<10>
P4<1
4..0
>P4
<14.
.0>
FLM
D0
P4<1
4..0
>
P2<5
>
P2<1
>
P5<7
>P5
<14>
P1<2
>
P2<3
>
P2<7
>P2
<9>
ADC0
I<14
>
P4<8
>
ADC0
I<1>
ADC0
I<10
>AD
C0I<
12>
P4<3
>
P3<1
2>
P2<3
>
P4<1
>
P3<1
1>
P2<2
>
P5<8
>
RESE
TZ
P5<1
>
P2<4
>
P5<0
>P0
<0>
P2<1
>
P5<8
>P5
<9>
P5<9
>
P2<0
>
P5<5
>
P3<8
>P2
<7>
P5<4
>
P5<4
>P5
<5>
P5<1
3>P4
<7>
P5<7
>
P4<6
>P4
<5>
P0<1
>P3
<13>
5452
21 3
321
32121
21
2019
1817
1615
1413
1211
109
87
65
43
21
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
9998
9796
9594
9392
9190
8988
8786
8584
8382
8180
7978
7776
7574
7372
7170
6968
6766
6564
6362
61
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
9998
9796
9594
9392
9190
8988
8786
8584
8382
8180
7978
7776
7574
7372
7170
6968
6766
6564
6362
61
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
9998
9796
9594
9392
9190
8988
8786
8584
8382
8180
7978
7776
7574
7372
7170
6968
6766
6564
6362
61
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
9998
9796
9594
9392
9190
8988
8786
8584
8382
8180
7978
7776
7574
7372
7170
6968
6766
6564
6362
61
6059
5857
56555351
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
1009896949290888684828078767472706866646260585654525048464442403836343230282624222018161412108642
99979593918987858381797775737169676563615957555351494745434139373533312927252321191715131197531
BI
BI
BI OU
T
BI
BI
BI
BI
BI
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
1009896949290888684828078767472706866646260585654525048464442403836343230282624222018161412108642
99979593918987858381797775737169676563615957555351494745434139373533312927252321191715131197531
OU
T
IN
OU
TO
UT
OU
T
OU
T
OU
T
OU
TO
UT
INO
UTIN
OU
T
IN BI
OU
T
BI
BI
INOU
TINO
UT
IN
321
OU
TINININ BI
BI
BI
IN
OU
TIN
IN
OU
T
321
32121
21
2018161412108642
191715131197531
BI
BI
BI
BI
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
1009896949290888684828078767472706866646260585654525048464442403836343230282624222018161412108642
99979593918987858381797775737169676563615957555351494745434139373533312927252321191715131197531
BI
BI
OU
T
OU
TO
UT IN
OU
T OU
T
BI
OU
T
BI
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
1009896949290888684828078767472706866646260585654525048464442403836343230282624222018161412108642
99979593918987858381797775737169676563615957555351494745434139373533312927252321191715131197531
Siz
eD
ocum
ent N
umbe
r
A2
Title
Dat
e:
98
76
54
32
1
98
76
54
32
1
A B C D E F
A B C D E F
R20UT3885ED0100 Rev. 1.0 21 2016-08-08
Chapter 11 Revision History
The table provides information about the major changes of the document versions.
Date Version Description
2016-08-08 1.0 Initial release
R20UT3885ED0100 Rev. 1.0 22 2016-08-08
Notice
1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others.
3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality":Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti- crime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges.
R20UT3885ED0100 Rev. 1.0 23 2016-08-08
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor
products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
www.renesas.com
R20UT3885ED0100 Rev. 1.0 24 2016-08-08
![Guia Oficial Final Fantasy VIII [Piggyback].pdf](https://static.fdocuments.net/doc/165x107/5695d3e51a28ab9b029f91aa/guia-oficial-final-fantasy-viii-piggybackpdf.jpg)
