Accepted Manuscript

Rubbery logic gates

Katherine E. Wilson, E.-F. Markus Henke, Geoffrey A. Slipher, Iain A.Anderson

PII: S2352-4316(16)30133-XDOI: http://dx.doi.org/10.1016/j.eml.2016.07.001Reference: EML 195

To appear in: Extreme Mechanics Letters

Received date: 7 June 2016Revised date: 4 July 2016Accepted date: 4 July 2016

Please cite this article as: K.E. Wilson, E.-F.M. Henke, G.A. Slipher, I.A. Anderson, Rubberylogic gates, Extreme Mechanics Letters (2016), http://dx.doi.org/10.1016/j.eml.2016.07.001

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Rubbery logic gates

Katherine E. Wilsona,∗, E.-F. Markus Henkea, Geoffrey A. Slipherb, Iain A. Andersona,∗

aBiomimetics Laboratory, Auckland Bioengineering Institute, The University of Auckland, Level 6, 70 Symonds Street, Auckland 1010, New ZealandbU.S. Army Research Laboratory, 2800 Powder Mill Road, Adelphi, Maryland 20783, USA

Abstract

Dielectric elastomer actuators (DEAs) that possess muscle-like characteristics have received a lot of attention in areas like soft

robotics. Traditionally, electronic control for dielectric elastomer (DE) artificial muscles was achieved with rigid external circuitry.

Recently, however, a flexible piezoresistive electrode, the dielectric elastomer switch (DES), was introduced that can operate high

voltage DEA switching and control. It has been demonstrated that DESs can control charge in high voltage analogue and digital

circuitry. In this contribution, we demonstrate high voltage operation of the seven basic Boolean logic gates using mechanosensitive

DESs. Logic elements made with DESs may provide signal processing capabilities in DE artificial muscles.

Keywords: Artificial muscles, Dielectric elastomer actuators, Dielectric elastomer switches, Logic gates

1. Introduction

Logic devices typically rely on electronics for the gating

mechanism. For instance, common integrated-circuit NAND

gates consist of multiple MOSFETs or several bipolar transis-

tors, diodes, and resistors [1, 2]. These components are mounted

on a rigid board. Here we present a means for logic gating

that is materially softer than the elements of a printed circuit

board and that relies on mechanical strain. The technology

is based on dielectric elastomer actuators (DEAs) coupled to

piezoresistive-charge gates.

A DEA is formed from a dielectric elastomer (DE) mem-

brane, a type of electroactive polymer (EAP), sandwiched be-

tween two compliant electrodes. Actuation occurs when volt-

age is applied to the electrodes, generating electrostatic forces

known as Maxwell pressure [3–5]. The resultant deformation

in the DE membrane is a coupled compression in thickness

and expansion in planar area. The elasticity of the membrane

allows it to revert to its original dimensions when the volt-

age is removed. Voltage-induced deformation of DE materials

∗Corresponding authors.Email addresses: kwil803@aucklanduni.ac.nz (Katherine E.

Wilson), i.anderson@auckland.ac.nz (Iain A. Anderson)

has been continually increasing since early works demonstrated

over 100% areal strains, with the record currently at 2200%

areal strain [4, 6–8].

DEAs have characteristics comparable to those of biologi-

cal muscles, including strain-actuation, pressure, power density,

and work-per-cycle performance [9]. These properties, particu-

larly the ability to generate large strains, make DEAs a favored

actuator technology for use as artificial muscles [10, 11].

In 2010, O’Brien et al. demonstrated the dielectric elas-

tomer switch (DES) [12], which is a flexible piezoresistive elec-

trode that can be coupled with DEAs to control charge over the

actuators. DESs are composed of conductive particles dispersed

in a non-conductive matrix [12, 13], therefore DESs function

via the percolation effect [14, 15]. When compressed beyond

the percolation threshold, a DES will undergo orders of mag-

nitdue change in resistance [12, 16]. Thus, the in-plane expan-

sion of a DEA can be exploited to exert force over a switch and

the changing resistance of the switch can be used to control the

charge over a DEA.

Automatic charge control of DE artificial muscles using DESs

has been demonstrated in oscillators [13, 17], a dielectric elas-

tomer generator [18], and a self-commutating rotory motor [19].

Preprint submitted to Extreme Mechanics Letters July 4, 2016

DESs were also used in the production of a Turing machine

[20] that performed calculations based on digital logic. DESs

directly couple mechanics with digital logic [12], which is a key

distinction of DESs relative to other flexible electrodes [21–

23]. These developments support further exploration of logic

devices using DE artificial muscles and switches.

In this contribution, we demonstrate the construction and

operation of soft digital logic elements, the seven basic Boolean

logic gates, using high voltage electromechanical dielectric elas-

tomer switching. The seven basic Boolean logic gates include

NOT (inverter), NAND, AND, NOR, OR, exclusive-NOR (X-

NOR), and exclusive-OR (XOR) gates [1, 2, 24]. The truth

tables for these logic operators having two inputs are shown in

Table 1. The inverter has only one input and one output: when

the input is logical 1 the output is logical 0, and when the input

is logical 0 the output is logical 1 [1, 2, 24].

Table 1

Truth tables for 2-input Boolean logic gates [1, 2, 24].

Inputs Outputs

V 1 V 2 NAND AND NOR OR XNOR XOR

0 0 1 0 1 0 1 0

0 1 1 0 0 1 0 1

1 0 1 0 0 1 0 1

1 1 0 1 0 1 1 0

Boolean logic gates are building blocks for combinatorial

logic circuits. Thus, combinations of gate structures can create

various logical functions, which can be fitted to a broad range of

applications. Soft logic gates made up of pliable materials may

be integrated with artificial muscle devices to provide local sig-

nal processing and reduce the need for bulky external circuitry.

2. Materials and Methods

DEAs are 362% equibiaxially pre-strained VHB 4905 (3M,

USA) and electrodes are painted-on Nyogel 756G (Nye Lu-

bricants, USA). The switching compound is an approximately

5:1 by weight mixture of non-conductive Molykote 44 Medium

grease to conductive Cabot Vulcan XC72 carbon black. Switches

were transfer printed onto DE membranes using a polydimethyl-

siloxane (PDMS) stamp. Membranes were mounted on 3 mm-

thick transparent acrylic frames1 that had 60 x 35 mm windows,

and strips of PMMA (3mm wide) were placed between the actu-

ator and switch to promote a uniform deformation of the switch.

Metal screws and copper tape on the frames served as electrical

connections to a high voltage source.

A structural DES unit is demonstrated in both relaxed and

actuated states in Figure 1. Switches connected to a high volt-

age terminal were placed in series with a resistor, which inhib-

ited electrical breakdown of the switches and served as a pull-up

resistor [2] for the logic gates. The resistor value, 50 megohm,

was large enough to prevent spark erosion of the switches but

not too large to cause an excessive drop of voltage across itself

when the gate was in a state of sourcing current, i.e. had a high

(logical 1) output.

1poly(methyl methacrylate) (PMMA), common name: Perspex

2

DEA

DES

50 MΩ

+HV

GND

Vin=LowVout=High

DES unit=OFF

DE

A

DE

S

50 MΩ

+HV

x1

(a)

DEA

DES

50 MΩ

+HV

GND

Vin=High

Vout=Lowx1

x2

DES unit=ON

DE

A

DE

S

50 MΩ

+HV

x1

(b)

Fig. 1. Representative images (left), schematics (middle), and equivalent circuit diagrams (right) of a single DES unit: (a) off state and (b) on state. In the off, or

relaxed, state, the input voltage is zero so that the DE actuator and switch do not experience any mechanical strain beyond their pre-stretched state. In the on, or

actuated, state, the input voltage is high so that the DEA expands in area, indicated by arrows x1 and x2, and the DES is compressed. Since DEAs are essentially

flexible capacitors formed from pliable dielectrics and electrodes, they are represented by the symbol for a variable capacitor in the circuit diagrams.

2.1. Gate designs

The NOT gate (inverter) design, shown in Figure 2, is com-

prised of a single DES unit. A high voltage input (logical 1)

induces elongation in the actuator which compresses the switch

and decreases its resistance so that the voltage output becomes

low (logical 0). Inversely, a low voltage input (logical 0) will

not expand the actuator and the switch will remain non-conductive,

thus the voltage output will be high (logical 1).

50 MΩ

+HV

GND

V 1

Vout

Fig. 2. NOT gate (inverter) design schematic. +HV is 3 kV and V 1 is a square

wave voltage input.

The designs for 2-input gates are shown in Figure 3. It is

noteworthy that other structural designs are possible. In par-

ticular, the universal gates NAND and NOR can independently

form the other gates. For example, the NAND gate can behave

as an inverter either by using the same signal for both inputs

or by having only one changing input while the other input is

a constant high (logical 1) value. Additionally, multiple-input

gates, e.g. 3-input, are possible. The gate designs used in this

work provide proof-of-concept for each basic Boolean logic

gate using high voltage electromechanical DE switching.

3

50 MΩ+HV

GND

VoutV 2

V 1

(a)

50 MΩ

50 MΩ

+HV

GND

VoutV 2

V 1

(b)

50 MΩ

50 MΩ

+HV

GND

Vout

V 2

V 1

(c)

50 MΩ+HV

GND

Vout

V 2

V 1

(d)

50 MΩ

+HV

GND

V 2

V 1

50 MΩ

V 2

V 1

50 MΩ

Vout

(e)

50 MΩ

+HV

GND

V 2

V 1

50 MΩ

V 2

V 1

50 MΩ 50 MΩ

Vout

(f)

Fig. 3. Gate design schematics: (a) NAND, (b) AND, (c) NOR, (d) OR, (e) XNOR, and (f) XOR. +HV is 3 kV and V 1 and V 2 are square wave voltage inputs out

of phase with each other by 90 degrees.

2.2. Gate testing

The maximum voltage for an input signal was chosen to be

3 kV because it is within the range of operation for the pre-

strained DEA, which is approximately 2.5 kV (electric field 65

MV/m) to 3.5 kV (electric field 92 MV/m). Too low a voltage

is insufficient to induce enough stretch in the membrane to sig-

nificantly compress the switch, and too high a voltage would

cause catastrophic breakdown due to electromechanical insta-

bility [25] in the DEA.

In order to achieve all possible input combinations, i.e. 0

and 0, 0 and 1, 1 and 0, and 1 and 1, inputs V 1 and V 2 are

90 degree out-of-phase square wave voltages having 30 second

periods. Vout is the resulting voltage output measured across the

switch(es). For experimental purposes, voltage values above

2.5 kV are considered to be logical 1 and values below 1 kV

are considered to be logical 0. Measurements were taken with

LabView.

3. Results and Discussion

We have produced digital logic operators using DE actua-

tors and switches. Unlike standard logic gates made up entirely

of rigid electronic parts, the logic gates presented in this study

are soft and flexible and directly couple a mechanical input with

4

a logical state change. All seven logic gates were successfully

constructed and produced logical values matching the truth ta-

bles (Table 1). Figures 4 and 5 show the results for the one-input

NOT gate and 2-input gates, respectively. More complex com-

binatorial logic devices capable of higher level function (e.g.

half adder, arithmetic logic unit, or multiplexer) are feasible,

but are beyond the scope of this contribution.

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V1(kV)

0

1

Logic

state

(a)

80 85 90 95 1000

1

2

3

Voltage

(kV)

0

1

τ1

Logic

state

VinVout

(b)

Fig. 4. NOT gate (inverter): (a) Voltage plots and (b) Close-up view of time

interval showing example time delay τ1 characteristics of the output signal.

Gate response was as expected, with the output voltage high (logical 1) when

the input voltage was low (logical 0), and vice versa. τ1 shows significant time

delay in the output signal when the input voltage changes from low to high. In

the example, τ1 is 2.5 seconds.

Some time delay was observed in the output signals. This

observation may be explained by the behavior of the actuators.

DEAs creep to a fully expanded or relaxed state due to the vis-

coelasticity of the VHB membrane [26]. Thus, the switches are

not compressed or relaxed quickly enough to produce output

signals closer to ideal square waves. The time delay is signifi-

cant when the input voltage changes from low to high, because

the viscoelastic losses in the membrane oppose the elastic de-

formation. When the input voltage changes from high to low,

however, the time delay is very short because the elastic restor-

ing force dominates over the viscoelasticity. An example is

given in Figure 4(b), in which the time delay τ1 when the in-

put voltage changes from low to high is 2.5 seconds and the

time delay when the input voltage changes from high to low is

negligible. Time delay can be an advantage for purposes such

as filtering and increasing noise margins, but may be an issue

in applications where quick or immediate signals are required.

Future studies might consider the latency period across signal

processing networks that use high voltage DE switching.

Conjointly, the switching speed is limited mainly by the vis-

coelasticity of the DEA membrane. Figure 4(b), for example,

suggests the maximum operating frequency of the inverter is 0.4

Hz, or a 2.5 second period. Operating speed may vary between

gates, especially due to the hand-made fabrication process.

It is also apparent that the output voltage levels are not fully

saturated, i.e. output signals do not reach an absolute minimum

voltage value. This can partially be addressed by adjusting the

period of the input signals. A short period will add mechanical

stress to the membrane before it has fully relaxed, meaning the

switch will not have reached its minimum resistance. A longer

period allows the membrane to more completely relax or ex-

pand, resulting in maximum or minimum switch resistances,

respectively.

We found that a period of 30 seconds enabled appreciable

saturation of the output signal for all gates, while periods much

less than 30 seconds did not result in significantly saturated sig-

nals and periods greater than 30 seconds did not substantially

improve the signal. For instance, experiments with an OR gate

having input signal periods of 10, 30, and 60 seconds resulted

in voltage output minimum values of 1590 V, 750 V, and 702 V,

respectively.

Of course, realistic logic signal levels do not reach absolute

limits. In practice, digital logic gates have tolerances for input

and output signals with acceptable noise margins. Likewise,

acceptable voltage ranges that correspond to logical values 0

5

and 1 can be selected. For example, 0 V to 1 kV may be the

low logic state and 2 kV to 3 kV may be the high logic state.

Enhanced digital signals may be achieved with better mate-

rials and an automated fabrication process. Improved actuator

membranes would have faster response times as well as aug-

mented reliability and lifetime. Improved switches would have

sharper and faster switching characteristics and a greater elec-

trical breakdown strength. Recently, a promising new switching

material was introduced by Chau et al. [27] that presents im-

proved characteristics compared to the original grease switch

used in this work. These improvements would also enable scal-

ing the designs, which is currently limited by spark erosion in

the switches, and increasing the cycle life. Other studies in

our lab have demonstrated up to 25,000 cycles in an oscillator

formed from three inverters in a closed loop.

A noteworthy benefit of this switching process that could be

utilized in future studies is that the input and output signals can

be electrically isolated. Since actuators and switches are me-

chanically coupled, they can be driven by different power sup-

plies, unlike semiconductor equivalents. Additionally, a DES

may be used as a voltage or power amplifier, similar to the way

a bipolar junction transistor (BJT) may be used [2].

DESs can be influenced not only by strains in adjacent actu-

ators but also by external strains from the environment. In this

way, our soft logic devices can be viewed to have two poten-

tial forms of input, one self-imposed mechanical deformation,

and the other a purely exogenous source of mechanical defor-

mation, and will respond with the same resultant logical state

change to both. Logic with mechano-feedback is an exciting

prospect for soft robots that aim to autonomously navigate and

adapt to unpredictable surroundings. There are many oppor-

tunities for advancements in this technology, and applications

may include biomimetic robots and wearable logic devices that

respond to environmental strains.

6

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V2(kV)

0

1

Logic

state

(a)

0

1

2

3

4

Outputvoltage

Vout(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)Inputvoltage

V2(kV)

0

1

Logic

state

(b)

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V2(kV)

0

1

Logic

state

(c)

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V2(kV)

0

1

Logic

state

(d)

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V2(kV)

0

1

Logic

state

(e)

0

1

2

3

4

Outputvoltage

Vou

t(kV)

0

1

Logic

state

0

1

2

3

4

Inputvoltage

V1(kV)

0

1

Logic

state

0 20 40 60 80 100 120 140 160 180 2000

1

2

3

4

Time (s)

Inputvoltage

V2(kV)

0

1

Logic

state

(f)

Fig. 5. Voltage plots for 2-input logic gates: (a) NAND, (b) AND, (c) NOR, (d) OR, (e) XNOR, and (f) XOR. Results were as expected, with output voltage signals

matching logical output values from the truth tables (Table 1).

4. Conclusions

We have demonstrated that mechanosensitive DESs can be

used to construct all the fundamental Boolean logic operators.

Soft digital logic circuitry may provide local signal processing

for artificial muscles, another step toward creating smart robots

that are entirely soft and do not require external circuitry.

Future research could focus on using DE actuators and switches

to develop sequential logic circuitry, such as the flip-flop ele-

ment demonstrated by O’Brien et al. [28]. With both combi-

natorial and sequential logic circuitry available, complex func-

tions and programs may be implemented in smart artificial mus-

cle devices. As the initial introduction of digital logic to tech-

nology instigated a surge of computing capabilities, one can

imagine similarly boundless opportunities in a broad range of

applications for soft logic.

Multiple uses for flexible DES electrodes have been demon-

strated with artificial muscles, and it would be interesting to

next create a demonstrative device that combines all the ca-

pabilities of high voltage DE switching - something that can

sense, locally process information, and carry out a response,

analogous to a muscle reflex.

Acknowledgments

This work was funded by a US Army Research, Devel-

opment & Engineering Command Grant and was further sup-

ported by a fellowship within the Postdoc-Program of the Ger-

man Academic Exchange Service (DAAD) received by E.-F.

Markus Henke. The authors acknowledge Patrin K. Illenberger

for consultation on electrical engineering.

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