RoHS Presentation for CMSE - Ops A La Carte Presentation for CMSE February 9, 2009 ... around RoHS...
Transcript of RoHS Presentation for CMSE - Ops A La Carte Presentation for CMSE February 9, 2009 ... around RoHS...
RoHSPresentation
for CMSE
February 9, 2009By Mike SilvermanManaging Partner
Ops A La [email protected]
www.opsalacarte.com(408) 472-3889
The subject matter we address in this tutorial are the significant reliability uncertainties around RoHS and Lead-Free Solder and how to best address these risks and mitigate them so as not to take a hit in the area of reliability during the lead-free transition.
Summary and Conclusions
• Like the rest of the electronics industry, your products will transition to Restriction of Hazardous Substances (RoHS) compliance.
• At this time, there are significant reliability uncertainties around Lead-Free Solder.
• Even if your product does not need to be compliant, the materials and processes that make up your product are changing.
As one major consumer product team concluded, doing nothing would double the field failure rate of the electronics.
Introduction
• During this time of rapid transition, there is a significant newbody of knowledge to understand to determine the areas of greatest risk to the reliability of your product.
• In this presentation, we will highlight a few of these significant risk areas and how to best mitigate these risks during the transition.
• Even though the deadline of July 1, 2006 came and went, many companies are still struggling with this issue and are either still trying to become compliant, or developed substandard methodologies to meet the deadline, only to find out that they created a ticking time bomb of reliability that is just waiting to go off.
• We will explore a few of these case studies.
Introduction
• RoHS: Restriction of Hazardous Substances• Pb-Free or Lead-Free: Part of the RoHS
directive is to restrict the use of lead on electronic systems.
Nomenclature
When to Transition?
– The first step is to determine when to transition(doing nothing can be more risky! Why?)
– When you decide to transition, it is time to• Set new Metrics and Develop Implementation Plans• Develop new Qualification Plans• Develop new Manufacturing Screens• Work with your Contract Manufacturers• Work with your Vendors• Review your Vendors’ Test Reports/Qual Reports
RoHS Process StepsRoHS SeminarRoHS AssessmentRoHS TrainingBOM Scrub/BOM Scrub TrainingChemical AnalysisRoHS Qualification Test PlanRoHS in Manufacturing
RoHS Seminar
RoHS SeminarThe seminar will be in the form of a brown bag lunch talk (or series of talks) just to get the team familiarized with RoHS, what it is, how it will impact your organization, what you need to do to get started, and some of the possible risks involved.
We can do this via a web conference to save travel time and expense. The agenda for such a seminar would look something like this:
· Background, Definitions, Dates of Concern to meet Deadlines· Areas of concern, and areas that seem to not be a problem· Focus on range of specific significant changes in reliability risks (expanded version of above slide set with discussion)· Supply Chain, BOM, and design issues to consider· Product/component testing changes to consider
RoHS Assessment
RoHS AssessmentReview product specifications and requirements. Then, select key individuals from each area within the organization that will be affected by the RoHS directives. Meet with these individuals to conduct a high level review on current products and processes.
We will assess capabilities and practices in many areas, including (but not limited to) the following:· Contract Manufacturer(s)· Major Suppliers· Procurement· Engineering
RoHS AssessmentDuring the assessment, we will review possible risks. Some of these risks are: · Moisture Sensitivity Levels and Capacitors· Aluminum Electrolytic Capacitors· Electrochemical Migration / Dendritic Growth· Flex Cracking of SMT Ceramic Capacitors· Interconnect Material· Thermo-mechanical Cycling
Slide Provided by
Moisture Sensitivity Levels and CapacitorsMoisture Sensitivity Levels and Capacitors• Pb-free reflow is hotter
– Increased susceptibility to popcorning• Is this is a concern?
– Not necessarily• High degree of awareness in component
packaging industry– Material and design changes to avoid
MSL > 3– Focus tends to be on plastic encapsulated
microcircuits (PEMs)• Tantalum/polymer capacitors also at risk
– Aluminum Polymer are rated MSL 3 for eutectic (could be higher for Pb-free)
– Sensitive conductive-polymer technology may prevent extensive changes
• Solutions– Confirm Pb-free MSL on incoming plastic
encapsulated capacitors (PECs)– More rigorous inspection of PECs during
initial build
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Aluminum ElectrolyticsAluminum Electrolytics• Surface mount electrolytic
capacitors (V-chip)– Liquid electrolyte exposed to reflow
and rework temperatures– Can result in case distortion
• Requires higher boiling point electrolyte– Greater than 200ºC– New formulations
• Action Items– Measure temperature during
reflow/rework– Specify capacitors to survive
these conditions
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Electrochemical Migration / Electrochemical Migration / DendriticDendritic GrowthGrowth• What does Pb-Free mean to
electrochemical migration (ECM)?– New plating materials– New interconnect materials– New flux chemistries
• Higher reflow temperatures / poor intrinsic solderability– Requires more aggressive flux
formulations– Initial indication of elevated
occurrence of qualification failures
• Action items– Do not necessarily rely on EMS
provider – Qualify at lower temperatures
(40ºC vs. 85ºC)
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Flex Cracking of SMT Ceramic CapacitorsFlex Cracking of SMT Ceramic Capacitors• One of the most common
reasons for field returns– Induced by excessive
bending of the board• Transition to Pb-free
solder will result in a stiffer interconnect– Increased stresses in the
capacitor• Potential for a three-order
of magnitude increase in failure probability
• Qualify your EMS provider– Use of IPC-9702– Tighten bend specifications
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Interconnect MaterialInterconnect Material• Solder joint long-term reliability
– Extensive resources invested in this effort• Thermomechanical cycling
– Pb-free more robust except under severe conditions– Influence of long-term dwells still being assessed
• Mechanical cycling (vibration)– Less testing performed to date; less complex behavior– Initial indications suggest roughly equivalent
• Mechanical shock– More of a question mark– Likely more an effect of solder + plating than bulk solder
behavior
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ThermomechanicalThermomechanical CyclingCycling• Pb-free alloys demonstrate higher creep resistance
– Results in greater durability under accelerated testing (fast ramps, short dwells)– Exception: Very high temperatures (>125oC), high stress loadings (leadless,
ceramic)• When is Pb-free less reliable in the field?
Time
Stre
ss
Temperature Cycle
SnPb
Pb-free
• 75C may be a critical temperature– Recent studies out
of Sandia• Sensitivity to Ag
– Sn3.9Ag0.5Cu different from Sn3.0Ag0.5Cu
• Reliability models being developed– DfR Solutions– EPSI– UMD– GaTech
Slide Provided by
Interconnect Material (cont.)Interconnect Material (cont.)• Recent investigations by IBM and TI seem to imply an issue with
void formation between copper plating and copper/tin intermetallics• Very intermittent
– 1 out of 20 plating baths (IBM)
• Failure detected by mechanical shock– Not detected by
ball shear or ball pull• Action items required• Currently under
investigation by UIC
Real risk of systematic failures similar in behavior to ‘black pad’
Design Review/FMEAs
Developing a Better Reliability Test Program
Mike Silverman, Ops A La Cartewww.OpsALaCarte.com
orhow to avoid the problem of
“testing too little, testing too late”
Introduction
• Industries compete on reliability
• Companies need to develop more reliable products faster
Problem Statement• Reliability test plans are often generic or blindly
following industry standards. Test plans must be tailored to fit customer use profiles.
• This is true for all types of situations, especially with RoHS
• Reliability testing often occurs too late in the process. Tests and improvements often are performed when – time is short– development is nearly complete – engineering corrections are difficult and costly– the product is nearly frozen
Solution
This presentation will offer a solution to these two fundamental issues of:–Testing too little (or testing
strictly to specs) solved with more robust test plans
–Testing too late solved with Early Reliability Testing
Developing Better Test Plans
Developing Better Test Plans Introduction
In order to write better test plans, we must first understand;- the use environment - the key risks to the design (RoHS carries significant risks - already discussed)
The best tool for this is FMEA
Developing Better Test Plan
Failure Modes and Effects Analysis (FMEA) is the process by which we explore potential failure modes and then prioritize by key risks
Once the risks have been identified and prioritized, it is time to develop mitigations.
Often times the best mitigations are with reliability testing.
Developing Better Test Plan
Developing Better Test Plans
Stated another way, we cannot know what to test for unless we understand the key risks.
Therefore, FMEA is one of the best sources of input for a Reliability Test Plan.
Case Study - Inhaler
Developing a Test Plan without FMEA
• What types of tests can you think of for this device?
Developing a Test Plan without FMEA
• We used the IEC standards and came up with a number of solid tests, including:– High/Low Temperature– Temperature Cycling– Vibration– Drop– Shock– Crush– Humidity– Altitude– Did we miss any?
FMEA Generated Tests• Then we performed an FMEA and came
up with the following:– Different cleaning solutions– Pen test– Lipstick test– Motor Oil Test– Cap Tether Test– Battery life test– Did we miss any?
FMEA Generated Tests• As you can see by this one example, we
would have missed many of the potential failure modes had we not used FMEA to help drive our test plan/program.
Earlier Reliability Testing (ERT)
Early Reliability Testing Introduction
Early Reliability Test (ERT) is a development tactic that offers
– earlier feedback
and thus enables
– more lead time
– smarter engineering
– better reliability and quality
– less total cost & risk
ERT Intro 2
• ERT needs to overcome potential challenges – samples from immature manufacturing – low test coverage– too few samples– immature designs– parallel / concurrent designs (can’t test until
integrated)
This will show how to overcome these challenges in many cases.
ERT Intro 3
This presentation describes
– concepts & techniques for ERT
– potential benefits and cost-savings
– how to overcome potential challenges
– relevant case studies
Challenges to overcomeERT needs to overcome big challenges
– Immature mfg processes
– Low test coverage
– Few samples
– Immature designs
– Concurrent / parallel designs (can’t test until integrated)
Overcome immature mfg• Early generation specimens typically are just a few
specimens made with immature manufacturing process.
• On so few specimens, often we can afford to augment this test with simple examination (e.g.: naked eye or simple microscope) or even Failure Analysis. This enables us:– to identify the cause of each failure– to exclude failures probably restricted to immature
mfg– to include failures probably significant for mature
mfg
Overcome immature mfg
• Start test early.
• Distinguish probably relevant failures versus probably irrelevant failures
• Relevant failures found early may be “little gold nuggets”. These may forewarn what could happen with a mature process.
• Thus overcome fear & paralysis due to irrelevant failures and immature manufacturing.
Overcome immature mfg
CASE STUDY• Very early during design, we tested Gigabit Fiber
Channel
• Found a tolerance/rubbing issue between the housing and a component near the edge of the board
• This early feedback facilitated early board re-spun facilitated moving this component.
Overcome immature mfg
CASE STUDY
Figure 3: Gigabit Fiber Channel Product
Overcome low coverage
• During early development, in-house test coverage typically is low and specimens are few
• Therefore test for qualitative (gross) issues and postpone test for quantitative (fine) issues
• This early test may be very worthwhile
– May save considerable cost
– Compared to late learning & late engineering
– Such as late board spin or late chassis changes
Overcome low coverage
• Sometimes, it is allowable to start with commercially available test equipment
• This temporarily bypasses custom test programs & scripts that won't become available until later.
• Often this is good enough for worthwhile early test, even though complete coverage is postponed to later phase
Overcome low coverageCASE STUDY
• We tested an internet appliance product well before the diagnostics were ready.
• Therefore we just purchased some off-the-shelf software to exercise the memory, hard drive, and a few other components.
• Coverage wasn’t complete
• Coverage was good enough for useful early feedback
Overcome low coverageOvercoming Low Test Coverage
CASE STUDY
Figure 4: Internet Appliance Product
Overcome few samples
• In an early generation, typically only a few specimens are available
• Therefore engineers previously avoided early testing.
• Instead, from even a few specimens,
we can use a test / analyze / fix method
and gain early qualitative feedback
Overcome few samples• During early development with few specimens, it is
quite feasible & worthwhile – to test for qualitative (gross) defects & failures– to gain early qualitative feedback and hence– to stimulate early engineering changes
• During later development with numerous specimens, it is also required– to test for quantitative (fine) defects and failures– to gain quantitative feedback and hence– to prove product lifetime
• There is useful synergism between these two tests
Overcome few samples• Typically samples will fail within a fairly tight distribution
• Therefore Highly Accelerated Life test (HALT) can be used to trade test margins for a size of specimen population
• Thus even with few samples,
– HALT test of the outer edge of this distribution
– will tell about product performance
• Development typically includes successive generations:
– prior product– preliminary prototype – intermediate prototype– final new product
• A test specimen can be a – complete product– complete prototype – sub-assembly– significant component
Overcome few samples- Correlated generations -
• Pivotal: Successive generations are usually strongly correlated in defects, wear, fatigue, failures, mechanisms and root causes.
• Previously, this correlation was not sufficiently appreciated
Overcome few samples- Correlated generations -
• This correlation typically applies at many levels– Technologies & resources for reliability test– Mechanisms for reliability and lifetime effects– Results of reliability tests
• This correlation enables– earlier start for testing – smarter testing later– fewer compromises driven by a tight schedule.
Overcome few samples- Correlated generations -
• This correlation facilitates:
– Use earlier generation(s)
to develop test technology & test resources
– For later generation(s)
reuse this test technology & test resources
• Thus reliability work on successive generations
– incurs little more investment than
– reliability work solely on final generation
Overcome few samples- Correlated generations -
• Suppose reliability & lifetime early tests– examine just a small population– but learn its defects early
• These defects usually are correlated with– defects in later test of a larger population
and– defects in later generation
• By early testing & understanding of even a few specimens, we can often gain useful early qualitative feedback
Overcome few samples- Correlated generations -
These correlations enable smarter tactics: – In parallel with early development,– use a few specimens from an early generation– to develop test technology & resources
such as– test apparatus – test methods – test analysis– test acceleration techniques– test monitoring methods
Overcome few samples- Correlated generations -
ERT Early Reliability Test often can provide • earlier understanding of
causes and mechanisms fordefects, wear, fatigue and failure
• that otherwise would degrade the final generation
Overcome few samples- Correlated generations -
Also, ERT test enables– much more lead time for reliability work– longer test runs– milder acceleration – easier extrapolation – minimized schedule-driven compromises– easier and smarter follow-on engineering
Overcome few samples- Correlated generations -
Most reliability test investment is for “up front” test development
– To design, construct, program the test apparatus, fixtures, software
– To develop acceleration techniques– To develop monitoring instruments
(Also at ASTR07, please see our presentation on“Leading Indicators, Life Test . . .”)
– To learn to interpret test results
Overcome few samples- Correlated generations -
• Earlier investments providephysical and intellectual technology assets for successive tests
• Successive tests can use operating methods and instruments that
are already understood, available, automated
• Successive tests thus can incur relatively little labor even with considerable operating time
Overcome few samples- Correlated generations -
• Reliability testing on successive generations typically incurs
– only moderately more investment, compared to – reliability testing on just the final generation
• This moderate extra investment is rewarded by – earlier feedback hence– better development cycle hence – better final product
Overcome few samples- Correlated generations -
Overcome few samplesCASE STUDY
• We tested a $100K cooling cabinet with multiple subunits.
• These were separated and tested as individual subunits.
• Spares were used only for a a few of the critical subunits
• rather than as second copy of the entire system.
Overcome few samplesCASE STUDY
Figure 5: Storage Cabinet separated into subunits
Overcome immature designAgain use HALT for early discovery of qualitative
design defects. This will accelerate design maturation.
The goal of this reliability test is qualitative learning to uncover problems
rather thanquantitative learning to “pass” final generation
The earlier we test and uncover defects, the more time and money we will save
which can be used partially to allowmore time and money for later quantitative tests
Overcome immature design
• During an early generation, often it is more sensible
– to test the product margins rather than
– to test for manifest failure and product lifetime
• In particular, beware of life test on generation P0, because:
– P0 typically is NOT built with final materials, design, process and thus
– P0 defects, wear, fatigue and failure may be NOT relevant to later generations
Overcome immature design - when to test reliability -
Fig 1: Typical Development Phases
When should we test for reliability?
? During P1, when engineering changes are easier?
? During P2, when engineering is more mature,so tests are more complete?
Best reliability test is done at all three phases:
– P1 test for early reliability feedback
– P2 test for cleaner specimens, and better coverage
– P3 test to validate the design
Also, start Lifetime & Reliability Demo during P2,
– so this is completed before the end of P3.
Overcome immature design - when to test reliability -
For a project that develops subunits in parallel
– test each subunit as early as it is available (P1)
– rather than waiting for final system test (P3)
– when it is painfully late.
Fig 2 shows when to test.
Overcome immature design - when to test reliability -
Figure 2: Reliability Testing during product development
Overcome immature design - when to test reliability -
Overcoming immature designCASE STUDY
• For an electro-mechanical medical device during P0, we knew that life test was premature
• Instead during P0, we tested margin and characterization to prove design repeatability
• During P0, this was more feasible and valuable than testing until manifest failure
Overcome immature design
CASE STUDY• Set up a high-speed camera on the
mechanical assembly
• Tested during hundreds of runs on several products
• Thus measured repeatability of the mechanical design
Overcoming immature designCASE STUDY
Figure 6: Vision System used to capture repeatability
Overcome parallel development
• Parallel or concurrent design & development – Requires mating two or more subunits – as prerequisite for meaningful test data– This impedes test prior to integration
• Nevertheless, we still can test earlier, although not as less early as serial development of subunits
Overcome parallel development
• Start test as soon as subunits are ready for integration
• Don’t wait for SW or diagnostics to be complete.
• Just make sure you have a way to functionally test unit.
• Worst case is inability for functional test of two subunits.
• Nevertheless, once subunits are ready for physical integration, we can test these non-operationally.
• This less desirable than full-functional test
• Nevertheless we still can perform vibration tests to find resonant frequencies. This may point out many things, including component interference issues, mounting issues, and board layout issues.
Overcome parallel development
CASE STUDY• We tested a Neutrino Telescope for the National
Science Foundation (NSF)
• This product could be tested with full functions only if all the pieces were working.
• Rather than waiting for that, we elected to start with some non-operational testing on some fixtures we custom-designed.
Overcome parallel developmentCASE STUDY
Fig 7: Neutrino Telescope Final Assembly Fig 8: Board Fixture for Telescope
ConclusionFMEA is a development tactic that can help solve the problem of testing too little by uncovering failure modes that require tailored test methods rather than only cookbook methods from industry standards.
ConclusionERT is a development tactic that can enable
earlier feedback, smarter engineering, less total cost, lower risk for reliability.
Thus ERT offers better final product and better reliability
Conclusion
FMEA & ERT can be performedin parallel with product developmentby an outside group (like OPS)withOUT depleting the time of the in-house development team.
RoHS Training
RoHS TrainingPut together and give a training course to educate key personnel within customer about the issues at hand.
We shall tailor our on-site training for RoHS awareness and challenges to meet your specific needs. Included shall be a brief overview of corporate-wide RoHS programs, policy and timelines; connections to customer and external sources for more information; and, specific design, materials and manufacturing related ‘areas of concern’.
The intent is to provide enough awareness to alert engineers to investigate decisions on designs, ECO’s and component selection to maintain or enhance RoHScompliance in-line with customer policy.
RoHS TrainingWhat Is Covered?
Included in the training will be– What we currently know– What we can expect in the future
Slide Provided by
RoHS TrainingTrends on Material Bans
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RoHS TrainingIncreasing Complexity
• By 2010, more than 75% of all electronic products will be sold in countries with legislations similar to RoHS and WEEE.
• The increasing complexity and number of regulations has reached the point where a comprehensive compliance solution is mandatory.
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RoHS TrainingGlobal RSTS Requirements
• Recycling Law for Electrical Appliances • Chemical Substances control Law
Japan
• China RoHS implemented in March 2007• No exemptions• Labels, marks, and disclosures are needed• Only Chinese government labs can conduct or
review the testing
China
• The state of California has announced legislation effectively mirroring the EU RoHS Directive
US
• RoHS Implemented in July 2006• Enforcement has begun in Finland, Germany, Norway, & Belgium
EuropeBackground/ImplementationCountries
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RoHS Training Global RSTS Requirements
• “POHS” – Prohibition of hazardous substances
• 18 restricted substances on the list• Includes substances like halogenated
flame retardants, PFOA, BPA, etc.
Norway
• Implemented in January 2008 • Mirrors EU RoHS and WEEE requirements
KoreaBackground/ImplementationCountries
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RoHS TrainingIndustry RSTS Requirements
• Upcoming EU directive so far including 16 substances, some of these are found other lists.
• Covers all consumer products• “Catch-all” regulation• Pre-registration started on July 1, 2008
REACH
• Upcoming EU directives but included in POHSPFOS/PFOA
• Restriction started in 2007• Drivers: Apple, Sharp, Intel, HP
Halogens
• Joint Industry Guide • Annex A: 15 substances• Annex B: 15 substances• Created by E&E companies from Europe, US, and Japan to help suppliers to have 1 consolidated list to work with
JIG
Background/ImplementationRSL/Substance
BOM Scrubs
BOM ScrubsBOM Scrubbing is going through each items on each Bill-of-Materials to assure that each component not only is RoHS compliant, but that it is compatible with your design and processes. As part of this, we will review the following:· MSL Ratings· Maximum Reflow Temperatures· Metallization (lead finish and metal stackup)
BOM Scrub TrainingOften, companies would like to perform the BOM Scrub themselves and just need some training.
Go through a sample of items on each Bill-of-Materials with a designated member of your organization and train them on what to review during a BOM scrub to assure that each component not only is RoHS compliant, but that it is compatible with your design and processes. As part of this, we will show you how to review the following:· MSL Ratings· Maximum Reflow Temperatures· Metallization (lead finish and metal stackup)
Chemical Analysis
Chemical AnalysisWe shall help you identify the top 5-10 components for Chemical Analysis for each product and then manage the work with the chosen chemical analysis lab (we can help you find one or we can use one of your choice) to identify the chemical content in each component.
The majority of the components you use are from reputable component manufacturers that have been RoHS compliant for several years. Many others come from component manufacturers that will supply you with certificates of compliance, and we can help you review these. However, there will likely be a few components that fall into the category of uncertainty. For these, we will want to perform chemical analysis.
Slide Provided by
Homogeneous material –small parts (IC)
Lead-frame (Cu)
Lead-frame coating (Sn)
Die attach
(Silver/epoxy)
Plastic encapsulation
– contains, fillers, etc.
Circuit – too small – impossible to mechanically disjoint
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Traditional Chemistry
<0.1%EPA 3540CPFOS/PFOAElectronicPFOS/PFOA
Total Iodine
Total Flourine
Total Clorine
<900ppm
EN 14582
Total BromineElectronicHalogens
<1000ppmPBB/PBDEs
<1000ppmChromium VI
<1000ppmTotal Mercury
<100ppmTotal Cadmium
<1000ppm
IEC 62321
Total LeadElectronicRoHS
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X-ray Fluorescence• Quick Qualitative Results• Non-destructive• Used for complicated samples such as
Populated Circuit Boards (PCB)• Cost Effective
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XRF Mapping
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XRF Spot
RoHS Qualification Test Plan
RoHS Qualification Test PlanAs part of writing the test plans, we will understand your products, shipping and operating environment and narrow down the issues tothose that present a significant change in reliability risk. Then we will use our knowledge of industry activities, reported results, and recommendations to create a product-specific RoHS Test Plan for each of the three products. We will incorporate existing test and evaluation activities wherever possible and use other cost effect and efficient methods. Each test plan process shall consist of 3 areas:
1. Determination of what needs to be characterized. Due to the changes from the RoHS transition, key failure mechanisms will need to be characterized to determine the best method to test for them.2. Determination of what needs to be done by your vendors. Your vendors will play a big part in this transition effort and the future reliability of your product will depend heavily in your vendors’ reliability.3. Write test plans addressing all of the potential risks.
• SnPb solder materials have been used in the electronics industry for over 60 years and therefore the processing conditions and their impact on materials and reliability are well understood.
• Converting to Pb-free materials and processes introduces many risks some of which are better understood than others.
• The following table describes some of the changes inherent with Pb-free, the failure mechanisms they may induce and the testing/inspection procedures used to screen for them.
• The test criteria called out in this Pb-free qualification document are intended to screen for many of these potential failure mechanisms.
Lead-Free Risks
Shorting between biased traces in a moist environment
Board surface with no-clean paste residue
Electrochemical migration
Failed through hole, cracked vias, weak jointsIncomplete hole fill, fillet lifting, damage to board
Wave solder process
Joint failures or cracked vias in use environmentPoor solder joints, damaged components
Rework process
Occasional solder joint failures in use environment
Insufficient process window creates poor solder joints
Surface mount process control
ShortingSn and SnCu plated components Sn whiskers
Solder joint failure during shipping or droppingSolder joints particularly on higher mass components
Mechanical shock
Cracked solder jointsSolder joints, particularly on high CTE components
Solder fatigue
Cold joints or weak joints fracture in use envir.All solder jointsPoor wetting
Cracking, dielectric breakdown (capacitors), PCB delamination, warping, or via cracking
All passive components, circuit boards
Heat damage
Popcorn delamination at higher reflow temperatures. Heat damage of IC packages
Plastic IC packages, optocouplers, other polymer based components
Moisture sensitivity
Failure MechanismImpacted ItemArea of ConcernLead-Free Risks
Lead-Free Risks
Visual and resistance after 35C/85%RH exposure at 50V
Bellcore GR-78-COREJ-STD-004 SIR
Electrochemical migration
Electrical continuity, visual inspectionThermal cycle, HALT VibrationWave solder process
X-ray, X-section, Inspection, reliability testRework components followed by reliability testing
Rework process
X-ray, X-section, Inspection, reliability testPrecondition and assemblyJEDEC Standard 22-A113D
Surface mount process control
SEMNEMI / JEITA recommended procedsSn whiskers
Electrical continuity / Visual inspectionShock testMechanical shock
Electrical continuityVisual inspection
Thermal cycle JESD22-A104-B,HALT, Vibration
Solder fatigue
Wetting balance, visual inspection, x-sectioning, lead pull
SolderabilityJ-STD-002BJ-STD-003A
Poor wetting
Visual inspection, functional verificationHeat resistanceMIL-STD 202G #210FDecomposition temp.Time to delaminationPackage planarityJESD22-B108A
Heat damage
Visual inspection /C-SAM
Moisture sensitivity testing. J-STD-020C
Moisture sensitivity
Inspection TechniqueTesting MethodArea of Concern
• The basic approach is to verify adequate qualification of the individual components has occurred.
• By requesting and reviewing detailed vendor data most of the risk for your product is either identified or reduced.
For example, if a vendor is unable to produce or has inadequate MSL rating test results, then the risk for popcorning defects is present. With engineering judgment, considering the processing parameters, we can decide to conduct proper MSL evaluation to determine true risk of using the component.
The Approach
• This level is reserved for products with lower perceived risk of failure due to introduction of lead-free materials and processing.
• Products determined to be in this level are relatively simple and constructed exclusively with components such as passives, through-hole and/or coarse pitch (>0.5 mm) surface mount leaded packages.
• Some exceptions may apply based on specific product application or use environment.
• To ensure that all materials can survive the elevated temperatures expected with lead free assembly, all components must be evaluated individually prior to assembly.
• Types of failure mechanisms being screened for include heat damage, moisture induced cracking/delamination, poor solderability, and weak joints.
Qualification Requirements – 1st Level
• PCB type • PCB Manufacturer• PCBA Assembler (list if sub contracted, In House, sub supplier)• PCB glass transition temperature• PCB decomposition temperature• PCB manufacturer certified heat resistance• PCB Thickness• PCB # Layers• 1 or 2 side populated• Pad finish type (i.e.ImAg, OSP, etc.)• List the surface mount lead-free alloy (i.e. Sn-3.5Ag-0.9Cu)• Solder paste manufacturer and product # (list all suppliers)• SIR test results from solder paste supplier.• Flux type (no clean, water soluble, etc.)• Wave solder Pb-free alloy• Hand Solder / Rework (Wire) Pb free alloy
Materials UsedThe following information permits the identification of specific risks and creates a baseline of information on Pb-free assemblies and processes.
The following questions are meant to establish a baseline for these items relative to initial lead free process management.
1. Is the product built with a single or dual reflow process? 2. List the peak temperature distribution across the
PCBA/Panel. 3. Time within 5C of peak.4. List the time above liquidus temperature. 5. Provide time / temperature reflow profile. Provide location
on PCB / Panel for thermocouple probes (attach picture / diagram) and temperatures for those locations during the reflow process.
6. List the minimum peak solder joint temp measured on board (under highest thermal mass component).
Process Information Questions
7. Wave solder process flow and maximum solder pot temperature / duration (if applicable).
8. Soldering iron temperature (Temp +/-) for rework and hand solder. Maximum allowable hand-solder duration.
9. Provide general overview of part storage and factory floor management for components according to MSL level (for moisture sensitive components). Detailed part management is subject to on site audit.
10. Is nitrogen used in reflow? 11. Procedures for rework to include inspection criteria and
soldering iron temperature.12. Inspection criteria used for lead-free solder joints. This
will include criteria for sub contracted assemblies.13. Provide general overview regarding isolation and tracking
of leaded components / materials from Pb-free components / materials. Detailed part management is subject to on site audit.
Process Information Questions, cont.
• All components used to build a Pb-free product must be rated for temperatures at least 10°C higher than peak assembly process temperature.
• Heat resistance testing should be performed following MIL-STD 202G #210F with 90-120sec above Pb-free solder liquidus with ≥ 10 seconds at or above peak (+10C).
• Deviation for time above liquidus may be allowed based on process TAL (must be a minimum of 20% greater than process TAL).
• MIL-STD-202G #210F should be followed for wave solder and soldering iron heat resistance.
• Components that are hand soldered, reworked, or touched up should be rated for a soldering iron temperature at least 10°C higher than process conditions.
• Recommended min sample size is 10/lot for 3 lots.
Component Information – Heat Resistance
• Determining the moisture level for surface mount components should be done following J-STD-020C for Pb-free or JEITA ED 4701 (Test Method 301A for Pb-Free).
• Components qualified to J-STD-020B may be acceptable if temperature rating is deemed sufficient.
• Sample sizes are defined in the specifications as well as inspection and pass/fail criteria.
• A minimum of 3 reflows is required. A minimum of 60 seconds above liquidus or duration 20% higher than actual reflow process time above liquidus (whichever is longer) is required.
• SMT type components that are wave soldered will follow procedures detailed in JEITA ED 4701 (Test Method 301A for Pb-Free).
• A minimum of Level 3 (JEDEC) or Level E (JEITA) is required for all components. Level 4 components (JEDEC) or Level F/G (JEITA) may be approved if factory management is considered acceptable. Components that do meet minimum of Level 4 or above are not acceptable.
Component Information - Moisture Sensitivity
• The Pb-free lead plating material is important in evaluating the risk for tin whiskers. Table 1 outlines requirements for Tin Whisker testing for plating materials determined to be a risk.
• Finer pitch components plated with Sn based lead finish are most susceptible to shorting due to whisker growth.
• A 1.3 μm nickel underplate is preferred for Sn finishes as this prevents copper diffusion into the Sn which contributes to compressive stress in the Sn layer (the primary driving force for Sn whiskers for Cu base material).
• SnCu plating is known to be a high risk for Sn whisker growth and should be avoided when possible (bright Sn is the highest risk and not acceptable).
• Lead plating situations as outlined in table 1 will require testing according to NEMI/JEITA recommended procedures: 1) Storing at 60°C/95%RH for 1000 hours followed by SEM analysis; 2) Thermal cycling 1000 times from -55°C/85°C followed by SEM analysis; and 3) Store at room atmosphere conditions for 1000 hours followed by SEM analysis.
• Criteria: Maximum allowable whisker length is 50 microns (separate criteria for FFC/FPC/Connector Mating).
Lead Plating
Tin Whisker Test Matrix
Semi-bright Sn should be treated similar to SnCu
UnacceptableUnacceptableSn (bright)
For high reliability applications, testing may be required for >0.5mm pitch
Testing Required AcceptableSnCu
Reflow or annealing may help reduce Sn whisker density (conflicting industry data).
Testing RequiredAcceptableSn (matte)
AcceptableAcceptableSnAgCu & SnAg
AcceptableAcceptableSnBi(1-4%Bi)
AcceptableAcceptableSn/Ni (>1.3 μm Ni)
CommentsLead Pitch≤ 0.5mm
Lead Pitch> 0.5mm
Finish
All Components EXCEPT: FFC/FPC/Connector Mating End
Tin Whisker Test Matrix
Semi-bright Sn will not be acceptable
UnacceptableUnacceptableSn (bright)
Nickel underplaterequired note 1
UnacceptableUnacceptableNote 1
SnCu
Nickel Underplatepreferred
Testing RequiredAcceptableSn (matte)
Nickel Underplatepreferred
Testing RequiredAcceptableSnAgCu & SnAg
Nickel Underplatepreferred
Testing RequiredAcceptableSnBi(1-4%Bi)
Best tin based solutionTesting RequiredAcceptableSn/Ni(>1.3 μm Ni)
CommentsMin Conductor Spacing ≤270um
Min Conductor Spacing >270um
FinishFFC/FPC/Connector Mating End ONLY
(Note 1) Will be allowed on exception basis only. Exception will be based on product application and risk. In addition these factors, minimum conductor spacing must be >270um.
Tin Whisker Test Matrix
Max Whisker Length 50umMin Conductor Spacing >140um
Max Whisker Length 20umMin Conductor Spacing ≤140um
Criteria
Whisker Length Criteria
1. Full sample size must be provided from each manufacturing location and solder supplier used. This includes sub supplier qualification.
2. Full or partial sample for each bare PCB supplier will be required. Agreement regarding sample size and distribution will be made prior to qualification start.
3. If different manufacturing lines are used (at time of evaluation), then sampling must be from each line. Sampling rate will be determined prior to evaluation.
4. Distribution of key components from each manufacturer used. Key component(s) and build mix will be determined prior to evaluation.
5. A control group will be required for comparison purposes. This control group may consist of the same product assembled with SnPb solder or previous generation of SnPb product of same complexity.
Sample Distribution
• This level is reserved for products with moderate perceived risk of failure due to introduction of lead-free materials and processing.
• Products determined to be in this level are more complex and will likely have one or more of the following surface mounted components: plastic leadless packages, fine pitch QFPs (≤0.5 mm lead pitch), plastic ball grid arrays (≤ 27 mm body size) or chip scale packages with ball pitches ≥1mm (ball pitch of less than 1mm is generally require solder fatigue evaluation).
• In addition to the Level 1 requirements of proving process capability and functionality after assembly, this level of qualification requires testing for mechanical and thermally induced fatigue failure.
• This Level requires that the product also pass qualification Level 1.
Qualification Requirements – 2nd Level
• Assembly of product/test boards should be done at optimum process conditions (including wave or hand solder when applicable) followed by reworking of predetermined components on some boards.
• In some cases exploring additional assembly conditions may be required.
• For example, preconditioning components and boards prior to assembly is an effective way to prove that worst-case assembly conditions still produce reliable products (i.e. a sufficiently wide process window exists).
• A test plan specific to each product will be developed and sample sizes for each assembly condition agreed to prior to testing.
Precondition / Assembly
• Concurrent testing for both vibration and shock shall be performed when determined to be necessary.
• Testing details will be prescribed according to the product type and expected use environment.
• Typical tests may include non-operational vibration followed by shipping shock (pack drop).
• In some instances mechanical shock and vibration testing may be preceded by thermal shock.
• Operational testing in a system level may also be performed.
• Sample sizes and pass/fail criteria will be determined during creation of the detailed test plan (sample size will typically be 5 or greater for each test type).
Vibration and Shock
• This testing is required primarily for level 2 components.
• Follow procedures described in JESD22-A104-B, condition J.
• The specific requirements described on the following page fit many product types, however, alternative thermal cycling test protocols and evaluation plans are potentially acceptable.
Thermal Cycling
1. Sample size: ≥ 20. A separate group of an additional 10 reworked components will also undergo thermal cycle (if applicable).
2. The complete functional PCBA must be thermal cycle tested. 3. Cycle 1000 times from 0 to 100°C with a ramp rate of 10-20°C/min and a 10
min dwell time (measure temperature on the largest thermal mass component on the PCB).
4. Visually inspect joints and confirm functionality of complete PCBAs after 500 and 1000 cycles.
5. In cases where proving electrical functionality is not feasible, solder joints on BGA components can be evaluated after 1000 cycles using dye and pry.
6. Criteria: Zero solder joint failures accepted unless product life requirements allow for a failure.
– A failure is defined by a functional test error or a joint that is cracked 50% through (as revealed by dye and pry).
– Visual inspection and functional test specifics to be agreed upon prior to commencement of test. Additional evaluation may include cross sectioning, lead pull, and component shear. Issues found duringadditional evaluation, including visual inspection, will be reviewed prior to determination of product acceptability.
7. Test and failure analysis results will be provided. Solder joint failures will be assessed and corrective actions taken.
Thermal Cycling
SnAgCu Life Model (cont.)
• Determine the strain energy dissipated by the solder joint
• Calculate cycles-to-failure (N50), using energy based fatigue models for SAC developed by Syed – Amkor
( ) 10019.0 −Δ⋅= WN f
sAFW ⋅Δ⋅=Δ γ5.0
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
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Reliability Tests
Drop / shock testingVibrationTemperature cycling Temperature-humidity-bias (THB) Power cyclingConstant temperature
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Case Study: Military Radio
Motivation: Unable to procure SnPb BGAs
Product is expected to last 10 years
Product is portable
Environmental stressorsThe unit can be dropped (mechanical shock)The unit can be stored and used in uncontrolled environments (temperature cycling, temperature/humidity)
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www.DfRSolutions.com© 2004 - 2007
Drop Testing
To identify potential embrittlement or damage affiliated with Pb-free solder that could reduce robustness during exposure to drop conditions
Stiffer solder may cause damage to PWB and solder intermetallicStandard failure modes are either bond pad pullout or intermetallic fracture
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Drop Testing (cont.)
Drop testing does not usually require the development of an acceleration factor
Number of drops in test = number of drops in fieldSeverity of drops in test = severity of drops in field
However, preconditioning required to replicate aging in the field
Increase in intermetallicthickness can result in decrease in solder robustness
1.00 1000.0010.00 100.001.00
5.00
10.00
50.00
90.00
99.00
ReliaSoft's Weibull++ 6.0 - www.Weibull.com
Probability - Weibull
Time, (t)
Unr
elia
bilit
y, F
(t)
9/27/2007 22:32DfR SolutionsCraig Hillman
WeibullBaseline wo outl
W2 RRX - SRM MED
F=11 / S=11
β1=5.8118, η1=766.2208, ρ=0
100C - 1000hrsW2 RRX - SRM MED
F=13 / S=11
β2=4.9112, η2=854.5502, ρ=0.9808
125c - 100hrs -UW2 RRX - SRM MED
F=12 / S=11
β3=2.8634, η3=642.4329, ρ=0
150C - 1000hrsW2 RRX - SRM MED
F=12 / S=11
β4=1.0477, η4=429.6169, ρ=0.9727
Increasing preconditioning time and temperatureresults in decreasing Weibull slope (β)
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Preconditioning
How to extrapolate field conditions to preconditioning?
Fick’s Law of Diffusion
Worst case environment40C during the heat of the day8 hours per day for 10 years
Prior work on Pb-free solderActivation energy (Ea) = 0.975 eVDiffusion coefficient (D0) = 5 x 1010
Precondition should be 85C / 310 hrs to duplicate 10 year life
y = -11317x + 24.636
-9.0
-8.0
-7.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
0.0022 0.0024 0.0026 0.0028 0.003 0.0032
1/Temperature (K-1)
Rat
e (m
icro
ns/h
our0.
5 )
144ºC 112ºC 84ºC 60ºC
0
2
4
6
8
10
12
14
16
18
20
0 500 1000 1500 2000 2500 3000 3500
Time (hours)
Inte
rmet
allic
Thi
ckne
ss (m
icro
ns) 150C
120C85CSeries4
)/exp(0 kTEDDDtZ
A−==
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
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Drop Testing (Additional Concerns)
Behavior of polymer material (PCB, standoffs, housing) can change at cold temperatures
Drop issues in mobile phones only noticed below 0C
Not accepted by customer, but recommended drop testing below room temperature
Between -10C to -20C
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Hot Temperatures (Intermetallic Growth)
Sn3.8Ag0.7Cu / OSP
Yoon, JEM 20040 2 4 86 10 12
0
2
4
6
IMC
Thi
ckne
ss (μ
m)
t1/2 (hr1/2)
185C
130C, 150C
0 2 4 86 10 120
2
4
6
IMC
Thi
ckne
ss (μ
m)
t1/2 (hr1/2)
185C
130C, 150C
Sn3.5Cu0.7Cu / ENIG
Lim, ECTC 2003Pang, JEM 2004
119C143C
168C
E = 0.51, 0.53 eVZheng, ECTC 2002
Liao, JEM 2004
E = 0.97 eV
Henshall, APEX 2001
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
How Many Drops? How Severe?
Initially based on industry standardJEDEC JESD-B110 Subassembly Mechanical Shock
P4 Service Condition (3 foot drop)Unit is heavy; unlikely to be held above the waist
# of drops = 42
Orientation to be based on analysis ofworst case impact
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Drop Testing (Modifications)
Customer indicated 5 drops a year10 year life = 50 drops
Customer requested 90% reliability with 80% confidence, but only had 7 samples
Solution? Extend testing to 130% life (65 drops)Assumes Weibull slope (β) of 3
Finished? Nope
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
The Reality of Reliability Testing
The desire to be like ‘everyone else’ will almost always be a major driver in test selection
Customer determined sister division was using MIL-STD-810
Specifies 4 to 6 drops over the lifetime of the productRequires drops on every corner (8), every face (8), every edge (12)
Drops can be randomly divided among 5 samplesNo preconditioning required
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Temperature / Humidity
Designed to identify and accelerate corrosion-based mechanisms
Electrochemical migration (ECM) and conductive anodic filament (CAF)Possible concern due to more aggressive fluxes used for Pb-free
Tests to date indicate little to no difference in the acceleration factors for corrosion based mechanisms between SnPb and Pb-free solders
Continue with industry best practices established with SnPb
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
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Temperature / Humidity (Best Practices)
Two approachesECM: Step-stress approach with 96 hours at 40C/93%RH; 96 hours at 60C/88%RH; product must be biased CAF: 300 to 500 hours at 60C/85%RH at bias
IPC-TM-650, Method 2.6.25, Conductive Anodic Filament (CAF) Resistance Test (Electrochemical Migration Testing)
Temperature cycling (T/C) is not expected to induce interconnect failures and can help aggravate potential process defects
Therefore, THB is performed after T/C
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Temperature Cycling
Purpose is to accelerate and identify potential thermo-mechanical degradation mechanisms
Solder joint fatiguePlated through hole fatigue
MIL-STD-810 is extremely insufficient in this area
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
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Temperature Cycling (cont.)
How to derive a test condition representative of the field environment?
Acceleration factor based on physics of failure (PoF)
What is the realistic worst-case field environment?
PhoenixDominated by diurnal cycling
Month Cycles/Year Ramp Dwell Max. Temp (oC) Min. Temp. (oC)Jan.+Feb.+Dec. 90 6 hrs 6 hrs 20 5 March+November 60 6 hrs 6 hrs 25 10 April+October 60 6 hrs 6 hrs 30 15 May+September 60 6 hrs 6 hrs 35 20 June+July+August 90 6 hrs 6 hrs 40 25
+10C at max temperature due to solar loading
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SnAgCu Life Model
Modified EngelmaierSemi-empirical analytical approachEnergy based fatigue
Determine the strain range (Δγ)
C is a correction factor that is a function of dwell time and temperature, LD is diagonal distance, α is CTE, ΔT is temperature cycle, h is solder joint height
ThLC
s
D ΔΔ=Δ αγ
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
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SnAgCu Life Model (cont.)
Determine the shear force applied to the solder joint
F is shear force, L is length, E is elastic modulus, A is the area, h is thickness, G is shear modulus, and a is edge length of bond padSubscripts: 1 is component, 2 is board, s is solder joint, c is bond pad, and b is board
Takes into consideration foundation stiffness and both shear and axial loads
( ) ⎟⎟⎠
⎞⎜⎜⎝
⎛⎟⎟⎠
⎞⎜⎜⎝
⎛⋅−
++++⋅=⋅Δ⋅−aGGA
hGA
hAE
LAE
LFLTbcc
c
ss
s
92
221112
ναα
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5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
SnAgCu Life Model (cont.)
Determine the strain energy dissipated by the solder joint
Calculate cycles-to-failure (N50), using energy based fatigue models for SAC developed by Syed – Amkor
( ) 10019.0 −Δ⋅= WN f
sAFW ⋅Δ⋅=Δ γ5.0
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Validation – Chip Resistors
100
1000
10000
100 1000 10000
Cycles to Failure (Experimental)
Cyc
les
to F
ailu
re (P
redi
cted
)
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Thermal Cycle Test
Total damage in Phoenix environment over 10 years
Total damage in one cycle of -40C to 85C test environment
Total cycles at -40C to 85C to replicate 10 yrs in Phoenix
0.02604
0.00012
222 cycles
At 1 cycle/hour, approximately 1 day of test equals 1 year in the field
© 2004 - 2007
5110 Roanoke Place, Suite 101, College Park, Maryland 20740Phone (301) 474-0607 Fax (240) 757-0053
www.DfRSolutions.com© 2004 - 2007
Pb-Free Transition Test Results
Military Radio, SnPb and Pb-free, were tested side-by-side
Failures and major issues were notedIndependent of Pb-free vs. SnPb
Pb-free performed as well or better than SnPb
Switch to Pb-free product expected soon
• HALT is primarily a board level test that must be performed within a multi-stress (temperature and vibration) chamber. During the HALT process, thermal cycling and vibration are to be simultaneously applied.
• The temperature responses on critical components must be monitored with thermocouples to insure adequacy of the dwell periods selected
• The temperature range (between highest and lowest dwell temperatures)is to be a minimum of 80-degrees C unless otherwise technology limited.
• The product is to be functionally operational and monitored during “HALT” stressing.
• Sample size preferred is 2 units.• Where a previously established baseline is available, the product must
meet or exceed prior limits. Where no prior baseline is established, comparative results to leaded control sample must be met.
• Supplier conducted HALT must include reporting test results according toagreed upon format, including full failure analysis and corrective action on anomalies observed
• Criteria: Component delamination must meet criteria according to J-STD-020C. Zero functional failures, or fully cracked solder joints.
Highly Accelerated Life Testing (HALT)
ASTR 2006 October 4,5 & 6, San Francisco CA
Mike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 142February 14, 2009
The Use of HALT and ALT The Use of HALT and ALT when transitioning when transitioning
to to PbPb--FreeFreeBy:By:
Mike Silverman, Ops A La Carte Mike Silverman, Ops A La Carte [email protected]@opsalacarte.comCheryl Tulkoff, National Instruments Cheryl Tulkoff, National Instruments [email protected]@ni.comHarry McLean, Harry McLean, XantrexXantrex, , [email protected]@xantrex.com
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 143February 14, 2009
In this presentation, we will highlight a few of these significant risk areas and show how techniques such as HALT and ALT can assure that the transition has been accomplished successfully from the perspective of Reliability.
Abstract
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 144February 14, 2009
Pb-Free Results at
HALT for RoHS at HALT and HASS Labs
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 145February 14, 2009
BACKGROUND ON HALT
HALT for RoHS at HALT and HASS Labs
Quickly discover design issues.Evaluate & improve design margins.Release mature product at market introduction.Reduce development time & cost.Eliminate design problems before release.Evaluate cost reductions made to product.
Developmental HALT is not really a test you pass or fail, it is a process tool for the design engineers.
There are no pre-established limits.
HALT - Highly Accelerated Life Test
HALT, How It Works
Stre
ss
Start low and step up the stress, testing the product during the stressing
HALT, How It WorksFailure
Gradually increase stress level until a failure occurs
Stre
ss
HALT, How It Works
Stre
ss
Failure
Analys
isAnalyze the failure
HALT, How It Works
Stre
ss
Failure
Analys
isImproveMake temporary improvements
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
Increase stress and start process over
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)
HALT, How It Works
Stre
ss
Failure
Analys
isImprove
(incr
ease
)Fundamental Technological
Limit
HALT, Why It WorksClassic S-N Diagram
(stress vs. number of cycles)
N0
S0= Normal Stress conditions
N0= Projected Normal Life
S1
S2
N1N2
S0
HALT, Why It WorksClassic S-N Diagram
(stress vs. number of cycles)
N0
S0= Normal Stress conditions
N0= Projected Normal Life
S1
S2
N1N2
Point at which failures become non-relevant
S0
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Product Operational
Specs
Stress
Upper Oper. Limit
Upper Destruct
Limit
Lower Destruct
Limit
LowerOper. Limit
Margin Improvement Process
Operating Margin
Destruct Margin
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 169February 14, 2009
♦ 10 Products went through A-B Comparison of Lead vs. Pb-Free at HALT & HASS Labs
♦ In all cases, both solder and components were changed to Pb Free. Boards went through design review and changes to deal with RoHS issues.
♦ Comparison was between products using PbSolder and Pb Components vs. products using PbFree Solder and Pb Free Components. We did not include mixed assemblies in this study (if we had, conclusions would be different - mixed assemblies have proven to produce weaker solder joints, especially with certain package types)
Results
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 170February 14, 2009
SUMMARY OF FINDINGS:♦ No Significant Differences in Limits achieved !!
Two Notes of Caution with this statement1) In all cases, customers had gone through some level of Design
Review and Design Changes before the HALT – you cannot expect same results by just changing components
2) A change of limits from HALT does not always mean a change of reliability because acceleration factor is different between Lead & Pb-Free. HALT is a means of giving you a good approximation as to the change in reliability, but to know the exact change (in terms of MTBF), you must conduct a lower acceleration ALT.
Results
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 171February 14, 2009
Once we have redesigned the product and re-qualified it using HALT, we can then use this knowledge to write guidelines for future products.
There are some generic lead-free design guidelines that exist, but because this is new and because of the many variables involved, most companies are developing their own and very little public info is available.
Results
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 172February 14, 2009
HALT for RoHS at National Instruments
PbPb--Free HALT Results atFree HALT Results at
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 173February 14, 2009
RoHS Prototype Builds
♦All real test and measurement products (not test vehicles)
Prototypes to evaluate RoHS impact on design and processAll assemblies HALT tested to failure, inspected, and cross-sectionedSplit builds with RoHS and non-RoHSAssemblies for comparisonDesign and process changes made to increase robustnessNo new RoHS failure modes but earlier onset of failures seen
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
RoHS & HALT Page 174February 14, 2009
RoHS Process Highlights
♦Lead-Free Solder used: SAC305 alloy, no clean
♦ Immersion Silver, RoHS-designed PCBs♦Max Temperatures Reached: ~ 255C♦ Incoming XRF validation on all parts
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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♦ Cracked Solder Joint: BGA ball to BGA substrate
♦ PCB Laminate Cracks – BGA, also called “pad cratering”
RoHS HALT Failure Analysis
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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♦ Cracked traces to BGA pads – outer rows
♦ BGA pads separated from PCB
RoHS HALT Failure Analysis
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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♦ Cracks in BGA Laminate
♦ Laminate Cracks -Repair
RoHS HALT Failure Analysis
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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RoHS Prototypes: HALT Failure Analysis
♦Changes made as a result of FA:Enhanced ICT (In Circuit Test) Strain Test Process
• Reduced allowable strain from 1000 to 500 uERestricted choice of PCB laminatesWidened BGA traces, tear-dropped pads where feasibleRestricted # and types of repair allowedModified receiving processes: Added checks, XRFModified manufacturing processes
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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HALT for RoHS at Xantrex
PbPb--Free HALT Results atFree HALT Results at
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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Objectives♦HALT products in the following order:
Consumer product specifications: 0°C to +40°C (<$100).Residential product specifications: 0°C to +40°C.Portable/Towable product specifications: -10°C to +60°C.Programmable product specifications: 0°C to +50°C.Vehicle/Distributed product specifications: -25°C to +65°C.
♦Determine robustness of RoHS products.♦Comparisons done on identical designs.♦Design issues will be resolved later.
Note: All HALTs done on a QualMark OVS2.5xLF and OVS3 Typhoon chambers.
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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HALT Results for175Watt Inverter
♦ Four each Pb-based and RoHS units were compared.
♦ The Pb units died at 5, 15, and 25Grms.
-30°C/80°C-30°C/80°CMust Meet44# Units
VibrationRapid HotCold
22Grms18Grms-50°C/80°C-50°C/80°C
90°C100°C-30°C-40°CRoHSLead
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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HALT Results for100-200Watt Inverters
-30°C/100°C-30°C/80°C-30°C/80°C-30°C/80°C-30°C/80°CMust Meet44444# Units
5Grms-20°C/70°C
70°C-20°CLead
Not done-50°C/80°C
90°C-50°CLead
Not done-10°C/75°C
79°C-20°CLead
VibrationRapid HotCold
23Grms6Grms-20°C/60°C-50°C/80°C
65°C90°C-20°C-50°CRoHSLead
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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HALT Results for 1KW Residential Inverter/Charger
-30°C/80°C-30°C/80°CMust Meet44# Units
VibrationRapid HotCold
25Grms28Grms-20°C/60°C-20°C/60°C
70°C70°C-30°C-20°CRoHSLead
ASTR 2006 October 4,5 & 6, San Francisco CAMike Silverman, Cheryl Tulkoff, and Harry McLean
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HALT Results for 1KW Residential Inverter/Charger
-30°C/80°C-30°C/80°CMust Meet222# Units
VibrationRapid HotCold
>24Grms>22Grms-40°C/90°C-40°C/95°C
100°C110°C-50°C-35°CRoHSLead
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Some Questions…
♦Any cost increase of RoHS vs Pb parts?Less than 5%.
♦Should HALT dwell times change with RoHS?No. The air exchange rates are very high.
♦With RoHS, can I use the Pb HASS profile?This is dependant on the OL and DL encountered. If the same, then yes. If not, then investigate root cause and make determination. Recommend rerunning life portion of POS.
CONCLUSION
• SnPb solder materials have been used in the electronics industry for over 60 years and therefore the processing conditions and their impact on materials and reliability are well understood.
• Converting to Pb-free materials and processes introduces many risks some of which are better understood than others.
• Following the guidelines in this presentation can help mitigate these risks, resulting in reliability as good or better than SnPb.
CONCLUSION
CONCLUSION• Planning and initiating reliability test plans for
RoHS compliant product requires an understanding of the risks and behavior associated with Pb-free– Capture the ‘easier’ defects before actual test– Identify the test based on the field environment– Develop test parameters and duration using knowledge
of material behavior and derivation of acceleration factors
• Do not let Pb-free blind you to other problems
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For More InformationFor More Information• For more information on Reliability of Pb-Free Solder, contact
– Mike Silverman of Ops A La Carte• (408) 472-3889 // [email protected] // www.opsalacarte.com
– Dr. Craig Hillman of DfR Solutions • (301) 474-0607 // [email protected] // www.dfrsolutions.com
– Nicole Effenberger of SGS • (973) 461-7906// [email protected] // www.sgs.com
• Between us, we offer end-to-end solutions for RoHS– Education on the risks, concerns, and best practices for reliability of Pb-Free
solder.– Assessment of a company's products and determination of areas of significan
reliability risk due to the industry component and manufacturing changes due tothe European legislation.
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– (see http://www.opsalacarte.com/Pages/reliability/rel_rohs_transition.htm for more infoon this service)
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