Revised: Aug 1, 20141 ECE 263 Embedded System Design Lesson 1 68HC12 Overview.
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Transcript of Revised: Aug 1, 20141 ECE 263 Embedded System Design Lesson 1 68HC12 Overview.
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Revised: Aug 1, 2014 1
ECE 263 Embedded System Design
Lesson 1
68HC12 Overview
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Overview
• Computers and Embedded Controllers
• 68HC12 Overview
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Computers and Embedded Controllers
• All computers contain four hardware modules– central processing unit (CPU)– memory– input/output devices– buses
• Reference Figure 1.1, pg 5
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Central Processing Unit
• Governs order of instruction execution
• Controls access to memory and I/O devices
• Performs arithmetic and logical operations
• Handles interrupt services
• Contains: ALU,control unit, internal registers, timers, buses
• Speed based on clock speed
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Memory
• Contains instructions and data
• von Neumann architecture -- instructions and data stored in the same memory
• Memory technologies:– RAM– ROM
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I/O Devices
• Input/Output devices:
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Buses
• Pathways connecting computer components– address: specify address locations where data
and instructions reside in memory– data: carries instructions and data to and from
memory– control: sends and receives control commands
among system components
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Terminology
• Microprocessor: CPU units packaged in a single chip
• Microcomputer: computer that uses the microprocessor as its CPU (e.g. PC)
• Microcontrollers (a.k.a. embedded controllers): all computer components in a single VLSI (Very Large Scale Integration) chip
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Applications
• How many embedded controllers have you used today?
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68HC12 Overview
• Introduced by Motorola 1997
• Instruction Set
– 209 instructions
– multiple addressing modes (where’s the data!)
• CPU12
– 16 bit processor
– variants:
• “A4” : expanded mode, 8 MHz
• “B32”: single chip mode, 8 MHz
• HCS12 series: larger onboard memory, 25 MHz
• Clock speed: 16 MHz crystal, divide by 2 for 8 MHz system clock
– clock generated by crystal or ceramic resonator
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Memory Concepts - Review
• Width: M bits, number of data lines, determines size of operand
• Length: number of separately addressable locations, 2#addr lines = #memory locations
m addr lines
N data lines
memory
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Memory Concepts - Review• RAM
– read/write
– volatile
– faster access time
– variants• SRAM
• DRAM
– applications• variables
• dynamic memory allocation – heaps, stacks
• ROM– read only– non-volatile– slower– variants
• ROM, PROM, EPROM, EEPROM (byte-addressable, FLASH)
– applications• programs• constants, codes, etc.
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Memory Concepts - Review
210 = 1024 210 29 28 27 26 25 24 23 22 21 20
1 0 0 _ 0 0 0 0_ 0 0 0 0
$ 4 0 0
binary
hex
Other common conversions:28 = 256 = $100210 = 1024 = $400 approximately 1K212 = 4096 = $1000 approximately 4K
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68HC12 Overview (cont)• Memory: 1K-byte RAM, 4K-bytes EEPROM, expandable to 5M-
bytes
• Serial communications: SCI and SPI
– asynchronous vs. synchronous communication
– SCI: communications - asynchronous
– SPI: extend features of 68HC12 - synchronous
• 8 channel analog-to-digital converter
• 8 channel timer – input capture, output compare, pulse accumulation
• Background Debug Mode (BDM) - troubleshooting
• Memory-mapped input/output
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15"Copyright of Motorola, Used by Permission"
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