Reversible Current Power Supply for Fast-Field Cycling

Nuclear Magnetic Resonance

Marco André Reis Lima

Thesis to obtain the Master of Science Degree in

Electrical and Computer Engineering

Supervisor: Prof. Dr. Duarte de Mesquita e Sousa

Examination Comitee

Chairperson: Prof. Dr.ª Maria Eduarda de Sampaio Pinto de Almeida Pedro

Supervisor: Prof. Dr. Duarte de Mesquita e Sousa

Member of the Comitee: Prof. António Eusébio Velho Roque

October 2014

ii

iii

Agradecimentos

Ao Professor Duarte Sousa, pela ajuda e orientação dada ao longo dos últimos meses, na

concepção deste trabalho, mas também pela oportunidade de trabalhar especificamente nesta área,

que me levou a aprender tanto e me manteve constantemente interessado e estimulado até ao fim.

Aos meus pais, e ao meu irmão que, ao longo do meu percurso por este Instituto, não me

deixaram nunca baixar a cabeça e pensar em algo que não fosse o sucesso, pelas palavras, pelas

palmadas nas costas, e por, no final de contas, estarem e terem estado sempre lá para mim, um

gigante Obrigado.

Aos meus amigos, que me acompanham há muitos anos, e que me ajudam sempre a aguentar

com tudo e a ultrapassar os obstáculos, e àqueles que conheci no decorrer do curso, que fui

acumulando, e que certamente tiveram um peso muito importante na minha vida escolar e pessoal

nestes últimos anos, pelo companheirismo, a confiança, as gargalhadas, pelas horas passadas em

trabalhos, e claro, pelo apoio que me deram nesta recta final, e por tudo o que me leva a pensar que

não foi desperdiçado um minuto na minha passagem pelo Instituto Superior Técnico.

iv

Resumo

A Ressonância Magnética Nuclear de Campo Cíclico Rápido é uma técnica largamente

utilizada no estudo da estrutura, a nível nuclear, de materiais e do seu comportamento quando

exposto a radiações de diferentes frequências. Um dos processos cruciais desta técnica consiste na

polarização das partículas que compõem a amostra, recorrendo a campos magnéticos elevados e tão

estáveis quanto possível. A detecção do sinal emitido pelo material deve ser feita através de um

sistema de Radiofrequência, sintonizado para uma frequência pré-determinada.

Para obter estes campos magnéticos, que devem ter máxima precisão, não só no que diz

respeito ao seu valor, mas como à duração temporal dos impulsos de polarização e de detecção,

recorre-se a dispositivos electrónicos de comutação, e a um magneto, no interior do qual é colocada a

amostra. A fonte de alimentação deve fornecer para o magneto valores de corrente proporcionais à

densidade de campo magnético desejada para cada fase do processo de NMR-FFC. Os dispositivos

actuais são capazes de induzir subidas e descidas muito rápidas do nível de corrente no magneto. No

entanto, existem perturbações, tais como correntes parasitas, que interferem com o processo de

variação do campo magnético, nomeadamente com a exactidão dos valores pretendidos.

Foi assim desenvolvido neste trabalho, o projecto de uma fonte de alimentação para um

relaxómetro que permite obter valores de corrente exactos, transições muito rápidas entre os vários

níveis de corrente, assim como a compensação das ditas correntes parasitas, presentes no magneto.

O método utilizado é baseado num conversor de potência denominado Conversor de quatro

quadrantes, que consiste numa alternativa, pouco explorada ainda, mas vantajosa, em comparação

com a utilização de enrolamentos auxiliares de compensação de campo. O modelo desenvolvido foi

testado em ambiente de simulação computacional e revela resultados promissores, cumprindo todos

os requisitos enunciados acima e com um potencial consumo de energia relativamente baixo.

Palavras-Chave: Ressonância Magnética Nuclear; Campo Cíclico Rápido; Fonte de Corrente

Reversível; Conversor de 4-Quadrantes; Compensação de Campo;

v

Abstract

The Fast Field-Cycling Nuclear Magnetic Resonance is a widely used technique in the study, at

nuclear level, of the structure of materials, and their behavior when exposed to varying radiation

frequencies. One of the crucial processes of this technique is about polarizing the particles that

constitute the sample, through the utilization of strong, and as stable as possible, magnetic fields. The

detection of the signal emitted by the sample should be done with a Radiofrequency system, which

should be tuned to a certain previously-set frequency.

To obtain these kind of magnetic fields, which should have maximum precision, in terms of

value, and also regarding the time duration of the polarization and detection pulses, the devices used

are switching electronic systems, and a magnet, into which the sample is placed. The power source

should provide the magnet with current values proportional to the desirable magnetic field density

values at each phase of the NMR-FFC process. Modern devices are capable of inducing very quick

transitions of the current level in the magnet. There are, however, some perturbations, such as

parasitic currents, that interfere with the process and the accuracy of the magnetic field variation.

It was developed, in this work, the project for a power source of a relaxometer, which makes

possible to obtain accurate current values, very quick transitions between the possible current values,

and the compensation of the so called parasitic currents, present in the magnet.

The method used is based on a power converter named Four-Quadrant Converter, which is a

yet less used alternative, but with some advantages, than the utilization of auxiliary, field

compensation, windings. The developed model was tested in computational simulation environment,

and reveals promising results, fulfilling all the previously stated requirements and also achieving

reasonably low power consumption.

Keywords: Nuclear Magnetic Resonance; Fast Field-Cycling; Reversible Current Supply; 4-

Quadrant Converter; Field Compensation;

vi

Table of Contents

List of Figures ................................................................................................................... viii

List of Tables ....................................................................................................................... x

Abbreviations ......................................................................................................................xi

Symbology ..........................................................................................................................xii

1. Introduction .................................................................................................................. 1

1.1. Fast-Field Cycling Nuclear Magnetic Resonance – General Description .................... 1

1.2. Motivation and objective ...................................................................................................... 2

1.3. State of the Art ...................................................................................................................... 3

1.4. Structure of the Thesis ......................................................................................................... 5

2. Circuit 1 – Buck Converter .......................................................................................... 7

2.1. Circuit operation .................................................................................................................... 7

2.2. Control .................................................................................................................................... 9

2.2.1. Design of the Compensator ........................................................................................ 9

2.3. Results .................................................................................................................................. 14

3. Circuit 2 – Boosting-Capacitor Buck Converter ........................................................16

3.1. Circuit operation .................................................................................................................. 16

3.2. Control .................................................................................................................................. 18

3.3. Results .................................................................................................................................. 18

4. Circuit 3 – 4Q Converter .............................................................................................21

4.1. Circuit Operation ..................................................................................................................... 23

4.2. Component’s Sizing ................................................................................................................ 28

4.3. Control ...................................................................................................................................... 31

4.3.1. PI Controller .......................................................................................................................... 32

4.4. Simulation of the Non-linearity .............................................................................................. 34

4.5. Power Sources ........................................................................................................................ 35

4.5.1 Main Circuit Supply ........................................................................................................... 36

4.5.2. Boosting Circuit Supply ................................................................................................... 37

4.6. Protection Snubbers ............................................................................................................... 38

4.7. Final Results ............................................................................................................................ 40

4.7.1 Simulation Results ............................................................................................................ 41

vii

4.7.2. Sensitivity Tests ............................................................................................................... 45

5. Power Losses and Heat Dissipation ..........................................................................50

5.1. Semiconductor Losses ....................................................................................................... 50

5.2. Joule Losses ........................................................................................................................ 58

5.3. Heat Sinks ............................................................................................................................ 59

6. Conclusions .................................................................................................................63

6.1. Final Considerations........................................................................................................... 63

6.2. Application and Future work ............................................................................................. 65

References ..........................................................................................................................66

Appendix A - Material List .................................................................................................68

Semiconductors .............................................................................................................................. 68

Transformers ................................................................................................................................... 68

Integrated Circuits .......................................................................................................................... 68

PI controller ...................................................................................................................................... 69

Other elements ................................................................................................................................ 69

Appendix B – Operational Amplifier Blocks .....................................................................70

Inverting Amplifier ........................................................................................................................... 70

Integrator .......................................................................................................................................... 70

Adder ................................................................................................................................................ 71

Subtractor ........................................................................................................................................ 72

viii

List of Figures

Figure 1.1 - Model of the topology proposed by Redfield, Fite and Bleich, that uses the boosting-

capacitor principle. ................................................................................................................................... 3

Figure 1.2 - Model of the topology proposed by Rommel, with a MOSFET switch, that also controls the

magnet current. ....................................................................................................................................... 4

Figure 1.3 - Model of the topology suggested by Seitter, with IGBTs as switches. ................................ 4

Figure 1.4 - Model of the Commercial power source from STELAR. ...................................................... 5

Figure 2.1 - Representation of a Buck Converter circuit, using an ideal switch. ..................................... 7

Figure 2.2 - Simplified block diagram of a converter with the load and the control system. ................. 10

Figure 2.3 - Model of the PI controller with extra saturation loop. ......................................................... 14

Figure 2.4 - Simulink model for the Buck Converter with closed loop current control........................... 14

Figure 2.5 - Current in the magnet, using the Buck Converter simulation. ........................................... 15

Figure 3.1 - Equivalent circuit during the current boost phase. ............................................................. 16

Figure 3.2 - Graphic representation of how the energy for the rise of the current can be calculated. .. 17

Figure 3.3 - Simulation circuit of the Buck Converter including the boosting circuit and the linear and

logical control systems. ......................................................................................................................... 19

Figure 3.4 - Magnet current using the Buck Converter with the boosting capacitor. ............................ 19

Figure 4.1 - Current in the magnet – Reference vs the real waveform. ................................................ 22

Figure 4.2 - Conceptual circuit for the FFC NMR reversible current supply, based on a Four-Quadrant

converter. ............................................................................................................................................... 23

Figure 4.3 - Model for the equivalent circuit of the high or middle level of steady-state current on the

magnet. .................................................................................................................................................. 24

Figure 4.4 - Equivalent circuit for the fall of the current stage. .............................................................. 26

Figure 4.5 - Equivalent circuit for the low current steady-state. ............................................................ 27

Figure 4.6 - Equivalent circuit for the rise of the current stage. ............................................................. 28

Figure 4.7 - Schematic of the electronic circuit for the PI Controller system.. ...................................... 33

Figure 4.8 - Model for the simulation of the non-linearity of the magnet. .............................................. 35

Figure 4.9 - Schematic of the power feeding system for the converter. ................................................ 35

Figure 4.10 - Symbolic representation of the rectifier’s resulting DC voltage.. ..................................... 37

Figure 4.11 - Representation of the protection Snubbers for an IGBT. ................................................ 40

Figure 4.12 - Model of the complete circuit for the FFC-NMR power source. ....................................... 41

Figure 4.13 - Integrated Control System, which includes the PI Controller, and additional logical

circuits. ................................................................................................................................................... 42

Figure 4.14 - Simulation result for the magnet current using the 4Q Converter. .................................. 42

Figure 4.15 - Rise of the current from Low to High level. ...................................................................... 43

Figure 4.16 - Fall of the current form High to Middle level. ................................................................... 43

Figure 4.17 - Fall of the current from Middle to Low level. .................................................................... 43

Figure 4.18 - Flicker of the High steady-state of the current.. ............................................................... 44

Figure 4.19 - Flicker of the Middle steady-state of the current.. ............................................................ 44

ix

Figure 4.20 - Flicker of the Low steady-state of the current. ................................................................. 44

Figure 5.1 - Types of Magnetic Work Cycles ........................................................................................ 51

Figure 5.2 - Current on S1 and D1, using the Max Cycle. ...................................................................... 53

Figure 5.3 - Current on S2 and D2, using the Min Cycle. ..................................................................... 54

Figure 5.4 - Current on S3 and D3, using the Inv Cycle. ...................................................................... 55

Figure 5.5 - Current on S4 and D4, using the Regular Cycle. ............................................................... 56

Figure 5.6 - Current on the auxiliary IGBT, S5, when using the Max cycle. ......................................... 57

Figure 5.7 - Representation of the thermal circuit for a semiconductor, and its heat sink.. .................. 59

Figure 5.8 - Distribution of the Losses by the semiconductors and the magnet, during a regular period

cycle. ...................................................................................................................................................... 61

Figure 5.9 - Distribution of the losses by each stage, during a regular period cycle, for the

semiconductors and for the magnet. ..................................................................................................... 61

Figure 5.10 - Distribution of the power losses, with the maximum values of each component. ........... 62

x

List of Tables

Table 1 - Circuit's Components its Characteristics ................................................................................ 30

Table 2 - Protection Snubbers for all the Smeiconductors. ................................................................... 40

Table 3 - System’s Response to Variation of the Proportional Gain (Kp) ............................................. 46

Table 4 - System’s Response to the Variation of the Integral Gain, KI. ................................................ 47

Table 5 - System’s Response to the Variation of the Saturation Gain, Kw. .......................................... 48

Table 6 - System’s Response to the Variation of the Entire Set of Gains. ............................................ 49

Table 7 - Total Losses, Thermal Characteristics, and Heat Sinks. ....................................................... 60

Table 8 – Characteristics of the Semiconductors present in the converter. .......................................... 68

Table 9 - Characteristics of the Transformers used for the power supply of the converter. ................. 68

Table 10 - Integrated Circuits used for the linear control of the IGBTs ................................................. 68

Table 11 - Components used in the electronic circuit for the PI Controller ........................................... 69

Table 12 - Other components used in the Converter ............................................................................ 69

xi

Abbreviations

DC Direct Current

FFC Fast-Field Cycling

IGBT Insulated Gate Bipolar Transistor

IST Instituto Superior Técnico

MOSFET Metal-Oxide Semiconductor Field-Effect Transistor

NMR Nuclear Magnetic Resonance

OpAmp Operational Amplifier

PI Proportional Integral

RC Resistor-Capacitor

RF Radio-Frequency

RL Resistor-Coil

xii

Symbology

– Binary State Variable;

δ – Duty-cycle of a rectangular wave;

Energetic Efficiency;

Damping Coefficient;

RL circuit time constant (ms);

Angular Frequency (rad/s);

Angular Frequency (rad/s);

– Variation of the capacitor current (%);

Duration of the current boost (ms);

Recharging time (boosting capacitor) (ms);

– Variation of the feeding voltage (%);

Maximum variation of the magnet voltage (%);

Amplitude of the reference signal (V);

Magnetic Flux Density (T);

Maximum level of on a magnetic field cycle (T);

Middle level of on a magnetic field cycle (T);

Minimum level of on a magnetic field cycle (T);

Boosting Capacitor (F);

Filtering Capacitor (F);

Rectifying Capacitor (F);

Integrator Capacitor (F);

Snubber Capacitor (F);

Diode i;

Rectifier Diode i;

xiii

Snubber Diode;

Collector Current on a IGBT (A);

Capacitor Current (A);

Diode Forward Current (A);

Maximum value of current on the magnet, during a cycle (A);

Middle value of current on the magnet, during a cycle (A);

Minimum value of current on the magnet, during a cycle (A);

Reference signal for the magnet current (A);

Magnet Current (A);

Root mean square value of the magnet current (A);

Perturbation Current (A);

Current on switch i (A);

Maximum value of current on switch i (A);

Maximum value of current on switch i (A);

Current provided by the Transformer (A);

Current provided by the voltage source (A);

Gain of the Adder/Subtractor blocks;

Sampler Gain;

Incremental Gain;

Integral Gain;

Proportional Gain;

Saturation Gain;

Magnet Indutance (H);

Conduction power losses on semiconductor i (W);

Dissipated power (W);

xiv

Power of the voltage source (W);

Joule power losses on semiconductor i (W);

Power delivered to the magnet (W);

Maximum power delivered to the magnet (W);

Joule power losses on the magnet (W);

Switching power losses on semiconductor i (W);

Carrier wave (V);

Resistor of the boosting circuit (Ω);

Conducting resistance (Ω);

Filter Resistor (Ω);

Resistors of the integrator block (Ω);

Magnet resistance (Ω);

Resistors of the proportional block (Ω);

Snubber Resistor (kΩ);

Thermal Resistance (case to sink) (ºC/W);

Thermal Resistance (junction to ambient) (ºC/W);

Thermal Resistance (junction to case) (ºC/W);

Thermal Resistance (sink to ambient) (ºC/W);

Resistors of the saturation gain block (Ω);

Switch i;

Transformer Power (VA);

Time (s);

Delay random variable (ms);

Fall time (µs);

Rise time (µs);

xv

Minimum ON time interval during a period (IGBT) (s);

Period of the cycle (ms);

Ambient temperature (ºC);

Delay Constant (ms);

Case temperature (ºC);

Transistor i;

Junction temperature (ºC);

Pole of the Controller (s);

Period of the rectified wave (ms);

Sink temperature (ºC);

Switching period of a semiconductor (µs);

Zero of the Controller (s);

Modulating signal (V);

Gate control signal (V);

Error signal (V);

Voltages on the Integral gain block (V);

Maximum amplitude of the modulating wave (V);

Voltages on the Proportional gain block (V);

Voltages on the Saturation block (V);

Main voltage source(s) (V);

Energy needed to boost up the magnet current (J);

Rectified feeding voltage (V);

Voltage Source (V)

Collector-Emitter voltage (V);

Maximum collector-Emitter voltage on switch i (V);

xvi

Collector-Emitter saturation voltage (V);

Diode forward voltage (V);

High voltage source (V);

Voltage applied to the magnet (V);

Voltage across the Diode (Buck-Converter) (V);

Voltage across the Diode (Buck-Converter) (V);

Average value of the rectifier voltage (V);

Maximum Repetitive Reverse Voltage (V);

1

1. Introduction

The study of materials at an atomic level is becoming more and more important, in the various

fields of Physics and Chemistry, both for investigation and industrial purposes. The medical and

pharmaceutical industries, as well as the alimentary ones are deeply interested in the study of the

molecular properties of the substances, in terms of their behavior in response to different

temperatures, acidic or otherwise harmful ambients, etc. and also the maintenance of their

characteristics with time. On the other hand, the mining industry has also high interests in the study of

the properties of materials at microscopic or even atomic levels, such as rare minerals, petroleum, and

oil, among others. The development of modern, sophisticated, and efficient technologies to help these

scientific studies is of high importance. A relevant technique used nowadays by the laboratories that

make these analysis is the Fast-Field Cycling Nuclear Magnetic Resonance.

This technique’s efficiency is dependent on good power supplies and detection systems, which

have been being developed through some decades, and have permitted companies of the industries

referred before to widely use this technology and obtaining increasingly good results. However, the

technology still have a long way of progress ahead as the results are not yet too satisfactory for the

biological and medical industry, i.e. analyzing blood samples or other biological fluids, as these are

highly irregular materials, that, obviously do not behave as the non-organic materials, and do not

respond in a linear way to this tests. Still, there are already some widely used applications in the area

of the organic polymers.

The main scientific areas that use applications of the field-cycling NMR include: polymer

dynamics; liquid crystals and liquid layers; biopolymers and biological tissues; among others.

1.1. Fast-Field Cycling Nuclear Magnetic Resonance – General

Description

This technique is based on the measurement of the spin-lattice relaxation times of the target

substance. In nuclear physics, the relaxation is a set of processes in which the particles of the nuclei

of a substance are subjected to a certain magnetization, that represents a forced, non-equilibrium

state, and are then released of that magnetization force, and go back to the equilibrium state.

The technique is used in protons and deuterons with spins of ½ and 1, respectively, and the

main goal is to measure the relaxation time, i.e. the time the particle takes to change the orientation of

its spin, once the magnetic excitation is removed (relaxation phase).[1]

To accomplish this, the particles are submitted to repeated cycles of magnetic field exposure of

different intensity. A regular cycle comprises three phases: The polarization phase, when a magnetic

field with high field density (Bp) is applied in order to magnetize the particles and arrange them in a

2

certain way. Then, the second step is the relaxation phase, where a very low field is applied during a

certain interval, to let the particles rearrange to their equilibrium state, both magnetically, as well as

thermal equilibrium. Finally, the detection phase, in which a field of high flux density (BD) is applied,

preferably, during a short period of time. For the acquisition, it is normally used a radio-frequency

system, that should send a 90º RF pulse. The devices that do these whole set of processes, using the

FFC-NMR technique, from providing the magnetic field to the sample, and the acquisition system, are

called relaxometers.[1][12]

These devices have several modules that do the different functions, but nowadays they all

should contain a magnet, where the sample is put, and to which is supplied the needed magnetic field,

in the form of an electric current. The main requirements for these electronic systems, on the side of

the power supplies, are: providing very stable values of magnetic flux density (B), in the phases of

polarization and detection; accuracy on the values of B provided is crucial; the speed of the transitions

between levels of magnetic field should be as high as possible.

As the relaxation times are usually very small, the usual frequencies used on the signals are on

the order of the MHz. For these frequencies, any regular NMR spectrometer may operate, using high

field magnets, and get the relaxation times. The limitation of these systems is more in terms of the

lower frequencies, as there are particles, especially the deuterons, which have associated low

relaxation frequencies (~100Hz), which require the use of low-fields.[1] This fact brings a series of

problems, the most relevant being the interference that occurs with the earth magnetic field. This is

one of the main problems of modern relaxometers, and the one that shall be discussed from now on.

1.2. Motivation and objective

As stated above, to increase the sensitivity of the NMR systems, and be able to detect a wider

range of spin-lattice relaxation of more particles, it is also needed a wider range of frequencies. The

limitation of the low frequencies has to do with the interference of the earth magnetic field, that lead to

the appearance of undesirable, parasitic magnetic fields on the magnet that supplies the signal to the

sample. That parasitic field interferes with the operation cycle, especially in the relaxation phase,

where it is desirable to have the minimum field density value possible, but with the addition of the

earth residual magnetism, that is not possible. This is a problem that should be worked on the power

supply size. There are several topologies of power supplies for FFC-NMR relaxometers, from different

authors, that have different approaches to this problem.

The objective of this work is not only the design of an accurate and efficient power supply for

FFC-NMR purposes, but it should also contain a solution for the parasitic currents from a different

paradigm of the solutions already implemented.

The whole system should include: the magnet; the main power supply unit, in this case, it is a

switching power converter; an extra supply unit for the rapid transitions of the magnetic field (which

correspond to rapid transitions of the current on the magnet); a control system that should sample

3

data from the output current and use it with a feedback system to control the levels of current; the RF

acquisition system; heat dissipation systems.[5]

1.3. State of the Art

The majority of the existing models for the power supply are based on topologies that use a

capacitor for a quick rise of the current on the magnet, also called Boost Capacitor. These capacitors

are charged by an independent, high voltage source. Its quick discharge allows an almost instant rise

of the current to the desirable level on the detection phase.

The first model for this type of converter was suggested by Alfred G. Redfield, Warner Fite and

Hermann E. Bleich. This model used three power sources, two transistor banks and two capacitors,

one for the current’s rising edge, and the other for the falling edge. This topology is represented in

figure 1.1.

RM

LMD1

D3

H.V.

V

D2

T1

T2

C2

C1

Control Signal

VQ

R1

Figure 1.1 - Model of the topology proposed by Redfield, Fite and Bleich, that uses the boosting-capacitor principle.[1]

Another model based on the Boosting Capacitor principle is the one suggested by Eberhard

Rommel (fig. 1.2). In this model, it is used a MOSFET bank and a GTO thyristor, instead of IGBT’s.

There are two power sources, one to feed the load during the stationary current phase, and the other,

a high voltage source, to charge the boosting capacitor. In this configuration, the MOSFET serves, not

only as a switch, but as a means of controlling the current that flows through the load, depending on

the voltage applied on it.

4

M

RM

LM

D1

D3

D4

C

H.V.V0

D2

Control Signal

Figure 1.2 - Model of the topology proposed by Rommel, with a MOSFET switch, that also controls the magnet current.[1]

Alternatively, another model that uses the Boosting Capacitor principle, and IGBT transistors

as switches, was suggested by R.O. Seitter (fig. 1.3). The utilization of IGBT’s allows for the use of

higher voltages, and using only one module of these semiconductors, instead of banks, as in the

previous topologies, especially with MOSFET’s. Besides, IGBT’s are more robust in terms of parasitic

voltages, which can cause breakdowns. This model has allowed obtaining extremely accurate results

in terms of the desired magnet current. However, several power sources are needed in order to

provide the high voltages this topology requires, particularly in the high voltage source that feeds the

capacitor, which should reach about 600V.

Figure 1.3 - Model of the topology suggested by Seitter, with IGBTs as switches.[1]

Finally, the topology used in the commercial model of STELAR, consists in a different working

principle of the previous models. Unlike the other topologies, STELAR includes neither a Boosting

Capacitor nor a high voltage source. The necessary voltage for the current boost needed in the

magnet is obtained through a MOSFET bank, with low enough commutation times. A second voltage

source is also used, with a different purpose of those used in the other models. This source (V2) is set

with an opposite polarity to the main voltage source (V1), so it can deliver a negative current to the

load. This is done in order to compensate the residual magnetism of the magnet that does not allow

LM

D1 D2

D3

D4

5

the current to reach zero value. Therefore, with this negative power source, it is possible to force the

current on the magnet to reach 0A, in the relaxation phase. The topology of STELAR’s commercial

module is represented above, in figure 1.4.

M1

RM

LM

V2V1

Control Signals

M2

Figure 1.4 - Model of the Commercial power source from STELAR. [1]

There is also a prototype in IST, homemade, that uses the same principles of the boosting

capacitor, and is able to obtain the same satisfying results as the ones made by STELAR, in concern

to the speed of the transitions, and perhaps even with more accuracy on the steady states of the

magnetic field. The model of IST has also a mechanism to counter the parasitic currents, making the

current on the magnet effectively reaching 0A. The method to do that is very simple. Besides the

magnet where the sample is put, and to which the magnetic field is applied, it is inserted an additional

winding in which flows a current that should counter the residual current on the magnet. That means

that this new current should have opposite sense to the one the magnet.

This is an alternative technique to the solution that is going to be implemented with this work.

It is simple and effective, but it comes with some disadvantages, like the losses on the winding, that

are always higher than those on the semiconductors, especially because the winding is conducting

current all the time. This also leads to higher heat dissipation, than could lead to further troubles. Also,

the current injected on the winding has no control system, so it is a little rudimental, as there is no way

for the system to compensate any perturbation on that current.

1.4. Structure of the Thesis

This thesis will try to reflect the way the work was the developed along the semester, going

step by step, describing the circuits with increasing complexity, the principles followed and the

decisions taken, as well as the sizing of the major components of the power converter and other

6

important parts, like the control system. The thesis is organized in a chapter by chapter approach to

the final simulation, and then to the calculation of the power losses, ending with all the important

conclusions. The document is structured by chapter as:

o Chapter 2: It is described the first topology for the power supply, called Buck

Converter. It is explained the principles of working; the control system used; the sizing

of the compensator; the schematic of the converter + control system; it is presented a

simulation and its results.

o Chapter 3: it is described the Buck Converter topology with the addition of a boosting

circuit for the rise of the magnet current. It is explained the operation of the circuit; the

control system; the schematic; it is presented a simulation of the circuit and its results.

o Chapter 4: In this chapter it is presented the 4Q-Converter. The following themes are

addressed: operation principles of the circuit and options taken; components sizing;

the control system, including the sizing of the custom PI controller; the non-linearity

simulation model; the choice and sizing of the power source for the circuit; sizing of

the protection snubbers; schematic of the circuit; simulation and results; sensitivity

test.

o Chapter 5: After simulation, some additional calculations are done, like the power

losses. Calculation of the power losses for the semiconductors; Calculation of the

Joule losses on the magnet; Sizing of the Heat Sinks for the semiconductors.

o Chapter 6: In this final chapter, it is presented the conclusion taken from the

simulations, the calculations made, as well as a balance of the whole work and the

hypothesis of application to a real prototype.

7

2. Circuit 1 – Buck Converter

The first circuit simulated is a simple buck converter, intended to create an approached square

wave with the current in the load. In this first study, the current shall vary between [0; Imax], so the

hysteresis effect is not taken into account. Also, there is only one power source, and one switching

device. This circuit should demonstrate that several other elements are needed to accomplish the

desired function with reasonable values, especially the rise/fall durations. However, the linear control

chain loop used in this circuit is almost definitive for the final circuit, as it proves to be effective in

controlling the current in the static phases of the NMR operation cycle.

U

RM

LM

D

S

Figure 2.1 - Representation of a Buck Converter circuit, using an ideal switch.

2.1. Circuit operation

The first attempt is to create an almost square wave with the load current, . This current

should be comprised between the set [0, Imax]. The maximum value is, typically, 10A. To accomplish

this kind of function, the duty-cycle, , should be 0.5. Assuming the load to be a magnet of resistance

= 3Ω, and inductance = 200mH, and that in steady-state the average value of the inductive

current is null ( = 0A), then, the steady-state load voltage, is:

(2.1)

The result is 30V. In the buck converter, if the voltage across the diode is , and its

average value, , it is possible to relate it to the feeding voltage and, therefore, establishing a

relation between the in and out voltage of the circuit.

(2.2)

Hence,

(2.3)

8

So, 30/0.5 = 60V, shall be the feeding voltage.

The circuit operation can be described by the following equations:

(2.4)

(2.5)

At this point, the losses in semi-conductors and in the load, can be neglected, in order to

estimate the power delivered to the load. In this case, if there are no losses, the efficiency, η, is

approximately 1. So the relation between the input and output power is obtained by:

(2.6)

(2.7)

So, the current provided by the power source, Ii is:

(2.8)

(2.9)

And taking into account the relation between the average value of the current in the load and

the respective average value of the voltage:

(2.10)

Then, the output power, delivered to the magnet, is:

(2.11)

For this converter, the resulting power is 300W. The switching device is can be either a

MOSFET transistor or an IGBT. Although in this circuit both semiconductor devices could have been

used, in the following topologies IGBT’s will be always the choice, because they are more reliable in

the high voltage operation. Moreover, MOSFET’s are usually chosen for very-high or ultra-high

frequency switching operation, which is not a need in this case.

9

2.2. Control

The switching of the IGBT is regulated by a closed loop, feedback control system. The target

variable to be controlled is the current in the load and, as stated previously, both the voltage and

current in the load are dependent to the duration of the ‘ON’ and ‘OFF’ states of the switch.

This control loop includes a Proportional-Integral (PI) compensator, a feedback gain and a

limiter, just before the gate of the IGBT. The reference signal is a square wave with amplitude a=10,

period =400ms, and duty-cycle, =0.5. The compensator receives a signal that is the difference

between the reference and the load current and outputs the signal that controls the switching of the

IGBT, which is passed through the limiter, so it never exceeds the unitary value, neither does it

assume a negative value.

About the period of the operation cycle, it is the minimum value that allows the circuit to

accomplish the desired function or, in other words, to have the correct waveform of the current in the

magnet. For lower values, the semiconductor switches too fast, and it is not possible for a low power

source to provide enough energy in such low periods of time to allow the current to rise and fall to its

desired minimum and maximum levels. Although the reduction of the period of the cycle is not a

primary concern, in the final topology for the converter, later presented, this restriction of the period,

concerning the needed power, does not exist, because the rise and fall of the current is done with an

auxiliary high voltage power source. Nevertheless, this is actually a limitation of this first circuit that

only finds a solution in a more complex topology, such as the 4-Quadrant Converter.

2.2.1. Design of the Compensator

To calculate the zeros, poles and gains associated to the compensator, first, it is needed to

present the way the circuit is modeled into a transfer function, the parameters that are used in that

model, and how are they obtained/estimated.

The whole set of a converter with a closed loop control system may be depicted as a block

diagram, that includes the compensator, a modulator for the gate pulse of the IGBT, the switching

converter, the load, and the sampling block.

10

Figure 2.2 - Simplified block diagram of a converter with the load and the control system.

The group converter + modulator can be represented as a transfer function, with a pole that

depends on the circuit’s period, and a gain that, among other factors, depends on the feeding voltage.

The modulator used is supposed to use a pulse-width modulation principle with a single edged

sawtooth carrier, as it is the most common process used in modulators for DC-DC power converters.

The carrier is described as:

(2.12)

The modulating signal, , varies between 0< < , and is defined such as when

> , the switch is put on ‘OFF’ state. In other words,

(2.13)

When a change in the modulated wave occurs, the duty cycle is only affected at the end of the

current period. This means that there is always a delay on the response which is not deterministic, but

always comprised in the interval [0, ]. This phenomenon can be modeled by a random variable, td.

This delay is important for the controller’s sizing as it must be taken into account in the relation

between input and output voltages (transfer function). For the calculation of the gains, it is preferable

to use a constant value, rather than a random variable. In circuits with switching periods much smaller

than the time constants related to the reactive components it is usually used the average value of td,

which shall be called .

The transfer function that relates the signal of the modulator to the output average voltage

( ), in the Laplace domain, is written as [8]:

(2.14)

Unfolding the exponential function in its Taylor Series:

(2.15)

11

It is a good approximation to leave out the terms of order >2, as they have infinitesimal values,

and only consider the pole -1/ , as it is, in fact, the dominant pole.

Therefore, the final expression for the transfer function is:

(2.16)

is the average value of td, as previously stated, and is the incremental gain, defined as [8]:

(2.17)

The amplitude of the carrier (and the modulated wave) is a parameter that, theoretically and in

the computational simulation, may be chosen with some freedom, as it does not have a standard

value neither does it have any theoretical limitation. This is possibly the only variable that may have

virtually any value, and can be chosen accordingly to the circuit’s response in simulation. Therefore, a

wide range of values was experimented, to observe its influence in the simulation’s main results. The

values used go from 1, 10, 100, 1000( V), and the variation noticed was mainly in terms of overshoot

of the current wave and its ripple when at the stationary values. So, in fact, the higher the amplitude

( ), the smoother is the compensator’s response and, consequently, the current in the load has a

more stable behavior, in terms of peak value, and the non-variation of the DC value.

Thus, the value =1000V will be used for the incremental gain in this compensator, and it

shall be used in the following simulated circuits as well. It is a value that does not seem too unrealistic

to be used in a real circuit, and it already delivers pretty good results. It might be a little too high, or too

low, as these controllers are made with integrated circuits that often include OpAmps with gains

around 103 or higher, but it does not seem to exist any reason to choose a very different value. Also,

with this choice, the gains of the compensator for this, or any of the remaining circuits, never reach the

103 value.

The load may also me modeled as a transfer function, as the compensator must cancel the pole

of the magnet, a RL circuit. This kind of circuits ha a time constant, =LM/RM, and its transfer function,

in the Laplace domain, is:

(2.18)

Hence, the pole that needs to be cancelled by the compensator is located at:

(2.19)

The PI compensator may now be defined as a transfer function described by:

12

(2.20)

Where the zero is easily calculated as the time constant of the RL load:

(2.21)

So, the calculation is 0.2/3 = 66.67ms. The equation for the pole can be obtained through the

closed loop transfer function of the whole system, considering the output as the current in the magnet

and the input as the reference signal for said current.

(2.22)

This expression is in the same form as a canonical form second order system, following the

ITAE criterion, with unitary static error.[4]

(2.23)

Where,

(2.24)

(2.25)

From this point, with a simple reasoning with the constant, it is possible to solve in order to

calculate :

(2.26)

13

The value of the damping coefficient should be chosen in a way that combines both low rising

times and low overshoot. For a second order, underdamped system, this coefficient should be

.

For this circuit, as for the remaining described in this dissertation, the value to be used will be

. Also,

the value of the feedback gain, , is always chosen to be unitary, =1. Then, the value of for this

converter is:

(2.27)

As has the value 60/1000 = 0.06, and = 200ms, thus the value of is 8ms.

Instead of this representation, for the computational simulation it is more practical to represent

this compensator in an equivalent block diagram form, composed by integrator and gain blocks,

described mathematically as:

(2.28)

In which,

(2.29)

(2.30)

The results are = 8.33, and = 125. Additionally, the compensator may also include a

limiter, in the form of a saturation block with a feedback loop, that ensures that the signal sent to the

gate of the IGBT never exceeds a certain limit, or in other words, even if the error signal is unbounded

and goes over the limits, the signal that controls the switching device does not. With this, if a great

disturbance occurs in the circuit (currents or voltages), even if the switching duty-cycle may be

affected, the IGBT is not put in danger. This type of compensator is also called a limiting, or soft-

starting compensator. The limiter has limits set between [0,1] [8]. The extra loop associated with the

saturation block has another feedback gain, that should be chosen according to the following

condition [8]:

(2.31)

14

In this case, the value chosen is =0.12. This feedback loop’s objective is to never let the

signal even reach the limit. It compares the signal going in and out of the saturation block and sends

the difference to compensate the integral gain, so it ensures that the limits of the saturation are never

reached.[8]

Figure 2.3 - Model of the PI controller with extra saturation loop.

2.3. Results

The implementation of the Buck converter in Simulink environment and the results of the simulation

with the load magnet represented by a RL load are shown below. The subsystem “Controller” contains

the circuit represented above, in Fig.2.3.

Figure 2.4 - Simulink model for the Buck Converter with closed loop current control.

As shown in the respective figure, the converter is able to perform the required task, delivering

the correct amount of current to the load, within a reasonable working cycle. The PI controller is also

effective in maintaining low current ripple on the steady phase, and a fast establishing time. However,

the rise and fall times of the current are too long (about 47ms to rise and 200ms to fall), which make

the use of this circuit for the Nuclear Magnetic Resonance relaxometry, impossible. So, a more

ContinuousIdeal Switch

powergui

1

kI

U

Scope2Repeating

Sequence

Reference Signal

g

CE

IGBT

D1

i+-

Current Measurement

Ue Uc

Controller

Magnet

Ue Uc

15

sophisticated converter is needed, in order to elevate and dissipate the load current much faster, as

the transition between the states of the magnetization cycle must be as quick as possible, about or

under 5ms is acceptable.

Figure 2.5 - Current in the magnet, using the Buck Converter simulation.

16

3. Circuit 2 – Boosting-Capacitor Buck Converter

In order to improve on the previous circuit’s results, the next step is the integration of the

Capacitor-boosted, fast field elevation on the magnet. This technique consists on placing a previously

charged capacitor in parallel with the load, delivering the required maximum value of the current in a

short interval of time. To do this, the power source that charges the capacitor needs to apply a high

voltage, hence, an independent source must be used. For this work, the high voltage source, VH, will

be of 500V maximum. For higher values of voltage, the boosting times will be smaller, but the power

sources are bigger and more expensive. Also, the semiconductors used in these intervals must

sustain higher currents, and dissipate high amounts of heat, so a compromise between the speed and

several downsides must be achieved.[1]

3.1. Circuit operation

The operation cycle of this circuit is very similar to the previous one, except in the current rise

phase, in which the additional boosting circuit is put in parallel with the load. This circuit has a switch

that closes in rise phase, and opens when the current hits the maximum value, Imax, ensuring that

there is no connection between the two parts of the circuit for the rest of the working cycle.

U

RM

LM

D1

S1

VH

S2

D2

C

rc

Figure 3.1 - Equivalent circuit during the current boost phase. The IGBT and the Diode should be OFF during this phase.

During this phase, considering that the main IGBT is not conducting, the currents and voltages in the

circuit are [3]:

(3.1)

(3.2)

17

(3.3)

The boosting capacitor must be designed in order to store enough energy to boost the current

to Imax in a very short period of time. The electrical energy that can be stored in a capacitor is

computed as:

(3.4)

The energy needed to boost the current in the magnet is given by:

(3.5)

Figure 3.2 - Graphic representation of how the energy for the rise of the current can be calculated.

The maximum output power, , is known:

(3.6)

Which has the value of 5kW. is the boosting period in which the current rises, and is chosen

to be as small as possible, taking into account the capacitor size and the peak current that flows

through the switch of the boosting circuit. Anyway, in the NMR relaxometry, these times are usually

smaller than 5ms, so it will be assumed a rise time of about 4ms [1]. Then, the energy to be stored in

the capacitor is: = 10J.

Imax

Δt

IM (A)

t (ms) Imin

18

Thus, the capacitance of the boosting capacitor is computed as:

(3.7)

And the result is 80µF. This Capacitance value is for now, a reference, but as it will be seen, for

the 4Q Chopper, it will have to suffer an adjustment. The capacitor must also have a resistor in series

as protection from voltage peaks. A small resistor, rc = 0.5Ω is sufficient. So, the boosting circuit is

composed by the high voltage source, in parallel with the RC circuit, in parallel with the buck

converter.

3.2. Control

The control system is also very similar as used in the simple Buck converter. The same PI

controller is used to command the switch in the main circuit, as the load current waveform’s shape is

not changed, while there is some additional control logic for the switch of the boosting circuit.

The turning on and off of the second switch (again an IGBT) is controlled by a Flip-Flop and a

couple of electronic logical blocks.[15] The method for commanding the switching IGBT is based on a

feedback principle just like in linear control, using the reference signal as well as the error. In the boost

phase, it is detected the rising edge of the reference, activating the flip-flop and closing the switch for

the boosting circuit. When the current in the load reaches Imax, its value is equal to the reference

signal, thus, the error signal is zero. Then, using a zero-detector block in the error, it is possible to

reset the Flip-Flop, and consequently turning off the IGBT, when the current hits the peak value. With

this principle it is also assured that the boosting circuit is disconnected from the rest of the converter in

the remaining of the working cycle, as the switch will only turn on again when a rising edge is detected

in the reference.

3.3. Results

A schematic in simulation environment of the complete converter with the boosting circuit and

both control systems in closed loop is shown above, in Figure 3.3. Inside the “Controller” block is the

circuit that corresponds the model of Figure 2.3, and inside the “Converter” block is the circuit

presented in Figure 3.1.

19

Figure 3.3 - Simulation circuit of the Buck Converter including the boosting circuit and the linear and logical control systems.

What is obtained from the simulation is closer to the expected but still not satisfactory. It is

possible to see that the rise time is now very short, as it is boosted by a high voltage power source.

However, the fall of the current is still too long, as it was not affected by the changes made for this

converter. To make it fall very quickly, i.e., to dissipate the energy in the magnet in a very short time,

the procedure will be similar to what has been done here, as it will be explained in the next chapter.

Another issue is that the current does not even reach the minimum value, 0A, as it takes too long to

fall.

The values registered in the simulation were of about 3.5ms for the rise time of the current and

5.5mA for the ripple of the current in the steady state ( = ). These are already good results for a

simple buck converter with a basic power-up system.

Figure 3.4 - Magnet current using the Buck Converter with the boosting capacitor. The rise time is under 4ms.

There are other issues that need to be studied, like the non-linearity of the load, which suffers

from hysteresis effect. This causes the current not to follow exactly as demanded by the reference

signal, and more specifically, makes it not reach the zero value (0A). To compensate this effect, a

magnetic field with the opposite sense needs to be applied at the magnet, or in other words, a

negative current (considering positive the current supplied by the converter). There are several ways

ContinuousIdeal Switch

powergui

S

R

Q

!Q

S-R

Flip-Flop

Reference Signal

Edge Detector

Uc2

Uc

IM

Converter

Iref

IM

Ue

Uc

Controller

<= 0

Compare

To Zero

20

of doing this, like adding another coil that supplies a magnetic field with the opposite modulus, but the

way treated in this documented is by the use of a power converter, namely a 4-Q Chopper that can

supply positive and negative currents and voltages. The principles of working were explained here,

and some of the elements presented until now are going to be used, like the PI controller, and the

boosting circuit. The last one will be used, not only to help the current rise quickly, but also to make it

fall rapidly, ideally, using the same current to charge back the boosting capacitor.

21

4. Circuit 3 – 4Q Converter

To describe the final circuit proposed for the power source of a FFC-NMR relaxometer with

magnetic field compensation, first it was introduced the simple converters that do the specified

functions of current waveform on the magnet, and the rapid boosting of the current. One of the

remaining problems is the hysteresis effect that occurs on the magnet and generates a permanent

reminiscent current. Of course this interferes with the desirable results, because it is not possible to

reach zero current value (0A) on the load, which is an important requirement of the FFC-NMR

technology. Several solutions have already been implemented before, namely the inclusion of an

additional winding that introduces a magnetic field with opposite sense of the one created by the

converter. But the challenge proposed is to implement a converter that can work with both positive and

negative currents and voltages, i.e. a four quadrant chopper.

The principle is changing the range of values of the load current from [0, Imax] to [-Iα, Imax], so that

the real magnetic field values registered are on the interval [0, Bmax]. To do that, the converter must

supply current in the stages of positive values of B, and put negative current on the load (or absorb the

current, in other words) at the stages of zero field, and at the fall stages. Before talking about the

converter itself and its characteristics, it is important to define some concepts about the cycle of work

used for the project and simulation of the converter. There can be a variety of cycles used for NMR

relaxometry, here the reference will be the cycle described in the scientific paper “Field-cycling NMR

relaxometry” by Rainer Kimmich and Esteban Anoardo, published in February, the 2nd

, 2004 [1]. The

typical cycle, later in this documented referred as regular cycle, consists in a polarization stage, of

intermediate magnetic field value (Bmiddle), followed by the relaxation stage, with a, preferably, null

magnetic field (Bmin), and finally, the detection stage, with the maximum magnetic field value (Bmax).

Typically, the polarization and relaxation stages have equal duration, about 40% of the period each,

and the detection stage is shorter, with about 20% of the period, T. The real work cycle of the current

in the magnet must be as similar as possible with this theoretical cycle, but in practice what really

happens is that the rises and falls of the current also turn to be stages, as they have non-negligible

durations. So the description of the typical cycle of FFC-NMR is [3]:

o Stage 1 – Boost-down transition #1 from the maximum current steady-state, to the middle

current stage or, if it is the beginning of the cycle, the transition is positive, from zero from

middle current;

o Stage 2 – Steady current state, with an intermediate value, Imiddle, which corresponds to the

polarization phase of the FFC NMR cycle;

o Stage 3 – Boost-down transition #2 from the middle current level to the low level (Imin);

o Stage 4 – Steady stage, with the current at its minimum value, Imin. This stage is the relaxation

stage of the NMR cycle;

o Stage 5 – Boost-up transition, from the middle stage, to the high level of current;

22

o Stage 6 – The stage of high level constant current, it is relative to the detection phase of the

FFC NMR cycle;

Figure 4.1 - Current in the magnet – Reference vs the real waveform. The scale is in milliseconds, and the duration is a period of work, T = 100ms.

To implement this function, the topology chosen for the converter is a half-bridge 4Q Chopper.

This converter is sufficient to perform this type of function, and uses only two semiconductor devices,

instead of four, if a full-bridge chopper was used. The advantages are: it has less power losses and

occupies less space. However this topology needs to use two power sources, in this case, as the

feeding is done through the grid, the sources will be a transformer that will need to be able to feed two

parallel circuits [11].

Additionally the power source will have the circuit for the boost-up and boost-down transitions.

This, as seen before consist in a capacitor charged by a high voltage source, and connected to the

load, by a pair of semiconductors that have opposite functions, and conduct alternately at rise, or fall

transitions. Also, there will be used a RC filter in parallel with the magnet, that will help increasing the

speed of the transitions, making them more smooth, and reducing the peaks of the current. Besides

the filter, there shall be another switch in that branch, that should open in the phase of the rise of the

current, in order to prevent the boosting capacitor from sending high amounts of current to the filter’s

capacitor and resistor. The semiconductors are defined from now on as S1 to S5 for the IGBT with

diodes in anti-parallel, D1 to D4 for the other diodes. The diodes D1 and D2 are put in series with S1 and

S2 respectively to force the flow of the current in the desired sense, just the same as with D3 and D4. A

simple representation of the circuit for the FFC NMR power source using the 4Q converter as well as

the boosting up/down circuit may be seen below, in Figure 4.2. The referred semiconductors are also

represented accordingly in Figure 4.2.

0

2

4

6

8

10

12

1

4

7

10

13

16

19

22

25

28

31

34

37

40

43

46

49

52

55

58

61

64

67

70

73

76

79

82

85

88

91

94

97

10

0

Cu

rre

nt

(A)

Iref

IM

t (ms)

23

S1

S2

U

U

R RM

LMC0

S3

S4

D1

D3

D2

D4

VH

rc

C

Figure 4.2 - Conceptual circuit for the FFC NMR reversible current supply, based on a Four-Quadrant converter.

4.1. Circuit Operation

Now that the main idea for the circuit is explained, as well as the working cycle, the phases of

the cycle, and the semiconductors that actuate in the converter, it is time to describe the way it works,

and the evolution of voltages and currents along the cycle. Another useful tool is the equivalent circuits

of the converter for each stage of the working cycle. This helps to understand the goal of each

semiconductor specifically, and the general operation of the converter, as to what happens along the

period.

Starting with the definition of a set of state variables, Γ = { , ,…, }. Each state variable, is

a binary variable (can assume values 0 or 1), and represent the state of a switch. So, is associated

with the semiconductor Si. The formal description is, for [2]:

(4.1)

Starting with the middle stage (2nd

), which has the same behavior in terms of commutation of

the switches, of the high phase (6th), in this stage only the switch S1 turns ON and OFF repeatedly in

order to maintain the current level in the magnet. Additionally, it also charges the filtering capacitor, C0.

When S1 turns OFF, it is the capacitor that sends current to the load. The semiconductor S5 is

always ON, though it does not always have current flowing through it, as the current of the capacitor,

24

, is related to state of S1 in the middle and High stages, and related to both S1 and S2 states during

the Low stage. In the following representations of the equivalent circuits for each stage, the

semiconductor S5 is not represented, because it is always ON (equivalent to a short-circuit), except for

the Rise stage, where the branch of the filter is not represented, as it is disconnected.[2]

This processes that occur during the Middle and High stages are described as:

Middle/High stage:

(4.2)

(4.3)

This last equation is valid for all of the stages, except for the rise stage.

(4.4)

(4.5)

Where the voltage across S1 when it is not conducting, , is equal to the relation of the

variation of the current on the filter and its resistance, :

(4.61)

The voltage across the semiconductor S2, , is just equal to , as it never participates in this

stage of the cycle.

Figure 4.3 - Model for the equivalent circuit of the high or middle level of steady-state current on the magnet.

25

In the transitions, only switches S3 or S4 conduct, depending if it is a rise or fall transition,

respectively, while switches S1 and S2 are ideally OFF. It may happen that these switches stay ON for

a very short period. This small interval corresponds to the time the control system takes to compute

the error signal and to send the turn-off order to the switches. In the case of a fall transition, the

auxiliary switch, S5 is still on conduction, thus, it sends current back to the boosting capacitor, and

helps its recharging. The boosting capacitor shall be bigger than needed, i.e. should have a higher

capacitance value than the value needed for the boost current, so it should be able to take the

recharging current from both the magnet and the RC filter.

Fall Transition:

(4.7)

Thus,

(4.8)

(4.9)

Also, during the transitions, the voltage across the magnet can be described as [3][11]:

(4.10)

(4.11)

This phase is also when S2 has the highest voltage applied to it, while the voltage at S1 is nearly

null. This is a relevant fact as this is the maximum voltage that the semiconductor has to bear and

later, when the power losses are accounted, this value must be registered through the simulation, as it

is important, namely for the calculation of commutation power losses. Also, the choice of the

semiconductor to use must be based on characteristics like the maximum collector to emitter voltage.

(4.12)

26

Figure 4.4 - Equivalent circuit for the fall of the current stage. The high voltage source has inverted its polarity in this stage, so that the positive pole is referenced to the ground

In the low steady-state, both semiconductors of the main converter (S1 and S2) conduct alternately, to

maintain the current level on the magnet at 0A value. The capacitor C0 also aids, continually charging

and discharging. This is important in order to have a low variation of the desirable DC value, in this

case, a null value.

Low Stage:

(4.13)

(4.14)

IM should be as close as possible to zero, and S1 must be ON when S2 is OFF and vice-versa.

Also the auxiliary capacitor should help the voltage sources, i.e. supplying current to the load when S1

is ON and collecting current when S2 is active. Thus, the equation that describes this principle of

working is:

(4.15)

As for the voltage on the load, in this stage it is very simple, as it only varies between the two

power supplies, depending on which semiconductor is active:

(4.16)

27

Figure 4.5 - Equivalent circuit for the low current steady-state. S1 and S2 switch alternately

At the low-to-high transition, the behavior of the circuit is very similar to the complementary

operation. In this case, only S3 is at ON state. During this phase, the high voltage source discharges

rapidly to the load.

Rise Transition:

(4.17)

Unlike in the fall transition, here S5 is open, so the filter is not connected, and the magnet

current is directly the current received from the boosting capacitor. The currents are given by:

(4.18)

(4.19)

The voltages are just as described by equations (4.11) and (4.12). The voltage on switch S1

however, hits the top for this semiconductor at this stage. This is also important to take into account in

order to choose the semiconductor and to calculate power losses.

(4.20)

28

Figure 4.6 - Equivalent circuit for the rise of the current stage.

The last state of the cycle is the high steady-state, which has the same working principle of the

middle current stage, and obeys to the same equations, because the in both stages the main power

source has to supply the magnet with current, just enough to maintain it at a certain level. This control

is also made with the capacitor , which absorbs small values of current.

4.2. Component’s Sizing

There are a lot of features to the circuit that are described in other sections, like the feeding of

both the main converter and the boosting circuit, and the electronic circuit for the PI controller. Despite

the importance of the boosting capacitor, and the semiconductors, the first elements discussed are the

components of the filter. The capacitor ( ) provides, as said before, help to the main converter,

charging and discharging from/to the load, while the resistor reduces the sudden peaks of current that

appear in the semiconductors, especially in S3 and S4. The disadvantage is that the auxiliary high-

voltage source also charges and absorbs current from during the rise and fall stages of the period,

respectively. That is the reason why the IGBT S5 was added to the circuit. If the boosting capacitor

would send current to the filter and the magnet, that would mean a fair amount of energy and thus, a

high power source, that would definitely not be handy. The switch S5 will only open on the Rise phase,

as stated before, which mean the filter will still send current back to the boosting capacitor along with

the magnet, in the Fall phase. This, however, shall not be a problem, as the current should not be too

high, and the boosting capacitor is always a little oversized, so it handles the total current and uses it

to recharge itself.

So, the RC filter should be designed first than the rest of the components. While the boosting

capacitor is not dependent on the resistor of the filter, it should be able to retain the energy it releases.

29

Also, the resistor is proportional to the peak current of the semiconductors of the boosting circuit. The

filtering capacitor for a 4Q Converter that behaves as an inverter is given by [8]:

(4.21)

This calculation is made with values referred to the main 4Q Converter only, so is the feeding

voltage, is the period of the cycle, is the inductance of the magnet, while the maximum variation

of the voltage on the capacitor is twice the input voltage, . Based on this, the result is = 1.56mF

which is rounded to 2mF, the value to be used for the capacitor in the filter.

Before sizing the resistor, which is related to the maximum current that is going to flow through

the semiconductors, it should be addressed the sizing of the semiconductors, to have the reference for

the values of voltage and especially, the current that they should support.

With the equations previously written for the circuit operation, as well as the equivalent circuits

for each step, it is easy to throw a reasonably accurate, a priori, estimate of the maximum values of

voltage and current to be supported by the semiconductors. All this values are carefully calculated and

explained later, in the power losses section, in order to size the Heat Sinks. Those values, unlike

these, are obtained post-simulation. So, for S1 and S2, the maximum current, , will obviously be

equal to = 10A, at the steady-states of current. As for the voltages, the highest voltage applied to S1

is during the rise transition, as written in equation (4.21), and roughly equal to 532V. The maximum

voltage upon S2 is applied during the fall transition and is given similarly as , by equation

(4.12), and the result is the same as for S1, 532V (the converter is symmetric). Thus, the transistors to

the S1 and S2 switches can be 20A; 1200V IGBTs, already taking into account a reasonable margin.

As for S3 and S4, the maximum voltages should be equal to VH, when they are not conducting,

and the boosting circuit is open. As for the maximum currents, it depends on the resistor put in series

with . If no resistor is put, S3 and S4 suffer very high peaks of current, in the order of the kA, though

only for microseconds. Even so, it could do serious damage to the devices and is not admissible in

medium power electronic equipment like this. In this case, a compromise between the resistance of

the filter and the limit current of the switches must be achieved. Additionally, high currents would mean

a very high power from the source that feeds the boosting capacitor (should be a transformer). The

power source should not have higher power than the source used for the main circuit.

Without the switch S5, it would be very hard to have the same range used for S1 and S2, 20A,

because the currents during the Rise phase are always higher than the Fall phase, and it would

require a rather high resistance value for the filter, and this would cause very high voltage peaks on S1

and S2, that would, eventually lead to higher conduction losses. Anyway, the semiconductors should

be prepared to deal with these sudden, high peaks of voltage. Furthermore, S3 and S4 would always

have higher power losses in the case that S5 was not used. With this semiconductor, it is possible to

have S3 and S4 with 20A toleration, like the rest of the semiconductors.

30

That being stated, if we look at equation (4.11), and taking into account that the rise and fall

stages are the ones in which the maximum voltage is applied to the RC filter (equal to the voltage on

the magnet), the resistor is sized as:

(4.22)

Knowing that the maximum voltage on is =500V, the job is to carefully choose a value of

resistance that gives a reasonable maximum current value. For example, = 35Ω gives, a maximum

current of 14.3A, which is very acceptable, if we want to work with 20A semiconductors. This choice is

revealed to be very reasonable, after seeing the simulation results. Another way of looking to this

resistor, is the effect it has on the voltage of S1, when this semiconductor switches ON and OFF,

during the middle/high stages (eq. (4.7)). In fact it can relate the total variation of current on the filter,

when the switches commutates, to the voltage peak on S1, upon said commutations. As these

voltages never come close to the limit established (1200V), in part due to the application of protection

snubbers, this proves the validity of the choice for the value.

About the semiconductors, there is still another consideration to be added. The switches S1 to

S5 are blocks of IGBTs with anti-parallel diodes, as this is the commercial form of the IGBTs. Although

IGBTs have the ideal characteristics for a DC-DC with medium power and frequency range, in a 4-Q

Converter, and this kind of operation specifically however, the presence of the anti-parallel diode is

actually unwanted (except for S5, as the current often flows through its anti-parallel diode), as the main

goal is to use a certain switch to force the current to flow in a specific direction, not that it flows back to

the source. So, just as S3 and S4 have additional series diodes to force the current in one direction, the

same is implemented in the 4-Q Converter. Thus, in total, there are 5 IGBTs with anti-parallel diodes

(S1 to S5) and 4 diodes (D1 to D4). Each diode should have the same ratings in voltage and current as

the respective switch.

Table 1 – Circuit’s Components and its Characteristics.

Components Maximum Voltage (V) Maximum Current (A)

S1 to S5 1200 20

D1 to D4 1200 20

Finally, the sizing of the boosting capacitor is at range. As explained before, in the section

regarding the Boosting-capacitor Buck-Converter, this capacitor is calculated according to the energy

it must store and release to the magnet in order to raise rapidly the current. The equations used now

are the same (3.4) and (3.5), and the maximum power in the load is still 5kW anymore, but we must

add some tolerance because of the RC circuit. Ideally, it would be able to send a peak of 14.3A back

to the capacitor, for 2ms (duration of a fall transition). Therefore, the maximum energy is WCmax = 500V

x 14.3A x 2ms =14.3J.

31

Then, applying equation (3.7), the boosting capacitor is equal to C = (2 x 14.3J)/5002V =114µF,

which is rounded up to 200µF. Like the 2nd

circuit, a small resistor is added in series with this boosting

capacitor, because of the sudden peaks. This value goes unaltered, rc = 0.5Ω as it gives good results

in simulation, and doesn’t compromise the performance of the semiconductors or the capacitor.

4.3. Control

Most of the control system has already been planned and designed for the previous circuits,

though it might have some adjustments to the values of the gains, all the linear part is already

projected. What remains is to implement the linear control part, to command the switching of S3/S4

during the rise/fall periods respectively, as well as the command of the other switches during these

stages.

So, the parameters of the circuit that changed, are the cause of the alteration in the gains of the

PI controller. Mainly, there are two parameters that have been modified, by choice, and they are the

voltage sources, U, and the duration of the period, T.

The voltage needed for this converter is lower, as this source has not the same function as

before, which was to boost and absorb all the current on the magnet. Now it just provides enough

current to maintain it at the desirable, static value. Also, as in this topology there are two identical

voltage sources, the voltage in the load during some periods is 2 x U, which is almost the same as the

U used before. The exact value chosen, U = 32V is explained in the section about the power sources,

but in short its value is due to the transformer plus rectifier characteristics.

As to the period, it also changes from 400ms to 100ms, and the reason comes from the same

argument used for the voltage. Before, the period could not be too low because the semiconductors

did not have the time to boost the current from 0 level to maximum level, so, the waveform was

completely altered, in case a small period was used. Now, the boosting is achieved very quickly, and

the other semiconductors are not affected at all either, so a small period may be used. The choice for

this value is not particularly relevant for the FFC-NMR analysis and, in the converter, its only

repercussion is on the sizing of the power source for the boosting capacitor, the so called, high voltage

source, that is, in fact, a transformer, and whose power is dependent on the duration of the cycle, as it

will be explained in the Power source section.

Thus, for sizing the controller, with U =32V and T = 100ms and keeping all the other variables

equal, the parameters of the PI controller become: Kp = 62.5 (eq. (2.29)); Ki = 938 (eq. (2.30)), and Kw

= 0.016 (eq. (2.31)). There is still used the same retroactive loops with the saturation block with

interval [0, 1].

As for the logic control, the principle for commanding the switch responsible for the boost-up

(S3) has already been explained in the 2nd

circuit section, and the same is done with S4.[15] The

criterion for closing, or turn ON, S3 is detecting a rising edge on the reference signal, and for opening,

32

or turn OFF, is detecting when the error passes zero value and becomes negative. So for S4 is should

be the complementary operation. In fact, it should be turned ON when a falling edge is detected in the

reference, and should be turned OFF when the error signal reaches zero and become positive. Then,

S1 and S2 should be turned OFF during the rise and fall stages, or in other words, when S3 or S4 are

ON. So, S1 and S2 should only conduct when neither S3 nor S4 are ON, plus the signal that commands

them normally to turn ON or OFF (the linear controller). This logical function can be easily achieved

with some electronic logical circuits. First, the Flip-Flops from the control of S3 and S4 can be helpful

has they have a negated exit port. Using an AND block with three inputs, two for each of the negated

signals of the Flip-Flops, and the other for the signal from the PI controller, it is guaranteed that S1 is

only ON when S3 and S4 are OFF and the gate pulse is equal to 1. For S2 it is used the same logic,

with the same AND block and the same signals from the Flip-Flop, only the signal from the controller is

negated, because S1 and S2 gate signals must be complementary during the steady-states. For S5,

only the negated output of the rising-edge Flip-Flop is used, so that the semiconductor is always

conducting, except for when S3 is conducting. Notice that S3 does not always conduct through the

IGBT. It does receive and send current to the magnet, so it alternately conducts through the IGBT and

the anti-parallel diode.

4.3.1. PI Controller

The linear control system used for the converter includes not only a regular PI controller, but

has a limiter with an additional feedback loop, to guarantee that the signal never really reaches the

saturation limit Established in the limiter block). This control system can be achieved by a control

board like ARDUINO or a microcontroller, but it does not need such sophisticated technology. With the

aggregation of some simple amplifier blocks it is possible to achieve the type of PI controller needed

for this converter.

The controller circuit is composed by six OpAmp blocks: one Adder, two Subtractors, two

Inverting Amplifiers, one Integrator block, and a limiter or saturation block. The Adder and Subtractor

blocks are designed in order to have unitary gain, K0 = 1 (the resistors R1 to R9 have the same value)

[6]. To determine the values of the resistors that should be used on the remaining blocks, or rather the

relation of its values, it should be related to the gains used in the controller for the simulation.

33

Kp

Rp1

Rp2

KiK0

KwK0

R5

R6RI

R3

R1

R2

Rw2

R4Rw1

R7

R9

R10

R8

CI

ueK0

uc

Figure 4.7 - Schematic of the electronic circuit for the PI Controller system. ue represents the error signal, and uc the output

signal, to the gates of the IGBT’s.

For the Proportional Gain we have [6][10]:

(4.23)

The value of , as defined before, is 62.5. Hence, if

For the saturation feedback loop, there is also a gain associated, , that shall be called

“Saturation Gain”, and it is obtained in the same way as the proportional:

(4.24)

This gain has the value of 0.016. Similarly, if

For the integral gain, the in/out relation of the signal is given by [10]:

(4.25)

This kind of circuit has a time constant, = , which can be related to the gain of the

Amplifier, , as:

Saturation

34

(4.26)

As the value of the integral gain is set to 938, then, a possible solution is:

The value of is rounded down, for a more standard value, so . For the rest of the

blocks, the values of the resistors are not relevant, as long as they are chosen accordingly to maintain

the unitary gain of those blocks. The saturation block represents a limiter, a component that is

available commercially, and should allow passage of signals in the [0, 1] (V) range of voltage.

4.4. Simulation of the Non-linearity

The 4Q converter is used in order to counter the effect of magnetic saturation, which interferes with

the correct operation of the FFC-NMR cycle. The converter should be able to operate with negative

and positive voltages and currents, and that can be seen in simulation environment. However, before

implementing the real power system, the simulation should include all the real important features, in

order to have a realistic view on some aspects like the power losses. So, the circuit in the Simulink

should have not only the converter, but also some mechanism that simulates the effect of the

magnetic saturation. In practice, the simplest way to look at this is as a logical problem. The affected

stage of the cycle is the Down stage, where the current cannot reach the 0A value. Thus, it should be

designed a logical circuit that adds a negative current value during the Down stage, and does nothing

for the rest of the period. This circuit uses some principles already used before, in the control of S3 and

S4, like the use of a flip-flop, and edge detectors. The operation consists in injecting an extra signal in

the retroactive loop of the control system, specifically in the measurement of the current in the magnet.

The signal alternates between 0 and -2 and is constantly added to the measurement of the current.

The choice of these alternating values is done with a Switch block, which is activated through a Flip-

flop. This Flip-flop chooses the value 0 when a rise edge on the reference signal is detected. It stays

like this until a falling edge on the reference and a zero value on the reference are detected. It is

necessary to wait to both these two conditions to guarantee that the residual current is only added in

the down stage and not during the fall transitions or the middle phase. Once the Flip-Flop is turned off,

the switch chooses the second input which is the constant to be added. In the simulation the value

chosen for the offset current is 2A but this is only exemplificative (and purposely high), and other

values, or even other perturbation signals might be used and tested in the Simulink simulation. On the

real system it is important to know the value of the perturbation (or a mathematical model for it) in

order to establish the down value of the magnet current (Imin).

35

Figure 4.8 - Model for the simulation of the non-linearity of the magnet. The resulting current (IP) should be added to the current measured on the magnet.

4.5. Power Sources

The 4Q converter uses two kinds of power sources two feed the circuits: two 24V voltage

sources; and one 500V voltage source. For a DC-DC converter as this one, the supplied voltage

needs to be from a nearly DC source. As there are high voltages involved, and considering that the

application for this converter is a non-mobile device, we can obtain the needed power from the grid

using an adequate system to rectify and convert to the desired voltage levels. The chosen system is a

simple transformer plus a rectifying bridge composed of diodes, although for the 24V sources, a pack

of batteries could be used, which would spare the use of the rectifiers. If a more mobile version of the

relaxometer is to be built, Lithium Ion batteries might be used for the power source.

Grid

Transformer

Dr1 Dr3

Dr2 Dr4

Ca Load

Figure 4.9 - Schematic of the power feeding system for the converter.

Iref Ip

36

4.5.1 Main Circuit Supply

For the 32V sources of the main circuit there shall be only one transformer, with the secondary

divided in two sub windings, using a middle tape that allows the use of two identical voltage sources,

through the same power supply. The middle tape is connected to the ground reference, so this is ideal

for a 4Q converter such as this, as one of the windings on the secondary has the negative pole

connected to the ground and the other winding has the positive pole connected to the ground.

Naturally, two identical rectifiers are used, one for each of the voltage sources. Also, each of the sub-

windings of the secondary operate separately and, according to the 4Q converter’s operation

principles, each of its voltage sources are mutually exclusive, i.e. they are never connected to the rest

of the circuit at the same time because if the two main switches would conduct simultaneously it would

cause a short circuit. Thus, the two windings of the secondary are never used at the same time. So,

the calculation of the power is done by the usual way, as if the transformer had only one secondary

winding.

The characteristics of the Transformer should be:

o 230:24 (V) ratio;

o = 500 VA;

o Middle tape, connected to the ground

The power is obtained by:

(4.27)

Using the parameters of the circuit, = 10 x 32 = 320VA. Adding some safety margin (≈40%)

we get 500VA, which is a standardized value for commercial transformers dealing with these voltages.

For the capacitor, the reasoning used is based in the equation of a current that passes through

a capacitor:

(4.28)

If the maximum average value of the current is used, the capacitance can be given by:

(4.29)

A representation of the principle of the rectifier’s operation is shown, below, where VRav should

be as close as possible to the DC value of the power source. The amplitude of the variation depends

on the value of the rectifier’s capacitor, which will be sized next.

37

Figure 4.10 - Symbolic representation of the rectifier’s resulting DC voltage. Period of the rectified ( ) wave becomes 10ms.

This capacitor must be sized in order to obtain the desired value of DC voltage to supply the

circuit. It all depends on how much the voltage should vary, how constant it is. As the peak value at

the secondary of the transformer is 24 x √2 = 33.9 V, if the variation of the voltage, , is of 10%, then

VRav = √2 x 24 x 0.95=32.2V.

The maximum average current is observed through the computational simulation, as the

average current supplied by one of the 30V sources in the worst situation, i.e. the type of work-cycle

where one of the power sources supplies the most current. Also, the period used in this case is in

respect to the power source, which is the 50Hz grid. In fact, as the rectifier is a full-bridge type, the

period of the rectified wave is half of the wave from the power grid, 10ms. Thus, the computation of

the capacitors for the voltage sources is: = (8.66 x 0.01)/(0.1 x 33.9) = 26mF.

4.5.2. Boosting Circuit Supply

For the high-voltage power source, it is also used a transformer with a different topology. Here

there is only one source, so a regular transformer is used with a rectifier bridge and an auxiliary

capacitor. The secondary of the transformer must be connected to the ground reference so that when

the boosting circuit is activated, the magnet is connected to the same reference point as the

transformer. Also, the rectifier bridge should only enable the flow of current in one sense, i.e. from the

transformer to the boosting capacitor, and isolate the feeding circuit from the capacitor in the stages

where the magnet current falls. This should be done so that the capacitor can recharge itself from the

load, and so the current flows in and out of the magnet to and from the boosting capacitor. Of course

this is only theoretical, as it is not possible to only charge the capacitor with the current from the load.

Anyway, the capacitor is connected, and charged by the grid in the other stages of the cycle.

VRav

IR (A)

t (ms)

30 20 10 0

38

The Transformer has the following characteristics:

o 230:400 (V) ratio;

o = 500 VA;

In this case, the power is obtained in a different way, as the main objective is to supply a certain

amount of energy, to the boost-capacitor, in a short period of time.

In a work cycle where there are two rises of the current in a period, that is, a cycle with a

detection time of 30% of the period and both the polarization and relaxation times of 35% of the

period, the time interval between the consecutive discharges of the capacitor is about 30ms. During

this interval, , the capacitor must be recharged, through the transformer, in order to be able to

supply the required energy again. Although the topology of the converter includes the option of the

capacitor being recharged by the load (and by the filtering capacitor), the power source should be

prepared to feed the boosting capacitor until it is fully charged, if needed. We know that a constant

voltage should be applied to the capacitor, equal to , and that it should receive a certain current, IT

during 30ms, in order to be at full charge, and ready to supply the load.

The power of the transformer is then defined by the relation of the energy that should be stored

in the boosting capacitor and the interval in which the capacitor should be recharged.

(4.30)

(4.31)

The energy the capacitor delivers to the magnet (in 4.3ms) has to be equal to the energy

received by the capacitor from the transformer (in =30ms). This value was obtained before in

equation (3.5), and is approximately 10.75J. From this point, the value of the current can be

computed, and is equal to 0.72A. Therefore, the power of the transformer (adding some margin)

should be about 500VA, the same as the low voltage transformer.

The sizing of the capacitors for the rectifier follows the same principle and the same equations

of the previous example. The voltage supplied should be as close to 500V as possible. With the 230 to

400 V transformer, if the DC value is 88% of the peak value, = √2 x 400 x 0.88 = 497.8V, the

maximum average value of the current supplied by the capacitor is 0.22A, and the total variation of the

voltage across it is 0.24 x U, then the capacitance should be given by equation (4.30) and is about

20µF.

4.6. Protection Snubbers

Snubbers are a part of the power electronics design, specifically part of the semiconductors

protection equipment. Besides, they are also usually implemented in order to improve the performance

39

of the semiconductors and the whole converters in general. There are a wide range of types of

snubbers and they can be used for several functions, such as [9]:

o Reduce overvoltages;

o Limit abrupt changes of voltages or currents (dI/dt ou dV/dt);

o Reduce Elecrtomagnetic Interference;

o Keep the semiconductor in the Safe Operating Area;

o Reduce power dissipation and power losses (switching);

In this case, the use of snubbers is mainly to protect the semiconductors of the sudden peaks of

voltage and current, making them more progressive and reducing their value, because when the

IGBTs turn on and off, there may occur peaks, which may affect the converter’s performance, increase

the switching losses, and may damage the devices.

The semiconductors that need the inclusion of the snubbers are the IGBTs (S1 to S4) and the

diodes (D1 to D4), from Figure 4.2. The chosen snubber type for these semiconductors will be the

simplest type, RC snubber with a diode, as it is sufficient to limit the quick rise of voltage levels, when

the semiconductors turn off, and the rise of currents, when they turn on. Additionally, there may be

added switching-aiding circuits, such as Zener diodes in parallel with the IGBTs. For sizing the RC

snubber, the following equations are used [7][9]:

(4.32)

And,

(4.33)

The parameters used are the voltage applied upon the switching off ( ), the average current

across the semiconductors ( ), the rise and fall times of the semiconductors ( and respectively),

and the minimum ON time interval during a period of commutation ( ) [9]. This time variable is,

naturally, not equal for all the semiconductors in the circuit. For those in the main Chopper (S1, S2, D1,

and D2) it is about 12.5µs and it is relative to the Down stage of the regular work cycle, because it is

the stage when S1 and S2 switch continuously between themselves rapidly, staying very little time at

the ON state. For semiconductors of the boosting circuit, (S3, S4, D3, and D4), they always stay ON for

at least about 2ms per period.

40

Ds

IGBT

Rs

Cs

Figure 4.11 - Representation of the protection Snubbers for an IGBT.

The resulting values for the capacitors and resistors, are, therefore, all different from each other,

as the different semiconductors deal with different peaks of voltage and different durations of the

stimulus. The semiconductors responsible for the positive currents have marginally larger capacitors

than the equivalent for negative currents, and smaller resistors. All the components and respective are

listed snubbers in the table above. Some of the values of capacitance are rounded up.

Table 2 - Protection Snubbers for all the Semiconductors.

Component Cs (pF) Rs (kΩ)

S1 1000 5.03

S2 75 56

S3 15 45.6x103

S4 25 27.2x103

S5 1000 7.06

D1 2.0 6.6

D2 75 56

D3 15 45.6x103

D4 25 27.2x103

4.7. Final Results

With all the tools, all the principles and equations established, the components sized, and all the

control loops designed, the conclusive circuit can finally be presented and simulated. The Simulink

model developed for simulation includes two high voltage sources, because without the transformer

and rectifier or without adding extra semiconductors, it is not possible to connect S3 an S4 to the same

boosting capacitor and make it switch the polarity on different parts of the same cycle. In a real circuit

however, there exists only one source, as explained, because the rectifier and the transformer are

41

referenced to the ground so, this problem does not exist. All the calculations are done considering the

real system.

4.7.1 Simulation Results

Figure 4.12 - Model of the complete circuit for the FFC-NMR power source.

The blocks included in the figure above contain the following circuits: “The 4Q Converter” block

is represented in Figure 4.2; Then “Non-Linearity” block contains the circuit of Figure 4.8; and the

Control System block, which features the combination of the control systems for all the switches, is

described below, in figure 4.13. The PI Controller block, inside Figure 4.13 contains the model already

presented and explained in this chapter and in chapter 1 (Figs. 2.3 and 4.7).

42

Figure 4.13 - Integrated Control System, which includes the PI Controller, and additional logical circuits.

The simulation of the converter was performed on Simulink environment, for a time equivalent

to three periods of operation, 300ms, and the specifications of the simulation are: the solver is

ode23tb, with relative tolerance of 1e-3, a variable step of time, with maximum step size fixed at 1e-5

seconds, and automatic minimum step size (defined by the solver for each case); the solver reset

method is robust, as it is indicated to solve circuits with a lot of nonlinearities like the equations

involving the semiconductors’ currents. The Jacobian Method Solver is also set to automatic, and the

number of minimum consecutive steps is defined as 1.

Figure 4.14 - Simulation result for the magnet current using the 4Q Converter.

The rising and fall times of the current and its behavior during these phases may be observed in

detail in the images above.

43

Figure 4.15 - Rise of the current from Low to High level. The total rise time is just above 4ms.

Figure 4.16 - Fall of the current form High to Middle level. Fall time is about 2ms.

Figure 4.17 - Fall of the current from Middle to Low level. Fall time just above 2ms.

Now, the converter can implement a cycle that takes only about 4.3ms to rise from -2 to 10A,

and about 2ms to each half fall. The fall from middle to low takes a little more because the converter

actually makes the current fall to -2A, but due to the non-linearity sub-system present in the simulation

it only goes to 0A, as expected. This takes a little more time because of the control system has to

“read” the values and react to it, and to the non-linearity block.

44

Another detail that should be observed more carefully is the flicker of the current during the

steady-states. Not only should the current have little variation around the DC point, but that stable

point should be as close as possible to the goal value (accuracy of the system).

Figure 4.18 - Flicker of the High steady-state of the current. The variation is always lower than 1mA.

Figure 4.19 - Flicker of the Middle steady-state of the current. The maximum variation is about 3.5mA.

Figure 4.20 - Flicker of the Low steady-state of the current. The variation is always lower than 1mA.

The variation of the DC value of the current, also called flicker, observed in the simulation has

substantially low values: both in the Low and High stages the variation is less than 1mA, which is more

than 10000 times lower than the total variation of the current on the magnet; the middle stage has a

45

variation that is not totally uniform but can reach 3.5mA. Still this is a very tiny variation that is not

noticed in the operation, and is generally very acceptable for the FFC-NMR relaxometry. About the low

stage, the current does not actually reach the zero value but it slowly approaches it. The reason this

happens has to do with the compensation of the PI controller, and the saturation block, that never lets

the current reach that value. When it actually reaches (or passes it) the error becomes positive (as the

current becomes negative), so the boost-up is activated. Thus, this detail is related with the simulation

and should not happen in the real magnet, though the offset is only reaches 1mA, and a low value

such as this might not cause any problems in most applications if it really happened.

4.7.2. Sensitivity Tests

To test if better results can be achieved, through simulation, there can be performed some

tests. The part of the circuit that can suffer variations without altering much of the circuit’s performance

is the control system, namely, the PI controller. A variation of the values of the gains may lead to

slightly better results in some cases, and it also shows the vulnerability of the circuit to perturbations.

This test is called a sensibility test, and it is a very common practice in electronic sensors and control

systems. It consists in varying the input signal, also called stimulus, in a certain range, and watching

the variation of the output signal. In this case, it is not the input signal that suffers variations but the

controller itself. Varying in turns the proportional gain (Kp), the integral gain (Ki), and the saturation

gain (Kw), it is observed the variation in the magnet current, especially in some important parameters,

like the DC value, the Ripple, the Overshoot of the current and, of course, the speed of the boost of

the current.

The reasoning used for the proportional and the integral gains is to use as reference the value

obtained by calculations, and used in the previous simulations, and from there, multiplying and

dividing by a certain constant factor (it is chosen 10 in this case), leaving the values of the other gains

unchanged.

The results are not always very clear, for example, in some cases the waveform is deeply

deformed, and the current on the steady stages do not tend to any constant value or, sometimes, it

tends to a value but never reaches it, before the rise/fall pulse comes. In these cases, the DC value is

identified as N/A. Also, the deformation of the wave earned several classifications, from not affected to

most modified: No; Light; Some; Strong. As for the ripple, in some cases the wave does not have any

temporal variation visible in the simulation or it is too small. In those cases, as the scale for the ripple

is set to mA, the minimum registered is half of it, 0.5mA.

46

Table 3 - System’s Response to Variation of the Proportional Gain (Kp)

Speed/Deformation Stage DC Value (A) Overshoot (A) Ripple (mA)

Kp =0.0625 Rise time =4.2ms;

Def.: Strong

High N/A (>10.1) 0 <0.5

Middle N/A 1.15 <0.5

Low N/A 1.24 <0.5

Kp =0.625 Rise time =4.1ms;

Def.: Strong

High N/A (>10.1) 0 <0.5

Middle 5 1.06 4

Low N/A (~0) 1.12 <0.5

Kp = 6.25 Rise time =4.2ms;

Def.: Some

High 10.1 0 <0.5

Middle 5 0.7 3

Low 0 0.52 1.5

Kp = 62.5 Rise time =4.2ms;

Def.: No

High 10 0.037 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Kp = 625 Rise time =4.4ms;

Def.: Light

High 9.67 0.4 2.5

Middle 4.75 0.02 4

Low 0.17 0.003 1.5

Kp = 6250

Rise time =4.5ms;

Def.: Light

High 9.55 0.5 3

Middle 4.64 0.015 4.5

Low 0.3 0.002 2

Kp = 62500

Rise time = 4.5ms;

Def.: Light

High 9.56 0.5 3

Middle 4.63 0.015 3.5

Low 0.29 0.002 2

After observing the results of the simulations with a variety of values for the proportional gain, it

is possible to conclude that this gain should always have high values, as the result of using Kp <1 is

the strong deformation of the wave, which defies the purpose of the FFC-NMR technique, even if the

rise times are smaller, because the major goal is to have stable values of the magnetic field during a

certain period of time. With very high values, the results are not terrible but they are certainly worse

than using the standard value, which is proved to be, in this experiment, the best option. The same

might not occur in the following experiments though. The proportional gain is a value that must be

treated carefully; otherwise the state variable (the current in this case) might “explode”, or simply not

comply with the desirable waveform.

47

Table 4 - System’s Response to the Variation of the Integral Gain, Ki.

Speed/Deformation Stage DC Value (A) Overshoot (A) Ripple (mA)

Ki =0.938 Rise time =4.2ms;

Def.: No

High 10 0.032 <0.5

Middle 5 0.025 3.5

Low 0 0.03 <0.5

Ki = 9.38 Rise time =4.2ms;

Def.: No

High 10 0.04 <0.5

Middle 5 0.025 3.5

Low 0 0.035 1

Ki = 93.8 Rise time =4.2ms;

Def.: No

High 10 0.04 <0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Ki = 938 Rise time =4.2ms;

Def.: No

High 10 0.037 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Ki = 9 380 Rise time =4.2ms;

Def.: No

High 10 0.03 <0.5

Middle 5 0.03 3.5

Low 0 0.03 <0.5

Ki = 93 800 Rise time =4.2ms;

Def.: Light

High 10 0.02 <0.5

Middle 5 0.04 3.5

Low 0 0.02 <0.5

Ki = 938 000 Rise time =4.2ms;

Def.: Light

High 10 0.012 3.5

Middle 5 0.008 3.5

Low 0 0.008 1.5

The effect of the variation of this gain is, as it can be seen, very scarce, which means the

system is not very sensitive towards this gain. There are no effect on the speed of the boost of the

current, and the waveform is only affected, even if lightly, with very high values of Ki. As for the other

parameters, the ripple is actually lower with some higher values, and also for all the smaller values

used in the experiment; and the overshoot is also a bit lower with all the other values tried. With the

highest value used, the overshoot is actually very small, even if the ripple is then bigger when it

reaches the DC value, and the waveform suffers some deformation. From these results, it seems that

using some other values for Ki might be better for the system, especially with very small values.

For the variation of Kw, the criterion for the range of variation is different. This gain should be

comprised between the 1/Kp< Kw <Ki/Kp, which, considering the original values of the proportional and

the integral gain, is equivalent to the interval [0.016, 15.008]. So it only makes sense to use values of

Kw inside that range. Supposedly, any value in this range could be used, so the goal of this study is to

check the veracity of this rule in this case.

48

Table 5 - System’s Response to the Variation of the Saturation Gain, Kw.

Speed/Deformation Stage DC Value (A) Overshoot (A) Ripple (mA)

Kw = 0.016 Rise time =4.2ms;

Def.: No

High 10 0.037 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Kw = 0.16 Rise time =~5ms;

Def.: Strong

High N/A (>8.6) 1.6 1

Middle N/A (>4.5) 0.02 3

Low N/A (<0.1) 0.2 2

Kw = 1.6 Rise time =~5ms;

Def.: Strong

High N/A (>9.2) 1 2

Middle 5.1 0.15 3

Low N/A (<0.2) 0.3 1.5

Kw = 15 Rise time =4.2ms;

Def.: Light

High N/A (~9.435 0.15 1

Middle N/A (~5.05) 0.04 3.5

Low N/A (~0.05) 0.035 1.5

As expected, the system is very sensitive to this gain, and the choice of using the lowest

possible value (admissible by its rule) proves to be a reasonable option, as the increments lead to high

destabilization of the state variable, the magnet current. All the values, other than the standard, used

in this experiment, led to waveforms without stages of steady current and large overshoot values as

well as higher rise times of the current. The highest value on the interval, Kw = 15, which comes from

the condition Kw<Kp/Ki, leads to a waveform that, even if it has no stable stages, the current tend to a

certain value, on those stages. The deformation is also much lighter, as well as the overshoot. Still, it

is clear that, in this case, the minimum value is by far the best option for the stability and speed of the

magnet current.

Another experiment that could be useful is the variation of the entire set of gains in the same

proportion. For that, both the proportional and the integral gain should be multiplied by the same

constant, while the saturation gain should be divided by that constant, in order to keep by the rule, and

on the interval imposed for that gain. In varying the whole set the system should not be too disturbed,

because it is only a question of scale and, recalling equation (2.17) in chapter 2, this variation could be

interpreted as the variation of the incremental gain of the modulator of the controller. Though it is not

expected to observe great deformations of the waveform, some alterations on the performance of the

circuit are to be expected.

49

Table 6 - System’s Response to the Variation of the Entire Set of Gains.

Speed/Deformation Stage DC Value (A) Overshoot (A) Ripple (mA)

Ki = 9.38

Kp = 0.625

Kw = 1.6

Rise time =4.2ms;

Def.: Light

High N/A (~10.1) 0 0.1

Middle N/A (~5.05) 0.13 3.5

Low N/A (~0.05) 0.08 1

Ki = 93.8

Kp = 6.25

Kw = 0.16

Rise time =4.2ms;

Def.: No

High 10.01 0.4 0.5

Middle 5.005 0.045 3.5

Low 0.004 0.035 1

Ki = 938

Kp = 62.5

Kw = 0.016

Rise time =4.2ms;

Def.: No

High 10 0.037 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Ki = 9 380

Kp = 625

Kw = 1.6e-3

Rise time =4.2ms;

Def.: No

High 10 0.037 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

Ki = 9 3800

Kp = 6250

Kw = 0.16e-3

Rise time =4.2ms;

Def.: No

High 10 0.03 0.5

Middle 5 0.04 3.5

Low 0 0.035 1

The results of this experiment show that, when the whole set of gains is changed at once, the

system holds for mostly all of its characteristics. Even with very high gains (very small for Kw), all the

parameters suffer very small changes. With small values (very high for Kw), there is some distortion on

the waveform, and the steady-stages are not much stable anymore. Nonetheless, the conclusion for

this experiment is that, if for some reason the some gain should be changed, the best option is to

change the whole set (except if it is the integral gain for the reasons already stated), as the system’s

performance will probably hold up very well.

50

5. Power Losses and Heat Dissipation

Power converters that deal with values of voltage and currents such as this have a

considerable amount of power losses. These losses are dissipated in the form of heat, but for a power

source enclosed in a box, the accumulated heat will cause overheating, which can lead to serious

damage to the circuit’s components. So it is of high importance to deal with this problem and

incorporate components in the circuit that help the convection of heat. Besides, it is important to make

an estimate of the different power losses for different work cycles, in order to know which semi-

conductors are more used, or less used, or more pushed to their limits of voltage or current.

The power losses that need to be studied, for heat dissipation control purposes, are the losses

of the semiconductor switches, diodes and IGBT’s. The different types of losses in these devices are:

conduction losses, commutation or switching losses, and Joule losses. These power losses depend

on a variety of factors and variables such as: the work cycle of the current on the magnet; the duration

of the cycle; the filter; the boosting capacitor; the specifications of the semiconductors.

To calculate the losses, it will be used the worst case scenario. So, for each semiconductor,

the highest losses will be calculated, i.e., the kind of operation that leads to the highest losses need to

be identified for each of the semiconductors. Because, even though the main converter has a

symmetric topology, usually, in the majority of the work cycles, the semiconductors do not have a

symmetric behaviour. In fact, as the RC filter also absorbs current from the magnet in some modes,

the switches that supply current to the magnet (S1 and D1) actually switch more and conduct during

more time than S2 and D2.

5.1. Semiconductor Losses

First, it should be defined four kinds of magnetic field operating cycles, which represent the

regular work cycle (regular cycle), used for the simulations presented in this document; a inverse cycle

(inv cycle) that starts with the highest level of current, at the polarization phase, and has the

intermediate level of current at the detection phase; the cycle with highest levels of current and highest

average current (max cycle), and the cycle with lowest levels of current, and lowest average current

(min cycle). The max cycle is used to calculate the losses of the switches S1, S5 and D1, as it should

be the worst case possible for these switches. The min cycle is for the calculation of the losses of S2

and D2. The regular sequence and the reverse sequence should represent the highest losses for the

switches of the boosting circuit (S4, D4, and S3 and D3, respectively). The cycles are presented in

terms of magnetic flux density (B), with a relation with the magnet current of 1/25.

51

Figure 5.1 - Types of Magnetic Work Cycles - From top to bottom and from left to right: Regular Cycle, B level and fraction of the period: Polarization – 0.2T, 40%T; Relaxation – 0T, 40%T; Detection – 0.4T, 20%T. Inverse Cycle: Polarization – 0.4T, 35%T; Relaxation – 0T, 35%T; Detection – 0.2T, 30%T. Maximum Cycle: Polarization – 0.4T, 40%T; Relaxation – 0.2T, 20%T;

Detection – 0.4T, 40%T. Minimum Cycle: Polarization/Detection – 0.4T, 20%T; Relaxation – 0T, 80%T;

The three kinds of power losses calculated using the commonly known equations for power

converters [3][8][9]:

o Conduction Losses

(5.1)

For the i-th IGBT, and

(5.2)

For the i-th Diode.

These losses are accounted in the phases where the semiconductors are ON, over an entire

period. For that, it is needed to use the average value of the current through it, and the voltage applied

to the semiconductor, when active, which is a standard value.

o Joule Losses

(5.3)

For the i-th IGBT, and

(5.4)

For the i-th Diode.

52

All the semiconductors chosen for the converter have very small values of internal resistance,

in the order of the mΩ. This means that the Joule losses per semiconductor are very small (<<1W)

and represent an insignificant part of the total losses. For that reason, they are disregarded in this

study, and the calculations for their values are not present. If larger semiconductors are used, with

higher voltage support, they could have higher internal resistance values, and the Joule losses might

become relevant, but not for the devices used here. Nonetheless the Joule losses on the magnet will

be calculated, only to have an estimate on the total losses.

o Switching Losses

(5.5)

For the i-th IGBT.

Usually, the Switching losses are only calculated for semiconductors like IGBTs or MOSFETs,

because they have measurable rise and fall times, in which is possible to account some losses. On

the other hand, diodes switch too fast, so it is easy to assume that only the conduction losses are

relevant, (Di)>> (Di).

These losses represent the power spent to turn the devices ON and OFF, so the currents and

voltages are the maximum values applied to them. The constants and refer to the values,

established for each semiconductor, of rise time and fall time of the current, respectively.

All the values of forward voltages or collector-emitter voltages, as well as the rise and fall

times of the IGBTs used for the calculations, come from datasheets of commercial semiconductors

with characteristics similar to the ones used in simulation.

Addressing the calculation of the total losses to each of the semiconductors at a time, if we

start with S1 and D1, and use the Max Cycle to calculate the power losses, it is possible to obtain the

maximum losses for these switches. Looking at the simulation, it can be seen the different switching

and conduction behaviours through the period.

For the conduction losses, it is easy to obtain the voltages from the datasheets, the trick is

calculating the average value of the currents through these semiconductor, for even when they are

conducting, it is not continuous current. Through the simulation, it can be seen the two different modes

of conduction, at 10.4A (IS1max) and at about 5.65A (IS1middle). Although it is not visible in the image, in

the high level, the switch is ON approximately 100% of the time, because it switches on and off very

fast, so the down time is irrelevant. On the middle level, the switch is ON approximately 80% of the

time.

53

Figure 5.2 - Current on S1 and D1, using the Max Cycle.

This way, the average current in S1 and D1 is calculated by:

(5.6)

The period is, as usual, 100ms, and the result is 8.91A. Using this value and the voltages VCEsat

and VF for S1 and D1, the conduction losses are: 15.58W for D1 and 14.69W for S1.

The switching losses, given by equation (5.6), use the maximum current value at each switch

of the IGBT, and the maximum value of voltage that is applied, before the switching. On S1 and S2, the

maximum applied voltage is VH+U = 532V. While on the diodes, D1 and D2, the maximum voltage

across them is approximately –VH+U = -468V. It is needed to calculate the power of one commutation

during a period of commutation (Ts), then multiplying it for the interval during which the device switches

on and off continuously (defined now as Δt1), and finally dividing for the period of the cycle, . For S1 it

can be computed as:

(5.7)

The switching frequency of these semiconductors is 60µs. This equation leads to a result of

2.61W for the switching losses of S1.

For the calculation of the losses on the semiconductors responsible for the negative voltage of

the main circuit, S2 and D2, the work cycle used is the Min Cycle, as the switch S2 is only used during

the Down stage of the period, so this is the kind of operation that pushes these devices to their limits.

The waveform of the current used for the calculation of Is2av is observed through the simulation

(Fig.5.3.). The switch only conducts during the Down state, and because of the filter, the current

t3 t1 t2 t4 T

54

absorbed from the magnet is not constant. For the calculations, it is assumed that this current, varies

almost linearly between a maximum value (0.65A) and a minimum value (0.1A). For simplicity, and as

it is not a big error of calculation, it is calculated the medium value of the current to the total average.

Also, it must be noted that during the Down stage, the only one where S2 conducts, S1 is still turning

ON and OFF, alternating with S2. Each of them has equal time ON, which is to say, that for the

average current of IS2, it must be multiplied by a factor of 0.5 as it only effectively conducts for half of

the total time of commutation (between and ).

Figure 5.3 - Current on S2 and D2, using the Min Cycle.

To calculate the conduction losses then, the same principles used for S1 are applied:

(5.8)

The average current in these semiconductors is 0.142A. Thus, the value for the conduction

losses are: 0.25W for D2 and 0.23W for S2. As for the switching losses:

(5.9)

The switching time of the transistor (Ts) is the same as S1. The conduction interval of iS2, , is

about 75ms. So, the switching losses for S2 are of 0.027W.

About the semiconductors that control the opening and closure of the boost up/down circuits,

they also have different losses from each other. This happens in account to the current injected on the

boost stage being different from the current collected to the boosting capacitor. The current collected

is not only from the magnet but also from the filtering capacitor, which releases a fair amount of

energy, in the form of current, because of the voltage applied to it. After some experimentation, it

came clear that the work cycle that led to the highest losses of these devices is the inverse cycle for

T

t1

55

S3 and D3, because it includes two rises of the current on the magnet, and the regular cycle for S4 and

D4, because it has two falls of the current.

Starting with S3 and D3, and running the simulation with the reverse work cycle, it is easier to

calculate the average current on these semiconductors, as they conduct continuously during a small

interval of time. There are two stages of conduction, which correspond to two stages of rising current.

The first rise has a higher value because the reference is not from 0A, but from -2A. So the current in

the load raises 7A in the first boost, and only 5A in the second one. During the two phases of

conduction, the value is not constant because of the filter’s capacitor that also needs to be charged.

The average peak value of the current on each case is calculated and the values are: 15A (IS3a) and

2.5A (IS3b).

Figure 5.4 - Current on S3 and D3, using the Inv Cycle.

So, for the conduction losses, it is needed the average current on the devices during the whole

period. The equation is similar to before:

(5.10)

The value of the maximum average current in D3 and S3 is 0.218A. According to the standard

VCE values, present in Datasheet of these semiconductors, the resulting conduction losses are equal to

0.38W for D3 and 0.36W for S3.

For the switching losses it is necessary to take into account the two commutations, and the

maximum voltage and current in the semiconductors, although the duration is not relevant, because

there is only one commutation at a time. Thus, the power associated to each commutation can be

calculated separately, and then summed.

(5.11)

t4 t3 t1 t2

56

The period, T, is the usual value for the period of the cycle and the maximum voltages across

this switch is VH. The value for the switching losses on S3 is, then, 0.004W.

As for S4 and D4, the work cycle used is the regular sequence used in most simulations on this

document, because it comprises two falls of current on the magnet in the same cycle. Again, there are

two stages of conduction from these semiconductors, related to the two falls of the current from the

magnet. One of the stages reaches a higher peak because of the negative reference of the current,

which translates into the hysteresis current that needs to be countered. The two peaks have average

values of 6.75 (IS4a) and 11.5 (IS4b).

Figure 5.5 - Current on S4 and D4, using the Regular Cycle.

The calculation of the average current during the entire period is similar to the previous case:

(5.12)

The maximum average for D4 and S4 is equal to 0.37A. Once again, using the appropriate

voltage values, the resulting conduction losses are: 0.64W for D4 and 0.6W for S4.

The same reasoning used for S3 will be used for calculating the switching losses of S4, as the

power associated to each of the two commutations can be calculated separately and then summed to

obtain the total switching losses of S4. Thus, the equation used is:

(5.13)

Once more, like in the last calculation, the maximum voltage applied on this device is VH. The

resulting losses have the value of 0,06W.

t4 t3 t2 t1

57

Finally, the auxiliary switch, S5 also has some significant dissipation as it is always at ON state,

except for the rise of the current stage. This means that this device conducts for about 96% of the

period, which leads it to have values of conduction losses that are very relevant. On the other hand,

the switching losses are almost inexistent. The filtering capacitor exchanges current with load in the

steady current stages, and usually the IGBT conducts alternately with S1 or S2, so the values of

current that passes through it are similar to those on S1 on the stages in which it conducts. The

simulation shows the current that flows out of the capacitor, so it is possible to see that this switch

delivers high portions of current to the load and even o the boosting capacitor, in the Down phase,

where it recharges.

Figure 5.6 - Current on the auxiliary IGBT, S5, when using the Max cycle.

The calculation of the average current on this semiconductor must take into account all the

different periods of conduction, and the variations of current. Like what was seen in S1’s simulation, it

is possible to define various stages of current here, namely, = -0.5A; = 14.7; and

which alternates between 5A ( ) and roughly -0.65A ( ), which are the values of the IS1 and

IS2, respectively, during the low steady-state. Let’s admit that, in that stage, the current is 5A for 80%

of the time and at 0.65 (absolute value) for 20% of the time that stage takes. Also, in the middle stage,

the current varies between 10A and approximately -0.5A. However, due to the high speed of

commutation and to the fact that the fraction of that stage in which the current is 10A is almost non-

existent, it is considered that it remains constant at the negative value of 0.5A. Also, this device works

in complement of S1, so as S1 is about 100% of that stage on conduction, this device must be 100% of

that time on inverse conduction. It should be noted, to avoid any redundancies that the maximum

current on this semiconductor, occurs during the fall stage of the magnet current. So the

average current on S5 is:

(5.14)

t1 t2 t3 t4

58

The result for this calculation is = 8.82A. The IGBT S5 is like the others present on this

converter, with maximum rated current 20A, so it has the same standard VCE values and turn on and

turn off times, etc. as the ones used before. Thus, the conduction losses have the value of 14.55W.

This is very close to the losses of S1, and the average current is also very similar. The difference is

that this semiconductor is not so exposed to the high voltages constantly, as S1. Still, this is the

semiconductor with second most conduction losses, so it definitely needs some heat dissipation, and

its losses are important to the total balance. The switching losses of this device may also be

calculated but, as it will be seen, they have really small values and represent nothing in the accounting

for the total losses.

As this semiconductor only switches once per period, the calculation is very straightforward.

The maximum voltage is applied during the fall stage, and has the value VH. The current is around

15A. T is the total period of the cycle.

(5.15)

Hence, = 0.004W, which is, evidently, an irrelevant power loss, equivalent to the Joule

losses on the semiconductors, which were not calculated. After all the calculations, the total losses for

each semiconductor can be computed and, thus, the Heat Sinks can be designed.

5.2. Joule Losses

Before addressing that topic, however, another interesting quantity to estimate is the power

losses due to Joule effect on the magnet’s internal resistance [3]. For that, the root mean square value

of the current on the magnet will have to be considered. Also, the chosen work cycle for this

calculation is the regular cycle. The is given as [8]:

(5.16)

Which, considering the five stages of the cycle is equivalent to:

(5.17)

The resulting value is 5.52A. Then, considering = 3Ω, the Joule losses are calculated by:

(5.18)

59

The result is 91.51W, which is a very significant part of the total power losses. And this is the

case when the regular cycle was used. The maximum Joule Losses on the magnet actually occur with

the Max Cycle, where the magnet has always current flowing, and is on the high level of current for

80% of the period. The calculation is done using the same principle just shown before, and the result

is = 170.6W. This type of cycle operation leads to maximum losses on S1, D1, S5, and the Joule

losses on the magnet, so it is the cycle with most losses, and that should not normally be used during

long periods of time.

5.3. Heat Sinks

The inclusion of heat sinks in a power electronics system is of the highest importance, as it is

vital to drain the heat out of the semiconductors case in order to maintain the device in its safe

operating area and preventing it from overheating and subsequent harmful consequences. Each of the

semiconductors of the converter should then have attached a heat sink designed specifically for it.

Here, only the calculation of the thermal resistance of the respective heat sink will be addresses but

other parameters, such as the dimension of the sink, have to be defined too, taking into account the

space available inside the box that contains the entire power source for the FFC system. The model

used for sizing the sink is based on heat conduction and convection, where each space of conduction

is represented by its thermal resistance. The model must contain the several possible conductive

surfaces of the semiconductor.

Generally it is considered the thermal resistances of the following parts: junction to case (jc);

case to sink (cs); sink to ambient (sa). With this, the model is equivalent to an electric circuit, only it

deals with temperature on each node, heat instead of electrical current, and each of the thermal

resistances are represented as “resistors”[9]. Between each of these resistors, it is defined the

temperature of that part (a node of the circuit). The circuit describes the desired heat draining since

the junction of the semiconductor to the ambient, as it is represented in the following figure.

Figure 5.7 - Representation of the thermal circuit for a semiconductor, and its heat sink. Tj – Temperature of the junction; Tc – Temperature of the case; Ts – Temperature of the sink; Ta – Ambient temperature; Rth(jc) – Junction-to-case thermal resistance; Rth(cs). [9]

There is a direct relation between the dissipated power of a device, the difference of

temperature between its core and the ambient, and its thermal resistance. This relation is a kind of an

equivalent Ohm law for heat propagation, and is described by the following equation [9]:

(5.19)

Tj Tc Ts Ta

60

Only the semiconductors need to have heat sinks, since their enclosure in cases is what

makes heating an issue. Resistors and capacitors dissipate their heat naturally through the air.

Furthermore, each semiconductor has its own established parameters, of maximum junction

temperature, and internal junction-to-case thermal resistance, accessible on their datasheets. As the

semiconductors have not all the same maximum currents and voltages, their thermal characteristics

are also different, so each will have a proper sink. For each calculation, the total power losses must be

taken into account. So, the parameter in equation (5.19) can be decomposed in the three

thermal resistances, referred in the thermal circuit. The of each semiconductor is known, so the

point is to calculate the remaining thermal resistances, for a certain power dissipation. These

resistances, and refer to the heat sink, so this are the parameters that need to be

calculated to size the sink. As the relation between the two of them is not known, it is assumed that

the thermal resistance of case-to-sink and sink-to-ambient are equal, and from now on defined as only

one resistance, . Therefore, the equation for the sink of the i-th semiconductor is:

(5.20)

As for the temperatures, it should be used the maximum junction temperature referred for

each device on its datasheet, and Ta is the ambient temperature, defined as 25ºC.

The total power losses of the worst case scenario for each semiconductor, thermal

characteristics and respective heat sink for each semiconductor are listed above.

Table 7 - Total Losses, Thermal Characteristics, and Heat Sinks.

Device Conduction Losses (W)

Switching Losses (W)

Total Losses (W)

Tjmax (ºC) Rth(jc)

(ºC/W) Rth(ca)

(ºC/W)

S1 14.25 10.4 24.64 150 0.42 4.7

S2 0.23 0.107 0.337 150 0.42 373

S3 0.35 0.015 0.365 150 0.42 343

S4 0.58 0.023 0.603 150 0.42 205

S5 8.36 0.016 8.376 150 0.42 14.5

D1 24.04 - 24.04 150 0.8 4.4

D2 0.38 - 0.38 150 0.8 325

D3 0.59 - 0.59 150 0.8 212

D4 0.99 - 0.99 150 0.8 126

61

A statistic study may be done regarding the losses, making some comparisons, for example:

in a regular cycle, what is the percentage of losses on the Magnet and on the Diodes or the IGBTs?

Also, the losses on each stage may be accounted for the magnet and for the conduction losses of the

semiconductors.[3]

Figure 5.8 - Distribution of the Losses by the semiconductors and the magnet, during a regular period cycle.

As expected, the magnet has far superior power loss values, as there is current on it for

almost the whole period of operation, unlike the semiconductors. The semiconductors are grouped in

pairs Si/Di because they both conduct at the same time, and both conduction losses are accounted.

Figure 5.9 - Distribution of the losses by each stage, during a regular period cycle, for the semiconductors and for the magnet.

For this comparison, only the conduction losses on the semiconductors were considered. As

expected, the middle and high phases are those with higher heat dissipation, both by the

semiconductors and on the magnet. Note that though there are higher levels of current during the High

stage, the Middle stage has twice the duration than the High stage, hence it has higher conduction

losses than during the High stage.

82%

11%

0% 1% 3% 3%

Conduction and Joule Losses

Magnet

S1/D1

S2/D2

S3/D3

S4/D4

S5

62

Lastly, if the maximum losses of all the parts are accounted, like in Table 7, including the

maximum Joule losses in the magnet, the distribution of the total losses is shown above. Unlike in the

other graphs, here all the semiconductor losses are their worst case scenario losses and include the

switching losses.

Figure 5.10 - Distribution of the power losses, with the maximum values of each component.

63

6. Conclusions

6.1. Final Considerations

To design the project of a power converter with such a particular purpose, and with an operation

mode with so many restrictive variables, imposed the need to work with intermediate converters, to

develop the work in little steps that led to a final and satisfying solution. It was shown the whole

development of the power source to the relaxometer, highlighting the theoretical principles, and the

assumptions made, during the conception of each part of the final model. It started with a simple

converter, then a boosting circuit was added, a control system for the current, then it all was

transported to a converter that can operate with positive and negative voltages and currents, and

finally a simulation model for the parasitic currents of the magnet. This step-by-step explanation

helped to understand all the options for each part or each problem that arose during the formulation,

and later, the design of the components of the circuit.

This model allowed for a simulation that showed that all the normal requisites of a FFC-NMR

relaxometer were achieved, particularly, the main simulation used a magnet current IM = {5, -2, 10} [A],

with T=100ms, and the rise time of the current from -2A to 10A equal to 4.2ms. It was assumed that

the parasitic currents had the value of 2A, so that the value of the magnetic field density on the

magnet, BM was equal to 0T (zero). Other parameters of this simulation are the current ripple, which

reaches the maximum value of 3.5mA in the middle stage of steady current (IM = 5A); and the

maximum overshoot of the current is equal to 40mA, in the same stage.

The problem of the parasitic currents is, therefore successfully beaten, with the utilization of this

power source, although the rise time is a bit larger than the usual in FFC-NMR, which tend to work

with rise times of about 3ms. This is not a problematic result, as any value below 5ms is considered

acceptable in the Nuclear Magnetic Resonance technique. The converters that can perform under

those small rising times, work with other operation principles, and make use of circuits that operate in

only one or two quadrants. Some converters use other techniques for countering the parasitic

currents; others do not even have that option. The prototype existent nowadays in IST uses an extra

winding where it is injected a current with the opposite sense as the one supplied by the converter.

This solution creates the necessary magnetic field to counter the parasitic currents, and operates at

the standard 3ms, but it brings further issues like: the extra heating caused by the additional winding;

more power dissipation, and consequently more consumption; another power source, or power

converter, fed by the same source as the main converter. Besides, the additional current has no

control, and could vary, without the circuit reacting, or existing any compensating action at all.

The new topology has shown in simulation that may have a better performance in concern to all

the previous issues, despite having a little slower rise time. Besides all these advantages, the

converter has, overall low power consumption, and more relevant, it has relatively low power losses

64

on the side of the semiconductors, due to the fact that in a four quadrant converter, each

semiconductor is not used as much as in a converter with only one semiconductor. In this topology,

there are five switches that almost always work alternately. This leads to the fact that they are not

subjected to too much stress, in terms of long times of conduction, which might mean that the life

cycle of these devices, and consequently, the converter, could be longer than normal. However,

caution might be taken, as the switches don’t have equal utilization, regardless of the working cycle

chosen for the NMR, so it should be noted that semiconductors that supply the magnet, the most

current, in this work called D1 and S1, are the ones with more power losses and should be the more

affected with long conduction times. Also the semiconductor put in series with the filter (S5) has some

relevant losses, and should be watched for overheating.

Another interesting addition to this circuit is the possibility of recovering the current sent by the

boosting capacitor. Virtually, it would be possible to send the current to boost-up one time, and then

repeatedly send it back to the source and again into the magnet. This hypothesis is not proved by the

simulations, but it all depends on the type of rectifier that is put in the feeding circuit of the boosting

capacitor. If the rectifier’s topology does not allow the flow of current from the load to the transform,

the capacitor would recharge itself from the load, during the fall of the current stage. Even if the

current is not enough, because of some losses, it would only take a little extra energy from the

transformer during other stages of the cycle. Anyway, even if the total recharge is not possible, this

topology makes this option available, which may lead to important reduction of the power

consumption.

Lastly, it was made a sensibility test, which revealed some details that could be important in

future development of practical converters based on this model. This test was made varying the gains

of the custom controller, projected for this converter, and keeping in focus the main parameters of the

current in the magnet, which are the waveform stability, and the speed of the transitions; as well as

some other not so important parameters, such as the flicker of the current on the steady-states, the

the DC stabilization value for each stage and the, post-transitions, current overshoot. It can be

concluded that the system is very sensitive to variation of the saturation gain, Kw, which introduces

dramatic deformations to the wave, when changed alone. It also has some sensitivity for the

proportional gain that should also not suffer great alterations. The alteration of the whole set of gains

by the same reasoning (e.g. multiplication of a constant) resulted in very little change of the

parameters, which means that the system may sustain variation of the controller’s gains as long as

they keep the same relation between them. The more interesting conclusion though, came from the

test of a range of values for the Integral Gain, Ki. Not only the system’s performance was not deeply

altered, but it revealed that some parameters showed better results that the standard values,

especially with low values of Ki. It was not possible to lower the transition’s time but it contributed to a

better stability and lower variations of the current on the steady-states.

65

6.2. Application and Future work

The promising results obtained in the simulation environment help the idea that the application

of this model to a practical power source could very well be implemented. Not only the circuits of the

main converter have been presented, but the material list containing all the components for the

converter is included in this work. This thesis was done with the objective of projecting the model and

simulating it on a virtual environment but always thinking in the practical side of it, in order to leave it

ready to be implemented. In that way some questions of practical interest and highest relevance are

also addressed, such as the design of the heat sinks, the feeding of the converter, and the description

of the custom projected PI controller, so that in the near future, the concretization of this project can be

achieved.

The question of the recharging of the boosting capacitor is left open, as it may or may not be

implemented that way, but it can always be put in a way that receives current from the transformer and

sends back some to the grid.

As this topology is not used either in IST or by the only company that has a commercial model

for a NMR power source, it might turn to be an innovative device, in terms of its low heat dissipation

and power consumption, as well as the long-term life-cycle expected for the semiconductors. Although

it has more components than the model used in IST, and being more sophisticated, which may lead to

be more expensive, its low consumption and long-life expectations might be rewarding.

It is therefore expected, that this model can become a real converter in a near future and will

possibly be the base for future advancements on the area of power converters for FFC-NMR

applications.

66

References

[1] R. Kimmich, E. Anoardo: “Field-cycling NMR relaxometry”, Progress in Nuclear Magnetic

Resonance Spectroscopy, 44, pp. 257-320, 2004.

[2] A. Roque, S.F. Pinto, J. Santana, D. M. Sousa, E. Margato, J. Maia: “Dynamic Behavior of Two

Power Supplies for FFC NMR Relaxometers”, IEEE International Conference on Industrial Technology

(ICIT 2012), pp. 1109-1114, 2012.

[3] A. Roque, J. Maia, E. Margato, D. M. Sousa, G. Marques:”Control and Dynamic Behaviour of a

FFC Power Supply - Power Consumption and Power Losses”, IECON 2013 39th Annual Conference

of the IEEE Industrial Electronics Society, pp. 5943-5948, 2013.

[4] A. Roque, J. Maia, E. Margato, D. M. Sousa, G. Marques: “Control of a Power Supply with Cycling

Current Using Different Controllers”, International Symposium on Power Electronics, Electrical Drives,

Automation and Motion, 2014.

[5] D. M. Sousa, G. D. Marques, J. M. Cascais, P. J. Sebastião: “Desktop fast-field nuclear magnetic

resonance relaxometer”, Solid State Nuclear Magnetic Resonance, 38(1), pp. 36-43, 2010.

[6] W. M. Grady:”EE462L, Power Electronics, PI Controller for DC-DC Boost Converter”, Baylor

University, 2011.

[7] R. Severns, E. M. I. Reduce:”Design of snubbers for power circuits.” International Rectifier

Corporation, 2006.

[8] J. F. A. da Silva: “SISTEMAS DE ALIMENTAÇÃO AUTÓNOMOS, Textos de Apoio”, Área

Científica de Energia, Departamento de Engenharia Electrotécnica e de Computadores, Instituto

Superior Técnico, 2012.

[9] J. F. A. da Silva: “Sistemas de Conversão Comutada: Semicondutores e Conversores Comutados

de Potência”, Área Científica de Energia, Departamento de Engenharia Electrotécnica e de

Computadores, Instituto Superior Técnico, 2012.

[10] A.L. Ribeiro: ”Instrumentação e Medidas - 04.AMPOPs”, Área Científica de Electrónica,

Departamento de Engenharia Electrotécnica e de Computadores, Instituto Superior Técnico, 2011.

[11] Y. Thurel: "Four-quadrant power converter based on output linear stage", CERN, 2006.

[12] C. Job, J. Zajicek, M. F. Brown: "Fast field‐cycling nuclear magnetic resonance spectrometer",

Review of scientific instruments 67.6, 1996.

[13] Fairchild Semiconductor TDS for 1200V, 20A Field Stop Trench IGBT: “FGA20N120FTD”, Rev.

C1, 2008.

67

[14] IXYS TDS for Sonic-FRD:”DHG 20 I 1200PA”, 2006.

[15] A. Roque, J. Maia, E. Margato, S.F. Pinto, J. Santana, D.M. Sousa:”Power Supply of FFC NMR

Equipment with Energy Storage”, Annual Seminar on Automation, Industrial Electronics and

Instrumentation (SAAEI12), 2012.

[16] STELAR Srl: “Field Cycling NMR Relaxometry – Review of Technical Issues and Applications”,

2004.

68

Appendix A - Material List

The equipment that should be used in the assemblage of the converter, including the

semiconductors, power sources, electronic logical circuits, controllers and other additional

components, and its relevant characteristics are listed above:

Semiconductors All the semiconductors listed are supposed to work with maximum voltages of 1200V (VRRM for

the diodes and VCES for the IGBTs).

Table 8 – Characteristics of the Semiconductors present in the converter.[13][14]

Type Rated

Voltage (V)

Rated

Current (A)

Max Junction

Temperature,

Tjmax (ºC)

Rth(jc)

(ºC/W)

Quantity

IGBT VCEsat = 1.6 20 150 0.42 x5

Diode VF = 2.7 20 150 0.8 x4

Transformers

Table 9 - Characteristics of the Transformers used for the power supply of the converter.

Rated Primary Voltage

(VRMS)

Rated Secondary

Voltage (VRMS)

Rated Power (VA)

Main circuit 230 24 500

Boost circuit 230 400 500

Integrated Circuits

Table 10 - Integrated Circuits used for the linear control of the IGBTs

Type Quantity

Flip-Flop SR x2

AND 3 bits x2

AND 2 bits x1

NOT x1

Comparator (<0) x1

Comparator (>0) x1

Edge Detector x2

69

PI controller

Components needed to build the Proportional-Integrator controller suitable for the converter. All

this circuits are OpAmp based, in different blocks and should be available as IC.

Table 11 - Components used in the electronic circuit for the PI Controller

Type Quantity

Inverting Amplifier x2

Integrator x1

Adder x1

Inverting Difference x3

Inverter x1

Limiter x1

Other elements Table 12 - Other components used in the Converter

Type Resistance

(Ω)

Capacitance

(mF)

Maximum Voltage

(V)

Quantity

Boosting-Capacitor 0.5 0.2 600 x1

RC Filter 35 2.0 600 x1

Full Bridge Rectifier w/ Capacitor

(boost)

0.1

0.02

600

x2

Full Bridge Rectifier w/ Capacitor

(main)

0.1

26

40

x2

70

Appendix B – Operational Amplifier Blocks

In this section it is presented some of the most used blocks of OpAmps, and their functions. This

annex serves as a complement to the PI Controller sizing, in chapter 4.3.1.

Inverting Amplifier

Perhaps the most used block, used to obtain a voltage gain that is proportional to the two resistors

present in the block. As this is an inverting block, it also inverts the polarity of the input signal. It can

also be used as a simple inverter, with unitary gain, if the resistor and have equal values. The

gain, is given by the in/out relation [6]:

(0.1)

Figure B 1 - Schematic of an Inverting Amplifier block.[10]

Integrator

The block is similar to the inverting block, but instead of the resistor, there is a capacitor. The gain

of this block is related to the resistor and capacitance value, but also to the frequency of the input

signal. Ideally, with a DC voltage, the gain should be nearly infinite. As the topology is equal to an

inverting amplifier, the gain has also negative value.

To determine the relation of input and output voltages, it is important to remind that in OpAmps the

current that flows into the OpAmp is null. So there is only one current, , that goes through the input

resistor, , to the capacitor, , and to the output. So, it is possible to write: [10]

(0.2)

Also, taking into account that:

71

(0.3)

Then, Us can be written as [6][10]:

(0.4)

Or, in the complex numbers domain:

(0.5)

Figure B 2 - Schematic of an Integrator block.[10]

Adder

A block used to sum the amplitude of two or more signals ( , , …). The output is proportional to

the inverting sum of the input voltages, and the gain may be controlled by the choice of the resistors

values. If all the resistors in this block have the same value, it is purely an adder, with inverted output.

The relation of the output and input voltages may then be described as [10]:

(0.6)

If = =…= , then:

(0.7)

72

Figure B 3 - Schematic of an Adder block.[10]

Subtractor

This block is used to subtract the amplitude of one signal with one or more signals. The block uses

both inverting and non inverting inputs, and the output is proportional to the difference of the amplitude

of those inputs. Like in the adder topology, if tall the resistors present in the block have the same

value, the output voltage is directly the subtraction of the inputs. The general relation in/out for a

subtractor with two input signals is given by [10]:

(0.8)

Figure B 4 - Schematic of a Voltage Subtractor block.[10]