A microcontroller-based solution for filtering noise from

audio recordings

Rajat Goyal C.P.Ravikumar

Chitkara University Texas Instruments India Pvt Ltd

Himachal Pradesh, India Bangalore, India

rajatgoyal295@gmail.com ravikumar@ti.com

July 18, 2014

Abstract

Removing noise from audio recordings is acommonly encountered problem, especiallywith the recording functionality becomingavailable in inexpensive mobile gadgets. Of-ten, due to power and price constraints, thesegadgets must make use of low-cost embeddedprocessors. The object of this paper is to ex-plore the possibility of applying digital filter-ing to remove noise from audio recordings us-ing low-cost processors. We report results on aTexas Instruments TIVA-C microcontroller.

1 Introduction

Audio and video recording has become easywith the availability of these functionalitieson low-cost mobile gadgets. These gadgetsmust have a small footprint, must be battery-operated with a long battery life, and mustbe affordable. Several examples of such de-vices can be found in the literature [1, 2]. To-day, high-speed processors have become avail-able which can help implement such digital sig-nal processing algorithms. We have a choiceof microprocessors, microcontrollers and DSP

for implementing noise filtering. We considerthe problem of selecting the best system ar-chitecture for the problem of noise removal.In the system-level design problem, our mainconsiderations are (a) overall system cost (b)system power (c) ease of software develop-ment (d) future extensibility and (e) abilityto meet the functional specifications. We con-sider three different platforms, namely a 16-bitmicrocontroller called MSP430 (low-cost, low-power), a 32-bit microcontroller called TIVA-C based on the ARM processor core (medium-cost, medium-power) and a 32-bit DSP (rela-tively high cost and relatively higher power)for implementing the noise removal algorithm.The 16-bit microcontroller offers no floating-point support either in hardware or in terms ofa software library. The 32-bit microcontrolleroffers no hardware support for FP arithmetic,but provides a software library called IQ-math.The 32-bit DSP offers floating point support inhardware and through compiler support. Weassume that the system development will becarried out in C programming language.

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s i7 · · · i0 q1 · · · q22b31 b30 b29 · · · b25 b24 · · · b0

Table 1: Representation of the coefficientin fixed-point format (I=8, Q=24); MSB =Sign,Integer Part (8 bits),Fractional Part (24bits)

2 FIR Filter Implementa-

tion on TIVA-C

Assume that we have an n-tap FIR filter withcoefficients cn−1, cn−2, · · · , c0. The outputs ofthe filter for any successive n samples of theinput audio, denoted by xn−1, xn−2, · · · , x0,are given by yn−1, yn−2, · · · , y0, where yj =∑n−1

j=0 (cjxj). Note that filter coefficients arenumbers in the range −1.0 · · ·1.0 and arestored in a 32-bit fixed point format as shownin Figure 1. Bit b31 is the sign bit and is de-noted by s. Bits b30 to b24 are the integer partof the coefficient and are denoted i7 · · · i0. Fi-nally, the fraction part is denoted by q1 · · · q22and is stored in bits b23 · · · b0. We refer tothis representation as IQ fixed-point represen-tation with I=8 and Q=24. Thus the value ofthe real number represented by the bit patternis given by

f = (−1)b31 · {

30∑

j=24

bj2(24−j) + (1)

23∑

j=0

bj2(24−j)

}

In the same way, the sample is also repre-sented in the IQ format with I=8 and Q=24bits. The computation of the output yj in-volves n multiplications and n addition opera-tions. We have chosen fixed point represen-tation for implementing the coefficients and

procedure multiply (c, x) beginproduct = 0;for j = 23 downto 0 begin

// iterate over all fractional bit positions in the coefficientsign = sign(c)*sign(x);differential = (x ¿¿ (24− j);if (sign < 0) product = product - differential;else product = product + differential;end

end

Figure 1: Algorithm for multiplication

procedure FIR (c,x)// c is an array of n coefficients,//x is an array of m coefficients. // Assume that m > n.begin

for i = 0 to m− n+ 1 begin

y[i] = 0;for j=0 to n− 1

y[i] = y[i] +multiply(c[j], x[i+ j]);end

end

Figure 2: FIR Filter Algorithm

filter coefficients, since multiplication and ad-dition of floating point numbers is computa-tionally intensive. We will consider the mul-tiplication of a coefficient c and a sample x.Note that the integer part of all the filter co-efficients is 0, since the coefficients are in therange −1.0 < x < 1.0. Therefore, the multi-plication of c and x can be performed usingthe procedure shown in Figure 1.

We can now state the FIR filter algorithmas shown in Figure 2.

In order to implement the FIR filter al-

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gorithm on TIVA-C microcontroller, we as-sume that the filter coefficients are stored inIQ(8, 24) format, starting at location coeff .The input samples are stored in IQ(8, 24) for-mat starting at location inpstring. The out-put samples will be stored in IQ(8, 24) formatstarting at location output. We have imple-mented the multiply procedure shown abovein assembly language to make it more compactand efficient.

3 Measurement and Imple-

mentation of Parameters

We are interested in studying the performanceof the implementation of the FIR filter on theTIVA-C Launchpad. In particular, we areinterested in the execution time (number ofclock cycles) and the power/energy dissipationfor increasing number of samples. In the De-bug mode, Code Composer Studio software [V5.5] allows us to track the number of clock cy-cles expended by a program. In Table 3, wehave tabulated clock count as a function of thenumber of samples. In this experiment, we se-lected a music audio and took samples of size500 and above. Note that the audio was sam-pled at 8000 samples/second and therefore 500samples correspond to an audio of 1/16 secondduration. We observe that the number of clockcycles varies linearly with the number of sam-ples. The slope of the curve was measured tobe 1220 cycles/samples.

Measurement of power/energy was morecomplex, since there is no way to obtain thisinformation from Code Composer Studio. Wetherefore resorted to the following technique.Shown in Figure 2 are several code snippets.We inserted an ammeter in series with thepower supply of the Launchpad and measuredthe current Idd when code snippets (a) · · · (e)shown in Figure 2. The power dissipated dur-

ing the execution of a code snippet is given bythe product of the applied Vdd and the corre-sponding Idd. When running code snippet (a),the main operations performed by the ARMCortex-M4 CPU will include the fetching ofthe Branch instruction and the execution ofthe Branch instruction. Therefore, when weconsider n iterations of the loop, we can write

Vdd×Idda×n×Tclock = (Er−m+Ebr)×n (2)

where Tclock is the clock period of the CPUclock, Er−m is the energy for one memory-register data movement, and Ebr is the energyfor performing one branch instruction. Rear-ranging the above equation, we get

Er−m + Ebr = Vdd × Idd,a × Tclock (3)

A similar analysis of code snippets (b) · · ·(e) leads to the following equations:

2Er−m + Er−r + Ebr = Vdd × Idd,b × Tclock(4)

2Er−m + Eadd + Ebr = Vdd × Idd,c × Tclock(5)

2Er−m + Easr + Ebr = Vdd × Idd,d × Tclock(6)

3Erm + Ebr = Vdd × Idd,e × Tclock(7)

We therefore have 5 equations in 5 un-knowns, namely, Er−m, Ebr, Er−r, Eadd, andEasr. Therefore, we can write down the energydissipation numbers for basic instructions us-ing this technique.We studied the code for the FIR filter and

found that each loop of the filter has 25register-to-register movements, register shift,register addition, register to memory move-ment. Thus an approximate expression for en-ergy dissipation per iteration of the FIR filtercan be written as

EFIR = 6Er−m + 25Er−r + 25Eadd + 25Easr

(8)We have plotted the power dissipation of the

FIR filter for varying number of sample sizesin Figure A.7.

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L0 B L0 (a)L1 mov R2, R1

B L1 (b)L2 add R2, R1

B L2 (c)L3 ASR R2, R1, #1

B L3 (d)L4 LDR R1, R2

B L3 (e)

Table 2: Code Snippets for measuring powerdissipation

3.1 Generalized formulae

Number of samples nRegister-register move 25nRegister-memory move 3(n+ 1)Register-register addition 25nRegister shift 25n

where

Em−r = Energy consumed in oneregister-memory movement

= .99 ∗ 10−9JEr−r = Energy consumed in one

register-register movement= .02 ∗ 10−9J

Eadd = Energy consumed in oneadd operation

= 1.953 ∗ 10−9JEasr = Energy consumed in one

register shift operation= 1.993 ∗ 10−9J

4 Results

5 Conclusion

ARM Cortex-M4 working at 16 MHz was un-able to provide the required real-time perfor-mance for noise removal when we used a 11th

Samples Assembly language Embedded Cprocessed Clock cycles used Clock cycles used

550 670611 9587111100 1341211 19175112420 2950651 42185115500 6703511 958701211000 13407012 19174012

Table 3: Clock cycles for programming lan-guage for samples processed

Samples Current Power Energyprocessed (in mA) (in mW) (nJ)

550 8.48 27.984 961.951100 8.49 28.017 1926.172420 8.49 28.017 4237.575500 8.49 28.017 9630.8411000 8.50 28.050 19284.38

Table 4: Various parameters against samplesprocessed

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order filter. 13408 cycles or 838 microsec-onds to produce one output sample, whereaswe need one sample in every 125 microsec-onds. We can increase the clock frequency to66 MHz at the expense of power. We will get4x speedup through this, but we need 6.7xspeedup. Further optimization of assemblylanguage may be able to improve the numberof cycles/sample. We have a generic way ofcomputing energy numbers for instructions.

References

[1] Ian Lesnet, Record audio with theMSP430 microcontroller, 16 May, 2008,http://www.diylife.com/2008/05/16/record-audio-with-the-msp430-microcontroller/

[2] Maury Wright, Choosing an MCU forAudio Capture/Playback, 18 July, 2012,http://www.digikey.com/en/articles/techzone/2012/jul/choosing-an-mcu-for-audio-captureplayback

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