Relay Scheme Design Using Microproc Relays

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Relay Scheme

Design UsingMicroprocessor

Relays

April 1, 2015



2Relay Scheme Design Using Microprocessor Relays

4/1/2015

Presenter: e!in Donahoe P"#", $# Digital

#nergy, Po%er Deli!ery Pro&ects

A report to the System Protection

S'(committee o) the Po%er System Relay

*ommittee o) the +### Po%er #nergy

Society

Prepare- (y %or.ing gro'p *1 'ne 2014

his paper is a s'pplement to the 1

relay trip circ'it -esign paper an- a--resses

the 'se o) microprocessor relays"




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+ntro-'ction

$eneral Scheme Design

argeting an- A--itional Post rip +n-ications

S*ADA 'nctions

Maintaina(ility/esting

Doc'mentation

raining

essons earne-



Relay Scheme Design Using Microprocessor Relays

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Typical Trip circuit usingElectromechanical relays




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Benefits of Microprocessor Relays

Panel %iring, the n'm(er o) panels, e!enthe si7e o) the ho'se can (e re-'ce-"

#liminate the nee- )or a'8iliary relays,-io-es

Use ('ilt9in sel)9-iagnositics




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Trip circuitsypical (rea.er trip circ'it 'sing

microprocessor relay

IN1 IN2

52a

01/T

TRIP/

OUT1

86/BF

52a

TC-1

BFI*/

OUT4

ExternalBF Relay

7 I*/

OUT5

External7 Relay

!tat"#nBattery

$#lta%e

&'(

&-(

TRIP*/

OUT2

C)O!E/

OUT

ExternalBFI

External7 I

IN4IN

Inte%ral t# "r#r#e#r

ae relay

TC-2 CC




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Circuit Considerations

;o% many )'nctions are nee-e-<

Are there (ac.'p or re-'n-antprotection )'nctions i) a relay )ails<

;o% -oes D* system mal)'nction a))ectprotection<

An- %e still ha!e to consi-er=




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Relay Contact Ratings

*alc'lating /R rating:

oa- +n-'ctance

oa- Resistance > *a(le Resistance to oa-

Seal9in logicMinim'm trip -'ration timer

Spee- o) operation

Metallic or hy(ri- soli-9state

L/R rating=



$eneral Scheme Design




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Applying Multiple Output Contacts

M'ltiple isolate- o'tp't contactseliminate the nee- )or -io-es tomaintain isolation (et%een D* systems

Direct (rea.er tripping eliminates the-elay inc'rre- (y an imme-iate contactm'ltiplying

Spee- o) operation can (e e))ecte- (ycontact chosen

?'tp'ts can help %ith testing




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Integration Separation andRedundancy

*om(ining )'nctions into one relay canre-'ce cost @integration

;o%e!er, there m'st (e a relay in place toco!er )or relay )ail're an- )'nctions m'st(e assigne- to it @separationBill this secon- relay/)'nctions (e

i-entical< Similar< *omplementary< Sameman')act'rer< Di))erent< @Re-'n-ancy




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!o"er Supply Considerations

More microprocessor relays typicallymeans increase- contin'o's D* systemloa-s

?nce a-eC'ate D* s'pply systemsmay nee- to (e re!isite-




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!o"er Supply Considerations




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Snea# Circuits

Snea. circ'its are 'ninten-e- -esign )la%s thatcan res'lt in serio's conseC'ences

Bith increase- comple8ity, snea. circ'its aremore li.ely

Bith Microprocessors, the snea. circ'its ha!eo)ten mo!e- insi-e

Systematic testing an- inspection is mostcommon %ay to pre!ent

Many snea. con-itions are locate- thro'gh trialan- error o!er time in the )iel-




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!articular Changes in Circuit$unctionality

Direct ripping

D'al Relay ripping

D'al rip *oils %ith ?ne RelayD'al rip *oils %ith %o Relays

D'al rip *oils %ith rea.er Re9trip

D'al rip *oils, Relay *ross9rippingD'al rea.er Scheme




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Targeting and Additional !ost TripIndications

argetsEirt'al targetsSeC'ence o) #!ents Recor-s

?scillography




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SCADA $unctions

e!el o) protection an- S*ADAintegration %ithin the microprocessorrelay+/?, meas'rement, monitoring an-control




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%essons %earned

?pport'nitiesF Simpli)ie- trip circ'it -esign

F Re-'ce nee- )or a'8 -e!ices an- steering

-io-esF Eastly impro!e- !isi(ility @*M, alarms, etc

*hallengesF Access to internal logic

F 'r-en to station (atteryF #na(le o!er)'nctionali7ation



he (est engineere--esigns are those that

are the simplest an-most ro('st ones that

'ltimately achie!e themost relia(ility"




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&o" to 'et a Copy of the Original !aper

http://pes9psrc"org/




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Relay Scheme Design Using Microproc Relays

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