Registers and DecoderRegisters and Decoder

Four–Input 2 bit multiplexer

Computer Typical Arithmetic Logic Unit

Internal Digital IC FaultsInternal Digital IC Faults

Malfunction in the internal circuitry-cause Malfunction in the internal circuitry-cause by one of the internal component failing or by one of the internal component failing or operating outside its specificationoperating outside its specification

Inputs or outputs shorted-input to be stuck Inputs or outputs shorted-input to be stuck either high or low either high or low

Input output open-circuited-stuck to high Input output open-circuited-stuck to high or low IC outputor low IC output

Short between 2 pins (other than ground Short between 2 pins (other than ground or VCC- IC force 2 pins to be always or VCC- IC force 2 pins to be always identicalidentical

Internal Digital IC fault

Logic Probe

Pulse in the node

Logic probe used to trace shorted node

Computer ALU

Memory TerminologyMemory Terminology Memory Cell- a device or electrical circuit that can store a single Memory Cell- a device or electrical circuit that can store a single

bitbit Memory Word- A group of bits in a memory that represents Memory Word- A group of bits in a memory that represents

information or datainformation or data Byte- 8 Bit WordByte- 8 Bit Word Nibble-a 4 bit binary numberNibble-a 4 bit binary number Capacity- specify how many bits can be stored in a particular Capacity- specify how many bits can be stored in a particular

memory device. memory device. Density-another term for capacityDensity-another term for capacity Address-this is a number that identifies location of a word in Address-this is a number that identifies location of a word in

memory. memory. Read Operation Binary word stored in a memoryRead Operation Binary word stored in a memory Write operation- a word is placed into a particular operationWrite operation- a word is placed into a particular operation Access Time- memory device operating speedAccess Time- memory device operating speed RAMRAM SAMSAM RWMRWM

Continuation..Continuation..

Static Memory Device-a Static Memory Device-a semiconductor device that stored semiconductor device that stored data permanentlydata permanently

Dynamic Memory Device-a device Dynamic Memory Device-a device that will not stored data permanentlythat will not stored data permanently

Internal Memory-computer main Internal Memory-computer main working memoryworking memory

Auxiliary Memory-Mass storage store Auxiliary Memory-Mass storage store amsiva amount of informationamsiva amount of information

Input and output Lines perform by a Input and output Lines perform by a memorymemory

Select the address in memory that is being Select the address in memory that is being accessed for Read or Writeaccessed for Read or Write

Select either Read or Write operation to Select either Read or Write operation to be performedbe performed

Supply the input and data to be stored in Supply the input and data to be stored in the memory during a write operationthe memory during a write operation

Hold the output data coming from memory Hold the output data coming from memory during a read operationduring a read operation

Enable or (disable) memory so that it wil Enable or (disable) memory so that it wil no respond to the address inputs and read no respond to the address inputs and read write commandswrite commands

Problem 1Problem 1 A certain semiconductor memory chips is A certain semiconductor memory chips is

specified as 2k X 8. How many words can specified as 2k X 8. How many words can be stored on this chips? What is the word be stored on this chips? What is the word size? How many total bits can this chips size? How many total bits can this chips store? Given: Number of words in a store? Given: Number of words in a memory is often 1024 = 1Kmemory is often 1024 = 1K

2K = 2 X 1024 = 2048 words

Each word is 8 bits ( one byte) The total number of bits is therefore

2048 X 8 = 16,348 bits

Problem 2Problem 2

A certain memory has a capacity of A certain memory has a capacity of 256K X 8.256K X 8.• How many data input and data input How many data input and data input

does it have?does it have?• How many address lines does it have?How many address lines does it have?• What is its capacity in bytes?What is its capacity in bytes?

SolutionSolution

• A) Eight of each, since the word size is A) Eight of each, since the word size is eight.eight.

• B) The memory stores 256 =256 X 1024 B) The memory stores 256 =256 X 1024 = 262,144 words. Thus, = 262,144 words. Thus,

there are 262,144 memory addresses. there are 262,144 memory addresses. Since 262,144 = 2 it requires 8 bit Since 262,144 = 2 it requires 8 bit address code to specify one of 262,144 address code to specify one of 262,144 addressesaddresses

• C) a byte is 8 bits, this memory has the C) a byte is 8 bits, this memory has the capacity of 262,144 bytescapacity of 262,144 bytes

18

Read Only MemoryRead Only Memory

The READ operationThe READ operation

There are 16 data words stored at 16 There are 16 data words stored at 16 different address location.different address location.

Example Example

location 0011 is 10101111 this location 0011 is 10101111 this data is stored in binary inside ROMdata is stored in binary inside ROM

ROM ArchitectureROM Architecture

Internal structure of a ROM IC is very Internal structure of a ROM IC is very complex (recommendation need not complex (recommendation need not to know the details)to know the details)

Four basic parts of ROMFour basic parts of ROM• Row decoderRow decoder• Column decoderColumn decoder• Register array- register data that has Register array- register data that has

been programmed into ROMbeen programmed into ROM• And output buffers.And output buffers.

Rom ArchitectureRom Architecture

Address DecoderAddress Decoder

Determines which register in the Determines which register in the array will be enabled to place its 8 bit array will be enabled to place its 8 bit data word into the bus.data word into the bus.

Example 1Example 1• What register will enabled by input What register will enabled by input

address 1101?address 1101?• Ans. AAns. A3 3 AA22 = 11 will activate column 3 = 11 will activate column 3

AA1 1 AA00 = 01 will activate the row 1 select line. = 01 will activate the row 1 select line.

Example 2Example 2

What input address will enable What input address will enable register 10?register 10?

Ans. AAns. A11 A A00 = 10 and A = 10 and A33 A A44 = 10 = 10

•Therefore ATherefore A33 A A22 A A11 A A00 = 1010 = 1010

Output buffers Output buffers

Data is feed into the output buffers, which Data is feed into the output buffers, which will pass the data into the external data will pass the data into the external data outputs provided that CS is low. If CS is outputs provided that CS is low. If CS is High the output buffers are in high Z state High the output buffers are in high Z state and Dand D00-D-D8 8 will be floating.will be floating.

Example: Intel 2708 is a MOS ROM that Example: Intel 2708 is a MOS ROM that stores 1024 8-bit words. Its 1024 stores 1024 8-bit words. Its 1024 registers are arrange in a 64 X 16 array.registers are arrange in a 64 X 16 array.

In practice ROM capabilities typically In practice ROM capabilities typically range from 32 to over 1 M bytesrange from 32 to over 1 M bytes

ExampleExample Describe the internal architecture of a ROM Describe the internal architecture of a ROM

that stores 4K bytes and uses a square that stores 4K bytes and uses a square register array.register array.

SolutionSolution• 4K is = 4 X 1024 = 4096 therefore it holds 4096 8-4K is = 4 X 1024 = 4096 therefore it holds 4096 8-

bits words.bits words.• Since 4096 = 64 the register are arrange by 64 by Since 4096 = 64 the register are arrange by 64 by

64 array64 array• There are 64 rows and 64 columnThere are 64 rows and 64 column• This requires 1 of 64 decoder to decode the six This requires 1 of 64 decoder to decode the six

address for the row selectaddress for the row select• Also 1-of-64 decoder to decode the six address Also 1-of-64 decoder to decode the six address

inputs for the column selectinputs for the column select• Thus the total of 12 address inputs are requiredThus the total of 12 address inputs are required• Therefore since 2 = 4096 proving that there are Therefore since 2 = 4096 proving that there are

4096 different address4096 different address

2

12

Types of ROMTypes of ROM Mask Program ROM-has its storage Mask Program ROM-has its storage

location written into (programmer) location written into (programmer) by the manufacturer according to by the manufacturer according to customer’s specifications.customer’s specifications.

MROM bipolar transistorMROM bipolar transistor

Truth tableTruth table

Cont…Cont…

Programmable ROM (PROMs)Programmable ROM (PROMs)• Expensive an is used in a high volume Expensive an is used in a high volume

applications.applications.• Fusible links for less cost refered to as Fusible links for less cost refered to as

one time program. Example is 74186one time program. Example is 74186

Fusible-linkFusible-link

Cont…Cont…

Erasable programmable ROM (EPROM)Erasable programmable ROM (EPROM)• Can be program by the user and it can be Can be program by the user and it can be

erased also as often desired.erased also as often desired.• Once programmed, the EPROM is a nonvolatile Once programmed, the EPROM is a nonvolatile

memory that will hold its desired data memory that will hold its desired data indefinitely indefinitely

• To erase the program exposed to UV lightTo erase the program exposed to UV light• Available with a capacity of 128K X 8 45 ns Available with a capacity of 128K X 8 45 ns

Example: Intel 2732 is a 4k X8 NMOS EPROMExample: Intel 2732 is a 4k X8 NMOS EPROM

EPROMEPROM

Truth TableTruth Table

Cont….Cont…. Electrically Erasable PROM (EEPROM)Electrically Erasable PROM (EEPROM)

• Retains the same floating-gate structure as the Retains the same floating-gate structure as the EPROMEPROM

• Developed product of EPROM (100 ns)Developed product of EPROM (100 ns)• Has the ability to electrically erase and rewrite Has the ability to electrically erase and rewrite

individual bytes (8 bit words) in memory during individual bytes (8 bit words) in memory during the arraythe array

• During the write operation internal circuitry During the write operation internal circuitry automatically erases all the cells at an address automatically erases all the cells at an address location prior to writing the new data Example: location prior to writing the new data Example: Intel 2664 8K X 8 array with 13 address inputs Intel 2664 8K X 8 array with 13 address inputs (2 = 8292) and 8 data I/O pins(2 = 8292) and 8 data I/O pins13

EEPROMEEPROM

Truth TableTruth Table

Flash MemoryFlash Memory

Non VolatileNon Volatile• Fast read access time (120 ns)Fast read access time (120 ns)• Can be erased and can be programCan be erased and can be program

Flash MemoryFlash Memory

TableTable

28F256A Flash memory chips28F256A Flash memory chips

28F256A Flash memory Chips28F256A Flash memory Chips

ROM ApplicationROM Application

Firmware- storage of data and Firmware- storage of data and program codes that must be program codes that must be available on power-up in available on power-up in microprocessor-based systemsmicroprocessor-based systems

Data Tables- used in trigonometric Data Tables- used in trigonometric tablestables

Data Converter- data is expressed in Data Converter- data is expressed in one type of code and produces an one type of code and produces an output expressed in another type output expressed in another type

Data ConverterData Converter

Semiconductor RAM’sSemiconductor RAM’s

RAM-any memory address location is RAM-any memory address location is as easily accessible as any other.as easily accessible as any other.

RAM ArchitectureRAM Architecture

1K1K 4K4K 8K8K 16K16K 64K64K Word sizes 1, 4, 8 bitsWord sizes 1, 4, 8 bits

READ operationREAD operation

In order to read the content the RW In order to read the content the RW must be 1must be 1

Chip select must be set to 0Chip select must be set to 0 The above combination enables the The above combination enables the

output buffers to show the selected output buffers to show the selected register to appear four data outputregister to appear four data output

WRITE OperationWRITE Operation

RAM IC 2147H, MCM6206RAM IC 2147H, MCM6206

NMOS Static RAM CellsNMOS Static RAM Cells