Recent Progress in Silicon Microcalorimeters and Their Prospects for NeXT (and other missions)...

Recent Progress in Silicon Microcalorimeters

and Their Prospects for NeXT (and other missions)

Caroline A. Kilbourne

NASA Goddard Space Flight Center

High Energy Astrophysics in the Next Decade, June 21-23, 2006

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A short overview of silicon calorimeters

• First generation– Wet etch definition of mechanical/thermal structures– Thin implanted thermistor (0.25 m deep) associated with 1/f noise

• Second generation– Elimination of 1/f noise through using a 1.5 m SOI (silicon-on-

insulator) device layer to define a thicker and more uniform thermistor

– Use of SOI and reactive-ion etching to make reproducible thermal/mechanical Si structures

– Use of SU8, a structural polymer, to make integrated absorber attachment points resulted in elimination of “hard tails” seen on line shapes of many XRS(1) pixels.

• Absorber technology common to both generations– Broad band: ~8-m MBE-grown HgTe (CZT substrate removed)– Soft x-ray: <1-m MBE-grown HgTe on silicon substrate


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Suspended thermistors sit over individual wells in the silicon frame. The absorbers were attached manually, one at a time

Suzaku/XRS: State of the Art in Silicon Microcalorimeter Arrays


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No deviation from Gaussian down to better than 1% of

peak

29 hours of data –Co-added XRS array:5.68 eV ± 0.03 eV at 6 keV4 arrays completed and tested, resolution 5.3 - 6.5 eV FWHM with 1-2 outliers per array.


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First X-Ray Spectrum on the XRS Calibration Pixel!

FWHM = 7.0 eV

FWHM = 6.4 eV

Whole array: composite spectrum resolution of 7.8 eV


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3.8 eV when operated at 50 mk

(in appropriate bias circuit)

3.2 eV with absorber with 40% the volume of an XRS absorber

Going further with the same type of detector:


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Hard X-ray Demonstrations

• Stack of 3 XRS absorbers on one XRS-like pixel (25 m of HgTe)

• Pixel parameters not optimized for this absorber heat capacity (or higher), but still obtained an encouraging result


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XQC-4 - next flight in Wisconsin/Goddard sub-orbital SXRB experiment

• 2 mm pixels• 0.7 m HgTe grown on

high purity n-type 15 m silicon substrate (more challenging than XRS geometry)

• 6 - 8 eV FWHM at Al K on third of array tested thus far

• Expect better than 7 eV at O VII K on all.


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How far can this technology go?• Resolution• Pixel size• Speed• Number of pixels

• Different energy bands– Soft x-ray, traditional x-ray band, hard x-ray

• Speed/resolution, resolution/size/number• Can’t really talk about resolution limits, for example, without the rest of the

parameters– But I’ll start out with the XRS-like case

What are the possible optimizations?


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Resolution• We would expect 4-eV resolution from the XRS pixel

design, at the same speed, if:(1) absorber coupling could be improved without developing a hard

tail on the line shape• Competing effects• A decoupled absorber degrades “ideal” detector due to internal

thermal fluctuation noise and roll-off of high frequency signal response• Decoupling the absorber can improve a detector with a non-ideal

absorber by allowing the absorber to thermalize, thus diminishing position dependence in the signal

• Research program planned, but optimal balance not yet determined


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Resolution• We would expect 4-eV resolution from the XRS pixel

design, at the same speed, if:

(2) array frame was better heat sunk• Thermal fluctuations on the frame caused by photons and cosmic rays

incident on the frame and by thermal crosstalk from adjacent pixels contributed an additional noise term.

• On new XQC array, implementing heatsinking via deposited Au layer on the frame and Au wirebonds directly to the detector stage (~10X higher G than XRS epoxy link)


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Effect of thermal fluctuation at the frame – XRS flight data


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Pixel Size• How small?

– Electron-phonon coupling in the thermistor scales with volume– Need to make the thermistor thicker if the area is decreased– Practical limit probably ~0.25 mm pixel pitch

• How big?– Practical limit set first by resolution and quantum efficiency

requirements. XQC 2 mm pitch good for soft x-ray experiment. 0.83 mm version of XRS array provided 8-eV resolution

– Development of lower-heat-capacity absorbers that thermalize well is a long-held goal. Best bet probably HgTe itself, or HgCdTe.

• Report in the literature that the linear term in the HgTe specific heat can be rendered lower than that seen in the XRS material via annealing out Hg vacancies.

• HgTe has a slightly negative bandgap. It has been well established that adding CdTe to HgTe opens up the bandgap. A small positive bandgap will not only render the intrinsic carrier concentration zero, but will open up a gap between the impurity states and the conduction band so that any impurity acceptor states present will be unable to produce free holes at mK temperatures


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Speed

• XRS exponential fall time was ~3 ms (would have been closer to 2 ms, but was slowed by thermally decoupled absorber)

• Faster thermistors are possible, but we have to match carefully the internal and external thermal conductances (and associated heat capacity) in order to obtain the desired performance

• Practical devices probably limited to ms time scale


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Number of Pixels• Bias power per pixel less than a TES, so thermal

management won’t be the driver• Degenerately doped electrical leads are essentially planar,

but could transition to metallic leads close to the pixels so that leads could be layered. (Right now, transition to Al bond pads occurs on frame outside the array.)

• Absorber attachment needs to move from manual, one-at-a-time approach to integrated approach– Processed separately and bonded to the pixels using pick-and-

place machine after array fabrication or during fabrication before the membrane release step

• Development of this approach is in progress

• Demonstrated epoxy transfer to SU8 posts and dry-etch of HgTe


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Absorber attachment

Epoxy

Detectors

Using flip-chip bonder, pick up epoxy on SU8

adhesive

Absorbers

Using the flip-chip bonder, attach absorbers to detectors. Absorbers are held by temporary adhesive.

the potential for dry etching HgTe shown at Raytheon, Galeta, CA.


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Number of channels• If absorber attachment automated, read-out, rather than

physical design of the array, likely sets the limit on number of pixels– 60 W per JFET dumped to 20 K temperature stage or higher– JFET’s operate with lowest noise at 130 K– 100 JFET’s not hard– 1000 JFET’s possible with monolithic JFET’s and connections

• Careful thermal design required to manage the 60 mWSingle JFET

Gate

Source Drain

Silicon bridges Silicon bridges

heat sunk to ~ 20 K stage

FETs at 80-120 K


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Approaches to optimization

• Large-area, slow pixels optimized for soft x-rays

• Optimization for hard x-rays

• Optimization for the best resolution, above all other traits

• Optimization for the best resolution in a 0.7 mm pixel with a 2 ms fall time

• …


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Overview• Technology in hand:

– 3.8 eV in XRS-style pixels sunk to 50 mK; 3.2 eV with 0.4 mm absorber (instead of 0.624 mm)

– Few ms fall times– Kinematic mounting and array heat sinking

• Likely near-term developments– Optimized absorber coupling for better resolution and speed– Evaluation of specific heat and thermalization of high-quality

HgCdTe and annealed HgTe

• Straightforward enhancements that need investment– Automated absorber attachment on the 100-1000 pixel scale– Integrated JFET’s with isolation structures– Leads transition for more dense packing of on-chip wiring

Silicon calorimeters have an important role yet to play in high energy astrophysics in the next decade.

Recent Progress in Silicon Microcalorimeters and Their Prospects for NeXT (and other missions)...

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