Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola...

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Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy

Transcript of Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola...

Page 1: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

Real-Time Scheduling Analysisfor

Multiprocessor Platforms

Marko Bertogna

PhD dissertation

Scuola Superiore S.Anna, Pisa, Italy

Page 2: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 2

Overview The Multicore Revolution Real-Time Multiprocessor Systems:

existing results Schedulability Analysis for global

schedulers Experimental evaluation Conclusions Other research activities

Page 3: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 3

Main Contributions Systematization of existing results for

RT scheduling and schedulability analysis on MP

Polynomial and pseudo-polynomial schedulability tests for

Work-conserving schedulers FP EDF EDZL

Experimental comparison of existing techniques

Page 4: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 4

Real-Time Systems Solid theory of single processor systems

Optimal schedulers, tight schedulability tests, shared resource protocols, bandwidth reservation schemes, hierarchical schedulers, OS, etc.

Much less results for multiprocessors Many NP-hard problems, few optimal results,

heuristic approaches, simplified task models, only sufficient schedulability tests, etc.

Do we really need to investigate Multi-Processors Real-Time Systems?

Page 5: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 5

As Moore’s law goes on… Number of transistor/chip doubles every 18 to

24 mm months

Page 6: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 6

…heating becomes a problem

0,1

1

10

100

1000

71 74 78 85 92 00 04 08

Power

40048008

80808085

8086286

386486

PentiumP1

P2

P4

Pentium Tejascancelled!

P3

Hot-plate

NuclearReactor

STOP

Year

Power (W)

P V f: Clock speed limited to less than 4 GHz

Page 7: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 7

Solution

Denser chips with transistor operating at lower frequencies

MULTICORE SYSTEMS

Use a higher number of slower logic gates

Page 8: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 8

The Multicore invasion Intel’s Core2, Itanium, Xeon: 2, 4 cores AMD’s Opteron, Athlon 64 X2, Phenom: 2, 4 cores IBM-Toshiba-Sony Cell processor: 8 cores (PSX3) Microsoft’s Xenon: 3 cores (Xbox 360) ARM’s MPCore: 4 cores Sun’s Niagara UltraSPARC: 8 cores Tilera’s TILE64: 64-core Nios II: x soft Cores TI, Freescale, Atmel, Broadcom,Picochip

(picoArray up to 300 DSP cores), ...

Page 9: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 9

Identical vs heterogenous coresARM’s MPCore STI’s Cell Processor

• 4 identical ARMv6 cores • One Power Processor Element (PPE)• 8 Synergistic Processing Element (SPE)

Page 10: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

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System model Platform with m identical processors Task set with n periodic or sporadic

tasks i

Period or minimum inter-arrival time Ti

Worst-case execution time Ci

Deadline Di

Utilization Ui=Ci/Ti, density i=Ci/min(Di,Ti)

Page 11: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 11

CPU1

CPU2

Problems addressed Run-time scheduling problem Schedulability problem

1

2

3

4

5

?

CPU3

Page 12: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 12

Assumptions Independent tasks Job-level parallelism prohibited

the same job cannot be contemporarily executed on more than one processor

Preemption and Migration support a preempted task can resume its execution

on a different processor Cost of preemption/migration integrated

into task WCET

Page 13: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 13

Single system-wide queue or multiple per-processor queues:

CPU1

CPU2

CPU3

Global vs partitioned scheduling

CPU1

CPU2

CPU3

Global scheduler Partitioned scheduler

Page 14: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 14

Partitioned Scheduling The scheduling problem reduces to:

Global (work-conserving) and partitioned approaches are incomparable

Bin-packingproblem

Uniprocessorschedulingproblem

+NP-hard in thestrong sense

Various heuristics used: FF, NF, BF, FFDU, BFDD, etc.

Well known

EDFUtot ≤ 1

RM(RTA)

...

Page 15: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 15

Global scheduling The m highest priority ready jobs are

always the one executing Work-conserving scheduler

No processor is ever idled when a task is ready to execute.

CPU1

CPU2

CPU3

Page 16: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Global scheduling: advantagesLoad automatically balancedEasier re-scheduling (dynamic loads, selective shutdown, etc.)Lower average response time (see queueing theory)More efficient reclaiming and overload managementNumber of preemptions

Migration cost: can be mitigated by proper HW (e.g., MPCore’s Direct Data Intervention)Few schedulability tests Further research needed

Page 17: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 17

Uniprocessor scheduling EDF optimal for arbitrary job collections Exact schedulability conditions

linear test for implicit deadlines: Utot ≤ 1 Pseudo-polynomial test for constrained and arbitrary

deadlines [Baruah et al. 90] Optimal priority assignments for sporadic and

synchronous periodic task systems RM for implicit deadlines DM for constrained deadlines

Exact pseudo-polynomial schedulability test for FP

Response Time Analysis (RTA)

Page 18: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Global Scheduling No optimal scheduler known for general task

models Pfair optimal for implicit deadlines: Utot ≤ m

preemption and synchronization issues Classic schedulers are not optimal (Dhall’s effect):

Hybrid schedulers: EDF-US, RM-US, DM-DS, AdaptiveTkC, fpEDF, EDF(k), EDZL, …

m light tasks1 heavy task

Utot1

Page 19: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Global scheduling: main results

Only sufficient schedulability tests Utilization-based tests (implicit deadlines)

EDF Goossens et al.: Utot ≤ m(1-Umax)+Umax fpEDF Baruah: Utot ≤ (m+1)/2 RM-US Andersson et al.: Utot ≤ m2/(3m-2)

Polynomial tests EDF, FP Baker: O(n2) and O(n3) tests EDZL Cirinei,Baker: O(n2) test

Pseudo-polynomial tests EDF, FP Fisher,Baruah: load-based tests

Page 20: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Density-based tests EDF: tot ≤ m(1-max)+max

EDF-DS[1/2]: tot ≤ (m+1)/2

DM: tot ≤ m(1–max)/2+max DM-DS[1/3]: tot ≤ (m+1)/3

[ECRTS’05]

[OPODIS’05]

Gives highest priority to (at most m-1) tasks having t ≥ 1/2, and schedules the remaining ones with EDF

Gives highest priority to (at most m-1) tasks having t ≥ 1/3, and schedules the remaining ones with DM (only constrained deadlines)

Page 21: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Critical instant A particular configuration of releases that leads

to the largest possible response time of a task. Possible to derive exact schedulability tests

analyzing just the critical instant situation. Uniprocessor FP and EDF: a critical instant is

when all tasks arrive synchronously all jobs are released as soon as permitted

Response Time Analysis for uniprocessors FP the response time of task k is given by the fixed

point of Rk in the iteration

ihp i

kkk C

T

RCR

i

Page 22: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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Multiprocessor anomaly Synchronous periodic arrival of jobs is

not a critical instant for multiprocessors:

1 = (1,1,2)2 = (1,1,3)3 = (5,6,6)

Synchronous periodic situation

Second job of 2 delayed by one unit

from [Bar07]

Need to find pessimistic situations to derive sufficient schedulability

tests

Page 23: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 23

Introducing the interferenceIk = Total interference suffered by task k

Iki = Interference of task i on task k

kik

ikkkkkk RI

mCRICR )(

1)(

m

RIRI k

ik

kk

)()(

k

k

kCPU1CPU2CPU3

rkrk+Rk

Ik2Ik1

Ik2

Ik3Ik4Ik5

Ik6

Ik8Ik5

Ik3

Ik7

Ik3

Page 24: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 24

Limiting the interference

k

k

kCPU1CPU2CPU3

rkrk+Rk

Ik2Ik1

Ik2

Ik3Ik4Ik5

Ik6

Ik8Ik5

Ik3

Ik7

Ik3

It is sufficient to consider at most the portion (Rk-Ck+1) of each term Iik in the sum

1)()( kkkkkik CRRIRI

kikkk

ikkk CRRI

mCR )1),(min(

1It can be proved that WCRTk is given by the fixed point of:

Page 25: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 25

Bounding the interference

Exactly computing the interference is complex

Pessimistic assumptions:1. Bound the interference of a task with

the workload:

2. Use an upper bound on the workload.

)()( kikik RWRI

Page 26: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 26

Bounding the workloadConsider a situation in which:

The first job executes as close as possible to its deadline

Successive jobs execute as soon as possible

)()()()( LCLNLwLW iiiii

i

iii T

CDLLN )(

))(,min()( iiiiiii TLNCDLCL where:

CiiL

Di

Ci Ci Ci

Tiεi

(# jobs excluded the last one)

(last job)

Page 27: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 27

RTA for generic global schedulers

An upper bound on the WCRT of task k is given by the fixed point of Rk in the iteration:

The slack of task k is at least:

kikkkikk CRRw

mCR )1),(min(

1

kkk RDS

Rk Sk

Page 28: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 28

Improvement using slack values

Consider a situation in which: The first job executes as close as possible to its

deadline Successive jobs execute as soon as possible

)()()()( LCLNLwLW iiiii

i

iii T

CDLLN )(

))(,min()( iiiiiii TLNCDLCL where:

CiiL

Di

Ci Ci Ci

Tiεi

(# jobs excluded the last one)

(last job)

Page 29: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 29

Improvement using slack values

Consider a situation in which: The first job executes as close as possible to its

deadline Successive jobs execute as soon as possible

where:

i

iiiii T

SCDLSLN ),(

)),(,min(),( iiiiiiiiii TSLNSCDLCSL

CiiL

Di

Ci Ci Ci

TiSi

),(),(),()( iiiiiiii SLCSLNSLwLW

Page 30: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 30

RTA for generic global schedulers

An upper bound on the WCRT of task k is given by the fixed point of Rk in the iteration:

kikkikikk CRSRw

mCR )1),,(min(

1

kkk RDS

1.

2.

If a fixed point Rk ≤ Dk is reached for every task k in the system, the task set is schedulable with any work-conserving global scheduler.

Page 31: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 31

Iterative schedulability test

1. All slacks initialized to zero2. Compute slack lower bound for tasks 1,

…,n if higher than old value update slack bound If lower, do nothing

3. If all tasks have a positive slack lower bound return success

4. If no slack has been updated for tasks 1,…,n return fail

5. Otherwise, return to point 2

Page 32: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 32

RTA refinement for Fixed Priority

The interference on higher priority tasks is always null:

An upper bound on the WCRT of task k can be given by the fixed point of Rk in the iteration:

kiRI kik ,0)(

kikkikikk CRSRw

mCR )1),,(min(

1

kkk RDS 2.

1.

Page 33: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 33

RTA refinement for EDF A different bound can be derived analyzing the

worst-case workload in a situation in which: The interfering and interfered tasks have a common deadline All jobs execute as late as possible

),()( ikikik SRwRI

An upper bound on the WCRT of task k is given by the fixed point of Rk in the iteration:

kkk RDS 2.

1.

kikkikiikikk CRSDwSRw

mCR )1),,(),,(min(

1

Page 34: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 34

Complexity Pseudo-polynomial complexity Fast average behavior

We verified the schedulability of millions of task sets in a few minutes on a normal device.

Lower complexity for Fixed Priority systems at most one slack update per task, if slacks are

updated in decreasing priority order. Possible to reduce complexity limiting the

number of rounds

Page 35: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 35

Polynomial complexity test

A simpler test can be derived avoiding the iterations on the response times

A lower bound on the slack of k is given by:

The iteration on the slack values is the same

Performances comparable to RTA-based test

Complexity down to O(n2)

Page 36: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 36

Experimental results for EDF• 2 processors

• Constrained deadlines

• 1.000.000 task sets generated

• Our test is constantly superior at all utilizations

generatedtask sets

our test

Improvement over existing solutions

Task set utilization

task sets

Bertogna et al.’05Baker et al.’07Goossens et al.’03I-BCL EDFTotal task sets

Page 37: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 37

Experimental results for FP

• 2 processors

• Constrained deadlines

• 1.000.000 task sets generated

• Our test is constantly superior at all utilizations

generatedtask sets

our test

task sets

Density boundBaker et al.’07Bertogna et al.’05I-BCL FPTotal task sets

Task set utilization

Page 38: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 38

FP vs EDF• 4 processors

• Constrained deadlines

• 1.000.000 task sets generated

• our FP test is constantly superior to all tests at every utilization

generatedtask sets

our FP test

task sets

our EDF test

Goossens et al.’03I-BCL EDFBaker et al.’07I-BCL FPTotal task sets

Task set utilization

Page 39: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 39

Conclusions Multiprocessor Real-Time systems are a

promising field to explore. Still few existing results far from tight

conditions. We contributed filling this gap. Future work:

Find tighter schedulability tests. Use our techniques to analyze the efficiency of other

scheduling algorithms (EDZL, EDF-US, FP-DS, etc). Take into account exclusive resources access. Integrate into Resource Reservation framework.

Page 40: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 40

The end

Page 41: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 41

Other research activities

Limited-preemption EDF Reducing Resource Holding Times Shared resources and open

environments

Page 42: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 42

ARM’s MPcore

Page 43: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 43

Frequency and power f = operating frequency V = supply voltage (V~=0.3+0.7 f)

Reducing the voltage causes a higher frequency reduction

Ileak = leakage current (becomes non-negligible) P = Pdynamic + Pstatic = power consumed

Pdynamic ACV2f (main contributor until hundreds nm) Pstatic VIleak (always present, due to subthreshold

and gate-oxide leakage) Reducing V allows a quadratic reduction of

Pdynamic

Page 44: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 44

Power density

40048008

80808085

8086

286386

486Pentium® proc

P6

1

10

100

1000

10000

1970 1980 1990 2000 2010

Year

Po

wer

Den

sity

(W

/cm

2)

Hot Plate

NuclearReactor

RocketNozzle

Page 45: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 45

How many cores in the future? Intel’s 80 core prototype already

available Able to transfers a TB of data/s (Core 2 Duo

reaches 1.66GB data/s) To be released in 5 years

Page 46: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 46

Beyond 2 billion transistors/chip

Intel’s Tukwila Itanium based 2.046 B FET Quad-core 65 nm technology 2 GHz on 170W 30 MB cache 2 SMT 8 threads/ck

Page 47: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 47

Intel’s timeline Year Processor

ManufacturingTechnology

FrequencyNumber of transistors

1971 4004 10 m 108 kHz 23001972 8008 10 m 800 kHz 35001974 8080 6 m 2 MHz 45001978 8086 3 m 5 MHz 290001979 8088 3 m 5 MHz 290001982 286 1,5 m 6 MHz 1340001985 386 1,5 m 16 MHz 2750001989 486 1 m 25 MHz 12000001993 Pentium 0,8 m 66 MHz 31000001995 Pentium Pro 0,6 m 200 MHz 55000001997 Pentium II 0,25 m 300 MHz 75000001999 Pentium III 0,18 m 500 MHz 95000002000 Pentium 4 0,18 m 1,5 GHz 420000002002 Pentium M 90 nm 1,7 GHz 550000002005 Pentium D 65 nm 3,2 GHz 2910000002006 Core 2 Duo 65 nm 2,93 GHz 2910000002007 Core 2 Quad 65 nm 2,66 GHz 5820000002008 Core 2 Quad X 45 nm >3 GHz 820000000

Page 48: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 48

From 4004 (1971) to Pentium D (2005): Tech: 10 um 65 nm : 150 x f: 100kHz 3 GHz: 25000 x # MOS: 2.300291.000.000: 125.000 x P: 0.2W100W: 500 x

Vdd reduced (from 5V to ~1V) Not all MOS change state

Great part of chip occupied by cache

f Vdd-Vtt Ileak Vdd, 1/Vtt

Page 49: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 49

Intel 4004 (1971) Intel Pentium IV (2000)

Page 50: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 50

Itanium temperature plot

Page 51: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 51

CPU1

CPU2

CPU3

Problems addressed Run-time scheduling problem Schedulability problem

1

2

3

4

5

?

Page 52: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 52

Incandescent light bulb: 25-100 W

Compact fluorescent lights: 5-30 W

Typical car: 25 kW Human climbing stairs: 200 W 1 kWh = 1 kW constantly

supplied for 1 h ENEL: 0.13-0.18 €/kWh

Device Power Lavastoviglie    2000 W Asciuga Biancheria    2000 W Forno Elettrico    2000 W Friggitrice Elettrica    1800 W

 Lavatrice    1600 W Asciugacapelli    1300 W

 Ferro da stiro    1200 W

 Aspirapolvere    1100 W  Forno a microonde    800 W

 Tostapane    800 W Robot da cucina    500 W

 Frigorifero    160 W

 Televisore    50 W

Page 53: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 53

Density and utilization bounds

Page 54: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 54

Uniprocessor feasibility

Deadline modelTask model

Implicit Constrained or Arbitrary

Sporadic or Synchronous

Periodic

Linear test:Utot ≤ 1

Unknown complexity;Pseudo-polynomial test if Utot< 1:

EDF until Utot/(1- Utot) · max(Ti-Di)

Asynchronous Periodic

Linear test:Utot ≤ 1

Strong NP-hard;Exponential test: EDF until 2H+Dmax+rmax

Page 55: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 55

Uniprocessor static priority run-time scheduling

Deadline modelTask model

Implicit Constrained

Arbitrary

Sporadic or Synchronous

Periodic

RM optimality

DM optimality

Unknown complexity; Audsley’s bottom-up

algorithm (exponential complexity)

Asynchronous Periodic

Unknown complexity;Audsley’s bottom-up algorithm (exponential

complexity)

Page 56: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

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dissertation 56

Uniprocessor static priority feasibility

Deadline model

Task model

Implicit Constrained Arbitrary

Sporadic or Synchronous

Periodic

Pseudo-polynomial test: RM until Tmax or

RTA

Pseudo-polynomial test: DM until Dmax or

RTA

Unknown complexity;Audsley’s bottom-up

algorithm (exponential)

Asynchronous Periodic

Unknown complexity

Strong NP-hard

Audsley’s bottom-up algorithm (exponential)

Page 57: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 57

Uniprocessor static priority schedulability

Deadline modelTask model

Implicit Constrained Arbitrary

Sporadic or Synchronous

Periodic

Pseudo-polynomial

simulation until Tmax or RTA

Pseudo-polynomial

simulation until Dmax or RTA

Unknown complexity;Lehoczky’s

test (exponential)

Asynchronous Periodic

Strong NP-hard;Simulation until 2H+rmax or other exponential tests

Page 58: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 58

Multiprocessor feasibility

Deadline modelTask model

Implicit Constrained Arbitrary

Sporadic

Linear test:Utot ≤ m

Unknown complexity;Synchronous periodic not a critical

instant

Synchronous Periodic

Unknown complexity; Horn’s algorithm in

(0,H]

Unknown complexity

Asynchronous Periodic

Strong NP-hard

Page 59: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 59

Multiprocessor run-time scheduling

Deadline modelTask model

Implicit Constrained Arbitrary

Sporadic P-fair, GPS Requires clairvoyance

Synchronous Periodic P-fair, GPS,

LLREF, EKG, BF

Unknown complexity; Clairvoyance not

needed;Horn’s algorithm in

(0,H]

Unknown complexity; Clairvoyanc

e not needed

Asynchronous Periodic

Unknown complexity; Clairvoyance not needed

Page 60: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 60

Feasibility conditions

Σi Ci /min(Di,Ti) ≤ m

load > m

load* > m

Utot > m

Sufficient feasibility and schedulability tests

???

Not

fe

asib

leF

easi

ble

Page 61: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 61

Multiprocessor static job priority feasibility

Deadline model

Task modelImplicit Constrained Arbitrary

SporadicUnknown

complexity

Unknown complexity;Synchronous periodic not a critical

instant

Synchronous Periodic

Unknown complexity;Simulation until hyperperiod for all N!

job priority assignments

Unknown complexity

Asynchronous Periodic

Unknown complexity

Strong NP-hard

Page 62: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 62

Multiprocessor static job priority schedulability

Deadline model

Task modelImplicit Constrained Arbitrary

SporadicUnknown

complexity

Unknown complexity;Synchronous periodic not a critical

instant

Synchronous Periodic

Unknown complexity;Simulation until hyperperiod

Unknown complexity

Asynchronous Periodic

Strong NP-hard

Page 63: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 63

Multiprocessor static priority run-time scheduling

Deadline modelTask model

ImplicitConstrain

edArbitrary

Periodic (synchronous or asynchronous)

Unknown complexity; Cucu’s optimal priority assignment

Sporadic Unknown complexity;

Page 64: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 64

Multiprocessor static priority feasibility

Deadline model

Task modelImplicit Constrained Arbitrary

SporadicUnknown complexity;

Synchronous periodic not a critical instant

Synchronous Periodic

Strong NP-hard; Simulation until hyperperiod for all n! priority assignments

Asynchronous Periodic

Strong NP-hard; Simulation on exponential feasibility interval for all n!

priority assignments

Page 65: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 65

Multiprocessor static priority schedulability

Deadline model

Task modelImplicit Constrained Arbitrary

SporadicUnknown complexity;

Synchronous periodic not a critical instant

Synchronous Periodic

Unknown complexity; Simulation until hyperperiod

Asynchronous Periodic

Strong NP-hard; Simulation on exponential feasibility interval

Page 66: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 66

RTA for Uniprocessors For FP, the worst-case response time of a

task is given by the first instance released at a critical instant

For EDF, it is given by an instance in a busy interval starting with a critical instant

With these observations it is possible to compute the WCRT of all tasks. Example: for FP, the WCRT of a task k is given by the fixed point of:

ihp i

kkk C

T

RCR

i

Page 67: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 67

RTA refinement for EDF Still valid the bound: A different bound can be derived analyzing

the worst-case workload in a situation in which:

The interfering and interfered tasks have a common deadline

All jobs execute as late as possible

),()( ikikik SRwRI

CiiDk

Di

Ci Ci

Ti

k

Si

),()()( ikEDFik

ikk

ik SDwDIRI

ii

ikik C

T

DDDBF

1

with:

i

i

iikki

ikiki S

C

TDBFDCDBFSDw

0

,min),(

),()( ikikik SRwRI

and:

Page 68: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 68

RTA refinement for EDF A different bound can be derived analyzing

the worst-case workload in a situation in which:

The interfering and interfered tasks have a common deadline

All jobs execute as late as possible

CiiDk

Di

Ci Ci

Ti

k

Si

),()()( ikEDFik

ikk

ik SDwDIRI i

i

ikik C

T

DDDBF

1

with:

i

i

iikki

ikiki S

C

TDBFDCDBFSDw

0

,min),(

),()( ikikik SRwRI

and:

Page 69: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 69

Polynomial complexity test

A lower bound on the slack of k is given by:

For EDF:

For FP:

Page 70: Real-Time Scheduling Analysis for Multiprocessor Platforms Marko Bertogna PhD dissertation Scuola Superiore S.Anna, Pisa, Italy.

19/05/2008 Marko Bertogna - PhD

dissertation 70

Limiting the number of iterations