RCEAT for

Radio Frequency Identification (RFID)

UHF Tag

By

K.KARTHIK

A.SWAPNA

A.DEEPTHI

Stands for Radio Frequency Identification Uses radio waves for identification New frontier in the field of information technology One form of Automatic Identification Provides unique identification or serial number of an

object

2

3

Tag IDTag ID

TagsReaderLocal Server

Fig: Overview of most important Automatic ID procedures

•Automatic identification procedures (Auto-ID) have become very popular in many service industries, purchasing and distribution logistics, industry, manufacturing companies and material flow systems.

•Automatic identification procedures exist to provide information about people, animals, goods and products in transit.

System parameters Barcode OCR Voicerecognition

Biometry Smartcard

RFIDsystems

Typical data quantity (bytes)

1–100 1–100 — — 16–64 k 16–64 k

Data density Low Low High High Very high Very high

Readability by people Limited Simple Simple Difficult Impossible Impossible

Purchase cost/readingelectronics

Very low Medium Very high Very high Low Medium

Unauthorizedcopying/modification

Slight Slight Possible(audio tape)

Impossible Impossible Impossible

Reading speed (includinghandling of data carrier)

Low~4 s

Low~3 s

Very low>5 s

Very low>5–10 s

Low ~4 s

Very fast~0.5 s

Maximum distance between

data carrier and reader

0–50 cm <1 cm Scanner

0–50 cm Directcontact

Directcontact

0–5-m,Microwave

(contact-less)

Table: Comparison of different auto-ID systems

Introduction (contd..)

6

1935 1973

1999

199920042006

1960

What’s next?

Reader consists of A radio frequency module (transmitter and receiver) A control unit which controls the flow of data A coupling element like an antenna to the transponder

Tag consists of Microchip for storage and computation coupling element, such as an antenna coil for communication

RFID systems operate according to one of two basic procedures: Full duplex (FDX) or half duplex (HDX) systems Sequential (SEQ) systems

Fig: RFID System components

RF circuit & analog circuit

Baseband processor EEPROM

TAG

READER

◦ Passive Operational power scavenged from reader radiated power

◦ Semi-passive Operational power provided by battery

◦ Active Operational power provided by battery - transmitter

built into tag

NN

SS

TAG

Rea

der

Rea

der

TAG

BackscatterBackscatter

• Near field (LF, HF): inductive coupling of tag to magnetic field circulating around antenna (like a transformer)• Varying magnetic flux induces current in tag. Modulate tag load to communicate with reader• field energy decreases proportionally to 1/R3 (to first order)

• Far field (UHF, microwave): backscatter. • Modulate back scatter by changing antenna impedance• Field energy decreases proportionally to 1/R

• Boundary between near and far field: R = wavelength/2 pi so, once have reached far field, lower frequencies will have lost significantly more energy than high frequencies• Absorption by non-conductive materials significant problem for microwave frequencies

Inductive CouplingInductive Coupling

Also known an interrogator Reader powers the tag by sending it RF energy Can be handheld or stationary Consists of:

◦ Transmitter◦ Receiver◦ Antenna◦ Microprocessor◦ Memory◦ Controller or Firmware◦ Communication channels◦ Power

10

Need for RFIDNeed for RFIDTransportation payments People tagging

Frequency DistanceExample

Application

LF 125khz Few cmAuto-

Immobilizer

HF 13.56Mhz 1mBuilding Access

UHF 900Mhz ~7m Supply Chain

μwave 2.4Ghz 10m Traffic Toll

Focus is on UHF

Traffic Toll

Supply Chain

Auto-immobilizer

12

Number of bits 96 or 128/256 bits

Collision Avoidance Slotted ALOHA

Reader Power Below 1W

Frequency 902~920MHz(ISM band (unlicensed))

Type of tag Passive

Tag classification Class 1-Read, write once / write many (Generation 2)

Read range 2-7 meters

Coupling Electromagnetic

Operating procedure Half Duplex mode

Standard Meets EPC Global Gen2 (v.1.0.9) and ISO/IEC 18000-6c

Implementation Designed for high performance and low power consumption based RFID for 130nm silicon process

Functional block diagram

• Advantages Due to good security feature, no complicated coding or cryptography is needed.

Low power consumption and reduced complexity

Serial Data Line

Parallel Data Line

Memory Controller

Receive Buffer

Reset Counter

RNGSlot counter

Transmit buffer

Demodulated signal from the reader

Modulated signal to the reader

Comparator

Controller

Control Line w.r.t data

Operating Procedure

Half Duplex

No of bits 96-bit Electronic product code (64 bit ID; 16bit CRC; 8 bit Pass; 8 bit Control

Collision Avoidance

Slotted Aloha [RNG & Slot Counter]

Modulation type

OOK (On Off Shift Keying) [ASK]

Operating frequency

Receiver:100khz; Transmitter:12.5Mhz; Comparator, RNG, Slot Counter, CRC, Memory,: 200khz

Specifications

RF circuit & analog circuit

Baseband processor EEPROM

TAG

Power Up Receive BufferReceives the data/command from the reader. [ID-64bits, CRC-16bits, Pass-

8bits]

CompareCompares the

received ID and the ID stored in the

memory.

ControllerSends the control signals to the sub-

blocks. It starts the module whenever needed and stops when the task is

completed

Stores the verified data in the latch and generates the 16 bit CRC for

transmission of this data.

Transmit BufferTransmits the modulated

data/command to the reader. [ID-64bits, CRC-16bits, Pass-8bits]Slot

Counter

Random number generator

Reset/Halt

Yes

If received bit count is not correct

If received bit count is correct

No

Anti-collision

HandheldHandheld Smart ShelvesSmart Shelves

Point of SalePoint of Sale

Conveyor BeltConveyor Belt

PrintersPrinters

ForkliftForkliftDock DoorDock Door

17

Time

The reference architecture was modified by modifying the controller block In reference architecture, the controller was controlling only the data flow to each of

the sub modules, whereas the modified architecture’s controller controls both clock and the data flow for each of the sub module

Serial Data Line

Parallel Data Line Memory Controller

Receive Buffer

Reset Counter

RNGSlot counter

Transmit buffer

Demodulated signal from the reader

Modulated signal to the reader

Comparator

Controller

Control Line w.r.t clock and data

Test Setup

Baseband Processor

Test Data Unit

Test Case 1

Test Case 2

Test Data Unit

Test Case 1

Test Case 2

Test Select

Simulation window

Modulated Serial bits

Clock

Reset

SerialInput data

Clock :100 MHzReset :Active highInput bits: 88 bits serial Output : 88 bits serial which is amplitude modulatedGiven test case: 11001111000000010000000100000001000000010000000100000001000000010000000

1111111111111111Expected Output:011001111000000010000000100000001000000010000000100000001000000010000000

101111100010110

ConclusionA proposed reliable and cost effective anti-collision technique (RCEAT) is

designed to achieve a reliable and cost effective identification technique of the tag.

The RCEAT architecture consists of two main sub systems: pre RCEAT checks

errors in the incoming packets using the crc scheme.

post RCEAT identifies the error free packets using binary tree based technique.

Architecture has been synthesized using Xilinx synthesis Technology (XST),

simulated using MODELSIM.

 

QUERIES…………?