Rapid, Predictive Modeling for High Frequency Interconnect on Low Cost Substrates Jaemin Shin...
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Transcript of Rapid, Predictive Modeling for High Frequency Interconnect on Low Cost Substrates Jaemin Shin...
Rapid, Predictive Modeling for High Frequency Interconnect on Low Cost
Substrates
Jaemin ShinAdvisor: Dr. Martin A. Brooke
School of Electrical and Computer Engineering
Georgia Institute of Technology, Atlanta, GA 30332
April 2005
Dissertation Defense Presentation
Spring, 2005
2
Outline
Objective
Limitations of Electrical Board-level Interconnects
Background
Motivation
Proposed Modeling Procedure
Modeling of Straight Microstrip Lines
Modeling of Serpentine Interconnects
Conclusions
3
Objective
Our goal is to develop a rapid, predictive (scalable) measurement-based modeling method for high frequency interconnects on low cost substrates:
Modeling of interconnect structures
Prediction by scalability and interpolation
Evaluation of modeling performance with measured behaviors and a simulation tool.
4
Outline
Objective
Limitations of Electrical Board-level Interconnects Board-level Interconnect Geometrical limitations at high frequency
Background
Motivation
Proposed Modeling Procedure
Modeling of Straight Microstrip Lines
Modeling of Serpentine Interconnects
Conclusions
5
Board-level Interconnect in Telecommunication
Backplane Interconnect
Chip-to-chip Interconnect
[1] http://www.ece.gatech.edu/research/labs/mag/mixed_signal/mixedsig3.htm
6
Limitations of Electrical Board-level Interconnects 1
Signal integrity problems Transmission-line effects
High rising and falling time and delay time High channel loss of long channels
Non-ideal effects at high frequency Skin effect Frequency-dependent dielectric loss Manufacturing variations
Geometrical issues Geometrical discontinuity
Reflection loss (Echo effect) Dense connections
Self-coupling Crosstalk
Electromagnetic interference (EMI)
7
Limitations of Electrical Board-level Interconnects 2
Switching noise High power consumption
Thermal problem
Approaches to addressing the limitations Advanced electrical technology
High speed interconnect driver : LVDS, CML, and PECL Clock & data recovering circuit (CDR) High performance board material Co-design with accurate channel model
Optical interconnect technology Optical technology
VSCEL (Vertical Surface Cavity Emitting Laser), micro-mirror, and optical waveguide embedding techniques
Contribution of this thesis work
8
Trend of Board-level Interconnect
According to 2003 ITRS (International Technology Roadmap of Semiconductor)
In near-term years, off-chip frequency will be to keep its speed lower than 10 GHz.
Most telecommunication companies have preferred the use of low cost FR4 materials.
Moreover, cost-performance and low-cost products occupy a considerable area of the market
Thus, interconnects on FR4 are still attractive.
However, at high frequency, FR4 material needs more design work with an efficient, accurate model to achieve acceptable electrical performance.
0
10
20
30
40
50
60
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017
Year
Freq
uenc
y (G
Hz)
On-chip frequency Off-chip frequency
[2] http://public.itrs.net/Files/2003ITRS/Home2003.htm
9
Example 1: Long Straight Lines of Different Dielectric Materials 1
[3] http://www.tycoelectronics.com/products/simulation/files/papers/dc00brdh.pdf
Four different board materials Configuration of striplines with 50-Ω characteristic impedance 12-mil wide, 18-inch long channel line
Material εr
@1 MHz
εr
@1 GHz
tanδ@1GHz
Relative Cost
FR4 4.30 4.05 0.020 1
GETEK 4.15 4.00 0.015 1.1
ROGERS 4350/4320
3.75 3.60 0.009 2.1
ARLON CLTE 3.15 3.05 0.004 6.8
10
[3] http://www.tycoelectronics.com/products/simulation/files/papers/dc00brdh.pdf
Eye diagrams at 5 Gbps and 10 Gbps
a) 5 Gbps b) 10 Gbps
Example 1: Long Straight Lines of Different Dielectric Materials 2
11
Example 2: Long Straight Lines with a Via
Straight transmission line with viaStraight transmission line without via
Low-cost FR4 material Microstrip with
50-Ω characteristic impedance Via connection Three different line lengths (1, 10 and 20cm)
and three different speeds (1 G, 2.5 G and10 Gbps)
εr=4.3
130 mil
1.7 mil
FR420 mil
12
130-mil wide serpentine structures on FR4 board Coupling effects and bending effects
Example 3: Interconnect Structures with Couplings and Bends
130-mil wide M-shaped serpentine structure with 130-mil spacing
Bending effect & Line length
10Gbps
Coupling effect
130-mil wide M-shaped serpentine structure
with 65-mil spacing
130-mil wide 7-turn serpentine structure with 130-mil spacing
13
Outline
Objective
Limitations of Electrical Board-level Interconnects
Background Non-ideal Effects Previous Modeling Methods
Motivation
Proposed Modeling Procedure
Modeling of Straight Microstrip Lines
Modeling of Serpentine Interconnects
Conclusions
14
Non-ideal Effects on Transmission Line 1
Skin effect Skin depth
=130mil
mF 00
2
15
Complex dielectric constant due to the electric polarization
Loss tangent
Non-ideal Effects on Transmission Line 2
Frequency-dependent dielectric loss
"'-j
''
"tan
FR4
Polymide
BT/Epoxy
951 Green TapeTM
[4] D. I. Amey and S. J. Horowitz, "Materials performance at frequencies up to 20 GHz," presented at IEMT/IMC Symposium, 1997., 1st [Joint International Electronic Manufacturing Symposium and the International Microelectronics Conference], 1997.
16
Non-ideal Effects on Transmission Line 3
Manufacturing variations Composite ratio (glass- to- resin ratio)
Conductor surface roughness Too rough and random
Fabrication tolerance The need for statistical approaches
glsglsrsnrsnr VV Metal
FR4
SEM (Scanning Electron Microscope) picture
17
Previous Modeling Methods
Earlier interconnect research: microwave and digital engineering Microwave engineering: transmission lines in narrow
bandwidths Digital engineering: timing analysis at low frequency High-frequency digital interconnect: frequency analysis
based on the electromagnetic equations, numerical methods, and measurement techniques
Three classical methods Analytical equation-based method Numerical full-wave-based method Measurement-based method
18
Direct derivation of a model from the fundamental electromagnetic equations
Neither accurate nor practical unless the structures of interest are simple
Not flexible
Difficult to develop, in general
Basic insight and background for the two following methods
Analytical Equation-based Method
19
Maxwell equation-based method
Discretization of a structure into small segments to obtain accurate responses of the entire system (trade-off between accuracy and computational efficiency)
Accurate and highly flexible
Slow speed and extensive memory requirements for complex geometrical systems
Difficult to incorporate the non-ideal effects such as frequency-dependent variables and manufacturing variations
Numerical Full-wave-based Method
20
Measured data in the frequency domain can be used to find circuit model parameters. Optimization techniques are used for the equivalent-circuit parameters
Statistical modeling approaches can be applied to overcome the manufacturing variations
The non-ideal effects are naturally incorporated
Compatible with the existing circuit simulators
Very accurate and fast
Needs to be more flexible
Measurement-based Method
21
Motivation The need for an accurate, rapid model for interconnects on FR4
to address electrical board-level interconnect limitations at high frequency
FR4 material limitations Non-ideal effects Geometrical limitations Inefficiency of numerical methods for complex structures
Advantages of the measurement-based method compared with others
Easy: Compatibility with the circuit simulators Efficient - Very fast simulation speed
- No need for heavy computation resources Accurate: Incorporation of the non-ideal effects Statistical: Incorporation of the fabrication tolerance
The need for improved flexibility: the use of scalability and interpolation can achieve this goal.
Co-simulation and Co-design with circuits
22
Proposed Modeling Procedure
Determining the interconnect structures to be considered
Defining building blocks
Design and fabrication
Calibration and measurement
Extraction of EC-parameters using optimization
Predicting other structures by using the scalable model and
interpolation
Verification with measured data
Co-simulation and co-design with circuitry
Statistical approaches
ExtensionInitial modeling Generalization
Generating model library
23
Performance Evaluation
Modeling performance attributes
Accuracy
Frequency domain: Impedance parameters
Time domain: Eye diagrams
Efficiency
Computation resources
Simulation times
Utility
Limited to accessibility
24
Measurement Setup
Frequency response Channel characterization
Z-parameters converted from measured S-parameters
SOLT (Short-open-load-thru) calibration using 3.5 mm calibration kit
Vector network analyzer (VNA)
Time response Interconnect verification
Eye diagrams Pattern generator and digital
oscilloscope
VNA
Device Under Test (DUT)
Port 1 Port 2
Pattern generator
DUT
Digital Oscilloscope
25
Z21
Mag
nit
ud
e (d
B)
Z11
Mag
nit
ud
e (d
B)
Z21
Ph
ase
(deg
ree)
Z11
Ph
ase
(deg
ree)
Momentum simulation results of the 2400 mil microstrip with SMA connector
Measured Momentum
Momentum Simulation
Momentum simulation Layout
2400 mils
26
Outline
Objective
Limitations of Electrical Board-level Interconnects
Background
Motivation
Modeling Procedure
Modeling of Straight Microstrip Lines Modeling Description Results and Performance Comparison
Modeling of Serpentine Interconnects
Conclusions
27
Building Block Diagrams and Equivalent Circuits
Rectangular Building Block
50 mil
SMA Building Block
SMA Building Block
SMA Connector Building Block
Rectangular Building Block
400-mil long line 800-mil long line
28
Test Structures of the Straight Microstrip Lines
2400 mil long line 1600 mil long line
1200 mil long line 800 mil long line
400 mil long line (Predictive model)
29
Optimization of Equivalent-circuit Parameters
50 mil long microstrip building block
SMA connector building block
Measured s-parameter data block
Equivalent-circuit block
Optimization setup
Initial values
S-parameter simulation setup
30
Optimized Z-parameter Data of the 400-mil Long Line
Measured Modeled
Z2
1 M
ag
nit
ud
e
(dB
)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
31
Predicted Z-parameter Data of the 800-mil Long LineZ
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled Momentum
32
Z2
1 M
ag
nit
ud
e
(dB
)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled Momentum
Predicted Z-parameter Data of the 2400-mil Long Line
33
0 V
500 mV
0 V
500 mV
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Comparison of Eye Diagrams of the 2400-mil Long Line
Measured eye diagrams
Simulated eye diagrams using the predicted structure
34
Simulation Time vs. Line Length
Simulation Resources a UNIX computer
500 MHz Ultra SPARC IIi CPU
2 G-byte memory
35
Outline
Objective
Limitations of Electrical board-level Interconnects
Background
Motivation
Modeling Procedure
Modeling of Straight Microstrip Lines
Modeling of Serpentine Interconnects Modeling Description Results and Performance Comparison Interpolation
Conclusions
36
Building-block Diagrams and Equivalent Circuits
SMA Connector Building Block
Uncoupled Rectangular Building Block
Coupled Rectangular Building Block U-shaped Building Block
N-shaped structure M-shaped structure
37
Combination of Equivalent Circuits
Equivalent circuits of the N-shaped structure
38
Test Structures 1
Predicting
3 different widths and 3 different spacings
39
Test Structures 2
Four additional extended structures 130-mil width and 130-mil spacing (1S) 4-, 5-, 6- and 7- turn serpentine interconnect structures
4 turns 5 turns 6 turns 7 turns
40
Predictive equivalent circuit block
Measured s-parameter data block
Optimization of Equivalent-circuit Parameters
Optimization setupUncoupled Rectangle
SMA connector
Coupled Rectangle
U-shape
Initial values
Uncoupled Rectangle
Mutual Coupling Element
S-parameter simulation setup
41
Optimized Z-parameter Data of the N-shaped Serpentine Structure Z
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled
42
Predicted Z-parameter Data of the M-shaped Serpentine Structure Z
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled Momentum
43
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Comparison of Eye Diagrams of the M-shaped Serpentine Structure
Measured eye diagrams
Simulated eye diagrams using the predicted structure
0 V
500 mV
0 V
500 mV
44
Predicted Z-parameter Data of the 7-turn Serpentine Structure Z
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled Momentum
45
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Measured eye diagrams
Simulated eye diagrams using the predicted structure
0 V
500 mV
0 V
500 mV
Comparison of Eye Diagrams of the 7-turn Serpentine Structure
46
Simulation Time vs. Number of Turns
Simulation Resources a UNIX computer
500 MHz Ultra SPARC IIi CPU
2 G-byte memory
N-shaped M-shaped
47
Interpolation
104-mil width (-20%) 156-mil width (+20%)
65-mil spacing (0.5 S)
260-mil spacing (2 S)
130-mil width and 130-mil spacing (1S)
Width-interpolation
Spacing-interpolation
N-shaped Structure Interpolation
48
Z-parameter Data of N-shaped Structure Predicted by Width-interpolationZ
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled
Predicted Z-parameter data of the 130-mil wide N-shaped serpentine structure
49
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Measured eye diagrams
Simulated eye diagrams using the predicted structure obtained by width-interpolation
Comparison of Eye Diagrams of the Predicted N-shaped Structure by Width-interpolation
0 V
500 mV
0 V
500 mV
50
Z-parameter Data of M-shaped Structure Predicted by Width-interpolationZ
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled
Z-parameter data of the 130-mil wide M-shaped serpentine structure predicted using EC-parameters of the width-interpolated N-shaped structure
51
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Measured eye diagrams
Simulated eye diagrams using the width-interpolated predicted structure
Comparison of Eye Diagrams of the Predicted M-shaped Structure using the EC-parameters of the Width-interpolated N-shaped Structure
0 V
500 mV
0 V
500 mV
52
Z-parameter Data of N-shaped Structure Predicted by Spacing-interpolationZ
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled
Predicted Z-parameter data of the N-shaped serpentine structure with 130-mil spacing (1S)
53
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Measured eye diagrams
Simulated eye diagrams using the spacing-interpolated predictive model
Comparison of Eye Diagrams of the Predicted N-shaped Structure Obtained by Spacing-interpolation
0 V
500 mV
0 V
500 mV
54
Predicted Z-parameter Data of M-shaped Structure by Spacing-interpolationZ
21
Ma
gn
itu
de
(d
B)
Z1
1 M
ag
nit
ud
e (
dB
)
Z21
Ph
ase
(de
gre
e)
Z1
1 P
ha
se
(d
eg
ree
)
Measured Modeled
Z-parameter data of the M-shaped serpentine structure with 130-mil spacing (1S) predicted using EC-parameters of the spacing-interpolated N-shaped structure
55
1 Gbps 2.5 Gbps 5 Gbps 7.5 Gbps 10 Gbps
Measured eye diagrams
Simulated eye diagrams from the predictive model by spacing-interpolation
Comparison of Eye Diagrams of the Predicted M-shaped Structure using EC-parameters of the Spacing-interpolated N-shaped Structure
0 V
500 mV
0 V
500 mV
56
Conclusions
A rapid, predictive measurement-based modeling method was developed for high-frequency interconnects on FR4.
Our method was applied to the modeling of straight microstrip lines and serpentine interconnect structures.
The predictive power of the developed scalable models was demonstrated in several extended interconnect structures, and the ability to use interpolation to predict the high frequency performance of structures with differently sized building blocks was demonstrated.
The usefulness of this predictive method was validated by comparing our predictions with measurements both in the frequency and time domains and by comparing our predictions with the ADS momentum simulations in terms of efficiency and accuracy.
Therefore, this proposed high-frequency interconnect modeling method is not only efficient but accurate as well, compared with the measured behaviors and the momentum simulation. Furthermore, the interpolation enable fast accurate predictions for variations of interconnects in width and spacing.
57
Publications Generated 1) J. Shin, C.-S. Seo, A. Chellappa, M. Brooke, A. Chattejce and N. M. Jokerst, "Comparison of electrical
and optical interconnect," Electronic Components and Technology Conference, 2003.
2) O. Bourdreaux, S.-Y. Cho, J. Shin, A. Chellappa, D. Schimmel, M. Brooke and N. M. Jokerst, "Optical chip-to-chip interconnects for memory systems," presented at Lasers and Electro-Optics Society, LEOS, the 16th Annual Meeting of the IEEE, 2003.
3) C. Cha, J. Shin, Z. huang, N. M. Jokerst and M. Brooke, “High-Frequency Equivalent Circuit-Level Model of MSM PD for Optical Front-end Receiver Applications,” presented at Asia Pacific Microwave conference, APMC 2003.
4) N. M. Jokerst, T. K. Gaylord, E. Glytsis, M. A. Brooke, S. Cho, T. Nonaka, T. Suzuki, D. L. Geddis, J. Shin, R. Villalaz, J. Hall, A. Chellapa and M. Vrazel,"Planar lightwave integrated circuits with embedded actives for board and substrate level optical signal distribution," Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on], vol. 27, pp. 376-385, 2004.
5) J. Shin, C. Cha, S. Cho, J. Kim, N. M. Jokerst and M. Brooke,"FR4 printed circuit board design for Giga-bits embedded optical interconnect applications," presented at Electronic Components and Technology, ECTC '04. Proceedings, 2004.
6) J. Shin, S.-W. Seo, S.-Y. Cho, J. H. Kim, M. Brook and N. M. Jokerst,"Embedded photodetectors in polymer waveguides for optical interconnect integrated with a Si-Ge transimpedance amplifier circuit operating at 2.5 Gbit/s,"presented at Biophotonics/Optical Interconnects and VLSI Photonics/WBM Microcavities, Digest of the LEOS Summer Topical Meetings, 2004.
7) J. H. Kim, J. Shin, C. Cha, N. Jokerst and M. Brooke, “Wideband multiple resonance small-signal laser diode model for the co-design of laser drive circuits,” presented at the 47th Midwest Symposium, 2004.
8) J. Shin, J. H. Kim, C. Cha, N. M. Jokerst and M. Brooke,”Rapid, Predictive Measurement-based Modeling for High Frequency Interconnect on FR4 Substrate,” accepted at Electronic Components and Technology, 2005.
9) J. H. Kim, J. Shin, C. Cha, N. M. Jokerst, and M. A. Brooke, “An Improved Wideband Laser Diode Lumped Element Equivalent Circuit Model for the Optoelectronic Circuit Design,” submitted at Information and Communication Engineers (IEICE) Transactions on Information and Systems, 2005
58
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