Quad, 235 MHz, DC-Coupled VGA and Differential Output ... · The −3 dB bandwidth of the...
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Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier Data Sheet AD8264 Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Low noise Voltage noise: 2.3 nV/√Hz Current noise: 2 pA/√Hz Wide bandwidth Small signal: 235 MHz (VGAx); 80 MHz (output amplifier) Large signal: 80 MHz (1 V p-p) Gain range 0 to 24 dB (input to VGA output) 6 to 30 dB (input to differential output) Gain scaling: 20 dB/V DC-coupled Single-ended input and differential output Supplies: ±2.5 V to ±5 V Low power: 140 mW per channel at ±3.3 V APPLICATIONS Multichannel data acquisition Positron emission tomography Gain trim Industrial and medical ultrasound Radar receivers GENERAL DESCRIPTION The AD8264 is a quad, linear-in-dB, general-purpose, variable gain amplifier (VGA) with a preamplifier (preamp), and a flexible differential output buffer. DC coupling, combined with wide bandwidth, makes this amplifier a very good pulse processor. Each channel includes a single-ended input preamp/VGA section to preserve the wide bandwidth and fast slew rate for low dis- tortion pulse applications. A 6 dB differential output buffer with common-mode and offset adjustments enable direct coupling to most modern high speed analog-to-digital converters (ADCs), using the converter reference output for perfect dc matching levels. The −3 dB bandwidth of the preamp/VGA is dc to 235 MHz, and the bandwidth of the differential driver is 80 MHz. The floating gain control interface provides a precise linear-in-dB scale of 20 dB/V and is easy to interface to a variety of external circuits. The gain of each channel is adjusted independently, and all channels are referenced to a single pin, GNLO. Combined with a multioutput, digital-to-analog converter (DAC), each section of the AD8264 can be used for active calibration or as a trim amplifier. Operation from a bipolar power supply enables amplification of negative voltage pulses generated by current-sinking pulses into a grounded load, such as is typical of photodiodes or photo- multiplier tubes (PMT). Delay-free processing of wideband video signals is also possible. FUNCTIONAL BLOCK DIAGRAM IPPx VPOS IPNx VOLx VOHx INTERPOLATOR PREAMP 6dB (2×) OFSx OPPx GAIN INTERFACE 100Ω 747Ω 107Ω 100Ω + – VOCM COMM GNHx GNLO BIAS VNEG VGAx ONE CHANNEL SHOWN ATTENUATOR –24dB TO 0dB FIXED GAIN VGA AMPLIFIER 18dB (8×) DIFFERENTIAL OUTPUT AMPLIFIER 6dB (2×) 1kΩ 2kΩ 1kΩ 2kΩ 07736-001 Figure 1.
Transcript of Quad, 235 MHz, DC-Coupled VGA and Differential Output ... · The −3 dB bandwidth of the...
Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier
Data Sheet AD8264
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2009–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com
FEATURES Low noise
Voltage noise: 2.3 nV/√Hz Current noise: 2 pA/√Hz
Wide bandwidth Small signal: 235 MHz (VGAx); 80 MHz (output amplifier) Large signal: 80 MHz (1 V p-p)
Gain range 0 to 24 dB (input to VGA output) 6 to 30 dB (input to differential output)
Gain scaling: 20 dB/V DC-coupled Single-ended input and differential output Supplies: ±2.5 V to ±5 V Low power: 140 mW per channel at ±3.3 V
APPLICATIONS Multichannel data acquisition Positron emission tomography Gain trim Industrial and medical ultrasound Radar receivers
GENERAL DESCRIPTION The AD8264 is a quad, linear-in-dB, general-purpose, variable gain amplifier (VGA) with a preamplifier (preamp), and a flexible differential output buffer. DC coupling, combined with wide bandwidth, makes this amplifier a very good pulse processor. Each channel includes a single-ended input preamp/VGA section to preserve the wide bandwidth and fast slew rate for low dis-tortion pulse applications. A 6 dB differential output buffer with common-mode and offset adjustments enable direct coupling to most modern high speed analog-to-digital converters (ADCs), using the converter reference output for perfect dc matching levels.
The −3 dB bandwidth of the preamp/VGA is dc to 235 MHz, and the bandwidth of the differential driver is 80 MHz. The floating gain control interface provides a precise linear-in-dB scale of 20 dB/V and is easy to interface to a variety of external circuits. The gain of each channel is adjusted independently, and all channels are referenced to a single pin, GNLO. Combined with a multioutput, digital-to-analog converter (DAC), each section of the AD8264 can be used for active calibration or as a trim amplifier.
Operation from a bipolar power supply enables amplification of negative voltage pulses generated by current-sinking pulses into a grounded load, such as is typical of photodiodes or photo-multiplier tubes (PMT). Delay-free processing of wideband video signals is also possible.
FUNCTIONAL BLOCK DIAGRAM
IPPx
VPOS
IPNxVOLx
VOHxINTERPOLATOR
PREAMP6dB (2×)
OFSx
OPPx
GAININTERFACE
100Ω 747Ω
107Ω100Ω
+–
VOCMCOMM GNHx GNLO
BIASVNEG
VGAx
ONE CHANNEL SHOWN
ATTENUATOR–24dB TO 0dB
FIXED GAIN VGAAMPLIFIER18dB (8×)
DIFFERENTIAL OUTPUTAMPLIFIER 6dB (2×)
1kΩ 2kΩ
1kΩ
2kΩ
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Figure 1.
AD8264 Data Sheet
Rev. C | Page 2 of 37
TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6 Maximum Power Dissipation ..................................................... 6 ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ............................................. 8 Test Circuits ..................................................................................... 20
Theory of Operation ...................................................................... 28
Overview ..................................................................................... 28 Preamp ......................................................................................... 28 VGA ............................................................................................. 28 Post Amplifier ............................................................................. 29 Noise ............................................................................................ 29
Applications Information .............................................................. 30 A Low Channel Count Application Concept Using a Discrete Reference ..................................................................................... 30 A DC Connected Concept Example ........................................ 31
Evaluation Board ............................................................................ 34 Connecting and Using the AD8264-EVALZ .......................... 34
Outline Dimensions ....................................................................... 37 Ordering Guide .......................................................................... 37
REVISION HISTORY 10/2018—Rev. B to Rev. C Deleted Figure 113 .......................................................................... 31 Added Figure 113; Renumbered Sequentially ............................ 31 Updated Outline Dimensions ....................................................... 37 1/2016—Rev. A to Rev. B Changes to Features Section, General Description Section, and Figure 1 .............................................................................................. 1 Changes to Figure 2 .......................................................................... 7 Changes to VGA Section ............................................................... 28 Updated Outline Dimensions ....................................................... 37 Changes to Ordering Guide .......................................................... 37
1/2011—Rev. 0 to Rev. A Changes to Figure 1 ........................................................................... 1 Changes to Connecting and Using the AD8264-EVALZ Section and Figure 117 ................................................................................ 34 Changes to Figure 118 ................................................................... 35 5/2009—Revision 0: Initial Version
Data Sheet AD8264
Rev. C | Page 3 of 37
SPECIFICATIONS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit GENERAL PERFORMANCE
–3 dB Small Signal Bandwidth (VGAx) VOUT = 10 mV p-p 235 MHz –3 dB Large Signal Bandwidth (VGAx) VOUT = 1 V p-p 150 MHz –3 dB Small Signal Bandwidth (Differential Output)1 VOUT = 100 mV p-p 80 MHz –3 dB Large Signal Bandwidth (Differential Output)1 VOUT = 2 V p-p 80 MHz Slew Rate VGAx, VOUT = 2 V p-p 380 V/µs VGAx, VOUT = 1 V p-p 290 V/µs Differential output, VOUT = 2 V p-p 470 V/µs Differential output, VOUT = 1 V p-p 220 V/µs Input Bias Current Pins IPPx −8 −5 −3 µA Input Resistance Pins IPPx at dc; ΔVIN/ΔIBIAS 4.2 MΩ Input Capacitance Pins IPPx 2 pF Input Impedance Pins IPPx at 10 MHz 7.9 kΩ Input Voltage Noise 2.3 nV/√Hz Input Current Noise 2 pA/√Hz Noise Figure (Differential Output) VGAIN = 0.7 V, RS = 50 Ω, unterminated 9 dB Output-Referred Noise (Differential Output) VGAIN = 0.7 V (Gain = 30 dB) 72 nV/√Hz VGAIN = −0.7 V (Gain = 6 dB) 45 nV/√Hz Output Impedance VGAx, dc to 10 MHz 3.5 Ω Differential output, dc to 10 MHz <1 Ω Output Signal Range Preamp |VS| − 1.3 V VGAx, RL ≥ 500 Ω |VS| − 1.3 V Differential amplifier, RL ≥ 500 Ω per side |VS| − 0.5 V Output Offset Voltage Preamp offset −6 |<1| +6 mV VGAx offset, VGAIN = 0.7 V −18 |<5| +18 mV Differential output offset, VGAIN = 0.7 V −38 |<10| +38 mV
DYNAMIC PERFORMANCE Harmonic Distortion VGAx = 1 V p-p, differential output =
2 V p-p (measured at VGAx)
HD2 f = 1 MHz −73 dBc HD3 −68 dBc HD2 f = 10 MHz −71 dBc HD3 −61 dBc HD2 f = 35 MHz −60 dBc HD3 −53 dBc
VGAx = 1 V p-p, differential output = 2 V p-p (measured at differential output)
HD2 f = 1 MHz −78 dBc HD3 −66 dBc HD2 f = 10 MHz −71 dBc HD3 −43 dBc HD2 f = 35 MHz −56 dBc HD3 −20 dBc
Input 1 dB Compression Point VGAIN = −0.7 V, f = 10 MHz 7 dBm2 VGAIN = +0.7 V, f = 10 MHz −9.6 dBm
AD8264 Data Sheet
Rev. C | Page 4 of 37
Parameter Test Conditions/Comments Min Typ Max Unit Two-Tone Intermodulation Distortion (IMD3) VGAx = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz −68 dBc
VGAx = 1 V p-p, f1 = 35 MHz, f2 = 36 MHz −51 dBc VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz −49 dBc VOUT = 2 V p-p, f1 = 35 MHz, f2 = 36 MHz −34 dBc Output Third-Order Intercept VGAx = 1 V p-p, f = 10 MHz 32 dBm 19 dBVRMS
VGAx = 1 V p-p, f = 35 MHz 23 dBm 10 dBVRMS
VOUT = 2 V p-p, f = 10 MHz 30 dBm 17 dBVRMS VOUT = 2 V p-p, f = 35 MHz 21 dBm 8 dBVRMS Overload Recovery VGAIN = 0.7 V, VIN stepped from 0.1 V p-p to
1 V p-p 25
ns Group Delay Variation 1 MHz < f < 100 MHz, full gain range ±1 ns
ACCURACY Absolute Gain Error3 −0.7 V < VGAIN < −0.6 V 0 0.2 to 2 3 dB
−0.6 V < VGAIN < −0.5 V −1.25 ±0.35 +1.25 dB −0.5 V < VGAIN < +0.5 V −1 ±0.25 +1 dB
0.5 V < VGAIN < 0.6 V −1.25 ±0.35 +1.25 dB 0.6 V < VGAIN < 0.7 V −3 −0.2 to −2 0 dB Gain Law Conformance4 −0.5 V < VGAIN < +0.5 V, ±2.5 V ≤ VS ≤ ±5 V ±0.2 dB −0.5 V < VGAIN < +0.5 V, −40°C ≤ TA ≤ +105°C ±0.3 dB Channel-to-Channel Matching Single IC, −0.5 V < VGAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C −0.5 ±0.1 to ±0.25 +0.5
dB Multiple ICs, −0.5 V < VGAIN < +0.5 V,
−40°C ≤ TA ≤ +105°C ±0.25
dB GAIN CONTROL INTERFACE
Gain Scaling Factor −0.5 V < VGAIN < +0.5 V 19.5 20.0 20.5 dB/V Over Temperature −40°C ≤ TA ≤ +105°C 20 ± 0.5 dB/V
Gain Range 24 dB Gain Intercept to VGAx 11.5 11.9 12.2 dB
Over Temperature −40°C ≤ TA ≤ +105°C 11.9 ± 0.4 dB Gain Intercept to Differential Output 17.5 17.9 18.2 dB
Over Temperature −40°C ≤ TA ≤ +105°C 17.9 ± 0.4 dB GNHx Input Voltage Range GNLO = 0 V, no gain foldover −VS +VS V Input Resistance ΔVIN/ΔIBIAS, −0.7 V < VGAIN < +0.7 V 70 MΩ GNHx Input Bias Current −0.7 V < VGAIN < 0.7 V −0.9 −0.4 0 µA
Over Temperature −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C −0.4 ± +0.2 µA GNLO Input Bias Current −0.7 V < VGAIN < 0.7 V −1.2 µA
Over Temperature −0.7 V < VGAIN < 0.7 V, −40°C ≤ TA ≤ +105°C −1.2 ± +0.4 µA Response Time 24 dB gain change 200 ns
OUTPUT BUFFER VOCM Input Bias Current 0.3 1.5 2.5 nA
Over Temperature −40°C ≤ TA ≤ +105°C 1.5 ± 0.3 nA VOCM Input Voltage Range OFSx = 0 V, VGAx = 0 V −1.4 +1.4 V Gain (VGAx to Differential Output) 5.75 6 6.25 dB
Over Temperature −40°C ≤ TA ≤ +105°C 6 ± 0.5 dB
Data Sheet AD8264
Rev. C | Page 5 of 37
Parameter Test Conditions/Comments Min Typ Max Unit POWER SUPPLY
Supply Voltage ±2.5 ±5 V Power Consumption
Quiescent Current VS = ± 2.5 V 65 79 88 mA VS = ± 2.5 V, −40°C ≤ TA ≤ +105°C 79 ± 25 mA VS = ± 3.3 V 70 85 95 mA VS = ± 3.3 V, −40°C ≤ TA ≤ +105°C 85 ± 30 mA VS = ± 5 V 81 99 110 mA VS = ± 5 V, −40°C ≤ TA ≤ +85°C5 99 ± 30 mA Power Dissipation VS = ± 2.5 V 395 mW
VS = ±3.3 V 560 mW VS = ±5 V 990 mW PSRR From VPOS to differential output, VGAIN = 0.7 V −15 dB
From VNEG to differential output, VGAIN = 0.7 V −15 dB 1 Differential output = (VOHx − VOLx). 2 All dBm values are calculated with 50 Ω reference, unless otherwise noted. 3 Conformance to theoretical gain expression (see Equation 1 in the Theory of Operation section). 4 Conformance to best-fit dB linear curve. 5 For supplies greater than ±3.3 V, the operating temperature range is limited to −40°C ≤ TA ≤ +85°C.
AD8264 Data Sheet
Rev. C | Page 6 of 37
ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Voltage
Supply Voltage (VPOS, VNEG) ±6 V Input Voltage (INPx) VPOS, VNEG Gain Voltage (GNHx, GNLO) VPOS, VNEG
Power Dissipation 2.5 W Temperature
Operating Temperature Range −40°C to +105°C Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C Package Glass Transition Temperature (TG) 150°C
Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θJA values in Table 3 assume a 4-layer JEDEC standard board with zero airflow.
Table 3. Thermal Resistance Package Type θJA θJC Unit CP-40-91 31.0 2.3 °C/W
1 4-Layer JEDEC board (2S2P).
MAXIMUM POWER DISSIPATION The maximum safe power dissipation for the AD8264 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period can cause changes in silicon devices, potentially resulting in a loss of functionality.
ESD CAUTION
Data Sheet AD8264
Rev. C | Page 7 of 37
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES1. EXPOSED PAD (PIN 0) NEEDS AN ELECTRICAL CONNECTION TO GROUND. FOR PROPER RF GROUNDING AND INCREASED RELIABILITY, THE PAD MUST BECONNECTED TO THE GROUND PLANE.
PIN1INDICATOR
OFS
3VG
A4
OFS
4VN
EGVP
OS
VOC
MG
NH
3G
NH
4C
OM
MIP
P4
123456789
10
2324252627282930
2221
11
33353637383940 32 3134
CO
MM
IPP1
GN
H1
GN
H2
VNEG
GN
LO
OFS
1
VPO
S
OFS
2VG
A1
VOH3
VGA3VOL3
VOH1VOH2
VGA2VOL2
VOL1
VOL4VOH4
IPP2
OPP3IPN3IPP3
IPN2
IPN1OPP1OPP2
IPN4OPP4
AD8264TOP VIEW
(Not to Scale)
12 13 14 15 16 17 18 19 20
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Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description 0 (EP), 12, 39 COMM Ground. Exposed pad (EP, Pin 0) needs an electrical connection to ground. For proper RF grounding
and increased reliability, the pad must be connected to the ground plane. 1, 4, 7, 10 IPN1, IPN2,
IPN3, IPN4 Negative Preamp Inputs for Channel 1 Through Channel 4. Normally, no external connection is needed.
2, 3, 8, 9 OPP1, OPP2, OPP3, OPP4
Preamp Output for Channel 1 Through Channel 4. This pin is internally connected to the attenuator (VGA) input, and normally, no external connection is needed.
5, 6, 11, 40 IPP1, IPP2, IPP3, IPP4
Positive Preamp Input for Channel 1 Through Channel 4. High impedance.
13, 14, 37, 38 GNH1, GNH2, GNH3, GNH4
Positive Gain Control Voltage Input for Channel 1 Through Channel 4. This pin is referenced to GNLO (Pin 36).
15 VOCM This pin sets the differential output amplifier (VOHx and VOLx) common-mode voltage. 16, 35 VPOS Positive Supply (Internally Tied Together). 17, 34 VNEG Negative Supply (Internally Tied Together). 18, 19, 32, 33 OFS1, OFS2,
OFS3, OFS4 Voltage sets the differential output offset for Channel 1 through Channel 4. This is the noninverting input to the differential amplifier, and it has the same bandwidth as the inverting input (VGAx).
20, 25, 26, 31 VGA4, VGA3 VGA2, VGA1
VGA Output for Channel 1 Through Channel 4.
21, 24, 27, 30 VOL1, VOL2 VOL3, VOL4
Negative Differential Amplifier Output for Channel 1 Through Channel 4.
22, 23, 28, 29 VOH1, VOH2, VOH3, VOH4
Positive Differential Amplifier Output for Channel 1 Through Channel 4.
36 GNLO Negative Gain Control Input (Reference for GNHx Pins).
AD8264 Data Sheet
Rev. C | Page 8 of 37
TYPICAL PERFORMANCE CHARACTERISTICS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
–6
0
6
12
18
24
30
36
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
GA
IN (
dB
)
VGAIN (V)
–40°C–40°C+25°C+25°C+85°C+85°C+105°C+105°C
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VGA
DIFFERENTIALOUTPUT
Figure 3. Gain vs. VGAIN vs. Temperature
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
GA
IN E
RR
OR
(d
B)
VGAIN (V) 0773
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TA = +105°CTA = +25°CTA = –40°C
MAXMIN
Figure 4. Gain Error vs. VGAIN vs. Temperature
–4
–3
–2
–1
0
1
2
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
GA
IN E
RR
OR
(d
B)
1MHz10MHz70MHz100MHz150MHz
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VGAIN (V)
Figure 5. Gain Error vs. VGAIN at Various Frequencies to VGAx
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HIT
S
140
120
100
80
60
40
20
0–0.6 –0.4 –0.2 0 0.2 0.4
GAIN ERROR (dB)
MEAN: –0.1dBSD: 0.05dB
VGAIN = 0V
Figure 6. VGA Absolute Gain Error Histogram
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HIT
S
180
150
120
90
60
30
019.0 19.5 20.0 20.5 21.0
GAIN SCALING (dB/V)
MEAN: 20.1dBSD: 0.09dB
Figure 7. Gain Scale Factor Histogram (−0.4 V < VGAIN < +0.4 V)
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HIT
S
80
60
40
20
011.7 11.8 11.9 12.0 12.1
GAIN INTERCEPT (dB)
MEAN: 11.9dBSD: 0.08dB
Figure 8. VGA Gain Intercept Histogram
Data Sheet AD8264
Rev. C | Page 9 of 37
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HIT
S
–0.5 –0.4 –0.3 –0.2 –0.1 0 0.2 0.50.40.30.1
GAIN ERROR MATCHING (dB)
0
100
200
300
400
500
600
700CH 1 TO CH 2CH 1 TO CH 3CH 1 TO CH 4
VGAIN = 0V
Figure 9. Channel-to-Channel Gain Match Histogram
–18
–12
–6
0
6
12
18
24
30
100k 1M 10M 100M
GA
IN (
dB
)
FREQUENCY (Hz)
VGAIN = +0.7V
PIN = –28dBm
VGAIN = +0.5VVGAIN = +0.2VVGAIN = 0VVGAIN = –0.2VVGAIN = –0.5VVGAIN = –0.7V
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Figure 10. Frequency Response vs. Gain to VGAx for Various Values of VGAIN
–40
–30
–20
–10
0
10
20
30
40
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M
VGAIN = +0.7VVGAIN = +0.5VVGAIN = +0.2VVGAIN = 0VVGAIN = –0.2VVGAIN = –0.5VVGAIN = –0.7V
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PIN = –44dBm
Figure 11. Frequency Response vs. Gain to Differential Output for Various Values of VGAIN
–40
–30
–20
–10
0
10
20
30
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 0pFCL = 10pFCL = 22pF
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VOUT = 0.1V p-p
Figure 12. Frequency Response to Differential Output for Various Capacitive Loads
–30
–20
–10
0
10
20
30
GA
IN (
dB
)
–40
FREQUENCY (Hz)
100k 1M 10M 100M
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VOUT = 0.1V p-p
CL = 0pFCL = 10pFCL = 22pF
Figure 13. Frequency Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω
–30
–20
–10
0
10
20
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 0pFCL = 10pFCL = 22pFCL = 47pF
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VOUT = 0.1V p-p
Figure 14. Small Signal Frequency Response to VGAx for Various Capacitive Loads
AD8264 Data Sheet
Rev. C | Page 10 of 37
–30
–20
–10
0
10
20
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 47pFCL = 22pFCL = 9pFCL = 0pF
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PIN = –10dBm
Figure 15. Large Signal Frequency Response to VGAx for Various Capacitive Loads
–30
–20
–10
0
10
20
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 0pFCL = 10pFCL = 22pFCL = 47pF
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PIN = –28dBm
Figure 16. Small Signal Frequency Response to VGAx for Various Capacitive Loads with Series R = 10 Ω
–30
–20
–10
0
10
20
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
CL = 47pFCL = 22pFCL = 10pFCL = 0pF
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PIN = –8dBm
Figure 17. Large Signal Frequency Response to VGAx for Various Capacitive Loads with Series R = 10 Ω
GA
IN (
dB
)
FREQUENCY (Hz)
–18
–12
–6
0
6
12
18
24
30
100k 1M 10M 100M 500M
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VOUT = 0.1V p-pVGAIN = +0.7V
VGAIN = 0V
VGAIN = –0.7V
VS = ±5VVS = ±3.3VVS = ±2.5V
Figure 18. Small Signal Frequency Response vs. Gain to VGAx for Various Supply Voltages
–40
–30
–20
–10
0
10
20
30
40
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
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VOUT = 0.1V p-pVGAIN = +0.7V
VGAIN = 0V
VGAIN = –0.7V
VS = ±5VVS = ±3.3VVS = ±2.5V
Figure 19. Small Signal Frequency Response vs. Gain to Differential Output for Various Supply Voltages
–6
0
6
12
18
24
30
36
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
VS = ±5VVS = ±3.3VVS = ±2.5VVS = ±5VVS = ±3.3VVS = ±2.5V
0773
6-02
0
VOUT = 0.1V p-pVGAIN = 0.7V
VGA
DIFFERENTIALOUTPUT
Figure 20. Large Signal Frequency Response to VGAx and Differential Output for Various Supply Voltages
Data Sheet AD8264
Rev. C | Page 11 of 37
GA
IN (
dB
)
–3
–2
–1
0
1
FREQUENCY (Hz)
100k 1M 10M 100M
VS = ±2.5V, VOHxVS = ±3.3V, VOHxVS = ±5V, VOHxVS = ±2.5V, VOLxVS = ±3.3V, VOLxVS = ±5V, VOLx
0773
6-02
1
PIN = –16dBm
Figure 21. Frequency Response from VOCM to VOHx and VOLx for Various Supplies
–21
–15
–9
–3
3
9
GA
IN (
dB
)
FREQUENCY (Hz)
100k 1M 10M 100M 500M
VS = ±5VVS = ±3.3VVS = ±2.5V
0773
6-02
2
VOUT = 0.1V p-p
Figure 22. Frequency Response from OFSx to Differential Output for Various Supply Voltages
–12
–6
0
6
12
100k 1M 10M 100M 1G
GA
IN (
dB
)
FREQUENCY (Hz)
VS = ±2.5VVS = ±3.3VVS = ±5V
0773
6-02
3
PIN = –22dBm
Figure 23. Preamp Frequency Response to OPPx
0
1
2
3
4
5
1M 10M 100M
DE
LA
Y (
ns)
FREQUENCY (Hz)
VGAIN = –0.7V
VGAIN = +0.7V
VGAIN = 0V
0773
6-02
4
Figure 24. Group Delay vs. Frequency to VGAx
2
3
4
5
6
7
8
1M 10M 100M
DE
LA
Y (
ns)
FREQUENCY (Hz)
VGAIN = –0.7V
VGAIN = +0.7VVGAIN = 0V
0773
6-02
5
Figure 25. Group Delay vs. Frequency to Differential Output
OF
FS
ET
VO
LT
AG
E R
TO
(m
V)
–10
0
10
–5
15
5
0.70.50.30.1
VGAIN (V)
–0.1–0.3–0.5–0.7
TA = +105°CTA = +25°CTA = –40°C
MAXMIN
0773
6-02
6
Figure 26. Differential Output Offset Voltage vs. VGAIN vs. Temperature
AD8264 Data Sheet
Rev. C | Page 12 of 37
OF
FS
ET
VO
LT
AG
E R
TO
(m
V)
VGAIN (V)
–10
0
–5
10
5
0.70.50.30.1–0.1–0.3–0.5–0.7
0773
6-02
7
MAXMIN
TA = +105°CTA = +25°CTA = –40°C
Figure 27. VGAx Output Offset Voltage vs. VGAIN vs. Temperature
0773
6-02
9
HIT
S
0–30 –20 –10 0 10 3020
OUTPUT OFFSET VOLTAGE (mV)
3000
2500
2000
1500
1000
500
VGAIN = –0.4VVGAIN = 0VVGAIN = +0.4V
Figure 28. Output Offset Histogram to VGAx
0773
6-09
5
HIT
S
–30 –20 –10 0 10 3020
OUTPUT OFFSET VOLTAGE (mV)
VGAIN = –0.4VVGAIN = 0VVGAIN = +0.4V
0
100
200
300
400
500
600
700
800
Figure 29. Output Offset Histogram to Differential Output
0.1
1
10
100
0.1 1 10 100
OU
TP
UT
RE
SIS
TAN
CE
(Ω
)
FREQUENCY (MHz)
VS = ±2.5V
VS = ±5V
0773
6-03
0
Figure 30. Output Resistance (VOHx, VOLx) vs. Frequency
0.1 1 10 100
FREQUENCY (MHz)
1
10
OU
TP
UT
RE
SIS
TAN
CE
(Ω
)
VS = ±5V
VS = ±2.5V
0773
6-03
1
Figure 31. Output Resistance (VGAx) vs. Frequency
0
20
40
60
80
100
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
VGAIN (V)
OU
TP
UT
NO
ISE
(n
V/√
Hz)
VGAx
DIFFERENTIAL OUTPUT
0773
6-03
2
Figure 32. Output Referred Noise to VGAx and Differential Output vs. VGAIN
Data Sheet AD8264
Rev. C | Page 13 of 37
1
10
100
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
INP
UT
RE
FE
RR
ED
NO
ISE
(n
V/√
Hz)
VGAIN (V)
DIFFERENTIAL OUTPUT
VGAx
0773
6-03
3
Figure 33. Input Referred Noise from VGAx and Differential Output vs. VGAIN
1
10
100
100k
FREQUENCY (Hz)
1M 10M 100M10k1k1001
INP
UT
RE
FE
RR
ED
NO
ISE
(n
V/√
Hz)
0773
6-03
4
VGAx
DIFFERENTIAL OUTPUT
Figure 34. Input Referred Noise vs. Frequency at Maximum Gain
1 10 100 1k 10k1
10
100
INP
UT
RE
FE
RR
ED
NO
ISE
(n
V/√
Hz)
RSOURCE (Ω) 0773
6-03
5
DIFFERENTIAL OUTPUT
VGAx
Figure 35. Input Referred Noise vs. RSOURCE
5
10
15
20
25
30
35
–0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
NO
ISE
FIG
UR
E (
dB
)
VGAIN (V)
DIFFERENTIAL OUTPUT(TERMINATED)
DIFFERENTIAL OUTPUT(UNTERMINATED)
VGAx (TERMINATED)
VGAx (UNTERMINATED)
0773
6-03
6
Figure 36. Noise Figure vs. VGAIN
–70
–60
–50
–40
–30
–20
–10
0.1 1 10 100
CM
RR
(d
B)
FREQUENCY (MHz) 0773
6-03
7
Figure 37. VOCM Common-Mode Rejection Ratio vs. Frequency
−90
−60
−50
−80
−70
HD
(d
Bc)
−30
−40
HD2, VS = ±2.5VHD3, VS = ±2.5VHD2, VS = ±5VHD3, VS = ±5V
0 400 800 1200 20001600
RLOAD (Ω)
0773
6-03
8
Figure 38. Harmonic Distortion to VGAx vs. RLOAD and Various Supplies
AD8264 Data Sheet
Rev. C | Page 14 of 37
−90
−60
−50
−80
−70
HD
(d
Bc)
−30
−40
HD2, VS = ±2.5VHD3, VS = ±2.5VHD2, VS = ±5VHD3, VS = ±5V
0 10 20 30 5040
CLOAD (pF)
0773
6-03
9Figure 39. Harmonic Distortion to VGAx vs. CLOAD
−90
−60
−50
−80
−70
HD
(d
Bc)
−30
−40
RLOAD (Ω)
HD2, VS = ±2.5VHD3, VS = ±2.5VHD2, VS = ±5VHD3, VS = ±5V
0 400 800 1200 20001600
0773
6-04
0
Figure 40. Harmonic Distortion to Differential Output vs. RLOAD and Various Supplies
−90
−60
−50
−80
−70
HD
(d
Bc)
−30
−40
CLOAD (pF)
50403020100
HD2, VS = ±2.5VHD3, VS = ±2.5V
0773
6-04
1
Figure 41. Harmonic Distortion to Differential Output vs. CLOAD
–90
–60
–50
–80
–70
HD
2 (d
Bc)
–30
–40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz10MHz35MHz100MHz
0773
6-04
2
Figure 42. HD2 vs. VGAIN vs. Frequency to VGAx
−90
−60
−50
−80
−70
HD
3 (d
Bc)
−20
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz10MHz35MHz100MHz
0773
6-04
3
Figure 43. HD3 vs. VGAIN vs. Frequency to VGAx
−90
−60
−50
−80
−70
HD
2 (d
Bc)
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
VGAx = 0.5Vp-pVGAx = 1Vp-pVGAx = 2Vp-p
0773
6-04
4INPUT LIMITED
Figure 44. HD2 vs. Amplitude to VGAx
Data Sheet AD8264
Rev. C | Page 15 of 37
−90
−60
−50
−80
−70
HD
3 (d
Bc)
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
VGAx = 0.5V p-pVGAx = 1V p-pVGAx = 2V p-p
0773
6-04
5
INPUT LIMITED
Figure 45. HD3 vs. Amplitude to VGAx
−90
−60
−50
−80
−70
HD
2 (d
Bc)
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
1MHz10MHz35MHz
0773
6-04
6
Figure 46. HD2 vs. VGAIN vs. Frequency to Differential Output
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7−90
−45
−30
−75
−60
0
−15
HD
3 (d
Bc)
1MHz10MHz35MHz
0773
6-04
7
Figure 47. HD3 vs. VGAIN vs. Frequency to Differential Output
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7−90
−60
−50
−80
−70
−30
−40
HD
2 (d
Bc)
VOUT = 0.5V p-pVOUT = 1V p-pVOUT = 2V p-p
0773
6-04
8
Figure 48. HD2 vs. Amplitude to Differential Output
−90
−60
−50
−80
−70
VOUT = 0.5V p-pVOUT = 1V p-pVOUT = 2V p-p
HD
3 (d
Bc)
−30
−40
VGAIN (V)
0.70.50.30.1–0.1–0.3–0.5–0.7
0773
6-04
9
Figure 49. HD3 vs. Amplitude to Differential Output
0
10M
FREQUENCY (Hz)
1M 100M
IMD
3 (d
Bc)
LOW TONE, f – 50kHzHIGH TONE, f + 50kHz
−20
−40
−60
−80
−100
0773
6-05
0
VOUT = 1V p-p
Figure 50. IMD3 vs. Frequency to VGAx
AD8264 Data Sheet
Rev. C | Page 16 of 37
0.70.50.30.1–0.1–0.3–0.5–0.70
20
40
10
50
30
OIP
3 (d
Bm
)
VGAIN (V)
f = 35MHz, OIP3Lf = 35MHz, OIP3Hf = 100MHz, OIP3Lf = 100MHz, OIP3H
f = 1MHz, OIP3Lf = 1MHz, OIP3Hf = 10MHz, OIP3Lf = 10MHz, OIP3H
0773
6-05
1Figure 51. OIP3 vs. VGAIN vs. Frequency to VGAx
0
10M
FREQUENCY (Hz)
1M 100M
IMD
3 (d
Bc)
HIGH TONE, f + 50kHz
LOW TONE, f – 50kHz
−20
−40
−60
−80
−100
0773
6-05
2
VOUT = 1V p-p
Figure 52. IMD3 vs. Frequency to Differential Output
0
20
40
10
50
30
OIP
3 (d
Bm
)
0.70.50.30.1–0.1–0.3–0.5–0.7
f = 1MHz, OIP3Lf = 1MHz, OIP3Hf = 10MHz, OIP3Lf = 10MHz, OIP3Hf = 35MHz, OIP3Lf = 35MHz, OIP3H
VGAIN (V)
0773
6-05
3
Figure 53. OIP3 vs. Frequency to Differential Output
VGAx (VS = ±5V)DIFF OUT (VS = ±5V)VGAx (VS = ±3.3V)DIFF OUT (VS = ±3.3V)VGAx (VS = ±2.5V)DIFF OUT (VS = ±2.5V)
VGAIN (V)
INP
UT
-RE
FE
RR
ED
P1d
B (
dB
m)
−15
0
10
−10
20
−5
15
5
0.70.50.30.1–0.1–0.3–0.5–0.7
0773
6-05
4
Figure 54. Input P1dB vs. VGAIN
–0.10
–0.05
0
0.05
0.10
–40 –20 0 20 40 60 80 100
VO
LTA
GE
(V
)
TIME (ns) 0773
6-05
5
VGAIN = 0.7V
Figure 55. Small Signal Pulse Response to VGAx
–40 –20 0 20 40 60 80 100–0.15
–0.10
–0.05
0
0.05
0.10
0.15
VO
LT
AG
E (
V)
TIME (ns) 0773
6-05
6
VGAIN = 0.7V
Figure 56. Small Signal Pulse Response to Differential Output
Data Sheet AD8264
Rev. C | Page 17 of 37
–40 –20 0 20 40 60 80 100–1.5
–1.0
–0.5
0
0.5
1.0
1.5
VO
LTA
GE
(V
)
TIME (ns)
1V p-p
2V p-p
0773
6-05
7
VGAIN = 0.7V
Figure 57. Large Signal Pulse Response to VGAx
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
VO
LTA
GE
(V
)
TIME (ns)
1V p-p
2V p-p
0773
6-05
8
–40 –20 0 20 40 60 80 100
VGAIN = 0.7V
Figure 58. Large Signal Pulse Response to Differential Output
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0 20 40 60 80 100 120 140 160
VO
LTA
GE
(V
)
TIME (ns)
2V p-p (VOL)2V p-p (VOH)1V p-p (VOL)1V p-p (VOH)
0773
6-05
9
Figure 59. VOCM Large Signal Pulse Response
1V p-p
2V p-p
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
VO
LTA
GE
(V
)
0773
6-06
0
–40 –20 0 20 40 60 80 100
TIME (ns)
Figure 60. OFSx Large Signal Pulse Response
TIME (ns)
–1.0
–0.5
0
0.5
1.0
VO
LTA
GE
(V
)
CL = 0pFCL = 10pFCL = 22pF
0773
6-06
1
–40 –20 0 20 40 60 80 100
VGAIN = 0.7V
Figure 61. Large Signal Pulse Response to VGAx for Various Capacitive Loads
VO
LTA
GE
(V
)
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
TIME (ns)
CL = 0pFCL = 10pFCL = 22pF
0773
6-06
2
–40 –20 0 20 40 60 80 100
Figure 62. Large Signal Pulse Response to Differential Output for Various Capacitive Loads
AD8264 Data Sheet
Rev. C | Page 18 of 37
0773
6-09
6
–40 –20 100806040200
TIME (ns)
–1.5
–1.5
–1.0
–1.0
–0.5
–0.5
0
–2.0
–2.0
VO
LTA
GE
(V
)
CL = 0pFCL = 10pFCL = 22pF
VGAIN = 0.7V
Figure 63. Large Signal Pulse Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0 400 800 1200 1600 2000
VO
TL
AG
E (
V)
TIME (ns)
VGAIN PULSE
GAINRESPONSE
0773
6-06
4
Figure 64. VGAx Response to Change in VGAIN
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0 400 800 1200 1600 2000
VO
TL
AG
E (
V)
TIME (ns) 0773
6-06
5
VGAIN PULSE
GAINRESPONSE
Figure 65. Differential Output Response to Change in VGAIN
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0 200 400 600 800 1000 1200
VO
TL
AG
E (
V)
TIME (ns) 0773
6-06
6
Figure 66. Preamp Overdrive Recovery
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
0 200 400 600 800 1000 1200
VO
TL
AG
E (
V)
TIME (ns) 0773
6-06
7
Figure 67. VGA Overdrive Recovery
100k 1M 10M 100M
PS
RR
(d
B)
FREQUENCY (Hz)
–10
–20
–30
–40
–50
–60
0
VGAx (VGAIN = −0.7V)
DIFF OUT (VGAIN = −0.7V)
VGAx (VGAIN = +0.7V)
DIFF OUT (VGAIN = +0.7V)
0773
6-06
8
Figure 68. Power Supply Rejection vs. Frequency (VPOS)
Data Sheet AD8264
Rev. C | Page 19 of 37
100k 1M 10M 100M
PS
RR
(d
B)
FREQUENCY (Hz)
–5
–15
–25
–35
–45
–55
5
VGAx (VGAIN = −0.7V)
DIFF OUT (VGAIN = −0.7V)
VGAx (VGAIN = +0.7V)
DIFF OUT (VGAIN = +0.7V)
0773
6-06
9
Figure 69. Power Supply Rejection vs. Frequency (VNEG)
55
65
75
85
95
105
115
125
135
–40 –15 10 35 60 85 110
SU
PP
LY
CU
RR
EN
T (
mA
)
TEMPERATURE (°C)
±2.5V
±5V
±3.3V
0773
6-07
0
Figure 70. Quiescent Supply Current vs. Temperature
AD8264 Data Sheet
Rev. C | Page 20 of 37
TEST CIRCUITS VS = ±2.5 V, TA = 25°C, f = 10 MHz, CL = 5 pF, RL = 500 Ω per output (VGAx, VOHx, VOLx), VGAIN = (VGNHx − VGNLO) = 0 V, VVOCM = GND, VOFSx = GND, gain range = 6 dB to 30 dB, unless otherwise specified.
50Ω PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
OVEN
GNLO
DCMETER
500Ω
500Ω
500Ω
VGAIN
DCMETER
0773
6-11
9
Figure 71. Gain vs. VGAIN vs. Temperature (See Figure 3 and Figure 4)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω50Ω
500Ω
OUT
SIGNALGENERATOR
OSCILLOSCOPE
0773
6-10
0
Figure 72. Gain Error vs. VGAIN at Various Frequencies to VGAx (See Figure 5)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
500Ω
NETWORK ANALYZER
0773
6-07
2
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 73. Frequency Response vs. Gain to VGAx for Various Values of VGAIN, VGAIN = GNHx – GNLO (See Figure 10)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
NETWORK ANALYZER
500Ω
500Ω
0773
6-10
1
Figure 74. Frequency Response vs. Gain to Differential Output for Various Values of VGAIN (See Figure 11)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω
500Ω
500Ω
NETWORK ANALYZER
CL
CL
0773
6-10
2
Figure 75. Frequency Response to Differential Output for Various Capacitive Loads (See Figure 12)
Data Sheet AD8264
Rev. C | Page 21 of 37
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω
500Ω
500Ω
10Ω
10Ω
NETWORK ANALYZER
CL
CL
0773
6-10
3
Figure 76. Frequency Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω (See Figure 13)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
500Ω CL
NETWORK ANALYZER07
736-
076
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 77. Frequency Response to VGAx for Various Capacitive Loads (See Figure 14)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
500Ω
10Ω
CL
NETWORK ANALYZER
0773
6-07
7
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 78. Frequency Response to VGAx for Various Capacitive Loads with Series R =10 Ω (See Figure 16)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
NETWORK ANALYZER
VS
VSUPPLY
0773
6-07
8
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
Figure 79. Frequency Response vs. Gain to VGAx for Various Supply Voltages (See Figure 18)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH2
50Ω 50Ω
VS
VSUPPLY
NETWORK ANALYZER
500Ω
500Ω
0773
6-10
4
Figure 80. Frequency Response vs. Gain to Differential Output for Various Supply Voltages (See Figure 19)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω
VS
VSUPPLY
NETWORK ANALYZER
500Ω
500Ω
0773
6-10
5
Figure 81. VOCM Frequency Response to Differential Output (See Figure 21)
AD8264 Data Sheet
Rev. C | Page 22 of 37
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω
VS
VSUPPLY
NETWORK ANALYZER
500Ω
500Ω
0773
6-10
6
Figure 82. OFSx Frequency Response to Differential Output (See Figure 22)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
OVEN
GNLO
DCMETER
500Ω
500Ω
500Ω
VGAIN
0773
6-11
0
Figure 83. Output Offset Voltage vs. VGAIN vs. Temperature (See Figure 26 and Figure 27)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
CH2
CH1
50Ω 50Ω
NETWORK ANALYZER
VS
VSUPPLY
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
0773
6-11
1
Figure 84. Output Resistance vs. Frequency (See Figure 30 and Figure 31)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
SPECTRUM ANALYZER
VGAIN
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAxAD8129
10×
AD812910×
0773
6-11
2
Figure 85. Output Referred Noise vs. VGAIN (See Figure 32)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
220Ω
SPECTRUM ANALYZER
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAxAD8129
10×
AD812910×
50Ω
0773
6-11
3
Figure 86. Input Referred Noise vs. Frequency (See Figure 34)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
IPPx
NOISESOURCE
NOISE METER
50Ω
50Ω
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
VGAIN
0773
6-11
5
Figure 87. Noise Figure vs. VGAIN (See Figure 36)
Data Sheet AD8264
Rev. C | Page 23 of 37
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
CH2
CH1
50Ω 50Ω
220Ω
SPECTRUM ANALYZER
IPPx
RSIPNx
GNHx
VOLx
VOHx
OFSx
VGAxAD8129
10×
AD812910×
50Ω
50Ω 0.1µF
50Ω 0.1µF
1kΩ 1kΩ
0.1µF50Ω
0773
6-11
4
Figure 88. Input Referred Noise vs. RSOURCE (See Figure 35)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω
NETWORK ANALYZER
500Ω
500Ω
0773
6-11
6
Figure 89. VOCM Common-Mode Rejection vs. Frequency (See Figure 37)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
CH1
50Ω50Ω
500Ω
VS
VSUPPLY
OUT
SIGNALGENERATOR
LPF
0773
6-11
7
SPECTRUM ANALYZER
Figure 90. Test Circuit Harmonic Distortion to VGAx vs. RLOAD and Various Supplies (See Figure 38)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
CH1
CL
50Ω50Ω
10Ω
OUT
SIGNALGENERATOR
SPECTRUM ANALYZER
LPF
0773
6-11
8
Figure 91. Harmonic Distortion to VGAx vs. CLOAD (Figure 39)
RLRL
0773
6-12
8
AD81301×
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω
50Ω
450Ω
OUT
SIGNALGENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANALYZER
LPF
VSUPPLY
VS
Figure 92. Harmonic Distortion to Differential Output vs. RLOAD and Various Supplies (See Figure 40)
AD8264 Data Sheet
Rev. C | Page 24 of 37
0773
6-12
9
AD81301×
10Ω
CL CL
10Ω
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω50Ω
450Ω
OUTSIGNAL
GENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANALYZER
LPF
Figure 93. Harmonic Distortion to Differential Output vs. CLOAD (See Figure 41)
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
VGAIN
CH1
50Ω50Ω
450Ω
OUTSIGNAL
GENERATOR07
736-
130
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANALYZER
LPF
Figure 94. HD2 and HD3 to VGAx (See Figure 42 Through Figure 45)
0773
6-13
1
AD81301×
PrA6dB
+
– 6dB+
–
VOCM
AD8264
GNLO
50Ω
CH1
50Ω50Ω
350Ω
OUTSIGNAL
GENERATOR
IPPx
IPNx
GNHx
VOLx
VOHx
OFSx
VGAx
SPECTRUM ANALYZER
LPF
VGAIN
VS
Figure 95. HD2 and HD3 to Differential Output (See Figure 46 through Figure 49)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSxVOCM
VGAxAD8264
GNLO
50Ω
50Ω
50Ω
SIGNALGENERATOR
OUT
50Ω
SIGNALGENERATOR
0773
6-13
2
CH1
50Ω
450Ω
SPECTRUM ANALYZER
VGAIN
Figure 96. IMD3 and OIP3 to VGAx (See Figure 50 and Figure 51)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSxVOCM
VGAxAD8264
GNLO
50Ω
50Ω
50Ω
SIGNALGENERATOR
OUT
50Ω
SIGNALGENERATOR
0773
6-13
3500Ω500Ω
AD81301×
CH1
50Ω
10Ω
10Ω
450Ω
SPECTRUM ANALYZER
Figure 97. IMD3 and OIP3 to Differential Output (See Figure 52 and Figure 53)
Data Sheet AD8264
Rev. C | Page 25 of 37
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIF
FER
ENTI
AL
PRO
BE
CH2CH3
50Ω 50Ω
CH1
50Ω
NETWORK ANALYZER
0773
6-13
4
500Ω
500Ω
VGAIN
500Ω
Figure 98. Input P1dB vs. VGAIN (See Figure 54)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω50Ω
500Ω
OUTPULSE
GENERATOR
OSCILLOSCOPE
0773
6-13
5
Figure 99. Pulse Response to VGAx, VGAIN = 0.7 V (See Figure 55 and Figure 57)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
DIFFERENTIALPROBE
CH1 CH2
50Ω 50Ω50Ω
OUTPULSE
GENERATOR
OSCILLOSCOPE
0773
6-13
6
500Ω
500Ω
Figure 100. Pulse Response to Differential Outputs, VGAIN = 0.7 V
(See Figure 56 and Figure 58)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUTOFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1
50Ω
OSCILLOSCOPE
500Ω
500Ω
50Ω
PULSEGENERATOR
50Ω
0773
6-12
0
Figure 101. VOCM Pulse Response (See Figure 59)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUTOFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
PULSEGENERATOR
50Ω
0773
6-12
1
Figure 102. OFSx Pulse Response (See Figure 60)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
CH1
CL
50Ω50Ω
OUTPULSE
GENERATOR
500Ω
OSCILLOSCOPE
DIFFERENTIALPROBE
0773
6-12
2
Figure 103. Pulse Response to VGAx for Various Capacitive Loads, VGAIN = 0.7 V (See Figure 61)
AD8264 Data Sheet
Rev. C | Page 26 of 37
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
CH1
CL
50Ω50Ω
OUT
PULSEGENERATOR
500Ω
OSCILLOSCOPE
DIFFERENTIALPROBE
CL500Ω
0773
6-12
3
Figure 104. Pulse Response to Differential Output for Various Capacitive Loads, VGAIN = 0.7 V (See Figure 62)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
CH1
CL
50Ω50Ω
OUT
PULSEGENERATOR
500Ω
10Ω
OSCILLOSCOPE
DIFFERENTIALPROBE
CL500Ω
10Ω
0773
6-12
4
Figure 105. Pulse Response to Differential Output for Various Capacitive Loads with Series R = 10 Ω, VGAIN = 0.7 V (See Figure 63)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OUT
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
CH2
CH1
50Ω50Ω
OSCILLOSCOPE
500Ω
500Ω
500Ω
50Ω
50Ω
OUT
SIGNALGENERATOR
PULSEGENERATOR
0773
6-12
5
Figure 106. Gain Response to VGAx or Differential Output (See Figure 64 and Figure 65)
PrA6dB
+
– 6dB+
–
IPPx
OPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
DIFFERENTIALPROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
50Ω
OUT
SIGNALGENERATOR
0773
6-12
6
Figure 107. Preamp Overdrive Recovery (See Figure 66)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
DIFFERENTIALPROBE
CH1
50Ω
OSCILLOSCOPE
50Ω
50Ω
OUT
SIGNALGENERATOR
0773
6-12
7
Figure 108. VGA Overdrive Recovery, VGAIN = 0.7 V (See Figure 67)
Data Sheet AD8264
Rev. C | Page 27 of 37
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAxAD8264
GNLO
50Ω
DIFFERENTIALPROBE
VGAIN
CH1 CH3
CH2
50Ω 50Ω50Ω
VS
VSUPPLY
OSCILLOSCOPE
500Ω
500Ω
500Ω
0773
6-10
8
Figure 109. PSRR (See Figure 68 and Figure 69)
PrA6dB
+
– 6dB+
–
IPPx
IPNx
GNHx
VOLx
VOHx
OFSxVOCM
VGAx
VNEGVPOS
AD8264
GNLO
50Ω
DMM(–1)
DMM(+1)
0773
6-10
9
Figure 110. Quiescent Supply Current (See Figure 70)
AD8264 Data Sheet
Rev. C | Page 28 of 37
THEORY OF OPERATION OVERVIEW The AD8264 is a dc-coupled quad channel VGA with a fixed gain-of-2 (6 dB) preamplifier and a single-ended-to-differential output amplifier with level shift capability that can be used as an ADC driver. Figure 111 shows a representative block diagram of a single channel; all four channels are identical. The supply can operate from ±2.5 V to ±5 V. The primary application is as a pulse processor for medical positron emission tomography (PET) imaging; however, the device is useful for any dc-coupled application that can benefit from variable gain.
The signal chain consists of three fundamental stages: the preamplifier, the variable gain amplifier, and the differential output buffer amplifier. The preamplifier has an internally fixed gain-of-2 (6 dB). The VGA comprises an attenuator that provides 0 dB to 24 dB of attenuation, followed by a fixed gain 18 dB (8×) amplifier. The single-ended VGA output is connected directly to the noninverting input of the differential output (post) amplifier, which has a differential fixed gain-of-2 (6 dB).
The gain range from the preamp input to the VGA output is 0 dB to 24 dB. The aggregate gain range from preamp input to the differential postamplifier output is 6 dB to 30 dB.
The ideal gain equation for the gain from the single-ended input to the output is
VGAIN = VGNHx − VGNLO (1)
ICPTVGain GAIN +×=VdB20 (2)
The ideal value for ICPT, or the intercept, is defined at VGAIN = 0 V. The ICPT for the VGA output and differential amplifier outputs equals 12.1 dB and 18.1 dB, respectively. The actual intercept varies with any additional gain or loss along the signal path. The measured values are both approximately 0.2 dB low.
PREAMP The preamplifier is a current feedback amplifier, designed to drive the internal 100 Ω gain setting resistors and the resistive attenuator, which together result in a nominal load to the preamplifier of about 113 Ω. Normally, the negative preamp input, IPNx, is not connected externally. The positive input IPPx is the high impedance input of the current feedback amp. Note that, at the largest supply voltage of ±5 V, the input signal can become so large that the preamplifier output cannot deliver the required current to drive the 113 Ω load and, therefore, limits at 6 V p-p. This means that the input limits at 3 V p-p.
The short-circuit input referred noise at maximum VGA gain is about 2.3 nV/√Hz, and this accounts for all of the amplifiers and gain setting resistors. When measuring the input referred noise from the VGA output, the number is slightly lower at 2.1 nV/√Hz because the noise of the post-amplifier is not included in the noise calculation.
VGA The VGA has a voltage feedback architecture and uses analog control to vary the gain. Its low gain range helps to maintain low offset and is intended for gain trim applications. The offset of the preamp and the VGA are trimmed; therefore, the maximum input referred offset is <0.5 mV over temperature (see Figure 26). Keeping the gain of each stage relatively low also allows the bandwidth to stay high.
The gain of the VGA is adjusted using the fully differential control inputs, GNHx and GNLO. The GNLO pin is internally connected to all four channels and must be biased externally. Under typical conditions, the GNLO pin is grounded. The gain high control pins (GNHx) are independent for each channel. The gain slope is nominally 20 dB/V. With GNLO connected to ground, each GNHx input can have a voltage applied from VNEG to VPOS without gain foldover.
To make use of the full gain range of the VGA, the nominal gain control voltage needed at GNHx is ±0.65 V relative to the voltage applied to GNLO. At the lowest supply voltage of ±2.5 V, the GNLO pin must always be grounded. With increasing supply, the common-mode range of the gain control interface increases. This means that GNLO can be anywhere within ±1.2 V at ±3.3 V supplies and ±2.8 V at ±5 V supplies.
Table 5. Gain Control Input Range Supply Voltage (V) GNLO Voltage Range (V) VGAIN Range (V) ±5 ±2.8 ±0.65 ±3.3 ±1.2 ±0.65 ±2.5 0 ±0.65
For example, with a 3.3 V supply, the outputs of a quad, single-supply DAC, such as the 10-bit, AD5314, drive the GNHx pins directly. The output current rating of a low voltage ADR4520 LDO reference (2.048 V) is more than adequate to drive the REFHI pin of the AD5314 plus a 2:1, 10 kΩ resistive voltage divider between the VOUT pin and the GND pin. Connect the center tap of the divider (VREF/2) to the GNLO pin of the AD8264.
Data Sheet AD8264
Rev. C | Page 29 of 37
IPPx
VPOS
IPNxVOLx
VOHxINTERPOLATOR
PREAMP6dB (2×)
OFSx
OPPx
GAININTERFACE
100Ω 747Ω
107Ω100Ω
+
–
VOCMCOMM GNHx GNLO
BIASVNEG
NONINVERTINGAMPLIFIER INPUT
INVERTING AMPLIFIERINPUT (NOT USED)
POWERSUPPLIES
VGAxSINGLE-ENDED HSVGA OUTPUT
DIFFERENTIALVGA OUTPUT
OFFSETADJUST
OUTPUT COMMON-MODEVOLTAGE ADJUSTMENT
DIFFERENTIAL GAINCONTROL INPUTS
1.2V p-p MAX @ ±2.5V2V p-p MAX @ ±3.5V TO ±3.3V3V p-p MAX@ ±5V (PREAMPDRIVE LIMITED)2.3nV/√Hz
DIFFERENTIAL OUTPUT NEVER LIMITSBECAUSE VGA LIMITS FIRST.DIFFERENTIAL OUTPUT SWING = 2x VGA OUT5.2V p-p MAX @ ±2.5V8V p-p MAX @ ±3.5V TO ±3.3V15V p-p MAX @ ±5V73nV/√Hz
PREAMP OUTPUT(NOT USED)
2.6V p-p MAX @ ±2.5V4V p-p MAX @ ±3.5V TO ±3.3V7.5V p-p MAX @ ±5V34nV/√Hz
COMPOSITE GAIN IS +6dB TO +30dB
ATTENUATOR–24dB TO 0dB
FIXED GAIN VGAAMPLIFIER18dB (8×)
DIFFERENTIAL OUTPUTAMPLIFIER 6dB (2×)
1kΩ 2kΩ
1kΩ
2kΩ
1
1
2
2 3
3
0773
6-08
1
Figure 111. Single-Channel Block Diagram
POST AMPLIFIER From the preamp input to the VGA output (VGAx), the gain is noninverting. As can be seen in Figure 111, the VGAx pins drive the positive input of the differential amplifier. The gain is inverting from the input of the preamp to the output pin at VOLx, and the gain is noninverting to the output VOHx.
Other than the input from VGAx, each differential amplifier has two additional inputs: VOCM and OFSx. A common VOCM pin is shared among all four postamplifiers, while separate OFSx pins are provided for each channel.
VOCM Pin
The VOCM pin sets the common-mode voltage of the differential output and must be biased by an external voltage. When driving a dc-coupled ADC, the voltage typically comes from the ADC reference, as shown in the Applications Information section.
If dc level shift is not necessary, the VOCM pin is connected to ground.
OFSx Pins
The OFSx pins are the inverting inputs of the differential post amplifiers and can be used to prebias a differential dc offset at the output. This is very useful when the input is a unipolar pulse because the user can set up the gain and the offset in such a way as to optimally map a unipolar pulse into the full-scale input of an ADC, while dc coupling throughout.
If dc offset is not desired, then connect the OFSx pins to ground. However, the OFSx pins can also be used as separate inputs if the user wants this function.
NOISE At maximum gain, the preamplifier is the primary contributor of noise and results in a differential output referred noise of roughly 73 nV/Hz. The noise at the VGAx outputs is 34 nV/Hz, and because of the gain-of-2, the VGA output noise is amplified by 6 dB to 68 nV/Hz. The differential amplifier, including the gain setting resistors, contributes another 26 nV/Hz, and the rms sum results in a total noise of 73 nV/Hz. At the lowest gain, the noise at the VGA output is approximately 19 nV/Hz, and when multiplied by two, it results in 38 nV/Hz at the differential output; again, rms summing this with the 26 nV/Hz of the differential amplifier causes the total output referred noise to be approximately 46 nV/Hz.
The input referred noise to the preamplifier at maximum gain is 2.3 nV/Hz and increases with decreasing gain. Note that all noise numbers include the necessary gain setting resistors.
AD8264 Data Sheet
Rev. C | Page 30 of 37
APPLICATIONS INFORMATION A LOW CHANNEL COUNT APPLICATION CONCEPT USING A DISCRETE REFERENCE The AD8264 is particularly well suited for use in the analog front end of medical PET imaging systems. Figure 112 shows how to use the AD8264 with the AD5314 (a 4-channel, 10-bit DAC) and the AD9222/AD9228 (an octal or quad, 12-bit ADC, respectively). The DAC sets the gain of the AD8264. Note that the full gain span of 24 dB is achieved with this setup because the gain control input range of the AD8264 is very close to 1.25 V. The GNLO pin must offset by 1.25/2 = 625 mV because the gain control input is bipolar around the voltage applied at GNLO. This is done with two 1 kΩ, 1% resistors. The approximately 1 μA of bias current flowing from the GNLO pin does not contribute a significant error because the basic gain error of the AD8264 is the limiting factor.
The ADR127 1.25 V precision reference with an input of 3.3 V can supply −2 mA to +5 mA from −40°C to +125°C, which is sufficient to drive both the resistive divider and the REFIN pin of the AD5314. The AD5314 is based on the string DAC concept, which means that the REFIN pin looks like a resistor that is nominally 45 kΩ; this results in a current draw of 1.25 V/45 kΩ = 28 μA. Even at the lowest specified resistance of 37 kΩ, this is still only a current of 34 μA. Therefore, the total current draw from the ADR127 is the 625 μA of the resistive divider plus ~30 μA, which equals ~655 μA, well below the 5 mA maximum current.
Figure 112 also includes the DAC output equation, which indicates that the output can vary between 0 V and VREF = 1.25 V.
The output of the AD8264 is ideal to drive an ADC like the 1.8 V quad-channel AD9228. If eight channels are needed, two AD8264s with the octal AD9222 ADC achieve the same thing. The same resistive divider can be used for two AD8264s because the bias current flowing is now ~2 μA, but this still only introduces an error of 1 mV with ideally matched resistors. With 20 dB/V gain scaling, this is a gain error of only 0.02 dB, which is much smaller than the fundamental gain error of the AD8264 (typically ~0.2 dB).
The single-ended-to-differential amplifier of the AD8264 amplifies the VGA output signal by 6 dB and can provide the required dc bias of the AD9222/AD9228, as shown in Figure 112. The ADC is connected with the default internal reference because the SENSE pin is grounded. With this connection, the AD9222/ AD9228 VREF pin is an output that provides 1 V; this is then connected to the VOCM input of the AD8264, which sets the output common-mode voltage of the VOHx and VOLx pins to 1 V. This voltage is very close to the recommended optimal value of VDD/2 = 0.9 V. With this configuration, the ADC inputs are set to a full-scale (FS) of 2 V p-p.
Note that it is not recommended for the ADC VREF to drive many loads; therefore, for multiple AD8264s, buffer the VREF.
+3.3V
–3.3V
0.1µF
NC 6
NC 5
VOUT 4
1
2
3
NC
GND
VIN
ADR127
REFINVOUTA
VOUTB
VOUTC
VOUTD
DACAD5314
GND
VREFIN × DVOUT
2N=
10µF
10µF
1kΩ1%
1kΩ1%
1.25V
625mV
GNH1GNH2GNH3GNH4AD8264
GNLO
VOUT RANGE = 0V TO 1.25VEACH
VOCM VOHx VOLx
VDD
RFILT
RFILT
CFILT
ADCAD9222/AD9228
VREF
VDD
+1.8V
SENSE
GND
VIN – x
VIN + x
SENSE GROUNDED: VREF = 1V
VNEG
VPOS
IPPxRS
RTERM
OFSx
~250nA EACH
VGAx VGA OUTPUTS TO OTHERSIGNAL PROCESSING
OUTPUT COMMON-MODE VOLTAGE = 1VVOHx = 1V, VOLx = 1V; VOFS = 0V
FS = 2V p-p
625µ
A 1µF
0.1µF
0.1µF
~1µ
A
+3.3V
+3.3V
0773
6-08
2
Figure 112. Application Concept of the AD8264 with the AD5314 10-Bit DAC and the AD9222/AD9228 12-Bit ADC
Data Sheet AD8264
Rev. C | Page 31 of 37
A DC CONNECTED CONCEPT EXAMPLE The dc connected concept example in Figure 113 is an application with the 40-channel AD5381, 3 V, 12-bit DAC. The main difference between this example and Figure 112 is that, for the same ADR127 1.25 V reference, the full-scale output of the DAC is from 0 V to 2 × VREFIN = 2.5 V. Two options for gain control include the following:
Use the same circuit as in Figure 112 but use only half the DAC output voltage from 0 V to 1.25 V. This is the simplest solution, requiring the fewest extra components. Note that the overall gain resolution increases by one bit to 11 bits over the 10-bit AD5314.
Ground GNLO and scale the DAC output so that the GNHx inputs vary from −0.652 V to +0.625 V. Figure 113 shows a possible circuit implementation using a divider between the DAC output and a −1.25 V reference.
GNLO cannot simply be increased to 1.25 V because, for a given supply voltage, GNLO has a limited voltage range to achieve the full gain span (see Table 5).
However, a third possibility is to use another voltage that is between 1.2 V and 625 mV on GNLO, such as 1 V. In this case, the DAC must vary from 0.375 V to 1.625 V to achieve the fully specified gain range.
Note the gain limits when the differential gain control exceeds ±0.625 V, either to 6 dB or to 30 dB. If the differential gain control input voltage is exceeded, no gain foldover occurs.
Figure 113 shows how the AD8264 is connected in a PET application. The PMT generates a negative-going current pulse that results in a voltage pulse at the preamplifier input and a differential output pulse on VOLx and VOHx.
To fully appreciate the advantages of the AD8264, note the common-mode and polarity conversion afforded. The AD9228, as with most modern ADCs, is a low voltage, single-polarity device. Recall that the PMT is a high voltage device that yields a negative pulse. To map the pulse to the input range of the ADC, the pulse must be inverted, shifted, and amplified to the full input range of the ADC. This is done by using the gain control, signal offset, and common-mode features of the AD8264.
The full-scale input of the converter is 0 V to 2 V, with a common-mode of 1 V. Match the VOCM voltage of the AD8264 to the ADC common mode (VREF = 1 V), and the two devices can be connected directly using an appropriate level of the antialiasing filter. The PMT signal is 0 V to −0.1 V. With a gain of 20× (26 dB), the AD8264 output signal range is 2 V p-p. Prebias the signal negative by −0.5 V using the AD8264 OFSx inputs, which sets VOHx = 1.5 V and VOLx = 0.5 V for VOCM = 1 V. The output is perfectly matched to the input of the ADC.
Note that, by connecting VOLx to the positive ADC input and VOHx to the negative ADC input, the negative input pulse is inverted automatically. The VGAx output is still a negative pulse, amplified by 20 dB for this example.
+3.3V
–3.3V
0.1µF
NC 6
NC 5
VOUT 4
1
2
3
NC
GND
VIN
ADR127
REFIN
DACAD5381
GND
2 × VREFIN × DVOUT =
2N
10µF
VREF = 1.25V
GNH1GNH2GNH3GNH4AD8264
GNLO
VOUT RANGE = 0V TO 1.25VEACH
VOCM VOHx VOLx
VDD
RFILT
RFILT
CFILT
ADCAD9222/AD9228
VREF
VDD
+1.8V
SENSE
GND
VIN + x
VIN – x
SENSE GROUNDED: VREF = 1V
VNEG
VPOS
IPPx
100Ω
OFSx
~250nA EACH
VGAx VGA OUTPUTS TO OTHERSIGNAL PROCESSING
OUTPUT COMMON-MODE VOLTAGE = 1VVOHx = 1.5V, VOLx = 0.5V; VOFx = –0.5V
FS = 2V p-p
1µF
0.1µF10µF
+3.3V
+3.3V
PMT
0V
–0.1V
EXAMPLE
VOFS = –0.5V
SCALECIRCUIT
VOUT0VOUT1VOUT2VOUT4
VOUT39
TO 9 OTHERAD8264s
SCALE CIRCUITSCALE CIRCUIT
SCALE CIRCUITSCALE CIRCUIT
+3.3V
–3.3V
VOLTAGE FROM DAC AD5381 = 0 TO 2.5V
VARIES FROM12.5 TO 32.5µA
~250nA
VREF = 1.25V
AD8663
49.9kΩ1%
VOUT0 VOUT39
GNH1
SCALE CIRCUIT
–1.25V
GNH4–625mV
TO+625mV 49.9kΩ
1%
49.9kΩ1%
0.1µF
0.1µF
49.9kΩ1%
49.9kΩ1% 0.1µF
10µF
49.9kΩ1%
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Figure 113. Concept Application of AD8264 with 40-Channel AD5381 12-Bit, 3 V DAC and AD9222/AD9228 12-Bit ADC
AD8264 Data Sheet
Rev. C | Page 32 of 37
INx
AGNDx
AVDDxDVDD
DGND
GNH1GNH2GNH3GNH4
VNEG
VOCM
VOHx
VOLx
GNLO
VPOS
IPPx
OFSxVGAx
ADCAD9228EVAL KIT
VPOS
VREF
PULSEGENERATOR V
OL
TAG
E (
V)
1.00.80.60.40.2
0–0.2–0.4–0.6–0.8–1.0
0 50 100 150SAMPLES
200 250 300
USB
REFIN(ON BOARD)
INP
UT
EX
AM
PL
ES
USB 2.0 TO PCADI VISUAL
ANALOGANALYSIS
SOFTWARE
–INx
+INx
TOSWITCHINGPOWERSUPPLY
+3.3V+3.3V –3.3V
+2.5V
VOUT0VOUT1VOUT3VOUT4
VOUT39
VOUT RANGE = 0V TO 1.25VEACH
AD8264 VGAEVAL BOARD
DACAD5380
EVAL BOARD TO 9OTHERAD8264s
GNLO = 625mV VOCM = 1.0VOFSx = −0.5V
+1.0V
VGAOUTPUTS TO
OTHERSIGNAL
PROCESSING
0V
–0.1V
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EVAL-SDP-CB1Z
Figure 114. Evaluation Setup for DC-Coupled Analog Front-End Pulse Processing Application Using the AD8264
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Figure 115. AD5381 Evaluation Software—AD5381 Option Selected.
A convenient method of verifying and customizing the signal chains shown in Figure 112 and Figure 113 is by ordering the corresponding evaluation boards available on www.analog.com. The AD8264-EVALZ is a platform through which the user can quickly become familiar with the features and performance capabilities of the AD8264. See the Evaluation Board section for more information.
When configuring evaluation boards around the AD8264-EVALZ, always be certain to refer to the latest revision of the AD5381 and/or AD9228 data sheets for hardware revisions or updates. The EVAL-AD5380SDPZ (a 40-channel DAC) connects to the EVAL-SDP-CB1Z and includes a software evaluation program to control the DAC. The AD5380 evaluation software allows the
user to configure and program DAC parameters such as input codes, offset level, and output range, based on a 2.5 V or 1.25 V reference. For example, as shown in Figure 114, the reference can be set to 1.25 V, with a 0 V to 1.25 V output range to drive the GNHx inputs. For DAC user application information, refer to UG-757.
The ADC evaluation kit includes the AD9228-65EBZ board and the HSC-ADC-FIFO5 board to decode the ADC output. The kit also leverages the capabilities of VisualAnalog®, powerful sim-ulation and data analysis software that enables the user to run FFTs and to perform real-time capture of the output levels.
Data Sheet AD8264
Rev. C | Page 33 of 37
INx
AGNDx
AVDDxDVDD
DGND
GNH1GNH2GNH3GNH4
VNEG
VOCM
VOHx
VOLx
GNLO
VPOS
IPPx
OFSxVGAx
ADCAD9228EVAL KIT
VPOS
VREF
ACSOURCE
–150
–30–45–60–75–90
–105–120–135–150
1.5M 3.0M 4.5M 6.0M 7.5M 9.0M 10.5M
REFIN(ON BOARD)
INP
UT
EX
AM
PL
ES
USB 2.0 TO PCADI VISUAL
ANALOGANALYSIS
SOFTWARE
–INx
+INx
TOSWITCHINGPOWERSUPPLY
+3.3V +3.3V +3.3V –3.3V
+2.5V
VOUT0VOUT1VOUT3VOUT4
VOUT39
VOUT RANGE = 0V TO 1.25VEACH
AD8264 VGAEVAL BOARD
DACAD5380
EVAL BOARD TO 9OTHERAD8264S
GNLO = 625mV VOCM = 1.0V
+1.0V
VGAOUTPUTS TO
OTHERSIGNAL
PROCESSING
42+
3
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-18-
15
USB EVAL-SDP-CB1Z
Figure 116. Evaluation Setup for AC Signal Processing Application Using the AD8264
AD8264 Data Sheet
Rev. C | Page 34 of 37
EVALUATION BOARD Analog Devices, Inc. provides evaluation boards to customers as a support service so that the circuit designer can become familiar with the device in the most efficient way possible. The AD8264 evaluation board provides a fast, easy, and convenient means to assess the performance of the AD8264 before going through the hassle and expense of design and layout of a custom board. The board is shipped fully assembled and tested, and it provides basic functionality as shipped. Standard connectors enable the user to attach standard lab test equipment without having to wait for the rest of the design to be completed. Figure 117 shows a digital image of the top view, and Figure 118 shows the schematic diagram of the AD8264 evaluation board.
The printed circuit board (PCB) artwork for all conductor and silkscreen layers is shown in Figure 119 to Figure 124. A descrip-tion of a typical test setup can be found in the Applications Information section. The PCB artwork can be used as a guide for circuit layout and placement of devices. This is particularly useful for multiple function circuits with many pins, requiring multiple passive components.
CONNECTING AND USING THE AD8264-EVALZ The AD8264 operates with bipolar power supplies from ±2.5 V dc to ±5 V dc. Make sure the current capacity is ≥400 mA. Connect a ground reference from the supplies to any of the black test loops, the positive supply to the red test loop (+V), and the negative supply to the blue test loop (−V).
Notice that the board is shipped with jumpers installed on the 2-pin headers marked GN1_2, GN3_4, OFS_12, OFS_34, GNLO, and VOCM. If these jumpers are missing, the offset and common-mode functions float high, substantially increasing the quiescent current of the board.
Apply input signals to any of the preamps at the SMA connectors, IN1 through IN4. These connectors are terminated with 50 Ω to accommodate typical signal generator analyzer voltage source impedances. The gain of the AD8264 preamps is fixed at 6 dB (2×) and can be monitored at the SMA connectors, OP1_2 and OP3_4, if desired. Note that there are output selector switches for each pair of preamps and 453 Ω resistors in series with the preamp outputs.
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Figure 117. Digital Image of the AD8264-EVALZ (Top View)
Data Sheet AD8264
Rev. C | Page 35 of 37
+V
+V
IPN1
OPP1
OPP2
IPN2
IPP2
IPP3
IPN3
OPP3
IPP
4
CO
MM
GN
H4
GN
H3
VO
CM
VP
OS
VN
EG
OF
S4
IPP
1
CO
MM
GN
H1
GN
H2
GN
LO
VP
OS
VN
EG
OF
S1
VOL1
VOH1
VOH2
VOL2
VGA2
VGA3
VOL3
VOH3
OPP4 VOH4
IPN4 VOL4O
FS
3
VG
A4
OF
S2
VG
A1
–V
–V
OFS12
OFS34
GNLO
VOCM
GN1_2
PIN 0EXPOSED PADDLE
IN3
OP1_2
12
C230.1µF
15 20191817161413
R17DNI
R16DNI
R28DNI
L3FB
L4FB
IN4
11
L1FB
VPOS
21
30
29
28
27
26
25
24
23
22
VGA2
VGA3
VGA4
VGA1
39 36 3132333435373840
R1149.9Ω
R10DNI
+
+R9DNI
OP3_410
1
2
3
4
5
6
7
8
9
R19DNI
R29DNI
IN2
R730Ω
R23DNI
R31DNI
OPP12
OPP34
VO_CM
VOUT_3
VOUT_4
VOUT_2
VOUT_1
OFS_12GN1_2
GND2 GND3 GND4 GND5 GND6GND1
+V –V
IN_4
IN_3
IN_2
OP34
OP12
GN3_4
GN34
VGA_4
VGA3
VGA2
VGA_1
C190.1µF
C200.1µF
C3410µF
C3310µF
L2FB
OPP_3
OPP_4
OPP_2
OPP_1
C240.1µF
OFS_34
R32DNI
R490Ω
R860Ω
R470Ω
R480Ω
R510Ω
IN_1
R1453Ω
IN1
R7453Ω
R22DNI
R4549.9Ω
R4649.9Ω
R6453Ω
R25DNI
R20DNI
R780Ω
R720Ω
R1749.9Ω
C220.1µF
C210.1µF
R800Ω
R790Ω
R700Ω
R710Ω
R8453Ω
R640Ω
R630Ω
R650Ω
R660Ω
R67453Ω
R69453Ω
R570Ω
R580Ω
R560Ω
R550Ω
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PIN 0: EXPOSED PADDLE
R24DNI
Figure 118. AD8264-EVALZ Schematic
The SMA connectors, VGA1 through VGA4, enable signal monitoring at these nodes, with 453 Ω resistors for protecting the device. These resistors can be shorted at the discretion of the user if wide bandwidth is desired. The differential outputs are provided with 0.1” spacing 2-pin headers, which fit the low capacitance Tektronix differential scope probe P6045 model.
Note that the gain control input of the AD8264 is differential. Each channel has its own gain control pin (GNHx); however, pairs of pins are connected together on the evaluation board and connected to a test loop. The 2-pin headers are provided for jumpers to connect the gain pins to ground, preventing the
quiescent gain control voltage at the GNHx pins from floating high. The low sides of the gain controls for each channel are internally connected in the AD8264, and a 2-pin header with jumper is provided to connect this pin (GNLO) to ground as well.
A similar arrangement of 2-pin headers is provided for the output offset voltage. As shipped, the offset pins are connected to ground, preventing the pins from floating high.
For connecting to an ADC, remove the jumpers at the OF1_2 and OF3_4 headers and connect the appropriate offset voltage at the test loops, OF12 and OF34. If the VOCM pin is buffered, it can be connected to the reference of the ADC.
AD8264 Data Sheet
Rev. C | Page 36 of 37
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Figure 119. Component Side Assembly
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Figure 120. Component Side Copper
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Figure 121. Component Side Silk Screen
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Figure 122. Secondary Side Copper
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Figure 123. Ground Plane
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Figure 124. Power Plane
Data Sheet AD8264
Rev. C | Page 37 of 37
OUTLINE DIMENSIONS
10-0
8-20
18-B
0.50BSC
BOTTOM VIEWTOP VIEW
PIN 1INDICATOR
0.05 MAX0.02 NOM
0.20 REF
COPLANARITY0.08
0.300.250.18
6.106.00 SQ5.90
0.800.750.70
0.450.400.35
0.20 MIN
4.254.10 SQ3.95
COMPLIANT TO JEDEC STANDARDS MO-220-WJJD-5
401
1120
21
3031
10
PKG
-004
354
P IN 1IN D ICATO R AR E A OP TIO N S(SEE DETAIL A)
DETAIL A(JEDEC 95)
EXPOSEDPAD
SEATINGPLANE
FOR PROPER CONNECTION OFTHE EXPOSED PAD, REFER TOTHE PIN CONFIGURATION ANDFUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.
Figure 125. 40-Lead Lead Frame Chip Scale Package [LFCSP]
6 mm × 6 mm Body and 0.75 mm Package Height (CP-40-9)
Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option Marking Code AD8264ACPZ −40°C to +85°C 40-Lead LFCSP CP-40-9 H1V AD8264ACPZ-R7 −40°C to +85°C 40-Lead LFCSP, 7” Tape and Reel CP-40-9 H1V AD8264ACPZ-RL −40°C to +85°C 40-Lead LFCSP, 13” Tape and Reel CP-40-9 H1V AD8264-EVALZ Evaluation Board 1 Z = RoHS Compliant Part.
©2009–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07736-0-10/18(C)
