012345

1 2 3 4 5 6 7 8 9 10

Ener

gy (p

J/pk

t)

Number of Router Ports

Cheng TanCornell University 1/20

EvaluatingTesting

R

R

R

R

R

R

R

R

Unit

RExpect?Input

Input =?

0102030405060708090

100

0 0.1 0.2 0.3 0.4 0.5 0.6

Netw

ork

late

ncy (

cycle

s)

Injection rate

Characterization

Simulation

Modeling

Property-Based Random

Functional-Level

Cycle-Level

Physical-Level

Register-Transfer-Level

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Generation

ccc

ccc

c c

Integration

Expect?

InputCC

CC

CC

CC

r

r

rr

r

r

rr

CC

CC

CC

CC

r

r

rr

r

r

rr

ccc

ccc

c c

CC

CC

CC

CC

r

r

rr

r

r

rr

Cheng TanCornell University 2/20

Lang.

Evaluating

Config. Function-Level

Cycle-Level RTL

Physical-Level

Unit Int. Sim.RTL

Gen.ASICChar.

Modeling Testing

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

BookSim2 C++

Garnet

Noxim

C++

SysC

Connect

Netmaker

OpenSMART

OpenSoC

BSV

Verilog

Chisel

Chisel

DSENT

Orion2

COSI

C++

C++

C++

PyOCN PyMTL

Property-based

Overview of PyOCN Framework

Cheng TanCornell University 3/20

OCNConfig.

FL model

CL model

RTL model

PL model

SoCSimulator

NetworkLib.

ChannelLib.

RouterLib.

InputUnitLib.

RouteUnitLib.

SwitchUnitLib.

OutputUnitLib.

PyOCNStd. Lib

EDAtoolflow

CL Perf. stats

RTL Perf. stats

AETstats

Floor-plan

Verilog

Char

acte

rizin

g

Generating

Testing

Modeling

Evaluating

Simulating

Param.System

PyMTLElaborate

TestHarness

PyMTLSim. Pass

PyMTLSim. Pass

PyMTLSim. Pass

PBRTTester

IntegrationTester

UnitTester

PyMTLGen. Pass

PyOCNEDA script

PyMTLPlace. Pass

PyOCNSimulator

• Enables multi-level modeling to facilitate rapid design-space exploration

• Provides test harnesses for testing OCN designs modeled at different abstraction levels

• Can simulate OCNs at various abstraction levels, generate synthesizable Verilog, and drive a commercial standard-cell-based toolflow for characterizing OCN area, energy, and timing

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

012345

1 2 3 4 5 6 7 8 9 10

Ener

gy (p

J/pk

t)

Number of Router Ports

Cheng TanCornell University 4/20

EvaluatingTesting

R

R

R

R

R

R

R

R

Unit

RExpect?Input

Input =?

0102030405060708090

100

0 0.1 0.2 0.3 0.4 0.5 0.6

Netw

ork

late

ncy (

cycle

s)

Injection rate

Characterization

Simulation

Modeling

Property-Based Random

Function-Level

Cycle-Level

Physical-Level

Register-Transfer-Level

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Generation

ccc

ccc

c c

Integration

Expect?

InputCC

CC

CC

CC

r

r

rr

r

r

rr

CC

CC

CC

CC

r

r

rr

r

r

rr

ccc

ccc

c c

CC

CC

CC

CC

r

r

rr

r

r

rr

Cheng TanCornell University 5/20

PyOCN for Modeling OCNs

written in Python

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

.

.

.

.

.

.

.

.

.

ChannelInputUnit

OutputUnit

ChannelInputUnit

OutputUnit

ChannelInputUnit

OutputUnit

SwitchUnit

SwitchUnit

SwitchUnit

RouteUnit

RouteUnit

RouteUnit

Cheng TanCornell University 6/20

Function-Level Modeling

FL Implementation of Ring Network Pythonfunction

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

Cheng TanCornell University 7/20

Cycle-Level Modeling

CL Implementation of Switch Unit

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

Cheng TanCornell University 8/20

RTL Implementation of Switch Unit

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Register-Transfer-Level Modeling

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

Cheng TanCornell University 9/20

Physical-Level Modeling

PL Implementation of Ring Network

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

• New Modular Router Microarchitecture– Single unified router microarchitecture for

all networks

– Easily configure different units for different topologies, routing algorithms, and arbitration algorithms

– Users can also provide their own units

• Multi-level modeling– Functional-Level

– Cycle-Level

– Register-Transfer-Level

– Physical-Level

Cheng TanCornell University 10/20

PyOCN for Modeling OCNs

Multi-level simulation speedup and accuracy

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

InjectionRate

Speedup Accuracy

0.01 17.9X 86%

0.1 15.5X 87%

0.2 14.2X 87%

0.3 13.3X 97%

0.4 13.0X 74%

012345

1 2 3 4 5 6 7 8 9 10

Ener

gy (p

J/pk

t)

Number of Router Ports

Cheng TanCornell University 11/20

EvaluatingTesting

R

R

R

R

R

R

R

R

Unit

RExpect?Input

Input =?

0102030405060708090

100

0 0.1 0.2 0.3 0.4 0.5 0.6

Netw

ork

late

ncy (

cycle

s)

Injection rate

Characterization

Simulation

Modeling

Property-Based Random

Function-Level

Cycle-Level

Physical-Level

Register-Transfer-Level

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Generation

ccc

ccc

c c

Integration

Expect?

InputCC

CC

CC

CC

r

r

rr

r

r

rr

CC

CC

CC

CC

r

r

rr

r

r

rr

ccc

ccc

c c

CC

CC

CC

CC

r

r

rr

r

r

rr

Cheng TanCornell University 12/20

Unit and Integration TestPyOCN provides extensive test suites to unit test the basic network components.

PyOCN also enables integration test oncomplete network instances.

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

RExpect?Input

CC

CC

CC

CC

r

r

rr

r

r

rr

Expect?

Input

Cheng TanCornell University 13/20

Property-Based Random TestPyOCN uses a type-based random data generator for all inputs and checking if the DUT violates the given specification.

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Input =?

ccc

ccc

c c

CC

CC

CC

CC

r

r

rr

r

r

rr

012345

1 2 3 4 5 6 7 8 9 10

Ener

gy (p

J/pk

t)

Number of Router Ports

Cheng TanCornell University 14/20

EvaluatingTesting

R

R

R

R

R

R

R

R

Unit

RExpect?Input

Input =?

0102030405060708090

100

0 0.1 0.2 0.3 0.4 0.5 0.6

Netw

ork

late

ncy (

cycle

s)

Injection rate

Characterization

Simulation

Modeling

Property-Based Random

Function-Level

Cycle-Level

Physical-Level

Register-Transfer-Level

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Generation

ccc

ccc

c c

Integration

Expect?

InputCC

CC

CC

CC

r

r

rr

r

r

rr

CC

CC

CC

CC

r

r

rr

r

r

rr

ccc

ccc

c c

CC

CC

CC

CC

r

r

rr

r

r

rr

Cheng TanCornell University 15/20

PyOCN for Evaluating OCNs

0 0.1 0.2 0.3 0.4 0.5 0.6

ringbflymeshcmeshtorus

0 0.1 0.2 0.3 0.4 0.5 0.60 0.1 0.2 0.3 0.4 0.5 0.60

102030405060708090

100

0 0.1 0.2 0.3 0.4 0.5 0.6

Netw

ork

late

ncy (

cycle

s)

random partition neighbor complement

Injection rate

040008000

1200016000

1 2 3 4 5 6 7 8 9 10

Area

(um

^2)

012345

1 2 3 4 5 6 7 8 9 10

Ener

gy (p

J/pk

t)Number of router ports

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Generated RTLNumber of router ports

Area/Energy analysis of router

Injection rate Injection rate Injection rate

Simulation of different topologies at different injection rates

Area Budget Energy Budget

Cheng TanCornell University 16/20

PyOCN for Evaluating OCNs• Placement of butterfly topology

– 64-terminal 4-ary 3-fly butterfly topology

– 3 routers in the same row can be recognized as a router group

Case study to show the features of PyOCN

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

RG0 RG1 RG2 RG3

RG4 RG5 RG6 RG7

RG8 RG9 RG10 RG11

RG12 RG13 RG14 RG15

Critical paths

net = BFlyNetworkRTL( pkt_t, k_ary=4, n_fly=3 ) critical_paths = [ “channels[82]”,“channels[114]”,…

]for c in critical_paths:net.set_param( f’top.{c}.construct’, hops=2 )

net.elaborate()

RG0 RG1 RG2 RG3

RG4 RG5 RG6 RG7

RG8 RG9 RG10 RG11

RG12 RG13 RG14 RG15

Cheng TanCornell University 17/20

PyOCN for Evaluating OCNs• Placement of butterfly topology

– 64-terminal 4-ary 3-fly butterfly topology

– 3 routers in the same row can be recognized as a router group

• Parameterization system– use set_param() to break down.

Critical paths

Case study to show the features of PyOCN

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Cheng TanCornell University 18/20

PyOCN for Evaluating OCNs• Placement of butterfly topology

– 64-terminal 4-ary 3-fly butterfly topology

– 3 routers in the same row can be recognized as a router group

• Parameterization system– use set_param() to break down.

Case study to show the features of PyOCN

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Cheng TanCornell University 19/20

Open-Source PyOCN• Open-source

– https://github.com/cornell-brg/pymtl3-net

• Demo

To create a virtual environment and install pymtl3-net:

% python3 -m venv ${HOME}/venv

% source ${HOME}/venv/bin/activate

% pip3 install pymtl3-net

To test a 4-terminal ring using single-pkt with dumped vcd:

% pymtl3-net test ring --nterminals 4 --dump-vcd

To simulate a 2x2 mesh with specific injection rate:

% pymtl3-net sim mesh --ncols 2 --nrows 2 --injection-rate 10 -v

To simulate a 2x2 mesh across different injection rates:

% pymtl3-net sim mesh --ncols 2 --nrows 2 --sweep -v

To generate a 4x4 mesh:

% pymtl3-net gen mesh --ncols 4 --nrows 4

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Repl.it: https://repl.it/@ChengTan/pyocn-demo

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

Cheng TanCornell University 20/20

OCNConfig.

FL model

CL model

RTL model

PL model

SoCSimulator

NetworkLib.

ChannelLib.

RouterLib.

InputUnitLib.

RouteUnitLib.

SwitchUnitLib.

OutputUnitLib.

PyOCNStd. Lib

EDAtoolflow

CL Perf. stats

RTL Perf. stats

AETstats

Floor-plan

Verilog

Char

acte

rizin

g

Generating

Testing

Modeling

Evaluating

Simulating

Param.System

PyMTLElaborate

TestHarness

PyMTLSim. Pass

PyMTLSim. Pass

PyMTLSim. Pass

PBRTTester

IntegrationTester

UnitTester

PyMTLGen. Pass

PyOCNEDA script

PyMTLPlace. Pass

PyOCNSimulator

• Enables multi-level modeling to facilitate rapid design-space exploration

• Provides test harnesses for testing OCN designs modeled at different abstraction levels

• Can simulate OCNs at various abstraction levels, generate synthesizable Verilog, and drive a commercial standard-cell-based toolflow for characterizing OCN area, energy, and timing

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks

This work was supported in part by NSF CRI Award #1512937, DARPA POSH Award #FA8650-18-2-7852, and equipment, tool, and/or physical IP donations from Intel, Synopsys, and Cadence.