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1 BITS-GOA EEE/instr F341 Anita Agrawal
PSpice
2 BITS-GOA EEE/instr F341 Anita Agrawal
Overview
PSpice
Simulation Program with Integrated
Circuit Emphasis
3 BITS-GOA EEE/instr F341 Anita Agrawal
.cir
File
User CKT
Definition
file
.sch
File
User schematic
file
SPICE
Compile
and
RUN
.op
Text file
Text file
.plot
Text file
.probe
Graphics file
4 BITS-GOA EEE/instr F341 Anita Agrawal
B GaAs MES field-effect transistor
C Capacitor
D Diode
J Junction field-effect transistor
K Mutual inductors (transformer)
L Inductor
M MOS field-effect transistor
Q Bipolar junction transistor
R Resistor
T Transmission line
E Voltage-controlled voltage source
F Current-controlled current source
G Voltage-controlled current source
H Current-controlled voltage source
I Independent current source
V Independent voltage source
S Voltage-controlled switch
W Current-controlled switch
Components Source
Switch
Circuit Elements
5 BITS-GOA EEE/instr F341 Anita Agrawal
FORMAT OF CIRCUIT FILES
Title
Circuit description
Analysis description
Output description
.END (end -of-file statement)
File
.CIR extension
6 BITS-GOA EEE/instr F341 Anita Agrawal
Notes
1. The first line is the title line, and it may contain any type of text.
2. The last line must be the .END command. 3. A continuation line is identified by a plus sign
(+) in the first column of the next line. The continuation lines must follow one another in the proper order.
7 BITS-GOA EEE/instr F341 Anita Agrawal
4. A comment line may be included anywhere,
preceded by a semicolon ;
5. The number of blanks between items is not
significant (except in the title line). Tabs and
commas are equivalent to blanks.
Notes contd……
8 BITS-GOA EEE/instr F341 Anita Agrawal
6. PSpice statements or comments can be in either upper- or lowercase
7. SPICE / PSpice is user-friendly software; it gives an error message in the output file that identifies a problem.
8. The symbols in PSpice are represented without subscripts.
Notes contd……
9 BITS-GOA EEE/instr F341 Anita Agrawal
Types of Analysis
• DC Analysis
• Transient Analysis
• AC Analysis
Example: Compute the node voltages and source currents
Independent DC Voltage source
Independent DC current source 0
13 BITS-GOA EEE/instr F341 Anita Agrawal
VS 1 0 DC 20V
R1 1 2 500
R2 2 5 800
R3 2 3 1K
R4 4 0 200
VX 3 0 DC 0V
VY 5 4 DC 0V
IDC 0 4 DC 50m
.end
Code and output
VS 1 0 DC 20V R1 2 1 500 R2 5 2 800 R3 3 2 1K R4 0 4 200 VX 3 0 DC 0V VY 5 4 DC 0V IDC 0 4 DC 50m .op .end
NODE VOLTAGE ( 1) 20.0000 ( 2) 12.5000 ( 3) 0.0000 ( 4) 10.5000 ( 5) 10.5000
VOLTAGE SOURCE CURRENTS NAME CURRENT VS -1.500E-02 VX -1.250E-02 VY -2.500E-03
TOTAL POWER DISSIPATION 3.00E-01 WATTS
18 BITS-GOA EEE/instr F341 Anita Agrawal
.TF (transfer) • Purpose: causes the DC gain to be calculated by
linearizing the circuit around the bias point.
.TF <output variable> <input source name>
e.g.
.TF V(5) VIN
.TF I(VDRIV) ICNTRL
In our Case:
.TF V(4) Vs
19 BITS-GOA EEE/instr F341 Anita Agrawal
Code and output
VS 1 0 DC 20V R1 2 1 500 R2 5 2 800 R3 3 2 1K R4 0 4 200 VX 3 0 DC 0V VY 5 4 DC 0V IDC 0 4 DC 50m .end
NODE VOLTAGE ( 1) 20.0000 ( 2) 12.5000 ( 3) 0.0000 ( 4) 10.5000 ( 5) 10.5000
VOLTAGE SOURCE CURRENTS NAME CURRENT VS -1.500E-02 VX -1.250E-02 VY -2.500E-03
TOTAL POWER DISSIPATION 3.00E-01 WATTS
.TF V(4) Vs
.end
**** SMALL-SIGNAL CHARACTERISTICS V(4)/VS = 1.000E-01 INPUT RESISTANCE AT VS = 1.000E+03 OUTPUT RESISTANCE AT V(4) = 1.700E+02
20 BITS-GOA EEE/instr F341 Anita Agrawal
Voltage Controlled Voltage Source E
Voltage Controlled Current Source G
Current Controlled Current Source F
Current Controlled Voltage Source H
Dependent Sources
21 BITS-GOA EEE/instr F341 Anita Agrawal
Voltage Controlled (Dependent) Voltage Source (E)
1. The first letter of the part
name for the voltage
dependent voltage source
is "E."
2. Positive terminal is
designated as "n+" and
negative terminal is
designated as "n-."
Ebar 17 8 42 18 24.0; gain is 24
efix 3 1 11 0 20.0
efix 3 1 0 11 -20.0; same as above
efix 1 3 11 0 -20.0; same as above
efix 1 3 0 11 20.0; same as above
Ellen 12 0 20 41 16.0
*Name n+ n- nc+ nc- gain
22 BITS-GOA EEE/instr F341 Anita Agrawal
Voltage Controlled (Dependent) Current Source (G)
1. The first letter of the part name
for the voltage-controlled
dependent current source is "G."
2. A current equal to γ times vx
flows from node "n+" through the
source and out of node "n-." γ is
called the transconductance
*Name n+ n- nc+ nc- transconductance
Glab 23 17 8 3 2.5
G1 12 9 1 0 4E-2
Grad 19 40 6 99 0.65
Grad 19 40 99 6 -0.65 ; same as above
Grad 40 19 99 6 0.65 ; etc.
23 BITS-GOA EEE/instr F341 Anita Agrawal
Current Controlled (Dependent)Voltage Source (H)
*Name n+ n- Vmonitor transresistance
Hvx 20 12 Vhx 50.0
Vhx 80 76 DC 0V ; controls Hvx
Hab 10 0 V20 75.0
V20 15 5 DC 0V ; controls Hab
HAL 20 99 Vuse 10.0
Vuse 3 5 DC 20V ; actual voltage source
The first letter of the
part name for the
current-controlled
dependent
voltage source is "H."
24 BITS-GOA EEE/instr F341 Anita Agrawal
Current Controlled (Dependent) Current Source (F)
*Name n+ n- Vmonitor Gain
Ftrn 81 19 Vclt 50.0
Vclt 23 12 DC 0V ; controls Ftrn
Fcur 63 48 Vx 20.0
Vx 33 71 DC 0V ; controls Fcur
F3 2 0 V1 15.0
V1 3 1 DC 0V ; controls F3
The first letter in the part
name for this dependent
source is "F."
25 BITS-GOA EEE/instr F341 Anita Agrawal
Thévenin Equivalent Circuit
• Using PSpice to find Thévenin Equivalent Circuit
• The PSpice "dot command" that makes this easy, is ".TF," where "TF" indicates "transfer function."
• The transfer function is intended to find the ratio between a source voltage or current, and a resulting voltage difference or branch current
26 BITS-GOA EEE/instr F341 Anita Agrawal
.TF (transfer) • Purpose The .TF command/statement causes the
DC gain to be calculated by linearizing the circuit
around the bias point.
.TF <output variable> <input source name>
e.g.
.TF V(5) VIN
.TF I(VDRIV) ICNTRL
In our Case:
.TF V(1,0) Vs
The results of the .TF command are only available in the output file. They
cannot be viewed in Probe.
27 BITS-GOA EEE/instr F341 Anita Agrawal
Vs 2 5 DC 100V
Vc 2 3 DC 0V; controls Fx
Fx 6 7 Vc 4.0; gain = 4
* n+ n- NC+ NC- gain
Ex 2 1 5 4 3.0; gain = 3
R1 3 4 5.0
R2 4 7 5.0
R3 5 4 4.0
R4 7 0 4.8
R5 5 6 1.0
R10 1 0 1MEG
* out_var input_source
.TF V(1,0) Vs
.END
Transfer function = V(1,0) / Vs
28 BITS-GOA EEE/instr F341 Anita Agrawal
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
( 1) 180.0000 ( 2) -60.0010 ( 3) -60.0010 ( 4) -80.0010
( 5) -160.0000 ( 6) -176.0000 ( 7)-864.0E-06
VOLTAGE SOURCE CURRENTS NAME CURRENT
Vs -4.000E+00
Vc 4.000E+00
TOTAL POWER DISSIPATION 4.00E+02 WATTS
**** SMALL-SIGNAL CHARACTERISTICS
V(1,0)/Vs = 1.800E+00
INPUT RESISTANCE AT Vs = 2.500E+01
OUTPUT RESISTANCE AT V(1,0) = 5.000E+00
Output from file
29 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
.DC LIN
•General form
.DC [LIN] <sweep variable name> + <start value> <end
value> <increment value> +<nested sweep specification>
•Examples
.DC VIN -.25 .25 .05
.DC LIN I2 5mA -2mA 0.1mA
.DC VCE 0V 10V .5V IB 0mA 1mA 50uA
30 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
.DC DEC /. DC OCT
• General form
.DC <logarithmic sweep type> <sweep variable name> +
<start value> <end value> <points value>
+ [nested sweep specification]
• Examples
.DC DEC NPN QFAST(IS) 1E-18 1E-14 5
31 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
• General form
.PRINT <analysis type> [output variable]*
• Examples
.PRINT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PRINT AC VM(2) VP(2) VM(3,4) VG(5) VDB(5) IR(6)
II(7)
.PRINT TRAN V(3) V(2,3) ID(M2) I(VCC)
32 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
Previous Example
.dc VS list 10 15 20
.print DC I(r1) i(r2) I(r3) i(r4)
.end
33 BITS-GOA EEE/instr F341 Anita Agrawal
Code and output
VS 1 0 DC 20V R1 2 1 500 R2 5 2 800 R3 3 2 1K R4 0 4 200 VX 3 0 DC 0V VY 5 4 DC 0V IDC 0 4 DC 50m .end
NODE VOLTAGE ( 1) 20.0000 ( 2) 12.5000 ( 3) 0.0000 ( 4) 10.5000 ( 5) 10.5000
VOLTAGE SOURCE CURRENTS NAME CURRENT VS -1.500E-02 VX -1.250E-02 VY -2.500E-03
TOTAL POWER DISSIPATION 3.00E-01 WATTS
.dc VS list 10 15 20
.print DC I(r1) i(r2) I(r3) i(r4)
.end
VS I(r1) I(r2) I(r3) I(r4) 1.000E+01 -5.000E-03 2.500E-03 -7.500E-03 -4.750E-02 1.500E+01 -1.000E-02 -1.500E-12 -1.000E-02 -5.000E-02 2.000E+01 -1.500E-02 -2.500E-03 -1.250E-02 -5.250E-02
34 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
.PROBE
• General form
.PROBE [output variable]*
• Examples
.PROBE V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PROBE D(QBAR)
35 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
.PLOT
• General form .PLOT <analysis type> [output variable]*
+ ( [<lower limit value> , <upper limit value>] )*
• Examples .PLOT DC V(3) V(2,3) V(R1) I(VIN) I(R2) IB(Q13)
VBE(Q13)
.PLOT AC VM(2) VP(2) VM(3,4) VG(5) VDB(5) IR(D4)
.PLOT TRAN V(3) V(2,3) (0,5V) ID(M2) I(VCC) (-
50mA,50mA)
36 BITS-GOA EEE/instr F341 Anita Agrawal 2/2/2016
.OP
• Helps to give more details about the bias points in
the output file