Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler...

17
Project Overview 2014/05/05 1

Transcript of Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler...

Page 1: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Project Overview2014/05/05

1

Page 2: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Current Project“Research on Embedded

Hypervisor Scheduler Techniques”◦Design an energy-efficient

scheduling mechanism in virtualized environment.

◦Assume the hardware platform is asymmetric multi-core. big.LITTLE core architecture.

2

Page 3: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

big.LITTLE Core ArchitectureDeveloped by ARM in Oct. 2011.Combine two kinds of

architecturally compatible cores.To create a multi-core processor that can

adjust better to dynamic computing needs and use less power than clock scaling alone.

big cores are more powerful but power-hungry, while LITTLE cores are low-power but (relatively) slower.

3

Page 4: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Three Types of ModelsCluster migrationCPU migration(In-Kernel

Switcher)Heterogeneous multi-processing

(global task scheduling)

Page 5: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Type 1: Cluster Migration

Either big or LITTLE cores are used simultaneously.

Page 6: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Type 2: CPU Migration

Logical CPU: a pair of big and LITTLE core.

Only one of the two cores in a pair is powered up and processing tasks at a time.

Page 7: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Type 3: HMP

All the big and LITTLE cores can be used at the same time.

Page 8: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Task Scheduling in Asymmetric Multi-coresTask should be distributed

unevenly.◦Only critical tasks should execute on

big cores in order to minimize power consumption.

◦Different from traditional SMP scheduling.

◦Needs to design new scheduling algorithms.

8

Page 9: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Asymmetric Multi-core in DatacenterAsymmetric multi-core is not

limited to hand-held devices or embedded systems.

There will be servers with asymmetric cores in a datacenter.◦Virtualized environment in

datacenter.

9

Page 10: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

OS Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

OS Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

10

ARM Cortex-A15

ARM Cortex-A7

OS Kernel

GUEST1

Android Framework

Scheduler

VCPU VCPU

Hypervisor

vCPU Scheduler

Performance Power-saving

Low computing resource requirement

High computing resource requirement

If Guest OS scheduler is not big.LITTLE-aware, it will assign tasks to vCPUs evenly in order to achieve load balancing.

Task 1

Task 2

Task 3

Task 4

Hypervisor vCPU scheduler will assign vCPUs evenly to physical ARM cores since it is not big.LITTLE-aware.

Cannot take advantage on

big.LITTLE core architeture

Current Hypervisor Architecture and Problem

Page 11: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

OS Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

11

ARM Cortex-A15

ARM Cortex-A7

OS Kernel

GUEST1

Android Framework

Scheduler

VCPU VCPU

Hypervisor

Performance Power-saving

If Guest OS scheduler is not big.LITTLE-aware, it will assign tasks to vCPUs evenly in order to achieve load balancing.

Cannot take advantage on

big.LITTLE core architeture

Task 1 Task 2Task 3 Task 4

Both on big coreOt both on LITTLE core

b-L vCPU Scheduler

Even if hypervisor vCPU scheduler is big.LITTLE-aware, it will schedule these vCPUs to either big cores or LITTLE cores since they have the same loading.

Current Hypervisor Architecture and Problem(Cont.)

Page 12: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Challenge The hypervisor scheduler cannot

take advantage of big.LITTLE architecture if the scheduler inside guest OS is not big.LITTLE aware.

12

Page 13: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Our SolutionApply VM introspection(VMI) to

retrieve the process list in a VM.◦VMI is a technique that allows the

hypervisor to inspect the contents of the VM in real-time.

Modify the CPU masks of tasks in the VM in order to create an illusion of “big vCPU” and “LITTLE vCPU”.

Hypervisor scheduler can assign the vCPU to corresponding big or LITTLE cores.

13

Page 14: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Linaro Linux Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

14

ARM Cortex-A15

ARM Cortex-A7

OS Kernel

GUEST1

Android Framework

Scheduler

VCPU VCPU

Hypervisor

Performance Power-saving

OS Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

Low computing resource requirement

High computing resource requirement

Task 2 Task 4

VM Introspector

b-L vCPU Scheduler

VM Introspector gathers task information from

Guest OS

Task-to-vCPU

Mapper

Modify the CPU mask of each task according

to the task information from VMI

[1|0][1|0]

[0|1][0|1]

Treat this vCPU as LITTLE core since tasks with low computing requirement are scheduled here.

Hypervisor vCPU scheduler will schedule big vCPU to A15, and LITTLE vCPU to A7.

VCPU

Task 3Task 1

Hypervisor Architecture with VMI

Page 15: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

OS Kernel

GUEST2

Android Framework

Scheduler

VCPU VCPU

15

ARM Cortex-A15

ARM Cortex-A7

OS Kernel

GUEST1

Android Framework

Scheduler

VCPU VCPU

Hypervisor

Performance Power-saving

Task 2 Task 4

VM Introspector

b-L vCPU Scheduler

Task-to-vCPU

Mapper

[1|0][1|0]

[0|1][0|1]

Hypervisor vCPU scheduler will schedule big vCPU to A15, and LITTLE vCPU to A7.

VCPU

Task 3Task 1

VCPU VCPU

Task 1[1|1] [1|1]

Guest OS 2 has two task with low computing requirement

VM Introspector gathers task information from

Guest OS

Modify the CPU mask of each task according

to the task information from VMI

Task 2

Treat this vCPU as LITTLE core since tasks with low computing requirement are scheduled here.

Guest OS 1 has two task with high computing

requirement and two task with low computing

requirement

Hypervisor Architecture with VMI(Cont.)

Page 16: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Current StatusImplementing the proposed

architecture.◦Trying to enable VMI on Xen 64 bit.

Developing new scheduling algorithms for big.LITTLE core.

16

Page 17: Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.

Q&A

17