Prof. Florin Udrea Cambridge University Taiwan, January...

Course SampleF. Udrea 1

Talk1: Overview of Power Devices and Technology Trends

Talk 2: Devices and Technologies for HVIC

Prof. Florin Udrea Cambridge University

Taiwan, January 2010


Outline

Talk 1: Overview of Power Devices and Technology Trends• Power Diodes • Power MOSFETs• IGBTs• Super-junction Theorem, Technologies, and Applications

Talk 2: Devices and Technologies for HVIC• RESURF Concept and Devices • RESURF Other Forms • BCD, HVCMOS, and SOI Technology Concepts and Applications

Q & A


10

100

1K

10K

100K

1M

10M

100M

10 100 1K 10K 100K 1MOperation frequency (Hz)

Capacity (VA) Electric traction

HV.DC

UPS

Motor control

Robot, Welding machine

Auto

SwitchingPower supply

VCR/DVD Power supply for audio

Refrigerator

Washing machine

Air conditionerMicrowave

GTO

IGBTs MOSFET Modules

HVIC & PIC MOSFET

Thyristor

TRIAC


The Power MOSFET

� TheThe power MOSFFET is based on a classical low-power MOSFET with an additional drift region to support high voltages. The current flow occurs solely by transport of majority carriers (in this case electrons) and consequently does not lead to storage of excess carrier charge (plasma) as in the case of power bipolar devices (BJTs, thyristors). This allows high switching speed, however at the expense of a relatively high on-state resistance.

� The first power MOS transistor, fabricated in late 70’s, was the V-groove MOSFET. The channel was formed on the side of an etch formed by selective chemical etching along one of the natural silicon crystal planes.

n+

n- drift region

SourceGateSource

Drain

n+ n+

p -well p -well


The Power MOSFET

� RDSON is made up of the series combination of all the parts of the device between the source and drain where there is a voltage drop due to the electron current flow. Some of these components are negligible in some voltage ranges. Note that not all the components shown are linear (for example the JFET resistance or the channel and accumulation layer resistances are voltage dependent), but in the linear region of operation, and for a first order approximation, we can assume that these components behave as ‘resistors’.

� RDS(ON) = Rs + Rn+ + Rch + Ra + RJFET + Rdrift + Rsub

n+

n- drift region

SourceGateSource

Drain

n+ n+

p well p well

+

+

Rdrift

Rsub

RJFET

RaRch

RS

Rn+

unipolar conductionelectron drift


The Power MOSFET

� As a switch, in the on-state, the power MOSFET should operate in the linear region where the on-state resistance is minimal. Operation in the saturation region is highly undesirable, as the on-state losses would be too high with no gain in current capabilityNote that the saturation in the MOS theory refers to the saturation of the current (that is pinch-off of the channel). In bipolar saturation refers to the voltage, more precisely the minimum collector-emitter voltage. The two ‘saturation terms’ cannot be more different!

�

VDS

≈≈ ≈≈

0 VBR

Linear

Saturation

VGS1

VGS2

VGS3

VGS4

VGS5

VGS5 > VGS4 etc.

VGS > VGS(th)

Quasi-Linear


The Power MOSFET

� The table below shows the approximate contribution of each of these resistances for two extreme devices, one designed for a 30V and one designed for 600 V device. In general the package resistance Rs, the source resistance Rn+ and the silicon substrate resistance Rsub, are negligible, but their effect in low-voltage, high current devices can still be significant. The channel resistance Rch and the accumulation layer resistance Ra, play an important role, especially for the low-voltage devices. These resistances are voltage dependent and they can only be assumed to be constant in the linear region of the MOSFET. Once the drain voltage increases, and the device moves into the quasi-linear and saturation regions, these resistance increase very significantly. The percentage values given below are only valid for the linear region. Rdrift (which in the table below includes RJFET) is very important for both low voltage (e.g. 30V) and high voltage devices (e.g. 600 V) but it is by far the single highest resistance in high voltage structures.

* RJFET is included in Rdrift

Rsub=0.5%Rsub=7%

R*drift=96.5%R*drift=29%

Ra=0.5%Ra=23%

Rch=1.5%Rch=28%

Rn+=0.5%Rn+=6%

RS=0.5%RS=7%

VDS=600VVDS=30V

RDS(on)


The famous-infamous limit of silicon

Dn

dddriftspecific Nq

WWR

µσ==−

SiliconBRcriticalrn

BRdriftspecific V

VR 5.29

30

2

103.84 −

− ×≈=ξεεµ

The specific drift resistance is given by the drift of electrons through the n- drift layer. Therefore, it can be calculated as:

21

0 12��

��

�=

D

BRrcritical Nq

VW

εε

critical

BRcritical

D

criticalrBR

VW

qNV

ξξεε 2

2

20 =�=


Superjunction – A super-concept for super-low on-state resistance

erjunctionSiliconBRcriticalrn

BRerjunctiondriftspecific Vw

wVR

sup

4/512

0sup 1098.1

4−

−−− ×≈=

ξεεµ


The Cool MOS – based on super-junction concept

n+

n

SourceGateSource

Drain

n+ n+

p well p well

pp

The doping of the n drift layer is one order of magnitude higher than in a classical power MOSFET (e.g. 5e15cm-3 for 600V)

w = 5 -10 um


The trench MOSFET

n+

n- drift region

Source

Drain

n+ n+

p -well p -wellGate

Channel

Source

The trench MOSFET is a variant of a power MOSFET features vertical channels. The n+ sources are self-aligned to the trench and the overall dimensions of the cell can be made much smaller than in the classical power DMOSFET. That means that the channel density is considerably larger than in the classical power DMOSFET. This yields a smaller channel resistance and as a result a smaller on-state resistance. The advantage of a smaller on-state resistance is even more prominent at lower voltage ratings (e.g. 30V, 60V, 100V) where the channel resistance represents a very significant contribution of the overall on-state resistance. Besides this, the current in the trench structure has a more 1D natural flow, avoiding bends and removing the parasitic JFET effect.

)()/( TGoxchch VVCAZ

LR

−≅

µ


�The IGBT equivalent circuit

�The IGBT has within its structure three MOS- bipolar devices:(i) The cascade MOSFET - PIN diode(ii) MOS base current controlled - wide base PNP transistor(iii) Parasitic MOS turn-on thyristor - must be always suppressed

p+

n- drift region

Source/Cathode

Gate

Source/Cathode

Anode

n+ n+

p wellp well

p+


Trench IGBT Layout- Stripe or Hex ?

Stripe IGBTStripe IGBT

Hexagonal IGBTHexagonal IGBT


Trench IGBT Cross Sections

SchematicSchematic SEMSEM


The Hexagonal Trench Structure


The Carriers Stored Gate BiploarTransistor (CSGBT)

Hitachi’s variant of an IGBT which uses a trench structure with enhanced PIN diode effect to increase the injection of electrons at the cathode side thus improving the plasma distribution and reducing the on-state losses considerably.


The Field Stop (or Soft Punch-Through), PT and NPT structures

p+ (substrate)

n- drift

region

GateSource/Cathode

n+

p well

250µµµµm

100µµµµm

n buffer15µµµµm

P transparent anode

GateSource/Cathode

n+

p well

190µµµµm

1µµµµm

n- drift

region

GateSource/Cathode

n+

p well

100µµµµm

n- buffer – field stop1- 2 µµµµm

P transparent anode1µµµµm

PT - IGBT NPT - IGBT SPT - IGBT

(a)(b)

(c)


The Field Stop (or Soft Punch-Through), PT and NPT comparison

Structure PT -IGBT NPT -IGBT SPT - IGBT

Drift layer thickness thin thick Thin

Wafer type (for 600 V and 1.2 kV)

Epitaxial Float zone (FZ) Float Zone (FZ)

Buffer Layer Thick and highly doped N/A Thin and lowly doped

P+ anode injector Thick and highly doped (whole substrate)

Thin and relatively lowly doped

Thin and relatively lowly doped

Bipolar gain control Lifetime killing Injection efficiency Injection efficiency

On-state losses low medium low

Switching losses high medium low

Turn-off tail short long short

Voltage overshoot (in some applications)

high low low

Temperature coefficient negative (mostly) positive positive

SCSOA (short circuit conditions)

medium large large

RBSOA (reverse bias conditions)

narrow large Large


The trade-off between on-state voltage and turn-off energy losses for 1.2 kV DMOS PT IGBT, the Trench IGBT and the Trench SPT IGBT.

0

Anode Voltage (V)@ JA = 100 A/cm2

E (m

J/cm

2 )

1 2 3 4 5 6 7 8

5

10

15

20

25

30

Trench PT IGBT

Trench SPT IGBT

Trench NPT IGBT

DMOS PT IGBT


Evolution of Devices for Power/HV ICs

Evolution of Power ICs

Pow

er C

apab

ility

RESURF LDMOSFET

Vertical DMOS

Lateral MOS with LDD

LDMOSFET

LIGBT

Vertical IGBT

SOI LDMOS & LIGBT

SUPER-JUNCTION

70s80s 80s & 90s 90s 00


Example of a HVIC in motor control applications – Hitachi ECN 3067

Integrated Controller containing: �PWM controller

�Under voltage detection

�Overcurrent protection

6 IGBTs and 6 anti-parallel diodes integrated in one chip 6 IGBTs ( 3 LS and 3 HS) 6 free-wheeling diodes

( 3 LS and 3 HS)


SOI - SIMOX technologySuper-junction, BCD and Power IC Technologies

0.1

1

10

100

1000

10 100 1000 10000

Breakdown Voltage (V)

Spe

cific

On-

Res

ista

nce

(moh

m-c

m2 )

Si Limit SJ (Denso '06) [25]SJ (Philips '02) [26] SJ (Shindengen '03) [27]SJ (Mitsubishi '00) [28] SJ (Infineon '04) [29]SJ (Fuji Electric '05) [30] SJ (Toshiba '04) [31]SJ (Toshiba '06) [32] SJ (Toyota '04) [33]SJ (Fuji Electric '06) [34] Super 3D MOSFET (Denso '06) [35]SJ (Takaya '05) [36] UMOSFET, Miura '05 [37]Vertical RESURF MOSFET, ISPSD 04 [38] Lateral SJ (Infineon '06) [39]BCD PMOS, Philips '06 [2] BCD NMOS, Philips '06 [2]BCD (Renesas Semi 06) [3] JI (Hardikar '04) [16]Double RESURF (ISPSD '00) [17] Thin Film SOI LDMOSFET (Letavic '067) [41]LIGBT (Letavic '06) [42]

BCD Technologies

High Voltage Vertical Superjunction

Power IC Technology

Technologies

Low Voltage Vertical Superjunction

Lateral Superjunction [39]

LIGBT [42]

Si Limit


BCD linewidth for different voltage rating

BCD Technologies

0

0.2

0.4

0.6

0.8

1

0 50 100 150 200 250 300Breakdown Voltage(V)

CM

OS

Lin

e-W

idth

(Mic

ron)

A-BCD9, NMOS, Philips '06 [2] SOI-BCD, Renesas Semi '06 [3] BCD4, NMOS,Toyota '04 [4]

BCD6, NMOS [5] BCD6, NMOS [6] BCD5, NMOS [7]

BCD6, NMOS [8] BCD6, NMOS [9] SMARTIS-BCD4

Philips '06A-BCD9

Renesas Semi '06

Philips '02A-BCD3

Toyota' 04

Toshiba' 03

Alcatel' 02

TI-LBC6' 01

STM-BCD6' 98

Atmel '02SMARTIS

SOI-BCD

SOI-BCD


10 50 100 120 150

600

500

350

250

180

130

SOI

voltage

tech

nolo

gy n

ode bulk

R&D in advanced research

TI

STM

NXP

Atmel/X-FABDenso,

Renesas, Toshiba

bulkSOI

R&D/targetedproduction

Smart Power Technology roadmap

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